JP2008304910A - Over-drive method of liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an over-drive method of liquid crystal display. <P>SOLUTION: The over-drive method of liquid crystal display comprises: a step of providing a circuit provided with first, second and third input control lines, input data lines, transistors and driving voltage output lines; a step of providing OE and STH control signals to first, second and third OE input lines and an STH input line of a gate driver; and a step of supplying three sets of control voltage pulses (1, 2, 3) of synchronous two sets of control voltage pulses (1)(G1, Gm), (2)(Gm+1, G2m), (3)(G2m+1, G3m) which are produced on output ends of the gate driver to the gates of the transistors Q1 through the corresponding first, second or third input control line by controlling OE signals inputted to the gate driver. When being triggered by the three kinds of synchronous control signals, the circuit feeds the data signal to the driving voltage output lines, produced output driving voltages are outputted to pixels to produce three synchronous scanning lines which are separated from one another by m lines of scanning lines on a screen and the image is displayed. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an overdrive method for a liquid crystal display.

  The use of liquid crystal display (LCD) devices is widespread, and the technology of liquid crystal displays is evolving every day, from consumer electronics products to applications in computers and mobile phone wireless communications. Electronic products tend to develop toward lighter, thinner, more compact, lower power consumption, and lower heat generation. Especially, liquid crystal display technology is traditional or current cathode ray tube (CRT) or light emitting diode (LED). ) Has the potential to overcome the limitations and drawbacks of display technology and play an important role in the future application and development of computers, communication equipment and other consumer electronics products.

  The flat display effect of the liquid crystal display is better than the screen display effect of the CRT, and its power consumption and heat generation are much lower than that of the CRT screen.

  For this reason, it is generally accepted that such displays can be used in new generation mobile phone displays, television receivers, exhibition halls or advertising display panels.

  In addition, currently widely used light emitting diodes are limited by their own characteristics in many practical applications. For example, a light emitting diode is suitable for displaying characters, numbers, or static images, and even when used for displaying dynamic images, it cannot achieve an active and true effect as in liquid crystal display technology.

  As is well known, a general liquid crystal display injects liquid crystal molecules between two glass substrates whose surfaces are specially treated. The arrangement direction of the liquid crystal molecules is modified by a voltage applied to an electrode provided on the glass substrate, thereby causing a change in the luminance of the liquid crystal display panel and displaying an image. However, the liquid crystal display panel itself does not emit light, and therefore a backlight light source similar to a lamp is required, and an image is displayed by irradiating light emitted from this light source.

  More specifically, for example, according to the structure and principle of operation of a TFT-LCD, for example, a TFT-LCD panel has a single layer of liquid crystal sandwiched between two glass substrates and a color filter on the upper glass substrate. The transistor is attached to the lower glass substrate. When the transistor switch is turned on and a voltage is applied to the liquid crystal molecules, the liquid crystal molecules are properly oriented, the polarization of the light beam is modified, and the light and dark state of the pixel is determined using a polarizing plate. In addition, each pixel formed by attaching a color filter to an upper glass substrate has three colors of red, green, and blue, and these generated red, green, and blue pixels constitute an image frame of the liquid crystal panel.

  As described above, when the liquid crystal display technology is compared with the conventional CRT and the current light emitting diode technology, there are advantages that cannot be substituted. However, there are still considerable limitations in the design and use of the liquid crystal display itself. The main limitations are as follows. In other words, the liquid crystal placed between these two substrates causes the liquid crystal molecules to be deflected by the electric field generated by the voltage applied to the electrodes on the substrates, and the liquid crystal molecules are aligned. The texture is changed and a texture is generated. After that, a luminance change is generated by irradiation of light emitted from the backlight module at the rear of the substrate, and an image is displayed through the pixels. However, the voltage applied to the liquid crystal achieves its target voltage at the instant of application, but the liquid crystal molecules themselves cannot achieve the expected target response deflection position after a certain period of time. Therefore, the appearance of optical brightness cannot catch up with the change in voltage. For this reason, a so-called delay phenomenon occurs. In FIG. 1, curve (a) is a drive path characteristic curve of the liquid crystal. Such a delay phenomenon has an unfavorable limitation and influence on the quality of a dynamic liquid crystal display screen that requires rapid change.

  In the traditional well-known technology, an overdrive method is adopted to overcome such a limitation, and its hardware structure is as shown in FIG. A controller consisting of capacitors is connected in series and used to control the level of this drive voltage, thereby shortening the time required for the liquid crystal to achieve the set target optical response level and accelerating the reaction speed of liquid crystal image display. To meet the demands of the frame rapid dynamic display.

To further explain the above principle, refer to the relationship diagram between the control voltage pulse, the drive voltage pulse, and the waveform of the liquid crystal optical response generated by the liquid crystal overdrive device of FIG. The values of the control voltage pulse and the drive voltage pulse described in the following description are both in units of code, which is a kind of voltage unit, for example, μV (10 ⁻⁶ V). The liquid crystal target drive code desired to be achieved by this frame display is 128, and the drive path is the characteristic curve (a). A well-known technique for shortening the time for achieving the target voltage and accelerating the liquid crystal optical response speed is a kind of liquid crystal coaxing method. First, when the drive voltage applied to the input data line D1 is adjusted to the code 200, and the control voltage pulse is applied through the input control line G1, the optical response of the liquid crystal is defined as the drive path (b). More accelerated. When the liquid crystal optical response achieves the target voltage code 128, the drive voltage applied to the input data line D1 is further lowered to code 128, and another control voltage pulse is applied to the input control line G1 to stop the optical response of the liquid crystal. And hold it in code 128 until the next drive voltage pulse is received. However, in the well-known technique, these two consecutive control voltage pulses and the two consecutive drive voltage pulses they produce appear in two adjacent frames and do not appear in the same frame. For this reason, the optical response time of the liquid crystal cannot be made shorter than the time of one frame, which is a limitation and disadvantage of the known technology. For example, if the frame rate of the liquid crystal display is 60 Hz, the time for occupying each frame is 16.7 ms. Therefore, the next control voltage pulse and the next drive voltage pulse are always applied during the next frame. The optical response time of this liquid crystal cannot be shortened to less than 16.7 ms of one frame, which is a serious limitation and disadvantage of the known technology. This makes the liquid crystal optical response not sufficiently rapid. Therefore, a great improvement is required to meet the demand for rapid dynamic changes in the frame of the liquid crystal display.

  The main object of the present invention is to provide a liquid crystal display overdrive method that improves the limitations and drawbacks of known techniques, shortens the optical response time to the driving voltage pulse of the liquid crystal, and accelerates the dynamic response speed of the frame display. There is to do.

The invention according to claim 1 is a circuit comprising a first input control line, a second input control line, a third input control line, an input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor. Providing steps,
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
OE and STH control signals are provided to the first, second and third OE input lines and STH input lines of the gate driver, and related signals are received through these input lines. Two sets of synchronous control voltage pulses are generated at the output terminal of the gate driver, which is composed of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m +1} , G _2m ), (3) (G _{2m + 1} , G _3m ), and the first, second or third input control lines to which the three sets of control voltage pulses (1, 2, 3) correspond. Supplied to the gates of these transistors (Q1) through
In the liquid crystal display overdrive method comprising the above steps,
When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
This is an overdrive method for a liquid crystal display in which the output driving voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated from each other by m scanning lines on the screen and display an image. And
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the drive voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₀ ′, which is negative, and the value V ₀ ′ of the drive voltage pulse V _LC is negative. Is sex
(B) begin entering the first N frames at time point A1, the time value of the drive voltage pulse D ₁ is increased V ₁ and next, by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC that rises also increases to V _{1 and} becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _2, and the control voltage pulses by the action of G _1, the driving voltage pulse V _LC value is momentarily V ₁ decreases to V ₂ (V ₂ <V ₁ ), but is positive, and the value is maintained until time point A3.
(D) Thereafter, the time advances to the time point A3, this time entering began on N + 1 frames, this time, the value of the drive voltage pulse D ₁ is lowered V ₂ ', and the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously drops to V ₂ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the driving voltage pulse D ₁ is V ₂ ′, which is negative, and the value of the driving voltage pulse V _LC becomes the original level due to the action of the control voltage pulse G _1. Is held at V ₂ ′ until time point A5,
If (f) time reaches the time point A5, the value of the drive voltage pulse D ₁ rises to V _2, by the action of the control voltage pulse G _1, the value of the driving voltage pulse V _LC is instantaneously increased V ₂ and hold this until time point A6,
A liquid crystal display overdrive method characterized by the above.

  In summary, the liquid crystal display overdrive method of the present invention can surely improve the limitations and disadvantages of the known liquid crystal display overdrive method, accelerate the optical response speed of the liquid crystal, and greatly display the dynamic display of the liquid crystal display frame. Function can be improved. As a result, the overdrive method of the liquid crystal display of the present invention is superior to the known technology, and has industrial utility value, novelty and inventive step.

In order to achieve the above liquid crystal optical response speed acceleration purpose, the basic structure of the liquid crystal display overdrive device provided by the present invention includes a first input control line, a second input control line, a first input data line, a second An input data line, a first capacitor, a second capacitor, a drive voltage output line, a first transistor, and a second transistor are provided. The first transistor is connected to a first gate connected to the first input control line, a first source connected to the first input data line, a drive voltage output line, a first capacitor, and a drain of the second transistor. A first drain. The second transistor is connected to a second gate connected to the second input control line, a second source connected to the second input data line, a drain of the first transistor, a second capacitor, and a drive voltage output line. Second drain. The first capacitor and the second capacitor are grounded, and the drive voltage output line outputs an overdrive voltage to the pixels of the LCD panel.
The feature is that the first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to one data driver.

  Other variations and implementation types of the liquid crystal display overdrive device used in the present invention will be described in detail below.

  The present invention also provides a method for overdriving a liquid crystal display.

  Various features and advantages of the present invention are described in detail in the following examples, and are described with reference to the drawings for better understanding. Among them, the same reference numerals are used for the same parts.

  In the following embodiments, the advantages and features of the present invention will be described by describing the voltage applied to the liquid crystal, the liquid crystal optical response path and the action using the waveform as a tool.

FIG. 3 shows three drawings (a) to (c) displayed together. FIGS. 4A to 4C are correspondence diagrams of a control voltage pulse waveform, a drive voltage pulse waveform, and a liquid crystal optical response characteristic curve generated by the liquid crystal overdrive device of the present invention. In FIG. 3, (a) to (c), the horizontal axis is time, the unit is ms, and the vertical axis is code as a display unit. The waveform shown in FIG. 3B represents the control voltage pulse applied to the input control line, and the waveform shown in FIG. 3C represents the drive voltage pulse applied to the input data line. FIG. 3A shows the waveform of the drive voltage pulse output by the overdrive device of the present invention combined with the above two types of waveforms. For convenience of contrasting the diagrams (a) to (c) in FIG. 3, the horizontal axis of the time is drawn below (c) in FIG. 3, and (a) in FIG. ) From figure to figure (c) are jointly used. Also, for the sake of easy explanation, this time is divided into a frame time (frame) and is divided into (N-1), N, and (N + 1) frame time partitions, curve (a), (B) represents an optical response path characteristic curve when liquid crystal molecules are applied with different driving voltages. This optical response is usually the luminance at which this liquid crystal appears, and its unit is nits (candela / square meter; cd / ms ² ).

  The liquid crystal display overdrive method and apparatus according to the present invention will be described with reference to the electric circuit diagrams, the control voltage pulse waveform of the liquid crystal controller pixel unit, the drive voltage pulse waveform, and the generated liquid crystal optical response characteristic curve. explain.

The present invention will be described below with reference to FIGS. 4 (a), 4 (b) and 5 (a) and 5 (b). First, FIG. 4A shows a pixel array formed by intersections of a plurality of gate lines and data lines according to the present embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. FIG. 4B shows an overdrive device for the liquid crystal display of this embodiment.
Drive device:
As can be seen from FIGS. 4A and 4B, the overdrive device for the liquid crystal display includes the first input control line (G ₁ ), the second input control line (G _{1 ′} ), the first Input data line (D ₁ ), second input data line (D _{1 ′} ), first capacitor (C _S ), second capacitor (C _LC ), drive voltage output line (not shown), first transistor (Q ), A second transistor (Q ′).
The first transistor (Q) includes a first gate connected to the first input control line (G ₁ ), a first source connected to the first input data line (D ₁ ), a driving voltage output line, and a first voltage. 1 capacitor (C _S ) and a first drain connected to the drain of the second transistor (Q ′).
The second transistor (Q ′) includes a second gate connected to the second input control line (G ₁ ′), a second source connected to the second input data line (D _{1 ′} ), and a first source. A drain of the transistor (Q) and a second capacitor (C _LC ) and a second drain connected to the drive voltage output line are provided.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel. The feature is that the first and second input control lines are connected to one gate driver, and the first and second input data lines are connected to one data driver.
The time difference between the cycle pulse waveforms of the first and second control signals is the time difference between n scanning lines of n pulses and can be adjusted.
Further, refer to FIGS. 5A to 5E. It displays the waveform displayed on the indicator. In FIG. 4, these are the various waveforms generated by the devices shown in FIGS. When the control voltage pulse of this device is G ₁ (FIG. 5B), the corresponding drive voltage pulse is D ₁ (FIG. 5D). When the control voltage pulse of this device is another G _{1 ′} (FIG. 5 (c)), the corresponding drive voltage pulse is D _{1 ′} (FIG. 5 (e)). The actual combined output drive voltage pulse generated for the liquid crystal by the overdrive device of the present invention is V _LC (FIG. 5A).
It should be emphasized again that these drive voltages can achieve their target voltage instantaneously when they are applied, but liquid crystal molecules can only reach their target after a certain response time after receiving the applied voltage. An optical response position can be achieved, which is brought about by the material properties of the liquid crystal itself.
Driving method:
A method of driving the overdrive device for the liquid crystal display according to the first embodiment of the present invention will be described below. It has the following steps:
Providing a first control signal (G ₁ ) having a cycle pulse waveform to the gate of the first transistor (Q);
Providing a second control signal (G _{1 ′} ) having a cycle pulse waveform to the gate of the second transistor (Q ′), the second control signal (G _{1 ′} ) being the first control signal (in addition to the phase delay); The same as G ₁ ),
A first data signal (D ₁ ) is provided to the source of the first transistor (Q) and the circuit drives the first data signal (D ₁ ) when triggered by the first control signal (G ₁ ). Feeding to the voltage output line,
When the second data signal (D _{1 ′} ) is provided to the source of the second transistor (Q ^′ ) and is triggered by the second control signal (G _{1 ′} ), the circuit becomes the second data signal (D _{1 ′} ). Feeding to the drive voltage output line,
Outputting the output drive voltage generated by the above steps to a pixel and displaying an image;
Waveform analysis:
The control voltage generated by the liquid crystal overdrive device shown in FIGS. 4A and 4B according to the first embodiment of the present invention will be described in detail with reference to FIGS. 5A to 5E. A relationship between the waveforms of the pulses G ₁ and G _{1 ′} and the drive voltage pulses D ₁ , D _{1 ′} and V _LC will be described. The driving voltages V ₀ , V ₁ , V ₂ , and V ₃ in the following discussion are voltage values displayed by a kind of code.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the drive voltage pulse D _{1 in} the (N−1) th frame before the time point A1 is V ₀ ′ (code 32), and the value of the drive voltage pulse V _LC is V _{0 ′} , and (code 32) is negative. It is. Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased V ₁ and becomes (code200), by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC to be increased also becomes V ₁ (code 200), becomes positive, and holds it until the time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₂ (code 120), which is positive, and by the action of the control voltage pulse G _{1 ′} , the drive voltage pulse V _LC Is instantaneously lowered from V ₁ (code 200) to V ₂ (code 120), and the value is held until time point A3.
Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame is started, and at this time, the value of the drive voltage pulse D ₁ decreases to V ₂ ′ (code 120) and becomes negative, and the drive voltage pulse is driven by the action of the control voltage pulse G _1. The value of V _LC instantaneously drops to V ₂ ′ (code 120), which is negative and is held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the drive voltage pulse V _LC is still held at the original level V ₂ ′ (code 120) until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₂ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC instantaneously increases to V ₂ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulses G ₁ , G _{1 ′} , drive voltage pulses D ₁ , D _{1 ′,} and V _LC at other time points after the time point A 6 can be easily inferred from the above description.
Curve (a) shown in FIG. 5 (a) is a liquid crystal optical response characteristic curve under the condition that the frame time when overdrive is performed is 5 ms, and curve (b) is the frame time when overdrive is performed. It is a liquid crystal optical response characteristic curve under a situation of 16 ms, and a curve (c) is a liquid crystal optical response characteristic curve when overdrive is not performed.
In FIG. 5B, n shown in the pulse G ₁ portion in the Nth frame in FIG. 5 indicates n pulses, which are n in the control voltage pulses G ₁ and G _{1 ′} in the same frame. This indicates that there is a time difference between the scanning lines. That is, when viewed from the point of view of the pixel, indicating that after the first one in G ₁ pulse can not enter another control voltage pulse G _{1 'only} after the n in G ₁ pulse. The length of the time interval represented by n can be adjusted as needed by the designer according to actual requirements such as liquid crystal material characteristics, and the effect of the pulse-type image display of the CRT display can be simulated with reliability by scanning the black line. To do. This is the greatest feature superior to the known technique of the present invention.

A second embodiment of the present invention will be described below with reference to FIGS. 6A and 6B and FIGS. 7A to 7G. FIG. First, FIG. 6A shows a pixel array formed by intersections of a plurality of gate lines and data lines according to this embodiment, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers. FIG. 6B shows an overdrive device for the liquid crystal display of this embodiment.
Drive device:
As can be seen from FIGS. 6A and 6B, the overdrive device for the liquid crystal display includes the first input control line (G ₁ ), the second input control line (G _{1 ′} ), the first Input data line (D ₁ ), second input data line (D _{1 ′} ), third input data line (D ′), fourth input data line (D), fifth input data line (D _S ), first Capacitor (C _S ), second capacitor (C _LC ), third transistor (Q3), fourth transistor (Q4), drive voltage output line (not shown), first transistor (Q), second transistor (Q ')
The first transistor (Q) includes a first gate connected to the first input control line (G ₁ ), a first source connected to the first input data line (D ₁ ), a driving voltage output line, and a first voltage. 1 capacitor (C _S ) and a first drain connected to the drain of the second transistor (Q ′).
The second transistor (Q ′) includes a second gate connected to the second input control line (G ₁ ′), a second source connected to the second input data line (D _{1 ′} ), and a first source. A drain of the transistor (Q) and a second capacitor (C _LC ) and a second drain connected to the drive voltage output line are provided.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel. The feature is that these first and second input control lines (G ₁ , G _{1 ′} ) are connected to one gate driver, and these first and second input data lines (D ₁ , D _{1 ′} ) are respectively connected. The drains of the third and fourth transistors (Q3 and Q4) connected in parallel are connected to each other, the sources of the third and fourth transistors connected in parallel are connected to one data driver, and the gates thereof are connected to the first and second transistors, respectively. 3 and the fourth input data line (D, D ′), and the time difference between the cycle pulse waveforms of the first and second control signals G ₁ and G _{1 ′} is n scans of n pulses. This is the time difference between the lines and is adjustable.
Driving method:
A method of driving the overdrive device for the liquid crystal display according to the second embodiment of the present invention will be described below. It has the following steps:
Providing a first control signal (G ₁ ) having a cycle pulse waveform to the gate of the first transistor;
Providing a second control signal (G _{1 ′} ) having a cycle pulse waveform to the gate of the second transistor, the second control signal (G _{1 ′} ) being the same as the first control signal except for the phase delay; Providing a fifth data signal (D ₁ ) to the sources of a third transistor (Q3) and a fourth transistor (Q4) connected in parallel;
A third data signal (D ′) is provided to the gate of the third transistor (Q3), and a voltage pulse generated at the drain of the third data signal (D ′) is provided to the source of the first transistor (Q) to provide the first data signal (D ₁ ) and None, when the first transistor (Q1) is triggered by the first control signal (G ₁ ), the circuit feeds a first data signal (D ₁ ) to the drive voltage output line;
The fourth data signal (D) is provided to the source of the fourth transistor (Q4), and the voltage pulse signal generated by the drain of the fourth data signal (D4) is provided to the source of the second transistor (Q ′) to provide the second data signal (D _{1). When} the second transistor (Q ′) is triggered by the second control signal (G _{1 ′} ), the circuit feeds the second data signal (D _{1 ′} ) to the drive voltage output line. ,
Output drive voltage generated in the above steps is output to the pixel and the image is displayed Step waveform analysis:
The control voltage generated by the liquid crystal overdrive device shown in FIGS. 6 (a) and 6 (b) of the second embodiment of the present invention will be described in detail with reference to FIGS. 7 (a) to 7 (g). A relationship between the waveforms of the pulses G ₁ and G _{1 ′} and the drive voltage pulses D ₁ , D _{1 ′} and V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D ₁ of the in the (N-1) frames before the time point A1 is 'in (CODE32), and the value V ₀ which the drive voltage pulse V _LC' V ₀ is (CODE32). Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased V ₁ and becomes (code200), by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC to rise also increases to V ₁ (code 200), and holds it until time point A2. Thereafter, when the time advances to a time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₂ (code 120), which is positive, and by the action of the control voltage pulse G _{1 ′} , the drive voltage pulse V _LC Is instantaneously lowered from V ₁ (code 200) to V ₂ (code 120) to be positive polarity, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts, and at this time, the value of the drive voltage pulse D ₁ drops to V ₂ ′ (code 120), and the value of the drive voltage pulse V _LC is obtained by the action of the control voltage pulse G _1. Momentarily falls to V ₁ ′ (code 120) and is held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the drive voltage pulse V _LC is held at V ₂ ′ (code 120) until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, by the action of this time, the value of the drive voltage pulse D ₁ rises to V ₂ (code120), the control voltage pulse G _{1 '} Then, the value of the drive voltage pulse V _LC instantaneously increases to V ₂ (code 120), and this is held until the time point A6.
Changes in the control voltage pulses G ₁ , G _{1 ′} , drive voltage pulses D ₁ , D _{1 ′,} and V _LC at other time points after the time point A 6 can be easily inferred from the above description.
A curve (a) shown in FIG. 7A is a liquid crystal optical response characteristic curve under the condition that the frame time at the time of overdrive is 5 ms, and a curve (b) is a frame time at the time of overdrive. It is a liquid crystal optical response characteristic curve under a situation of 16 ms, and a curve (c) is a liquid crystal optical response characteristic curve when overdrive is not performed.
In FIG. 7B, “n” shown in the pulse G _{1 ′} portion in the Nth frame in FIG. 7 indicates n pulses, which are represented by n in the control voltage pulses G ₁ and G _{1 ′} in the same frame. It shows that there is a time difference between the scanning lines of the book. That is, when viewed from the point of view of the pixel, indicating that after the first one in G ₁ pulse can not enter another control voltage pulse G _{1 'only} after the n in G ₁ pulse. The length of the time interval represented by n can be adjusted as needed by the designer according to actual requirements such as liquid crystal material characteristics, and the effect of the pulse-type image display of the CRT display can be simulated with reliability by scanning the black line. To do. This is the greatest feature superior to the known technique of the present invention.
The waveform of the drive voltage pulse V _LC output from the above liquid crystal overdrive device of the present embodiment is the same as that of the first embodiment for easy explanation, and prevents the situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.

A third embodiment of the present invention will be described below with reference to FIGS. 8A and 8B and FIGS. 9A to 9D. First, FIG. 8A shows a pixel array formed by intersections of a plurality of gate lines and data lines, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers in this embodiment. FIG. 8B shows an overdrive device for the liquid crystal display of this embodiment.
Drive device:
As can be seen from FIGS. 8A and 8B, the overdrive device of the liquid crystal display includes a first input control line (G ₁ ), a second input control line (G _m ), and a first input. A data line (D ₁ ), a first capacitor (C _S ), a second capacitor (C _LS ), a drive voltage output line, and a first transistor (Q) are provided.
The first transistor (Q) includes a gate connected to the first input control line (G ₁ ) or the second input control line (G _m ), a source connected to the first input data line (D ₁ ), and And a drain connected to the drive voltage output line and two capacitors (C _S , C _LS ) connected in parallel.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel.
The feature is that an input data line is connected to one data driver, an input control line is connected to a gate driver, and the gate driver outputs an output enable (OE) input line and a start horizontal pulse (STH). ) Provide input lines and receive related signals through these input lines to generate synchronous control voltage pulses G1 and Gm of the input control lines, supply them to the gate of the transistor (Q) through the input control lines, and generate by control thereof The driving voltage pulse V _{LC to} be generated simultaneously generates two synchronous scanning lines separated by m scanning lines from each other on the screen to display an image.
Driving method:
A method of driving the overdrive device for the liquid crystal display according to the third embodiment of the present invention will be described below. It has the following steps:
Providing a first control signal (G1) having a cycle pulse waveform to a source of a first transistor (Q1);
Providing OE and STH control signals to the gate driver to allow the gate driver to generate synchronization control signals G1, Gm and providing the gate driver with the gate of the first transistor (Q1);
When triggered by these synchronization control signals G1, Gm, the circuit feeds a data signal to the drive voltage output line;
Providing an output drive voltage generated in the above steps to a pixel and displaying an image;
Waveform analysis:
The control voltage generated by the liquid crystal overdrive device of FIGS. 8A and 8B according to the third embodiment of the present invention will be described in detail with reference to FIGS. 9A to 9D. The relationship between the waveforms of the pulses G ₁ and Gm and the drive voltage pulses D ₁ and V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. 'In (CODE32), and the value V ₀ which the drive voltage pulse V _LC' value of the drive voltage pulse D ₁ of the in the (N-1) frames before the time point A1 is V ₀ (code32) is negative polarity . Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased V ₁ and becomes (code200), by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC to rise also increases to V ₁ (code 200), and holds it until time point A2. Thereafter, when the time advances to time point A2, at this time, the value of the drive voltage pulse D _{1 ′} becomes V ₂ (code 120), and the value of the drive voltage pulse V _LC instantaneously changes due to the action of the control voltage pulse G _1. The voltage drops from V ₁ (code 200) to V ₂ (code 120) and has a positive polarity, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts, and at this time, the value of the drive voltage pulse D ₁ drops to V ₂ ′ (code 120), and the value of the drive voltage pulse V _LC is obtained by the action of the control voltage pulse G _1. Instantaneously drops to V ₂ ′ (code 120), becomes negative polarity, and is held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V ₂ ′ (code 120), and the value of the driving voltage pulse V _LC becomes the original level by the action of the control voltage pulse G ₁ . V ₂ ′ (code 120) is held until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₂ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC instantaneously rises to V ₂ (code 120) and becomes positive, and this is held until time point A6.
Changes in the control voltage pulse G ₁ , the drive voltage pulse D _1, and V _LC at other time points after the time point A 6 can be easily inferred in light of the above description.
A curve (a) shown in FIG. 9A is a liquid crystal optical response characteristic curve under the condition that the frame time at the time of overdrive is 5 ms, and a curve (b) is the frame time at the time of overdrive. It is a liquid crystal optical response characteristic curve under a situation of 16 ms, and a curve (c) is a liquid crystal optical response characteristic curve when overdrive is not performed. Hsync in FIG. 9C indicates that the control voltage pulses G ₁ and G _m are synchronization signals.
According to the design of this embodiment, the control voltage pulses G ₁ and G _m are synchronous control voltage pulses, and the scanning line generated by the control of G _m and the scanning line generated by the control of G ₁ are m− on the screen. There is one scan line interval, and these two types of scan lines scan on the screen in a synchronous manner.該制relationship between the waveforms of the control voltage pulse G _m and the driving voltage pulses D _1, V _LC, the relationship between the waveforms of the control voltage pulse G ₁ and the driving voltage pulse D _1, V _LC described above (i.e., in FIG. 9 ( a) to (d) are the same as those described with reference to FIG.
The waveform of the driving voltage pulse V _LC output from the liquid crystal overdrive device of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, so as to prevent a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.
What must be particularly emphasized here is that, even if the value of the liquid crystal drive voltage pulse V _LC is positive or negative, if it can achieve the set eye standard, it will eventually This also means that the purpose and effect of overdrive of the liquid crystal optical reaction can be achieved.
In addition, according to the design feature of the present invention, two mutually consecutive control voltage pulses G ₁ (FIG. 9B) and G _m (FIG. 9) in the same frame (for example, the Nth frame). 9, the interval m between (c) and (c) can be adjusted as necessary according to the effect and design that are actually desired, and this is an important feature of the present invention and is not in the existing related technology. is there.

A fourth embodiment of the present invention will be described below with reference to FIGS. 10A and 10B and FIGS. 11A to 11E. Both the apparatus of the fourth embodiment and the fifth embodiment described below will be described with reference to FIGS. 10 (a) and 10 (b), the purpose of which is to control different operations using the same apparatus. This is because the method can achieve different display effects on the screen.
First, FIG. 10A shows a pixel array formed by intersections of a plurality of gate lines and data lines, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers in this embodiment. FIG. 10B shows the liquid crystal display overdrive device of this embodiment.
Drive device:
As can be seen from FIGS. 10A and 10B, the overdrive device of this liquid crystal display includes a first input control line (G ₁ ), a second input control line (G _{m + 1} ), 3 input control line (G _{2m + 1} ), input data line (D ₁ ), first capacitor (C _S ), second capacitor (C _LS ), drive voltage output line, and first transistor (Q 1) .
The first transistor (Q1) has a gate connected to the first input control line (G ₁ ), the second input control line (G _{m + 1} ), or the third input control line (G _{2m + 1} ), and input data. A source connected to the line (D ₁ ) and a drain connected to the drive voltage output line and two capacitors (C _S , C _LS ) connected in parallel.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel.
The feature is that the input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver starts with the first, second and third output enable (OE) input lines. Two sets of control voltage pulses that have a horizontal pulse (STH) input line, receive a related signal through these input lines, and are synchronized with the outputs of these gate drivers by controlling the OE signals input by these gate drivers. It is selected from the following three sets of control voltage pulses.
That is, (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ). Two sets of control voltage pulses (1, 3) or (1, 2) or (2, 3) selected and combined from these three sets of control voltage pulses are the first, 2 or the third input control line is supplied to the gates of these transistors (Q1).
The drive voltage pulse V _LC generated by the control drives the pixels on the screen in a cyclic alternate mode, and generates two scanning lines having an interval of 2m scanning lines simultaneously from the first to the second m + 1 line, Display an image.
Driving method:
A method of driving the overdrive device for the liquid crystal display according to the fourth embodiment of the present invention will be described below. It has the following steps:
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
Providing OE and STH control signals to the first, second and third OE input lines and STH input lines of the gate driver and receiving related signals through these input lines; By controlling the OE signal input by these gate drivers, two sets of synchronous control voltage pulses are generated at the output terminals of these gate drivers, which are selected from the following three sets of control voltage pulses: (1) ( G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ), which are selected from these three sets of control voltage pulses and combined. A set of control voltage pulses (1,3) or (1,2) or (2,3) is in the cyclic alternation mode, and the gate of these transistors (Q1) through the corresponding first, second or third input control line To be supplied.
The feature is that when triggered by these two sets of synchronous control signals (1,3) or (1,2) or (2,3), this circuit feeds the data signal to the drive voltage output line, and
The output driving voltage generated in the above steps is output to these pixels, and two synchronous scanning lines separated from each other by 2 m scanning lines are started on the screen from the first to (2m + 1) th scanning lines and in the cyclic alternate mode. Occur and display the image.
Waveform analysis:
The control voltage generated by the liquid crystal overdrive device of FIGS. 10 (a) and 10 (b) of the fourth embodiment of the present invention will be described in detail with reference to FIGS. 11 (a) to 11 (e). The relationship between the pulses (G ₁ , G _m ), (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) and the drive voltage pulses D ₁ , V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D _{1 in} the (N−1) -th frame before the time point A1 is V ₀ ′ (code 32) and is negative with the value V ₂ ′ (code 32) of the driving voltage pulse V _LC. . Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased V ₁ and becomes (code200), by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC to be increased also becomes V ₁ (code 200), becomes positive, and holds it until the time point A2. Then, when the time proceeds to time point A2, this time, the drive voltage pulse D ₁ of the value is lowered V ₂ (code120) becomes, by the action of the control voltage pulse G _1, the value of the driving voltage pulse V _LC moment In general, the voltage drops from V ₁ (code 200) to V ₂ (code 120), but is positive, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts, and at this time, the value of the drive voltage pulse D ₁ drops to V ₂ ′ (code 120), and the value of the drive voltage pulse V _LC is obtained by the action of the control voltage pulse G _1. Instantaneously drops to V ₂ ′ (code 120), becomes negative polarity, and is held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V ₂ ′ (code 120), and the value of the driving voltage pulse V _LC becomes the original level by the action of the control voltage pulse G ₁ . V ₂ ′ (code 120) is held until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₂ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC instantaneously rises to V ₂ (code 120) and becomes positive, and this is held until time point A6.
Changes in control voltage pulses G ₁ , G _{m + 1} , G _{2m + 1} , drive voltage pulses D ₁ and V _LC at each other time point after time point A6 are easily inferred in light of the above description. it can.
A curve (a) shown in FIG. 11A is a liquid crystal optical response characteristic curve under the condition that the frame time at the time of overdrive is 5 ms, and a curve (b) is a frame time at the time of overdrive. It is a liquid crystal optical response characteristic curve under a situation of 16 ms, and a curve (c) is a liquid crystal optical response characteristic curve when overdrive is not performed.
The purpose of this embodiment is to develop two synchronous scanning lines on the screen, as shown in FIGS. 11 (a), 11 (b) and 11 (c). ₁ , G _{m + 1} , G _{2m + 1} are synchronous control voltage pulses, and the drive voltage pulse generated by the control generates two sets of scanning lines on the screen, which are separated from each other by an interval of 2m scanning lines. Synchronous scanning is performed.
Thus, according to the design of this embodiment, G _{2m + 1} and G ₁ are synchronous control voltage pulses, and the scanning line generated by the control of G _{2m + 1} and the scanning line generated by the control of G ₁ are displayed on the screen. There is an interval of 2m scanning lines above, and these two sets of scanning lines scan on the screen in a synchronous manner. That is, scanning starts from the first scanning line and the (2m + 1) th scanning line on the screen. The relationship between the control voltage pulse G _{2m + 1} and the waveforms of the drive voltage pulses D ₁ and V _LC is the same as the relationship between the control voltage pulse G ₁ and the waveforms of the drive voltage pulses D ₁ and V _LC (that is, ( a) to (e) as described with reference to FIG.
The waveform of the driving voltage pulse V _LC output from the liquid crystal overdrive device of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, so as to prevent a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.

[Invention of Claim 1]
A fifth embodiment of the present invention will be described below with reference to FIGS. 10A and 10B and FIGS. 12A to 12E. Both the apparatus of the fifth embodiment and the above-described fourth embodiment are explained using FIG. 10 (a) and FIG. 10 (b), and the object is to use the same apparatus with different control methods. This is to explain that different display effects can be achieved on the screen.
First, FIG. 10A shows a pixel array formed by intersections of a plurality of gate lines and data lines, and a drive circuit formed by a plurality of data drivers and a plurality of gate drivers in this embodiment. FIG. 10B shows the liquid crystal display overdrive device of this embodiment.
Drive device:
As can be seen from FIGS. 10A and 10B, the overdrive device of this liquid crystal display includes a first input control line (G ₁ ), a second input control line (G _{m + 1} ), 3 input control line (G _{2m + 1} ), input data line (D ₁ ), first capacitor (C _S ), second capacitor (C _LS ), drive voltage output line, and first transistor (Q 1) .
The first transistor (Q1) has a gate connected to the first input control line (G ₁ ), the second input control line (G _{m + 1} ), or the third input control line (G _{2m + 1} ), and input data. A source connected to the line (D ₁ ) and a drain connected to the drive voltage output line and two capacitors (C _S , C _LS ) connected in parallel.
The first capacitor and the second capacitor are a storage capacitor and a liquid crystal equivalent capacitor, respectively, and are grounded, and the drive voltage output line is used to display an image by outputting an overdrive voltage to the pixels of the LCD panel.
The feature is that the input data line is connected to one data driver, the input control line is connected to the gate driver, and the gate driver starts with the first, second and third output enable (OE) input lines. Three sets of control voltage pulses that have a horizontal pulse (STH) input line, receive a related signal through these input lines, and are synchronized with the outputs of these gate drivers by controlling the OE signals input by these gate drivers. Which consists of three sets of control voltage pulses: That is, (1) (G ₁ , G _m ), (2) (G _{m + 1} , G _2m ), (3) (G _{2m + 1} , G _3m ). These three sets of control voltage pulses are supplied to the gates of these transistors (Q1) through corresponding first, second or third input control lines. When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and the drive voltage pulse V _LC generated by the control drives the pixel. Then, three synchronous scanning lines that are on the screen and separated from each other by m scanning lines are generated to display an image.
Driving method:
A driving method of the overdrive device for the liquid crystal display according to the fifth embodiment of the present invention will be described below. It has the following steps:
Providing a data signal (D ₁ ) having a cycle pulse waveform to the source of the transistor (Q1);
Providing OE and STH control signals to the first, second and third OE input lines and STH input lines of the gate driver and receiving related signals through these input lines; The control of the OE signal input by these gate drivers generates two sets of synchronous control voltage pulses at the output terminals of these gate drivers, which are composed of the following three sets of control voltage pulses: (1) ( G _1, G _m), is _{(2) (G m + 1} , G 2m), a _{(3) (G 2m + 1} , G 3m), the three sets of control voltage pulse (1,2,3) It is supplied to the gates of these transistors (Q1) through corresponding first, second or third input control lines.
The feature is that when triggered by these three sets of synchronization control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
The output drive voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated from each other by m scanning lines on the screen, and display an image.
Waveform analysis:
The control voltage generated by the liquid crystal overdrive device shown in FIGS. 10 (a) and 10 (b) of the fifth embodiment of the present invention will be described in detail with reference to FIGS. 12 (a) to 12 (e). The relationship between the pulses (G ₁ , G _m ), (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) and the drive voltage pulses D ₁ , V _LC will be described.
Usually, since AC power (AC) is used as a driving voltage for the liquid crystal, there is a phenomenon in which positive and negative phases alternate during the control and driving process (that is, the waveforms of the driving voltage pulses D ₁ , D _{1 ′} and V _LC ). A phenomenon in which positive and negative phases with respect to the reference voltage V _COM appear alternately).
These waveforms are cyclically overlapped in the time sequence from A1 to A6 using, for example, the following method. The value of the driving voltage pulse D _{1 in} the (N−1) -th frame before the time point A1 is V ₀ ′ (code 32) and is negative with the value V ₂ ′ (code 32) of the driving voltage pulse V _LC. . Start entering the first N frames at time point A1, the value of this time the driving voltage pulses D ₁ is increased V ₁ and becomes (code200), by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC to be increased also becomes V ₁ (code 200), becomes positive, and holds it until the time point A2. Then, when the time proceeds to time point A2, this time, the drive voltage pulse D ₁ of the value is lowered V ₂ (code120) becomes, by the action of the control voltage pulse G _1, the value of the driving voltage pulse V _LC moment In general, the voltage drops from V ₁ (code 200) to V ₂ (code 120), but is positive, and the value is held until time point A3. Thereafter, the time advances to time point A3. At this time, entry into the (N + 1) th frame starts. At this time, the value of the drive voltage pulse D ₁ decreases to V ₂ ′ (code 120), and the value of the drive voltage pulse V _LC is reduced by the action of the control voltage pulse G _1. It instantaneously falls to V ₂ ′ (code 120), becomes negative polarity, and is held until time point A4. Thereafter, when the time point A4 is reached, at this time, the value of the driving voltage pulse D ₁ is V ₂ ′ (code 120), and the value of the driving voltage pulse V _LC becomes the original level by the action of the control voltage pulse G ₁ . V ₂ ′ (code 120) is held until the time point A5 is reached. Then, when the time reaches the time point A5, the (N + 2) of the started enters the frame, at this time, the value of the driving voltage pulse D ₁ rises to V ₂ (code120), by the action of the control voltage pulse G _1, The value of the drive voltage pulse V _LC instantaneously rises to V ₂ (code 120) and becomes positive, and this is held until time point A6.
Changes in control voltage pulses G ₁ , G _{m + 1} , G _{2m + 1} , drive voltage pulses D ₁ and V _LC at each other time point after time point A6 are easily inferred in light of the above description. it can.
Curve (a) shown in FIG. 12 (a) is a liquid crystal optical response characteristic curve under the condition that the frame time at the time of overdrive is 5 ms, and curve (b) is the frame time at the time of overdrive. It is a liquid crystal optical response characteristic curve under a situation of 16 ms, and a curve (c) is a liquid crystal optical response characteristic curve when overdrive is not performed.
The purpose of this embodiment is to develop three synchronous scanning lines on the screen, as shown in FIGS. 12 (a), 12 (b) and 12 (c). ₁ , G _{m + 1} , G _{2m + 1} are synchronous control voltage pulses, and a drive voltage pulse generated by the control generates three sets of scanning lines on the screen, which are mutually separated by an interval of m scanning lines. Synchronous scanning is performed.
Thus, according to the design of this embodiment, G _{m + 1} and G ₁ are synchronous control voltage pulses, and the scanning lines generated by the control of G _{m + 1} and the scanning lines generated by the control of G ₁ are displayed on the screen. There are m scanning line intervals above, and these two sets of scanning lines scan on the screen in a synchronous manner. That is, scanning starts from the first scanning line and the mth scanning line on the screen. The relationship between the control voltage pulse G _{m + 1} and the waveforms of the drive voltage pulses D ₁ and V _LC is the same as the relationship between the control voltage pulse G ₁ and the waveforms of the drive voltage pulses D ₁ and V _LC (that is, ( a) to (e) as described with reference to FIG.
At the same time as described above, the scanning lines generated on the screen by the corresponding driving voltage pulses generated by the control voltage pulses (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) are respectively synchronized. Start scanning down from the (m + 1, 2m + 1) scanning lines on the screen (ie, this embodiment generates three sets of scanning lines on the screen, which are downwards from the first, (m + 1, 2m + 1) scanning lines, respectively. To perform a redundant scan). The relationship between the control voltage pulses (G _{m + 1} , G _2m ), (G _{2m + 1} , G _3m ) and the waveforms of the drive voltage pulses D ₁ , V _LC is the same as the control voltage pulses (G ₁ , G _m ) is the same as the relationship between the waveforms of the drive voltage pulses D ₁ and V _LC (that is, as described in FIGS. 12A to 12E).
The waveform of the driving voltage pulse V _LC output from the liquid crystal overdrive device of the present embodiment is the same as that of the first embodiment for the sake of explanation and understanding, so as to prevent a situation that is too complicated and difficult to understand during the explanation process. Yes. However, the designer can design the waveform design into a waveform having various changes according to actual needs.
As can be seen from the apparatus, method and waveform analysis of the five embodiments of the present invention described above, the method and apparatus of the present invention provide design and manufacturing elasticity. In particular, the time interval n between the first and second input control voltage pulses (G ₁ , G _{1 ′} ) in the first and second embodiments described above can be adjusted. Due to the elasticity of the design, the designer of the liquid crystal display can adjust the design according to the different optical response characteristics of various liquid crystal materials, and can be a liquid crystal display optimized by the liquid crystal overdrive technology of the present invention. Can be matched to the actual request. All of the above advantages of the present invention are deficient in existing technology.

It is a drive path characteristic curve figure of a liquid crystal molecular optical response in the state of target voltage application. It is a schematic diagram of a liquid crystal overdrive device of a known technology. FIG. 6 is a correspondence diagram of a control voltage pulse waveform, a drive voltage pulse waveform, and a liquid crystal optical response characteristic curve generated by the liquid crystal overdrive device of the present invention. Schematic diagram (a) showing a pixel array composed of intersections of a plurality of gate lines and data lines and a drive circuit composed of a plurality of data drivers and a plurality of gate drivers according to the first embodiment of the present invention, It is an overdrive apparatus display figure (b) of the liquid crystal display of 1st Example of invention. It is a corresponding | compatible waveform diagram of the control voltage pulse which the overdrive apparatus of the liquid crystal display of 1st Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. The schematic diagram (a) which shows the pixel array comprised by the intersection of the several gate line and data line of 2nd Example of this invention, and the drive circuit comprised by several data driver and several gate driver, and this book It is an overdrive apparatus display figure (b) of the liquid crystal display of 2nd Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the overdrive apparatus of the liquid crystal display of 2nd Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. The schematic diagram (a) which shows the pixel array comprised by the intersection of the some gate line and data line of 3rd Example of this invention, the drive circuit comprised by the some data driver and the some gate driver, and this book It is an overdrive apparatus display figure (b) of the liquid crystal display of 3rd Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the overdrive apparatus of the liquid crystal display of 3rd Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. Schematic diagram (a) showing a pixel array constituted by intersections of a plurality of gate lines and data lines, and a drive circuit constituted by a plurality of data drivers and a plurality of gate drivers according to the fourth embodiment of the present invention, It is an overdrive apparatus display figure (b) of the liquid crystal display of the 4th and 5th Example of invention. It is a corresponding | compatible waveform figure of the control voltage pulse which the overdrive apparatus of the liquid crystal display of 4th Example of this invention generate | occur | produces, a drive voltage pulse, and a liquid crystal optical response. It is a corresponding | compatible waveform diagram of the control voltage pulse which the overdrive apparatus of the liquid crystal display of 5th Example of this invention (the invention concerning Claim 1), a drive voltage pulse, and a liquid crystal optical response.

Explanation of symbols

(A) Characteristic curve (b) Characteristic curve A1, A2, A3 Time point A4, A5, A6 Time point Cs Storage capacitor Cs ₁ Storage capacitor Cs ₂ Storage capacitor C _LS Liquid crystal equivalent capacitor C _LS1 Liquid crystal equivalent capacitor C _LS2 Liquid crystal equivalent capacitor D ₁ input data line D ₂ input data line D input data line D ′ input data line D ₁ ′ input data line G ₁ input control line G ₂ input control line G _{1 ′} input control line G _m input control line G _{m + 1} Input control line G _2m Input control line G _{2m + 1} Input control line G _3m Input control line V _LC output drive voltage Q Transistor Q 'Transistor Q ₁ Transistor Q ₂ Transistor Q ₃ Transistor Q ₄ Transistor V _COM reference voltage V _COM1 Reference voltage V _COM2 reference voltage

Claims (1)

Providing a circuit comprising a first input control line, a second input control line, a third input control line, an input data line, a first capacitor, a second capacitor, a drive voltage output line, and a first transistor, a cycle pulse waveform Providing a data signal (D ₁ ) having: to the source of transistor (Q1);
OE and STH control signals are provided to the first, second and third OE input lines and STH input lines of the gate driver, and related signals are received through these input lines. Two sets of synchronous control voltage pulses are generated at the output terminal of the gate driver, which is composed of the following three sets of control voltage pulses: (1) (G ₁ , G _m ), (2) (G _{m +1} , G _2m ), (3) (G _{2m + 1} , G _3m ), and the first, second or third input control lines to which the three sets of control voltage pulses (1, 2, 3) correspond. Supplied to the gates of these transistors (Q1) through
With the above steps,
When triggered by these three sets of synchronous control signals (1, 2, 3), this circuit feeds the data signal to the drive voltage output line, and
This is an overdrive method for a liquid crystal display in which the output driving voltage generated in the above steps is output to these pixels to generate three synchronous scanning lines separated from each other by m scanning lines on the screen and display an image. And
AC power (AC) is used as a control voltage and a drive voltage, and therefore, these voltages have a phenomenon in which positive and negative phases alternate during the control and drive process. It circulates redundantly in the time order of A1 to A6, that is,
(A) The value of the drive voltage pulse D _{1 in} the (N−1) th frames before the time point A1 is V ₀ ′, which is negative, and the value V ₀ ′ of the drive voltage pulse V _LC is negative. Is sex
(B) begin entering the first N frames at time point A1, the time value of the drive voltage pulse D ₁ is increased V ₁ and next, by the action of the control voltage pulse G _1, generation of the liquid crystal overdrive device The value of the output drive voltage pulse V _LC that rises also increases to V _{1 and} becomes positive, and holds it until time point A 2.
(C) Thereafter, when the time proceeds to time point A2, this time, the value of the drive voltage pulse D ₁ is V _2, and the control voltage pulses by the action of G _1, the driving voltage pulse V _LC value is momentarily V ₁ decreases to V ₂ (V ₂ <V ₁ ), but is positive, and the value is maintained until time point A3.
(D) Thereafter, the time advances to the time point A3, this time entering began on N + 1 frames, this time, the value of the drive voltage pulse D ₁ is lowered V ₂ ', and the action of the control voltage pulse G ₁ As a result, the value of the drive voltage pulse V _LC instantaneously drops to V ₂ ′, which is negative and held until time point A4.
(E) Thereafter, when the time point A4 is reached, the value of the driving voltage pulse D ₁ is V ₂ ′, which is negative, and the value of the driving voltage pulse V _LC becomes the original level due to the action of the control voltage pulse G _1. Is held at V ₂ ′ until time point A5,
If (f) time reaches the time point A5, the value of the drive voltage pulse D ₁ rises to V _2, by the action of the control voltage pulse G _1, the value of the driving voltage pulse V _LC is instantaneously increased V ₂ and hold this until time point A6,
A liquid crystal display overdrive method characterized by the above.

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