JP2008288572A - Method of manufacturing nitride semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor element such as a light emitting element and a light receiving element, the nitride semiconductor element having electrodes formed on the backside by using a semiconductor substrate composed of a nitride semiconductor having high crystallinity. <P>SOLUTION: The nitride semiconductor substrate is obtained by growing the nitride semiconductor with a thickness of 100 μm or larger on a substrate made of a material different from the nitride semiconductor, and removing the substrate. A surface of the nitride semiconductor substrate is ground to have a level difference of ±1 μm or smaller. Preferably, the level difference on the surface is ±0.5 μm or smaller. The nitride semiconductor substrate is doped with an n-type impurity. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention relates to a method of manufacturing a substrate made of a nitride semiconductor (In _X Al _Y Ga _1-XY N, 0 ≦ X, 0 ≦ Y, X + Y ≦ 1), a light emitting diode (LED) using the nitride semiconductor substrate, The present invention relates to a method for manufacturing a nitride semiconductor element used in a light emitting element such as a laser diode (LD), a light receiving element such as a solar cell or an optical sensor, or an electronic device such as a transistor.

  In general, when a semiconductor is grown on a substrate, it is known that when a substrate lattice-matched with the semiconductor to be grown is used, the crystal defects of the semiconductor are reduced and the crystallinity is improved. However, nitride semiconductors are generally grown on substrates that do not lattice match with nitride semiconductors such as sapphire, spinel, and silicon carbide, since there are no lattice-matched substrates in the world today.

  On the other hand, attempts to fabricate a GaN bulk crystal that is lattice-matched with a nitride semiconductor have been made by various research institutions, but only a few millimeters have been reported so far. Is far away.

  As a technique for producing a GaN substrate, for example, in JP-A-7-202265 and JP-A-7-165498, a buffer layer made of ZnO is formed on a sapphire substrate, and a nitride semiconductor is formed on the buffer layer. A technique for dissolving and removing the buffer layer after growth is described. However, the crystallinity of the ZnO buffer layer grown on the sapphire substrate is poor, and it is difficult to obtain a good quality nitride semiconductor crystal even if a nitride semiconductor is grown on the buffer layer. Furthermore, it is difficult to continuously grow a nitride semiconductor having a thick film as a substrate on a buffer layer made of thin ZnO.

  When producing a nitride semiconductor element used for various electronic devices such as LED elements, LD elements, light receiving elements, etc., if a nitride semiconductor substrate can be produced, a new nitride semiconductor is formed on the substrate. Thus, nitride semiconductors with few lattice defects can be grown, so that the crystallinity of these elements is dramatically improved, and elements that have not been realized can be realized. Accordingly, an object of the present invention is to first provide a method for manufacturing a substrate made of a nitride semiconductor having good crystallinity and a novel method for manufacturing an element using the nitride semiconductor substrate.

First, the nitride semiconductor substrate manufacturing method of the present invention is 0.3 μm or less at a temperature lower than the growth temperature of a nitride semiconductor grown in a subsequent step on a substrate having a thickness of 1 mm or more made of a material different from the nitride semiconductor. After growing a buffer layer made of In _x Ga _1-x N (0 ≦ X ≦ 0.3) having a thickness of 100 nm, a nitride semiconductor is grown to a thickness of 100 μm or more, and then the substrate is removed. It is characterized by doing. As the substrate, it is most preferable to use a sapphire (Al2 O3) or spinel (MgAl ₂ O _4). It is most preferable that the nitride semiconductor to be grown is GaN not doped with n-type impurities (non-doped), or GaN containing n-type impurities in a range of 1 × 10 ¹⁹ / cm ³ or less. It is necessary to use a substrate having a thickness of 1 mm or more. If the substrate is thinner than 1 mm, the substrate is warped due to a high temperature during growth, and a thick nitride semiconductor substrate cannot be grown.

  The present invention is characterized in that the nitride semiconductor substrate growth method is hydride vapor phase epitaxy (HVPE). The HVPE method involves reacting a group 3 element vapor such as gallium, aluminum, or indium with a halogen gas such as hydrogen chloride to obtain a halide such as a chloride, bromide, or iodide of a group 3 element. In this method, a nitride semiconductor is obtained by reacting a halide with an N source such as ammonia or hydrazine at a high temperature. A method of obtaining GaN by reacting gallium chloride with ammonia is often used. Although the substrate can be grown by the MOVPE method, it takes a longer time than the HVPE method.

  According to the substrate manufacturing method of the present invention, before a nitride semiconductor layer is grown, a buffer layer made of a nitride semiconductor having a thickness of 0.3 μm or less at a temperature lower than the growth temperature of the nitride semiconductor layer is grown. It is characterized by.

  According to the substrate manufacturing method of the present invention, the grown nitride semiconductor substrate has a full width at half maximum (hereinafter, simply referred to as half width) of 5 minutes or less of an X-ray rocking curve by a biaxial crystal method. It is characterized by that. If the full width at half maximum is greater than 5 minutes, the crystallinity of the new nitride semiconductor that grows on the nitride semiconductor substrate becomes poor. Further, the substrate manufacturing method of the present invention is characterized in that the substrate made of a material different from that of the nitride semiconductor is removed by polishing. By means such as dissolution (wet etching) or dry etching, it is difficult to remove the substrate, and the nitride semiconductor substrate tends to be damaged.

The method for manufacturing a nitride semiconductor device according to the present invention includes an In _x film having a film thickness of 0.3 μm or less at a temperature lower than the growth temperature of a nitride semiconductor grown in a subsequent process on a substrate made of a material different from the nitride semiconductor. A _{first step} of growing a buffer layer made of Ga _1-x N (0 ≦ X ≦ 0.3) and growing a nitride semiconductor with a thickness of 100 μm or more on the buffer layer; and after the first step, A second step of fabricating a nitride semiconductor substrate by removing the substrate; a third step of polishing the nitride semiconductor substrate after the second step until the surface unevenness difference becomes ± 1 μm or less; And a fourth step of newly growing a nitride semiconductor on the polished surface of the nitride semiconductor substrate.

  Further, the first step is characterized in that a nitride semiconductor is grown by HVPE, and the fourth step is characterized in that the nitride semiconductor is grown by metal organic vapor phase epitaxy (MOVPE). The MOVPE method is a method for obtaining a nitride semiconductor by reacting a gas composed of an organometallic compound of a Group 3 element with a gas composed of a Group 5 element such as ammonia or hydrazine.

The LED element is provided on a substrate made of a nitride semiconductor, and the LED element is provided with a positive electrode containing Ni and Au on the uppermost p-type GaN layer, and a negative electrode made of W, Si and Au on the back side of the substrate. A nitride semiconductor device characterized by the above. The LED element includes a Si-doped n-type GaN layer on a substrate, a superlattice cladding layer comprising a Si-doped n-type Al _0.2 Ga _0.8 N layer and a non-doped GaN layer, a single quantum well An active layer composed of a structure, a superlattice clad layer composed of Mg-doped p-type Al _0.2 Ga _0.8 N and Mg-doped p-type GaN, and Mg-doped p-type GaN in this order. The nitride semiconductor device according to claim 1.

  An LD element is provided on a substrate made of a nitride semiconductor, the LD element has a ridge shape, a p electrode made of Ni and Au is formed in a stripe shape on the outermost surface of the ridge, and an n electrode made of Ti and Al. A nitride semiconductor device having an area of 80% or more of a back surface of a substrate. The LD element includes a buffer layer, an n-side contact layer, a crack prevention layer, an n-side cladding layer, an n-side light guide layer, an active layer, a cap layer, a p-side light guide layer, a p-side cladding layer, and a p-side on a substrate. The nitride semiconductor device according to claim 3, wherein the nitride semiconductor device is formed in the order of contact layers. The nitride semiconductor device according to claim 1, wherein the nitride semiconductor has a thickness of 100 μm or more.

  As described above, according to the method of the present invention, a GaN substrate that could not be manufactured conventionally can be formed, so that the GaN element does not need to use an insulating substrate as in the conventional case. Therefore, it is not a flip chip type in which the positive electrode and the negative electrode are taken out on the same surface side, but the electrode can be taken out from the substrate side like a device using GaAs as a substrate. When this nitride semiconductor element is used as a light-emitting device, it can have the same structure as a device in which electrodes are taken out from the other substrate side, so that a high-definition screen such as an edge-emitting display can be realized. Further, when used in a high-temperature device such as a laser element, the crystallinity and heat dissipation of the element are improved and the element life is dramatically improved.

  In the method for producing a nitride semiconductor substrate of the present invention, a hydride vapor phase epitaxy (HVPE), a metal organic vapor phase epitaxy (MOVPE), a molecular beam is used to grow a nitride semiconductor on a substrate made of a different material. Although there is a vapor phase growth method such as a vapor phase growth method (MBE), the HVPE method is preferably used for growing with a film thickness of 100 μm or more. Although MOVPE or MBE may be used, it takes a long time of 10 hours or more to grow with a film thickness of 100 μm or more, which is not preferable industrially.

  What is important in the method of manufacturing a nitride semiconductor substrate is to grow a nitride semiconductor on a different substrate of 1 mm or more. Nitride semiconductors are usually grown at temperatures of 800 ° C. or higher, preferably 1000 ° C. or higher. When a nitride semiconductor is grown at such a high temperature, the heterogeneous substrate is warped during the growth. When a nitride semiconductor is grown on a warped heterogeneous substrate with a thickness of 100 μm or more, the nitride semiconductor cracks during the growth, and a nitride semiconductor with good crystallinity cannot be grown. However, using a heterogeneous substrate of 1 mm or more makes it difficult for the heterogeneous substrate to warp even at high temperatures, so that a thick nitride semiconductor film can be grown with good crystallinity. A substrate having a thickness of 1 mm or more, preferably 1.2 mm or more, more preferably 1.5 mm or more is used. The upper limit is not particularly limited, but it is desirable to use an upper limit of 3 mm or less. If it is thicker than 3 mm, it takes a long time to remove the substrate later. Examples of the substrate include sapphire, spinel, ZnO, GaAs, Si, GaP, and SiC. As described above, sapphire and spinel are very stable against high temperatures, and nitride semiconductors are used. Suitable for growing thick films. It is desirable that the nitride semiconductor grown on the different substrate is grown as thick as possible with a thickness of 100 μm or more. The growth is preferably performed with a film thickness of 150 μm or more, more preferably 200 μm or more. The upper limit is preferably 500 μm or less. When grown at 500 μm or more, the nitride semiconductor tends to crack again and the crystallinity tends to deteriorate.

Further, a nitride semiconductor having good crystallinity can be obtained by growing a buffer layer having a thickness of 0.3 μm or less at a temperature lower than the growth temperature of the nitride semiconductor layer before the nitride semiconductor layer is grown on the different substrate. Can grow. As the buffer layer, for example, GaN, AlGaN, AlN, InGaN or the like is grown. Preferably, GaN, Al _Y Ga _1-Y N having an Al composition Y of 0.5 or less, and In having an In composition X of 0.3 or less. it is desirable to grow the _X Ga _1-X N. The growth temperature is lower than the growth temperature of the nitride semiconductor. For example, the buffer layer can be grown in the range of 200 ° C. to 900 ° C.

Nitride semiconductors grown on different substrates can produce non-doped GaN or GaN containing n-type impurities in the range of 1 × 10 ¹⁹ / cm ³ or less to produce the most crystalline nitride semiconductor substrate. it can. When the n-type impurity concentration exceeds 1 × 10 ¹⁹ / cm ³ , the crystallinity deteriorates, the half-value width of the X-ray rocking curve of the nitride semiconductor becomes long, and cracks are likely to occur in the crystal. However, in a method using quartz glass in a reaction vessel such as the HVPE method, n-type impurities such as Si and O are mixed as impurities from quartz. However, a nitride semiconductor substrate with good crystallinity can be produced by minimizing the amount of impurities and keeping it within the above range. On the other hand, Group 4 elements such as Si, Ge, Sn, and S can be cited as impurities that are intentionally doped using the MOVPE method.

  Furthermore, the nitride semiconductor layer is damaged even in the step of removing the dissimilar substrate by growing a nitride semiconductor crystal having a half width of the X-ray rocking curve of the nitride semiconductor within 5 minutes, more preferably within 3 minutes. Thus, a nitride semiconductor having a thickness of 100 μm or more can be used as a substrate for manufacturing a novel nitride semiconductor element while maintaining good crystallinity.

  In the substrate manufacturing method of the present invention, it is desirable to remove the substrate made of a material different from the nitride semiconductor by polishing. For polishing, fine powders such as diamond and SiC are used as an abrasive. On the other hand, etching means such as dry etching and wet etching tend to easily damage the nitride semiconductor substrate, and it takes a longer time than polishing, which is not preferable.

  On the other hand, the nitride semiconductor device manufacturing method of the present invention is a device manufacturing method using a nitride semiconductor substrate. In the device manufacturing method of the present invention, the thickness of the different substrate is not particularly limited. What is important is the third step of polishing the surface of the nitride semiconductor substrate after removing the substrate until the unevenness difference of the surface of the nitride semiconductor substrate becomes ± 1 μm or less. When the unevenness difference is ± 1 μm or more, the film quality of the nitride semiconductor grown on the nitride semiconductor substrate tends to be unstable, and an element with good crystallinity cannot be manufactured.

  Next, in the first step of the device manufacturing method of the present invention, there is HVPE, MOVPE, MBE or the like to grow a nitride semiconductor on a heterogeneous substrate to 100 μm or more. Preferably, HVPE, MOVPE is used. Most preferably, it is grown by the HVPE method. With the HVPE method, it is easy to grow a thick nitride semiconductor substrate quickly. In the fourth step, the HVPE method may be used to produce an element on the nitride semiconductor substrate, but the MOVPE method is most preferably used. MOVPE makes it easy to control the thickness of the nitride semiconductor, and moreover, when growing a nitride semiconductor containing Al, such as AlGaN, cracks are less likely to occur compared to the HVPE method. Further, in the HVPE method, Al chloride reacts vigorously with quartz glass used in the HVPE apparatus, and it is difficult to grow a nitride semiconductor containing Al. Therefore, the nitride semiconductor substrate in the first step is most preferably a substrate made of GaN that does not contain Al.

  Furthermore, in the manufacturing method of the present invention, the growth surface of the nitride semiconductor is preferably a polished surface of the nitride semiconductor substrate in contact with the substrate made of a material different from the nitride semiconductor. At this time, it is natural that the buffer layer grown on the different substrate is removed by polishing, and the polished surface of the nitride semiconductor substrate from which the buffer layer has been removed is used as the growth surface. The half width of the X-ray rocking curve of the nitride semiconductor substrate after polishing is desirably 5 minutes or less, more preferably 3 minutes or less. The full width at half maximum for evaluating the crystallinity of the nitride semiconductor is almost determined in advance when the nitride semiconductor substrate is grown in the first step. However, the crystallinity of the nitride semiconductor grown on the side closer to the heterogeneous substrate tends to have fewer cracks and fewer crystal defects than the nitride semiconductor grown farther to the heterogeneous substrate. Therefore, the nitride semiconductor crystal on the side from which the heterogeneous substrate is removed is improved, and a nitride semiconductor element having good crystallinity can be obtained by using that side as a growth surface of a new nitride semiconductor element.

Hereinafter, a method for manufacturing a nitride semiconductor substrate of the present invention will be described.
Example 1 (HVPE)
A quartz boat filled with Ga metal is installed inside a reaction vessel tube made of quartz. Further, a sapphire substrate having a thickness of 1.2 mm and a diameter of 2 inches is installed at a position away from the quartz boat. Note that a halogen gas supply pipe is provided at a position close to the Ga metal in the reaction vessel, and an N source supply pipe is provided at a position close to the sapphire substrate separately from the halogen gas supply.

A nitrogen carrier gas and mainly HCl gas are introduced from a halogen gas pipe. At this time, the Ga metal boat is heated to 900 ° C., and the sapphire substrate side is heated to 510 ° C. Then, HCl gas and Ga are reacted to generate GaCl _{3. From} the N source supply pipe close to the sapphire substrate side, ammonia gas is also supplied mainly with nitrogen carrier gas, and a buffer layer made of GaN on the sapphire substrate. Is grown to a film thickness of 300 Å.

  After growing the buffer layer, the temperature on the sapphire substrate side is raised to 1050 ° C., and growth is performed at a growth rate of 0.5 μm / min for 10 hours to grow GaN having a thickness of 300 μm.

  After the growth, the wafer is taken out from the reaction vessel, and further annealed at 1100 ° C. for 5 minutes in a sealed vessel in which the GaN wafer is pressurized to a pressure higher than the decomposition pressure of GaN. Thus, annealing in a nitrogen atmosphere pressurized to a pressure higher than the decomposition pressure of GaN tends to reduce crystal defects of GaN and improve crystallinity.

  After annealing, the wafer is transferred to a polishing apparatus, and the sapphire substrate side is lapped using a diamond abrasive to remove the sapphire substrate and the buffer layer. Subsequently, polishing is performed using a finer diamond abrasive to obtain a GaN substrate having a thickness of 295 μm.

The nitride semiconductor substrate obtained as described above was taken out from the polishing apparatus and the unevenness of the nitride semiconductor substrate on the polishing side was measured, and was within ± 0.5 μm. Further, when the half-value width of the X-ray rocking curve was measured from the polished surface, it was about 3 minutes, and it was found that a GaN substrate with good crystallinity was obtained. It was found by SIMS that the GaN substrate contained Si as impurities at 5 × 10 ¹⁷ / cm ³ or less and O at 1 × 10 ¹⁶ / cm ³ or less. This is presumed to be mixed from HCl of the raw material gas and the quartz reaction vessel.

Example 2 (MOVPE)
Using a MOVPE apparatus shown in JP-A-4-164895, FIG. 2, a sapphire (C-plane) substrate having a thickness of 1.0 mm and a diameter of 2 inches is set in a reaction container of this apparatus, and the inside of the container is hydrogenated. Then, the substrate temperature is raised to 1050 ° C. while flowing hydrogen to clean the substrate.

  Subsequently, the temperature is lowered to 510 ° C., hydrogen is used as the carrier gas, ammonia and TMG (trimethyl gallium) are used as the source gas, and a buffer layer made of GaN is grown to a thickness of 200 Å on the substrate.

  Next, the temperature is raised to 1050 ° C., TMG and ammonia are used as the source gas, and the growth is performed at a growth rate of 0.1 μm / min for 24 hours to grow a 144 μm thick non-doped GaN layer.

  After the growth, the wafer was taken out from the reaction vessel, and the GaN wafer was annealed at 1100 ° C. for 5 minutes in a sealed vessel pressurized more than decomposition of GaN in the same manner as in Example 1, and then the sapphire substrate side was lapped and polished. Thus, a GaN substrate having a thickness of 140 μm is obtained. Furthermore, when the unevenness of the nitride semiconductor substrate on the polishing side was measured, it was within ± 0.5 μm. Furthermore, when the half width of the X-ray rocking carp was measured from the polished surface, it was about 2 minutes, and it was found that a GaN substrate with good crystallinity was obtained.

[Comparative Example 1]
In Example 1, except that a 900 μm-thick sapphire substrate was used, GaN was grown in the same manner. As a result, the half-value width of the X-ray rocking curve of the polished GaN layer was 8 minutes. As a result, it was found that the crystallinity of the GaN substrate was more than doubled. Furthermore, in the case of 800 μm, the substrate was cracked during the growth.

The following examples illustrate the device of the present invention.
[Example 3]
JP-4-164895 discloses a GaN substrate obtained in Example 1, using the MOVPE apparatus shown in FIG. 2 was set in the reaction vessel of the apparatus, at 1050 ° C., the Si 1 × 10 ¹⁹ / A cm ³ doped n-type GaN layer is grown to a thickness of 5 μm. Needless to say, the growth surface of the n-type GaN is a substrate polishing surface.

Next, on the n-type GaN, a first layer made of n-type Al _0.2 Ga _0.8 N doped with Si 1 × 10 ¹⁹ / cm ³ is grown to a thickness of 20 Å, and subsequently from non-doped GaN. The second layer is grown to a thickness of 20 Å, and an n-side cladding layer made of a superlattice with a total thickness of 0.4 μm is grown. Thus, by growing the superlattice layer including the n-type nitride semiconductor layer before growing the active layer, the output of the nitride semiconductor device is dramatically improved.

Next, an active layer having a single quantum well structure made of In _0.4 Ga _0.6 N and having a thickness of 30 Å is grown at 800 ° C.

Next, a first layer made of p-type Al _0.2 Ga _0.8 N doped with 1 × 10 ²⁰ / cm ³ of Mg is grown on the active layer to a thickness of 20 Å, followed by 1 × 10 ¹⁹ Mg. A second layer made of p-type GaN doped with / cm ³ is grown to a thickness of 20 Å, and a p-side cladding layer made of a superlattice with a total thickness of 0.4 μm is grown. Thus, by growing the superlattice layer including the p-type nitride semiconductor layer after the active layer is grown, the output of the nitride semiconductor device is dramatically improved. Note that the superlattice layer can be present in one or both of the n-type layer side and the p-type layer side.

Next, a p-type GaN layer doped with 1 × 10 ²⁰ / cm ³ of Mg is grown on the p-side cladding layer 5 to a thickness of 0.5 μm.

  After completion of the reaction, the temperature is lowered to room temperature, and the wafer is annealed in a reaction vessel at 700 ° C. in a nitrogen atmosphere to further reduce the resistance of the p-type layer.

  After annealing, the wafer is taken out from the reaction vessel, a positive electrode containing Ni and Au is provided on the uppermost p-type GaN layer, and a negative electrode made of W, Si and Au is provided on the back side of the substrate, and then a 350 μm square chip When the LED element was separated, the green light emission of 520 nm was exhibited at If20 mA, Vf was 3.2 V, and the output was 8 mW.

[Comparative Example 2]
An LED element was fabricated in the same manner as in Example 3 except that the GaN substrate obtained in Example 1 had a polished surface with an irregularity of ± 1.5 μm, and it was Vf 3.2 V at If20 mA. The output was only 3 mW. This is presumed that the substrate unevenness directly affects the crystallinity of the nitride semiconductor.

[Example 4]
FIG. 1 is a schematic cross-sectional view showing the structure of a laser device obtained in Example 4, and shows a view when the device is cut in a direction perpendicular to the resonance direction of laser light. The laser device of the present invention will be described below with reference to this drawing.

  The GaN substrate 21 obtained in Example 1 was set in the reaction vessel of the MOVPE apparatus shown in Japanese Patent Laid-Open No. Hei 4-164895, FIG. 2, and after sufficiently replacing the inside of the vessel with hydrogen, The temperature of the substrate is raised to 1050 ° C., and the substrate is cleaned.

  Subsequently, the temperature is lowered to 510 ° C., hydrogen is used as a carrier gas, ammonia and TMG are used as source gases, and a buffer layer 22 made of GaN is grown on the substrate 21 to a thickness of about 200 Å. The buffer layer 22 can be formed of AlN, GaN, AlGaN, InGaN or the like with a film thickness of several tens of angstroms to several hundreds of angstroms at a temperature of 0 ° C. or lower. This buffer layer may be omitted depending on the nitride semiconductor growth method.

(N-side contact layer 23)
After growing the buffer layer 22, only TMG is stopped and the temperature is raised to 1050 ° C. When the temperature reaches 1050 ° C., an n-side contact layer made of n-type GaN doped with Si at 1 × 10 ¹⁹ / cm ³ is grown to a thickness of 4 μm using TMA, ammonia, and silane gas.

(Crack prevention layer 24)
Next, cracks made of In _0.1 Ga _0.9 N doped with 5 × 10 ¹⁸ / cm ^{3 of} Si using TMG, TMI (trimethylindium) as source gas, silane gas as impurity gas, at a temperature of 800 ° C. Layer 24 is grown to a thickness of 500 Angstroms. The crack prevention layer 24 can be prevented from being cracked in the nitride semiconductor layer containing Al by growing it with an n-type nitride semiconductor containing In, preferably InGaN. The crack prevention layer is preferably grown with a film thickness of 100 Å or more and 0.5 μm or less. If it is thinner than 100 angstroms, it is difficult to act as a crack prevention as described above, and if it is thicker than 0.5 μm, the crystal itself tends to turn black. The crack prevention layer 24 can be omitted.

(N-side cladding layer 25)
Next, the temperature is set to 1050 ° C., TMA (trimethylaluminum), TMG, NH ₃ , SiH ₄ is used as a source gas, and Si is doped with 1 × 10 ¹⁹ / cm ^{3 of} n-type Al _0.2 Ga _0.8 N. One layer is grown to a thickness of 20 Å, and then the silane gas and TMA are stopped, and a second layer made of non-doped GaN is grown to a thickness of 20 Å. Then, a superlattice layer is configured as first layer + second layer + first layer + second layer +..., 100 layers for the first layer and 100 layers for the second layer are stacked alternately. An n-side cladding layer 25 made of a superlattice with a thickness of 0.4 μm is formed. Thus, a superlattice layer in which nitride semiconductors having different compositions with a single film thickness of 100 angstroms or less, more preferably 70 angstroms or less, and most preferably 40 angstroms or less are laminated, has a single layer of less than the elastic critical film thickness Therefore, crystallinity is very good. Therefore, since a film having very good crystallinity without cracks can be grown, it is formed on at least one of the n-type nitride semiconductor layer side and the p-type nitride semiconductor layer side of the laser element. Lifespan is improved dramatically. The superlattice layer is most preferably formed in a layer that acts as a carrier confinement or light confinement layer.

(N-side light guide layer 26)
Subsequently, an n-side light guide layer 26 made of n-type GaN doped with Si at 5 × 10 ¹⁸ / cm ³ is grown at 1050 ° C. to a thickness of 0.1 μm. This n-side light guide layer 26 acts as a light guide layer of the active layer, and it is desirable to grow GaN and InGaN. Usually, the n-side light guide layer 26 is grown to a thickness of 100 Å to 5 μm, more preferably 200 Å to 1 μm. desirable. The light guide layer 26 can also be a superlattice layer. When the n-side light guide layer 15 and the n-side cladding layer 14 are superlattice layers, the average band gap energy of the nitride semiconductor layer constituting the superlattice layer is made larger than that of the active layer. In the case of a superlattice layer, at least one of the first layer and the second layer may be doped with an n-type impurity, or may be non-doped.

(Active layer 27)
Next, the active layer 16 is grown using TMG, TMI, ammonia, and silane gas as source gases. The active layer 16 is maintained at a temperature of 800 ° C., and a well layer made of In _0.2 Ga _0.8 N doped with Si at 8 × 10 ¹⁸ / cm ³ is first grown to a thickness of 25 Å. Next, a barrier layer made of In _0.01 Ga _0.95 N doped with 8 × 10 ¹⁸ / cm ^{3 of} Si is grown to a thickness of 50 Å at the same temperature only by changing the molar ratio of TMI. This operation is repeated twice, and the active layer 27 having a total quantum film structure (MQW) having a total film thickness of 175 angstroms is finally grown. The impurity doped in the active layer may be doped in both the well layer and the barrier layer as in this embodiment, or may be doped in either one. When the n-type impurity is doped, the threshold tends to decrease. When the active layer has a multi-quantum well structure, a well layer having a small band gap energy and a barrier layer having a band gap energy smaller than that of the well layer are necessarily stacked, so that the active layer is distinguished from the superlattice layer.

(Cap layer 28)
Next, the temperature is raised to 1050 ° C., TMG, TMA, ammonia, Cp ₂ Mg (cyclopentadienyl magnesium) is used, the band gap energy is larger than that of the active layer 27, and Mg is doped at 1 × 10 ²⁰ / cm ^3. The cap layer 28 made of p-type Al _0.1 Ga _0.9 N is grown to a thickness of 300 Å. The cap layer 28 is doped with a p-type impurity. However, since it is thin, it may be an i-type in which carriers are compensated by doping an n-type impurity, and is most preferably a layer doped with a p-type impurity. The thickness of the cap layer 28 is adjusted to 0.1 μm or less, more preferably 500 angstroms or less, and most preferably 300 angstroms or less. This is because if the film is grown to a thickness greater than 0.1 μm, cracks are likely to occur in the cap layer 28 and a nitride semiconductor layer with good crystallinity is difficult to grow. Also, carriers cannot pass through this energy barrier due to the tunnel effect. Further, when the AlGaN having a larger Al composition ratio is formed thinner, the LD element tends to oscillate. For example, if the Y value is Al _Y Ga _1-Y N of 0.2 or more, it is desirable to adjust it to 500 angstroms or less. Although the lower limit of the film thickness of the cap layer 28 is not particularly limited, it is desirable to form the cap layer 28 with a film thickness of 10 angstroms or more.

(P-side light guide layer 29)
Subsequently, at 1050 ° C., a p-side light guide layer 29 made of p-type GaN doped with Mg at 1 × 10 ²⁰ / cm ³ and having a band gap energy smaller than that of the cap layer 28 is grown to a thickness of 0.1 μm. This layer acts as a light guide layer of the active layer, and is desirably grown by GaN and InGaN, similarly to the n-side light guide layer 15. This layer also functions as a buffer layer for growing the p-side cladding layer, and functions as a preferable light guide layer by growing it at a film thickness of 100 angstroms to 5 μm, more preferably 200 angstroms to 1 μm. This p-side light guide layer is usually doped with a p-type impurity such as Mg to have a p-type conductivity, but it is not particularly necessary to dope the impurity. The p-side light guide layer can be a superlattice layer. In the case of a superlattice layer, at least one of the first layer and the second layer may be doped with a p-type impurity, or may be non-doped without being doped with a p-type impurity.

(P-type superlattice layer = p-side cladding layer 30)
Subsequently, a first layer made of p-type Al _0.2 Ga _0.8 N doped with 1 × 10 ²⁰ / cm ³ Mg at 1050 ° C. is grown to a thickness of 20 Å. A second layer of p-type GaN doped with × 10 ²⁰ / cm ³ is grown to a thickness of 20 Å. This operation is repeated 100 times to form a p-side cladding layer 30 made of a superlattice layer having a total film thickness of 0.4 μm. This layer, like the n-side cladding layer 25, acts as a carrier confinement layer, and in particular, acts as a layer for reducing the resistivity of the p-type layer. The thickness of the p-side cladding layer is not particularly limited, but it is desirable to grow it at 100 angstroms or more and 2 μm or less, more preferably 500 angstroms or more and 1 μm or less.

  In the case of an active layer having a quantum well layer made of InGaN as in this embodiment, a p-type cap layer 28 made of a nitride semiconductor containing Al having a thickness of 0.1 μm or less is in contact with the active layer 27. And a p-side light guide layer 29 having a bad gap energy smaller than that of the p-type cap layer 28 is provided at a position farther from the active layer than the p-type cap layer 28. It is very preferable to provide a p-side cladding layer 30 made of a superlattice layer containing a nitride semiconductor containing Al having a larger band gap than the p-side light guide layer 29 at a position away from the p-side light guide layer 29. In addition, since the thickness of the p-type cap layer 17 is set to be as thin as 0.1 μm or less, it does not act as a barrier for carriers, and holes injected from the p-layer are caused by the tunnel effect to form the p-type cap layer 17. Can be recombined efficiently in the active layer, and the output of the LD is improved. That is, since the injected carrier has a large band gap energy of the p-type cap layer 17, even if the temperature of the semiconductor element rises or the injected current density increases, the carrier does not overflow the active layer. Since it is blocked by the mold cap layer 17, carriers are stored in the active layer and light can be emitted efficiently. Therefore, even if the temperature of the semiconductor element rises, the light emission efficiency is hardly lowered, and an LD with a low threshold current can be realized.

(P-side contact layer 31)
Finally, a p-side contact layer 31 made of p-type GaN doped with 2 × 10 ²⁰ / cm ^{3 of} Mg is grown on the p-side cladding layer 30 at a temperature of 1050 ° C. to a thickness of 150 Å. The p-side contact layer 31 can be composed of p-type In _X Al _Y Ga _1-XY N (0 ≦ X, 0 ≦ Y, X + Y ≦ 1). The most preferable ohmic contact with the electrode 32 is obtained. The p-side contact layer 31 can also be a superlattice layer. In the case of a superlattice layer, a first layer and a second layer having different bandgap energies are stacked, and the stacking is performed as follows: first + second + first + second +. If the layer having the smaller band gap energy is exposed, a preferable ohmic contact with the p-electrode 32 can be obtained. Examples of the material for the p-electrode 32 include Ni, Pd, Ni / Au, and the like. Further, in the device of the present invention, a nitride semiconductor having a small band gap energy is in contact with the p-side cladding layer 30 containing p _- type Al _Y Ga ₁ -YN, and the film thickness is 400 angstroms or less. Since the thickness is reduced, the carrier concentration of the p-side contact layer 30 is substantially increased, a preferable ohmic with the p-electrode 32 is obtained, and the threshold current and voltage of the device are lowered.

  After completion of the reaction, the temperature is lowered to room temperature, and the wafer is annealed in a reaction vessel at 700 ° C. in a nitrogen atmosphere to further reduce the resistance of the p-type layer.

  After annealing, the wafer is taken out of the reaction vessel, and as shown in FIG. 1, the uppermost p-side contact layer 31 and p-side cladding layer 30 are etched by an RIE apparatus to form a ridge shape having a stripe width of 4 μm. To do. Thus, by forming the p-side layer above the active layer in a striped ridge shape, the light emission of the active layer is concentrated under the stripe ridge, and the threshold value is lowered. In particular, it is preferable that a layer higher than the p-type nitride semiconductor layer containing Al above the active layer has a ridge shape.

  Next, a p-electrode 32 made of Ni and Au is formed in a stripe shape on the ridge outermost surface of the p-side contact layer 31. On the other hand, an n electrode 33 made of Ti and Al is formed on almost the entire back surface of the substrate 21. The almost entire surface means an area of 80% or more.

After the electrode formation, the back side of the electrode is scribed and cleaved in a bar shape in a direction perpendicular to the striped p-electrode 32 to produce a resonator on the cleavage plane. Note that the cleavage plane is the M-plane (101-0) of the nitride semiconductor. Furthermore, a dielectric superlattice made of SiO ₂ and TiO ₂ was formed on the resonator surface, and finally a bar was cut in a direction parallel to the p-electrode to form a laser chip. Next, the chip was placed face-up (with the substrate and the heat sink facing each other) on the heat sink, each electrode was wire-bonded, and laser oscillation was attempted at room temperature. At room temperature, the threshold current density was 2.5 kA / Continuous oscillation at an oscillation wavelength of 405 nm was confirmed at cm ² and a threshold voltage of 4.2 V, and a lifetime of 100 hours or more was shown.

1 is a schematic cross-sectional view showing a structure of a laser device according to an embodiment of the present invention.

Explanation of symbols

21... GaN substrate 22... Buffer layer 23... N-side contact layer 24... Crack prevention layer 25.
26 ··· n-side light guide layer 27 ··· active layer 28 ··· cap layer 29 ··· p-side light guide layer 30 ··· p-side cladding layer (superlattice layer)
31... P-side contact layer 32... P electrode 33.

Claims (11)

A nitride semiconductor substrate obtained by growing a nitride semiconductor with a film thickness of 100 μm or more on a substrate made of a material different from a nitride semiconductor and removing the substrate, and the surface of the nitride semiconductor substrate A nitride semiconductor device characterized in that the nitride semiconductor device is grown on a polished surface that has been polished until the unevenness difference is ± 1 μm or less. 2. The nitride semiconductor device according to claim 1, wherein the unevenness of the surface is ± 0.5 μm or less. The nitride semiconductor device according to claim 1, wherein the nitride semiconductor substrate is doped with an n-type impurity. 4. The nitride semiconductor device according to claim 3, wherein the n-type impurity is at least one selected from the group consisting of Si, Ge, Sn, and S. 5. The nitride semiconductor device according to claim 1, wherein the nitride semiconductor substrate has an X-ray rocking curve half width of 5 minutes or less by a biaxial crystal method. 6. The nitride semiconductor device according to claim 1, wherein the nitride semiconductor substrate has an X-ray rocking curve half width of 3 minutes or less by a biaxial crystal method. The nitride semiconductor device according to claim 1, wherein the nitride semiconductor device is selected from the group consisting of a light emitting device, a light receiving device, a solar cell, and an electronic device. The light receiving element is an LED element, and a positive electrode containing Ni and Au is provided on the p-type GaN layer which is the uppermost layer of the LED element, and a negative electrode made of W, Si and Au is provided on the back side of the substrate. The nitride semiconductor device according to claim 7, wherein: The LED element is formed in the order of a Si-doped n-type GaN layer on a substrate, a superlattice clad layer, an active layer thereon, a p-type superlattice clad layer thereon, and an Mg-doped p-type GaN. The nitride semiconductor device according to claim 8. The light receiving element is an LD element, and the LD element has a ridge shape, and has a p electrode made of Ni and Au in a stripe shape on the top surface of the ridge, and an n electrode made of Ti and Al on the back surface of the substrate. The nitride semiconductor device according to claim 7, wherein the nitride semiconductor device has an area of 80% or more. The LD element includes a buffer layer, an n-side contact layer, a crack prevention layer, an n-side cladding layer, an n-side light guide layer, an active layer, a cap layer, a p-side light guide layer, a p-side cladding layer, and a p-side on a substrate. The nitride semiconductor device according to claim 10, wherein the nitride semiconductor device is formed in the order of contact layers.

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