JP2008288308A - Multi-chip module - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multi-chip module capable of carrying a plurality of semiconductor devices having interface specifications different from each other. <P>SOLUTION: The multi-chip module includes a first semiconductor device 11a having a first interface specification, a second semiconductor device 11b having a second interface specification, and a semiconductor substrate 12 having an interface converting circuit 13 that converts the first interface specification and the second interface specification into each other. The first and second semiconductor devices 11a and 11b are mounted on the semiconductor substrate 12, and are connected to each other via the interface circuit 13. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a multichip module on which a plurality of semiconductor devices are mounted. In particular, the present invention relates to a multichip module having connections between semiconductor devices.

  In recent years, a multi-chip module in which a plurality of silicon bare chips are housed in a single IC package (for example, see “Patent Document 1”), a substrate as large as a conventional IC package, A multi-package module (Multi Package Module; see, for example, “Patent Document 2”) in which a plurality of IC packages containing silicon are mounted and handled in the same manner as one IC package has been put into practical use. Yes. Of these, the former multi-chip module is a stack of multiple bare chips with different semiconductor manufacturing processes such as CPU and memory, or is stacked on a silicon substrate that is the base of a package and directly connected by aluminum wiring or the like, Compared with the latter multi-package module, high-speed operation and high-density mounting can be realized.

However, in the conventional multichip module, when the semiconductor devices (bare chips) are directly connected, the interface specifications (for example, input / output voltage level, data width, control method, etc.) are used in the circuits on the respective semiconductor devices. There is a problem that semiconductor devices having different interface specifications cannot be directly connected to each other. For this reason, there has been a problem that several types of chips differing only in the interface specifications must be manufactured depending on the types of semiconductor devices to be combined such as a CPU and a memory.
JP 2004-103887 A JP 2002-314033 A

  The present invention provides a multichip module capable of mounting a plurality of semiconductor devices having different interface specifications.

  According to one aspect of the present invention, a first semiconductor device having a first interface specification, a second semiconductor device having a second interface specification, the first interface specification, and the second interface specification. And a semiconductor substrate on which an interface conversion circuit for mutual conversion is formed, the first semiconductor device and the second semiconductor device are stacked on the semiconductor substrate and connected to each other via the interface circuit A multi-chip module is provided.

  According to the present invention, since the interface circuit is formed on the silicon substrate serving as the base of the multichip module, a plurality of semiconductor devices having different interface specifications can be mounted.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is an image diagram showing the structure of a multichip module according to Embodiment 1 of the present invention. Here, as an example, two semiconductor devices (bare chips) 11a and 11b and portions related to the connection are shown. FIG. 1A shows a plan view of the multichip module, and FIG. 1B shows an elevation view of the multichip module.

  The multichip module according to the first embodiment of the present invention includes a semiconductor substrate 12 as a package base, a voltage level shifter circuit 13 formed on the semiconductor substrate 12, and semiconductor devices 11a and 11b.

  The semiconductor devices 11 a and 11 b are stacked on a semiconductor substrate 12, a voltage level shifter circuit 13 is formed on the surface of the semiconductor substrate 12, and solder bumps 14 are formed on the back surface of the semiconductor substrate 12.

  The input / output signal 15a of the semiconductor device 11a is electrically connected to the first input / output of the voltage level shifter circuit 13, and the input / output signal 15b of the semiconductor device 11b is electrically connected to the second input / output of the voltage level shifter circuit 13. It is connected to the.

  The semiconductor devices 11a and 11b are manufactured as bare chips using a normal semiconductor manufacturing process optimum for each.

  These have inputs / outputs based on different interface specifications, and the input / output signals 15a and 15b have different voltage levels. For example, the semiconductor device 11a is a memory, and the input / output signal 15a has a 3.3V standard, that is, the “H” level is 3.3V and the “L” level is 0V. The semiconductor device 11b is a CPU, and the input / output signal 15b has a standard of 1.8V, that is, the “H” level is 1.8V and the “L” level is 0V.

  The voltage level shifter circuit 13 is a level shift circuit that mutually converts the 3.3V standard of the input / output signal 15a and the 1.8V standard of the input / output signal 15b, and is formed on the surface of the semiconductor substrate 12 in advance.

  The semiconductor substrate 12 is a silicon substrate that becomes a base of the package. After the voltage level shifter circuit 13 is formed on the silicon wafer by using a normal semiconductor manufacturing process, the semiconductor substrate 12 is adjusted to the package outer shape as shown in FIG. Then, dicing (cutting process) is performed.

  The solder bumps 14 formed on the back surface of the semiconductor substrate 12 are used for signal connection with the outside, and are electrically connected to the semiconductor devices 11a and 11b and the voltage level shifter circuit 13 as necessary. The solder bumps 14 are arranged in a so-called BGA structure.

  According to the first embodiment, since the voltage level shifter circuit 13 is formed on the semiconductor substrate 12 serving as the base, the multichip module can be easily configured by stacking the semiconductor devices 11a and 11b having different input / output voltage levels. can do.

  Further, according to the first embodiment, since the semiconductor devices 11a and 11b can be stacked on one module even when the input / output voltage levels are different, several types of bare chips differing only in the interface specifications depending on how the semiconductor devices are combined in mass production. Therefore, it is possible to reduce the manufacturing cost and the manufacturing period.

  In the first embodiment, the semiconductor devices 11a and 11b are the memory and the CPU. However, the present invention is not limited to this, and the input / output voltage level is a bare chip manufactured using a normal semiconductor manufacturing process. As long as the values are different, in principle, they can be applied.

  In the first embodiment, the input / output signals 15a and 15b are 3.3V standard and 1.8V standard. However, the present invention is not limited to this. For example, one “L” level The present invention can also be applied to input / output signals having a negative voltage level.

  FIG. 2 is an image diagram showing the structure of a multichip module according to Embodiment 2 of the present invention. Here, as an example, two semiconductor devices (bare chips) 21a and 21b and portions related to the connection are shown. FIG. 2A shows a plan view of the multichip module, and FIG. 2B shows an elevation view of the multichip module.

  The multichip module according to the second embodiment of the present invention includes a semiconductor substrate 22 as a package base, a parallel-serial conversion circuit 23 formed on the semiconductor substrate 22, and semiconductor devices 21a and 21b.

  The semiconductor devices 21 a and 21 b are stacked on the semiconductor substrate 22, a parallel-serial conversion circuit 23 is formed on the surface of the semiconductor substrate 22, and solder bumps 24 are formed on the back surface of the semiconductor substrate 22.

  The input / output signal 25a of the semiconductor device 21a is electrically connected to the first input / output of the parallel-serial conversion circuit 23, and the input / output signal 25b of the semiconductor device 21b is electrically connected to the second input / output of the parallel-serial conversion circuit 23. Has been.

  The semiconductor devices 21a and 21b are manufactured as bare chips using a normal semiconductor manufacturing process optimum for each.

  These have inputs / outputs based on different interface specifications, and the input / output signals 25a and 25b have different data widths (number of bits). For example, the semiconductor device 21a is a memory having a 24-bit I / O, and the input / output signal 25a has a data width of 24 bits, and these 24 bits are input / output in parallel. On the other hand, the semiconductor device 21b is a CPU having a communication function, and the input / output signal 25b is input / output serially with a 1-bit width.

  The bulky conversion circuit is a parallel-serial conversion circuit that converts 24-bit parallel data from the input / output signal 25a into 1-bit serial data of the input / output signal 25b, and is formed on the surface of the semiconductor substrate 22 in advance.

  In FIG. 2, the case of data transfer from the semiconductor device 21a to the semiconductor device 21b is shown as an example. Similarly, 1-bit serial data of the input / output signal 25b from the semiconductor device 21b is converted to 24 bits of the input / output signal 25a. It is easy to convert the data into parallel data and transfer it to the semiconductor device 21a.

  The semiconductor substrate 22 is a silicon substrate serving as a base of the package. After the parallel-serial conversion circuit 23 is formed on the silicon wafer by using a normal semiconductor manufacturing process, the semiconductor substrate 22 is adjusted to the package outer shape as shown in FIG. Dicing (cutting process) is performed.

  The solder bumps 24 formed on the back surface of the semiconductor substrate 22 are used for signal connection with the outside, and are electrically connected to the semiconductor devices 21a and 21b and the parallel-serial conversion circuit 23 as necessary. The solder bumps 24 are arranged in a so-called BGA structure.

  According to the second embodiment, since the parallel-serial conversion circuit 23 is formed on the semiconductor substrate 22 serving as the base, the semiconductor devices 21a and 21b having different input / output data widths and input / output control methods are stacked to form a multichip. Modules can be easily configured.

  Further, according to the second embodiment, since the semiconductor devices 21a and 21b can be stacked in one module even if the input / output data width and the control method thereof are different, only the interface specifications can be obtained depending on how the semiconductor devices are combined in mass production. However, it is not necessary to prepare several types of bare chips with different values, and it is possible to reduce the manufacturing cost and the manufacturing period.

  In the second embodiment, the semiconductor devices 21a and 21b are memories and CPUs. However, the present invention is not limited to this, and the input / output data width is a bare chip manufactured using a normal semiconductor manufacturing process. As long as the values are different, in principle, they can be applied.

  In the second embodiment, the input / output signal 25a is a 24-bit width parallel input / output, and the input / output signal 25b is a 1-bit serial input / output. However, the present invention is not limited to this. For example, it is also possible to configure the interface between 64-bit parallel data and 8-bit serial data using eight 8-bit parallel-serial conversion circuits.

  Further, in the description of the first and second embodiments, the number of semiconductor devices (bare chips) mounted on the semiconductor substrate is two. However, the present invention is not limited to this, and three or more semiconductor devices are used. Can be stacked on a single semiconductor substrate to form a multichip module.

  Further, in the above description of the first and second embodiments, the multi-chip module has a BGA structure. However, the present invention is not limited to this, for example, QFP (Quad Flat Package) or PGA (Pin Grid Array). It is also possible to apply to other package structures.

  Further, in the description of the first and second embodiments, the interface circuit formed on the semiconductor substrate is the voltage level shifter circuit 13 or the parallel-serial conversion circuit 23. However, the present invention is not limited to this, for example, Also, a logic circuit that performs connection between semiconductor devices having different input / output control methods or connection between semiconductor devices having different input / output speeds (clock frequencies) may be considered.

1 is an image diagram showing a structure of a multichip module according to Embodiment 1 of the present invention. The image figure which shows the structure of the multichip module concerning Example 2 of this invention.

Explanation of symbols

11a, 11b, 21a, 21b Semiconductor devices 12, 22 Semiconductor substrate 13 Voltage level shifter circuits 14, 24 Solder bump (BGA)
15a, 15b, 25a, 25b Input / output signal 23 Parasiri conversion circuit

Claims (5)

A first semiconductor device having a first interface specification;
A second semiconductor device having a second interface specification;
A semiconductor substrate on which an interface conversion circuit that converts the first interface specification and the second interface specification into each other is formed;
The multichip module, wherein the first semiconductor device and the second semiconductor device are stacked on the semiconductor substrate and connected to each other via the interface circuit.   The semiconductor substrate further includes a bump for external connection on a surface facing the main surface on which the first and second semiconductor devices are mounted, and has a BGA (Ball Grid Array) structure. Item 4. The multichip module according to Item 1. The first semiconductor device has a first input / output voltage level as the first interface specification,
The second semiconductor device has a second input / output voltage level different from the first input / output voltage level as the second interface specification,
The multi-chip module according to claim 1, wherein the interface circuit mutually converts the first input / output voltage level and the second input / output voltage level. The first semiconductor device has a first number of input / output terminals as the first interface specification,
The second semiconductor device has a second number of input / output terminals different from the first number as the second interface specification,
The interface circuit mutually converts a signal from the first semiconductor device and a signal from the second semiconductor device based on the first interface specification and the second interface specification. The multichip module according to claim 1. The first semiconductor device inputs / outputs data in parallel via the first number of input / output terminals,
The second semiconductor device serially inputs / outputs data via the second number of input / output terminals, and the interface circuit receives the data from the first semiconductor device and the second semiconductor device. The multi-chip module according to claim 1, wherein the data is subjected to parallel-serial conversion.

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