JP2008282624A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a PDP capable of shortening a discharge delay without deteriorating luminance. <P>SOLUTION: The PDP is provided with a first substrate structure and a second substrate structure arranged in opposition in which the former is provided with a plurality of display electrodes and the latter with address electrodes crossing the display electrodes. Each of the display electrodes contains a metal bus electrode, and the first substrate structure has priming particle radiation layers arranged so as to be contained within the range of the metal bus electrode in a front view at a side opposed to the second substrate structure. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

The present invention relates to a plasma display panel (hereinafter referred to as “PDP”).

  FIG. 10 is a perspective view showing a configuration of a conventional PDP. The PDP has a structure in which a front substrate assembly 1 and a back substrate assembly 2 are bonded together. In the front substrate assembly 1, a display electrode 3 including a transparent electrode 3 a and a metal bus electrode 3 b is disposed on a front substrate 1 a including a glass substrate. The display electrode 3 is covered with a dielectric layer 4. A protective layer 5 made of a magnesium oxide layer having a higher secondary electron emission coefficient is formed on the dielectric layer 4. In the back side substrate structure 2, address electrodes 6 are arranged on a back side substrate 2a made of a glass substrate so as to be orthogonal to the display electrodes, and a partition wall 7 is defined between the address electrodes 6 in order to define a light emitting region. Are provided, and red, green, and blue phosphor layers 8 are formed in regions separated by the partition walls 7 on the address electrodes 6. A discharge gas made of Ne—Xe gas is sealed in an airtight discharge space formed inside the bonded front-side substrate structure 1 and back-side substrate structure 2. Although not shown, the address electrode 6 is covered with a dielectric layer, and the partition wall 7 and the phosphor layer 8 are provided on the dielectric layer.

  In such a PDP, an address discharge is generated by applying a voltage between the address electrode 6 and the display electrode 3 also serving as a scan electrode, and a voltage is applied between the two display electrodes 3 forming a pair. As a result, a reset discharge and a sustain discharge for display are generated.

  PDP has been put into practical use as a large-sized thin television, and in recent years, high definition has been advanced. As the resolution is increased, the number of pixels increases, and the address operation time for deciding whether to turn on or off the cell increases. In order to suppress an increase in the address operation time, it is necessary to reduce the pulse width of the address discharge voltage (also referred to as an address voltage). However, since the time (discharge delay) from when the voltage is applied to when the discharge occurs varies, the discharge may not occur if the pulse width of the address voltage is too small. In that case, there is a problem in that the cell is not properly lit during the display period, thereby degrading the image quality.

In order to solve this problem, Patent Document 1 proposes forming a magnesium oxide crystal layer on a protective film. It is presumed that the magnesium oxide crystal is excited by a reset discharge performed before the address discharge and then gradually emits electrons. Since the emitted electrons become seeds, it is considered that address discharge is likely to occur and the discharge delay is shortened.
JP 2006-114484 A

  However, since the magnesium oxide crystal layer does not completely transmit the light from the phosphor, there is a problem that the luminance is lowered by forming the magnesium oxide crystal layer.

  The present invention has been made in view of such circumstances, and provides a PDP that can shorten the discharge delay without lowering the luminance.

Means for Solving the Problems and Effects of the Invention

The PDP according to the present invention includes a first substrate structure and a second substrate structure that are arranged to face each other, the first substrate structure includes a plurality of display electrodes, and the second substrate structure is an address that intersects the display electrodes. Each of the display electrodes includes a metal bus electrode, and the first substrate structure is disposed on the side facing the second substrate structure so as to be within the range of the metal bus electrode in a front view. It has a priming particle release layer.
In the present invention, since a priming particle (hereinafter referred to as “P particle”) emitting layer is disposed in a portion that is originally shielded from light, luminance is not reduced by arranging the P particle emitting layer. The P particle emission layer is a layer made of a material that emits P particles for starting discharge, and the discharge delay can be shortened by providing this layer. Therefore, according to the present invention, the discharge delay can be shortened without reducing the luminance.

  The plurality of display electrodes are paired to form a display line, and one of the pairs is a scan electrode used for address discharge between the address electrodes, and the P particle emission layer is It may be arranged so as to be within the range of the metal bus electrode of the scan electrode in a front view. Since the address discharge occurs between the scan electrode and the address electrode, by arranging the P particle emission layer in this way, the usage amount of the P particle emission material can be reduced without significantly impairing the effect of improving the discharge delay of the address discharge. Can be reduced.

  The priming particle emitting layer may include a magnesium oxide crystal (hereinafter referred to as “MgO crystal”). In this case, the effect of improving the discharge delay is great.

  The priming particle emitting layer may include an MgO crystal to which 1 to 10,000 ppm of a halogen element is added. In this case, the effect of improving the discharge delay lasts for a long time. The reason why the effect of improving the discharge delay lasts for a long time is not clear, but it is assumed that the added halogen element is replaced with oxygen in the MgO crystal, which becomes an electron trap and the electron emission characteristics are improved. Is done. In addition, since the effect of improving the discharge delay lasts for a long time, the discharge delay when the rest period is long can be effectively suppressed even if the amount is relatively small, leading to cost reduction.

In addition, the P particle emission layer may be disposed so as to be within the range of the scan electrode used for the address discharge, instead of being disposed within the range of the metal bus electrode. In this case, a slight decrease in luminance can occur. However, since the P particle emission layer can be formed in a relatively wide range of scan electrodes used for address discharge, the effect of improving the discharge delay of address discharge can be increased while minimizing the decrease in luminance.
The various configurations shown here can be combined with each other.

  Hereinafter, various embodiments of the present invention will be described with reference to the drawings. The configurations shown in the drawings and the following description are merely examples, and the scope of the present invention is not limited to those shown in the drawings and the following description. In the following embodiment, a description will be given by taking a three-electrode surface discharge type PDP as an example, but the present invention can also be applied to other types of PDPs.

1. First Embodiment FIGS. 1A and 1B show the structure of a PDP according to a first embodiment of the present invention. FIG. 1A is a front view, and FIG. It is II sectional drawing in (a).
The PDP according to the present embodiment includes a front side substrate assembly 1 and a back side substrate assembly 2 which are disposed to face each other. The front side substrate structure 1 includes a plurality of display electrodes 3 each composed of a transparent electrode 3a and a metal bus electrode 3b, a dielectric layer 4 covering the plurality of display electrodes 3, and a dielectric layer 4 on the front side substrate 1a. The protective layer 5 is provided on the protective layer 5 and the P particle emitting layer 11 is provided on the protective layer 5. The back-side substrate structure 2 includes a plurality of address electrodes 6 that intersect (preferably orthogonally cross) the display electrode 3 on the back-side substrate 1b, a dielectric layer 9 that covers the plurality of address electrodes 6, and a partition wall on the dielectric layer 9 7 and phosphor layer 8. The P particle emission layer 11 is disposed so as to be within the range of the metal bus electrode 3b in a front view (in other words, in a front view).
The front side substrate structure 1 and the back side substrate structure 2 are bonded to each other with a sealing material, and a discharge gas (in the airtight discharge space between the front side substrate structure 1 and the back side substrate structure 2 is formed. For example, neon mixed with several percent of xenon) is enclosed.
Hereinafter, each component will be described in detail.

1-1. Substrate, display electrode, dielectric layer, protective layer (front side substrate structure)
The substrate 1a on the front side is not particularly limited, and any substrate known in the art can be used. Specifically, transparent substrates, such as a glass substrate and a plastic substrate, are mentioned.
The display electrode 3 includes, for example, a wide transparent electrode 3a such as ITO or SnO _2, and, for example, Ag, Au, Al, Cu, Cr, and a laminate thereof (for example, Cr / Cu / Cu) for reducing the resistance of the electrode. And a narrow metal bus electrode 3b made of a Cr laminated structure). FIGS. 1A and 1B show a case where the transparent electrode 3a and the metal bus electrode 3b are straight, but the shapes of the transparent electrode 3a and the metal bus electrode 3b are not particularly limited, and are T-shaped. Or a ladder shape. The shapes of the transparent electrode 3a and the metal bus electrode 3b may be the same or different from each other. For example, the transparent electrode 3a may be T-shaped or ladder-shaped, and the metal bus electrode 3b may be straight.
A plurality of display electrodes 3 are paired to form a display line. This pair includes a scan electrode 3Y used for address discharge with the address electrode 6 and a sustain electrode 3X used for sustain discharge with the scan electrode 3Y. The present invention is not limited to the case where the display electrodes 3 are in pairs, but can be applied to a so-called ALIS structure PDP in which the display electrodes 3 are arranged at equal intervals. In this case, the metal bus electrode 3b is arrange | positioned at the center of the transparent electrode 3a, for example.
The dielectric layer 4 can be formed, for example, by applying a low-melting-point glass paste obtained by adding a binder and a solvent to a low-melting-point glass frit on the substrate after the display electrode 3 is formed and baking it. . The dielectric layer 4 may be formed by depositing silicon oxide by CVD or the like on the substrate after the display electrode 3 is formed.
The protective layer 5 is made of a metal (more specifically, divalent metal) oxide such as magnesium oxide, calcium oxide, strontium oxide, or barium oxide, and is preferably made of magnesium oxide. The protective layer 5 is formed by vapor deposition, sputtering, coating, or the like.

1-2. Substrate, address electrode, dielectric layer, barrier rib, phosphor layer (back side substrate structure)
The substrate 2a on the back side is not particularly limited, and any substrate known in the art can be used. Specifically, transparent substrates, such as a glass substrate and a plastic substrate, are mentioned.
The address electrode 6 can be composed of, for example, Ag, Au, Al, Cu, Cr, and a laminated body thereof (for example, a laminated structure of Cr / Cu / Cr).
The dielectric layer 9 can be formed by the same material and method as the dielectric layer 4.
The partition wall 7 can be formed by forming a partition material layer such as a low-melting glass paste on the dielectric layer 9, patterning the partition material layer by sandblasting or the like, and baking it. The partition wall 7 may be formed by other methods. The shape of the partition wall 7 is not limited, and can be, for example, a stripe shape, a meander shape, a lattice shape, or a ladder shape.
For example, the phosphor layer 8 is coated with a phosphor paste containing phosphor powder and a binder in a groove between the adjacent barrier ribs 7 by screen printing or a method using a dispenser, and this is applied to each color (R, G , B) can be repeated and then fired.

1-3. Priming Particle (P Particle) Emission Layer The P particle emission layer 11 is arranged on the side of the front substrate assembly 1 facing the back substrate assembly 2 so as to be within the range of the metal bus electrode 3b of the display electrode 3 in front view. Has been. In the present embodiment, since the P particle emission layer 11 is disposed in such a portion that is originally shielded from light, the light from the phosphor layer 8 is not blocked and the luminance is not lowered.

The thickness of the P particle emission layer 11 is not particularly limited. In particular, in the present embodiment, even if the P particle emission layer 11 is formed thick, the luminance does not decrease. Therefore, the P particle emission layer 11 can be formed relatively thick. As a result, the effect of improving the discharge delay can be further enhanced.
The width of the P particle emission layer 11 is not particularly limited as long as it falls within the range of the metal bus electrode 3b.
The shape of the P particle emission layer 11 is not particularly limited, and may be formed in a straight shape as shown in FIGS. 1A and 1B. For example, it may be formed in an island shape separated for each discharge cell. Also good.

  In FIG. 1B, the P particle release layer 11 is disposed on the protective layer 5. For example, as shown in FIG. 2, the P particle release layer 11 has an opening at a site where the P particle release layer 11 is formed. And the P particle emission layer 11 may be formed in the opening. In this case, the P particle emission layer 11 may be formed first, and then the protective layer 5 may be formed. Alternatively, the P particle emission layer 11 may be formed first, and the protective layer 5 may be formed so as to cover the P particle emission layer 11. In this case, the protective layer 5 is formed so that at least a part of the P particle emission layer 11 is exposed to the discharge space.

  The method for forming the P particle release layer 11 is not particularly limited. For example, a mask having an opening corresponding to the shape of the P particle emission layer 11 is prepared, and the P particle emission material is placed in a state where the mask is arranged so that the opening is located at a site where the P particle emission layer 11 is formed. It can be formed by depositing on the protective layer 5. The method for adhering the P particle releasing material is not particularly limited, and examples thereof include a method in which the powdered P particle releasing material is sprayed toward the protective layer 5 as it is or dispersed in a dispersion medium. Further, the P particle emitting material may be attached on the protective layer 5 by screen printing. In addition, instead of using a mask having an opening, the P particle release layer 11 uses a dispenser or an ink jet device to attach a paste or suspension containing the P particle release material to a site where the P particle release layer 11 is formed. May be formed.

  The P particle release layer 11 is a layer containing a P particle release material. The P particle emission layer 11 may contain components other than the P particle emission material, may contain the P particle emission material as a main component, and may consist of only the P particle emission material. The P particle emitting material is a material that is excited by a past discharge and emits P particles (charged particles such as electrons) for starting discharge, and the type thereof is not particularly limited. The P particle releasing material is, for example, a metal (more specifically, a divalent metal) oxide crystal (for example, MgO crystal, calcium oxide crystal, strontium oxide crystal) formed by a vapor phase method shown below. Or a crystal obtained by adding a halogen element to such a crystal. Since the metal oxide crystal is similar in structure to the MgO crystal, the same effect is considered to be obtained.

  In the following, description will be given by taking as an example a case where the P particle emitting material is made of a MgO crystal added with a halogen element (hereinafter referred to as “halogen-added MgO crystal”). In addition, the MgO crystal in the following description can be used as a P particle emitting material even without being added.

  The kind of halogen element added to the halogen-added MgO crystal is not particularly limited. The halogen element is composed of one or more of fluorine, chlorine, bromine and iodine, for example. Although it has been confirmed that the effect of improving the discharge delay lasts for a long time in the case of fluorine, it is considered that the same effect can be obtained when halogen other than fluorine is added due to the similarity of the electronic state.

The addition amount of the halogen element is not particularly limited. The addition amount of the halogen element is, for example, 1 to 10000 ppm. As used herein, “ppm” is a weight concentration.
In the reference experiment example, it has been confirmed that the same effect can be obtained even if the addition amount of the halogen element is changed in the range of 24 to 440 ppm. Therefore, the influence of the addition amount of the halogen element on the effect is not large. If the addition amount is in the range of about 1 to 10,000 ppm, it is considered that the effect of improving the discharge delay lasts for a long time. The added amount of the halogen element is, for example, 1, 5, 10, 15, 20, 30, 40, 50, 60, 70, 80, 90, 100, 120, 140, 160, 180, 200, 250, 300, 350. , 400, 450, 500, 600, 700, 800, 900, 1000, 1500, 2000, 3000, 4000, 5000, 6000, 7000, 8000, 9000 or 10,000 ppm. The addition amount of the halogen element may be within a range between any two numerical values exemplified here. The addition amount of the halogen element can be measured by combustion-ion chromatography analysis.

  The method for producing the halogen-added MgO crystal is not particularly limited. In one example, the halogen-added MgO crystal can be produced by mixing and firing an MgO crystal and a halogen-containing substance, followed by crushing. The MgO crystal will be described later. Examples of the halogen-containing substance include magnesium halides (magnesium fluoride and the like) and Al, Li, Mn, Zn, Ca, Ce halides. Firing is preferably performed at 1000 to 1700 ° C. The firing temperature is, for example, 1000, 1100, 1200, 1300, 1400, 1500, 1600 or 1700 ° C. The firing temperature may be within a range between any two values exemplified here. The method for crushing the fired product is not particularly limited, and examples thereof include a method of putting the fired product in a mortar and grinding it with a pestle to form a powder.

  The halogen-added MgO crystal is preferably in the form of powder, and the size and shape are not particularly limited, but the average particle size is preferably 0.05 to 20 μm. This is because if the average particle size is too small, the effect of improving the discharge delay is small, and if the average particle size is too large, the P-particle emitting layer 11 is difficult to be formed uniformly.

The average particle diameter of the halogen-added MgO crystal can be determined according to the following formula.
Formula: Average particle size = a / (S × ρ)
(Where a is a shape factor of 6, S is a BET specific surface area determined by a nitrogen adsorption method, and ρ is a true density of the halogen-added MgO crystal.)
Specifically, the average particle diameter of the halogen-added MgO crystal is, for example, 0.05, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20 μm. The range of the average particle diameter of the halogen-added MgO crystal may be between any two of the numerical values exemplified as the specific average particle diameter.

  The MgO crystal has a characteristic of performing cathodoluminescence emission having a peak in a wavelength range of 200 to 300 nm by irradiation with an electron beam. The MgO crystal is preferably in a powder form, and the size and shape are not particularly limited, but the average particle diameter is preferably 0.05 to 20 μm. This is because, if the average particle size is too small, the effect of improving the discharge delay is small, and if the average particle size is too large, the P particle emission layer 11 is difficult to be formed uniformly.

The average particle diameter of the MgO crystal can be determined according to Equation 1.
Formula 1: Average particle diameter = a / (S × ρ)
(Where a is a shape factor of 6, S is a BET specific surface area determined by a nitrogen adsorption method, and ρ is a true density of magnesium oxide.)
Specifically, the average particle diameter of the MgO crystal is, for example, 0.05, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7,. 8, 0.9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20 μm. The range of the average particle diameter of the MgO crystal may be between any two of the numerical values exemplified as the specific average particle diameter.

  The production method of the MgO crystal is not particularly limited, but is preferably produced by a gas phase method in which magnesium vapor and oxygen are reacted. For example, the method described in JP-A No. 2004-182521, “Material” It can be produced by the method described in “Synthesis and properties of magnesia powder by vapor phase method” on pages 1157 to 1161 of the November 1987 issue, Vol. 36, No. 410. The MgO crystal may be purchased from Ube Materials Corporation. The production by the vapor phase method is preferable because a single crystal having high purity can be obtained when the MgO crystal is produced by the vapor phase method.

2. Second Embodiment FIGS. 3A and 3B show the structure of a PDP according to a second embodiment of the present invention. FIG. 3A is a front view, and FIG. It is II sectional drawing in (a).
The PDP of the present embodiment is similar to the PDP of the first embodiment, but is arranged such that the P particle emission layer 11 is only within the range of the metal bus electrode 3b of the scan electrode 3Y in front view. Is different. Since the address discharge is performed between the scan electrode 3Y and the address electrode 6, by arranging the P particle emission layer 11 in this way, the effect of improving the discharge delay of the address discharge is not significantly impaired. The amount used can be reduced.

3. Third Embodiment FIGS. 4A and 4B show the structure of a PDP according to a third embodiment of the present invention. FIG. 4A is a front view, and FIG. It is II sectional drawing in (a).
The PDP of the present embodiment is similar to the PDP of the first embodiment, except that the P particle emission layer 11 is arranged so as to be within the range of the scan electrode 3Y in front view.
In the present embodiment, since the P particle emission layer 11 is also disposed in a portion other than the portion overlapping the metal bus electrode 3b in a front view, a slight luminance reduction may occur. However, since the P particle emission layer 11 is formed only on the side of the scan electrode 3Y used for the address discharge, a decrease in luminance is minimized. In addition, since the P particle emission layer 11 is formed in a relatively wide range of the scan electrode 3Y, the effect of improving the discharge delay of the address discharge can be increased. Therefore, according to the present embodiment, it is possible to increase the effect of improving the discharge delay of the address discharge while minimizing the decrease in luminance.

4). Reference Experimental Example Showing Discharge Delay Improvement Effect by Halogen-Doped MgO Crystal Hereinafter, a reference experiment example showing discharge delay improving effect by the halogen-added MgO crystal is shown.
In the following experimental examples, the effect of improving the discharge delay by arranging the MgO crystal added with fluorine (hereinafter referred to as “F-added MgO crystal”) so as to be exposed to the discharge space was examined. Moreover, it compared with the case where it arrange | positions so that the normal MgO crystal body to which fluorine is not added may be exposed to discharge space.

4-1. Production Method of F-added MgO Crystals Five types of F-added MgO crystals (referred to as samples A to E) having different F addition amounts were produced by the following method.

First, MgO crystals (product name: high-purity ultrafine magnesia (2000A) manufactured by Ube Materials Co., Ltd.) and MgF ₂ (manufactured by Furuuchi Chemical Co., Ltd., purity: 99.99%) and mortar Using a pestle, it was pulverized into powder.
Next, the aggregated and crushed MgO crystal and MgF ₂ were weighed so as to have the mixing amount shown in Table 1, and mixed with a tumbler mixer.
Next, the mixture was fired in the atmosphere at 1450 ° C. for 1 hour.
Next, the fired powder was agglomerated and pulverized to obtain powder, and F-added MgO crystals of Samples A to E were obtained.

  Next, F addition amounts of Samples A and C were measured by combustion ion chromatographic analysis. The results are shown in Table 1. Moreover, the estimated value of F addition amount of sample B, D, E estimated from the measured value of F addition amount of sample A and C was calculated | required according to the graph of FIG. In Table 1, the estimated value of the amount of F added is displayed in parentheses.

4-2. Next, the PDP having the structure shown in FIGS. 6A to 6C having the P particle emission layer 11 made of the F-added MgO crystal of sample A, B, C, D or E is processed as follows. Manufactured with. 6 (a) to 6 (c) are cross-sectional views showing the structure of the PDP of the reference experimental example, FIG. 6 (a) is a plan view, and FIGS. 6 (b) and 6 (c) are respectively It is II sectional drawing and II-II sectional drawing in Fig.6 (a).
In addition, in order to use in a comparative example of a discharge delay test described later, a PDP is formed in the same manner using a MgO crystal (manufacturer, product name is the same as above) in which F is not added instead of the F-added MgO crystal. Manufactured under conditions.

4-2-1. Outline As shown in FIGS. 6A to 6C, the front-side substrate assembly 1 was produced by forming the display electrode 3, the dielectric layer 4, the protective layer 5, and the P particle emission layer 11 on the glass substrate 1a. . Further, the back-side substrate assembly 2 was fabricated by forming the address electrode 6, the dielectric layer 9, the partition wall 7, and the phosphor layer 8 on the glass substrate 2a. Next, the front side substrate structure 1 and the back side substrate structure 2 were overlapped and the peripheral edge portion was sealed with a sealing material to produce a panel having an airtight discharge space inside. Next, after exhausting the inside of the discharge space, a discharge gas was enclosed to complete the PDP.

4-2-2. Method for Forming P Particle Release Layer The P particle release layer 11 was formed in detail by the following method.
First, the F-added MgO crystal was mixed at a ratio of 2 g to 1 L of IPA (manufactured by Kanto Chemical Co., Inc., for electronic industry), dispersed with an ultrasonic disperser, and agglomerated and crushed to prepare a slurry.
Next, the P particle release layer 11 was formed by repeating the process of spraying the slurry on the protective layer 5 using a coating spray gun and then spraying and drying with dry air several times. The P particle release layer 11 was formed so that the weight of the F-added MgO crystal was ² g per m ² .

4-2-3. Other Other conditions are as follows.

Front side substrate structure 1:
Display electrode 3a width: 270 μm
Metal bus electrode 3b width: 95 μm
Discharge gap width: 100 μm
Dielectric layer 4: formed by coating and baking low melting point glass paste, thickness: 30 μm
Protective layer 5: MgO layer by electron beam evaporation, thickness: 7500 mm

Back side substrate structure 2:
Address electrode 6 width: 70 μm
Dielectric layer 9: formed by coating and firing a low melting glass paste, thickness: 10 μm
Thickness of the phosphor layer 8 directly above the address electrode 6: 20 μm
Material of phosphor layer 8: Zn ₂ SiO ₄ : Mn (green phosphor)
Partition 7 height: 140 μm Top width: 50 μm
The pitch of the partition walls 7 (dimension A in FIG. 6A): 360 μm
Discharge gas: Ne96% -Xe4%, 500 Torr

4-3. Next, a discharge delay test was performed on each manufactured PDP. The discharge delay test was performed using the voltage waveform for measurement shown in FIG. In the reset discharge period, a reset discharge is caused between the sustain electrode 3X and the scan electrode 3Y to reset the charge state of the dielectric layer, thereby removing the influence of the previous discharge. In the preliminary discharge period, after a specific cell was selected, a discharge was caused between the sustain electrode 3X and the scan electrode 3Y to excite the P particle emitting material. Thereafter, after a pause period of 10 μs to 50 ms, a voltage was applied to the address electrode 6 during the address discharge period, and the time from when this voltage was applied until when the discharge was actually started was measured. The time until the start of discharge was measured 1000 times, and the time when the cumulative discharge probability was 90% was defined as the discharge delay.

  The results thus obtained are shown in Table 2, FIG. 8 and FIG. FIG. 8 is a graph showing the relationship between the rest period and the discharge delay for a PDP produced using Sample C and a PDP produced using an additive-free MgO crystal. FIG. 9 is a plot of Table 2.

  As is clear from FIG. 8, it can be seen that the PDP manufactured using the sample C has a shorter discharge delay even when the rest period is longer than the PDP manufactured using the additive-free MgO crystal. This means that the F-added MgO crystal, such as Sample C, lasts longer in the effect of suppressing the discharge delay than the additive-free MgO crystal. The reason why the effect of improving the discharge delay in the F-added MgO crystal persists for a long time is not necessarily clear, but the added halogen element is replaced with oxygen in the MgO crystal, which becomes an electron trap, and the electron emission characteristics are This is presumed to improve.

  Further, as is apparent from Table 2 and FIG. 9, it can be seen that the change in the discharge delay is small when the F addition amount is in the range of 24 to 440 ppm. This indicates that the addition amount of the F element does not significantly affect the discharge delay improvement effect. If the addition amount is in the range of about 1 to 10,000 ppm, the discharge delay improvement effect lasts for a long time. This is thought to suggest.

(A) And (b) shows the structure of PDP of 1st Embodiment of this invention, (a) is a front view, (b) is II sectional drawing in (a). . It is sectional drawing corresponding to FIG.1 (b) which shows the modification of the structure of PDP of 1st Embodiment of this invention. (A) And (b) shows the structure of PDP of 2nd Embodiment of this invention, (a) is a front view, (b) is II sectional drawing in (a). . (A) And (b) shows the structure of PDP of 3rd Embodiment of this invention, (a) is a front view, (b) is II sectional drawing in (a). . In a reference experiment example, it is a graph for calculating | requiring the estimated value of F addition amount of Example sample B, D, E. (A)-(c) is sectional drawing which shows the structure of PDP of a reference experiment example, (a) is a top view, (b) and (c) are respectively I in (a). It is -I sectional drawing and II-II sectional drawing. The voltage waveform used for the measurement of the discharge delay of a reference experiment example is shown. It is a graph which shows the relationship between a rest period and a discharge delay about PDP manufactured using the sample C and PDP manufactured using the additive-free MgO crystal. It is a graph which shows the relationship between the measured value or estimated value of F addition amount, and discharge delay concerning a reference experiment example. It is a perspective view which shows the structure of the conventional PDP.

Explanation of symbols

1: Front side substrate structure 1a: Front side substrate 2: Back side substrate structure 2a: Back side substrate 3: Display electrode 3a: Transparent electrode 3b: Metal bus electrode 3X: Sustain electrode 3Y: Scan electrode 4: Dielectric layer 5: Protective layer 6: Address electrode 7: Partition 8: Phosphor layer 9: Dielectric layer 11: Priming particle emitting layer

Claims (7)

Having a first substrate structure and a second substrate structure disposed opposite to each other;
The first substrate structure has a plurality of display electrodes, and the second substrate structure has address electrodes that intersect the display electrodes,
Each of the display electrodes includes a metal bus electrode,
The first substrate structure is a plasma display panel having a priming particle emitting layer disposed on the negative side facing the second substrate structure so as to be within the range of the metal bus electrode in a front view. The plurality of display electrodes are paired to form a display line, and one of the pairs is a scan electrode used for address discharge between the address electrodes,
The plasma display panel according to claim 1, wherein the priming particle emitting layer is disposed so as to be within a range of a metal bus electrode of the scan electrode in a front view. Having a first substrate structure and a second substrate structure disposed opposite to each other;
The first substrate structure includes a plurality of display electrodes extending in the first direction, and the second substrate structure includes address electrodes that intersect the display electrodes.
The plurality of display electrodes are paired to form a display line, and one of the pairs is a scan electrode used for address discharge between the address electrodes,
The plasma display panel, wherein the first substrate structure has a priming particle emitting layer disposed on the side facing the second substrate structure so as to be within the range of the scan electrode in front view. The plasma display panel according to claim 1, wherein the priming particle emitting layer includes a magnesium oxide crystal. The plasma display panel according to claim 1, wherein the priming particle emitting layer includes a magnesium oxide crystal to which 1 to 10,000 ppm of a halogen element is added. The plasma display panel according to claim 5, wherein the halogen element is fluorine. The plasma display panel according to claim 6, wherein the amount of fluorine added is 5 to 1000 ppm.

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