JP2008270664A5 - - Google Patents
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- Publication number
- JP2008270664A5 JP2008270664A5 JP2007114570A JP2007114570A JP2008270664A5 JP 2008270664 A5 JP2008270664 A5 JP 2008270664A5 JP 2007114570 A JP2007114570 A JP 2007114570A JP 2007114570 A JP2007114570 A JP 2007114570A JP 2008270664 A5 JP2008270664 A5 JP 2008270664A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- region
- openings
- opening
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims 29
- 238000004519 manufacturing process Methods 0.000 claims 6
- 230000015572 biosynthetic process Effects 0.000 claims 2
- 238000005755 formation reaction Methods 0.000 claims 2
- 230000001678 irradiating Effects 0.000 claims 2
- 238000002844 melting Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
Claims (6)
前記絶縁膜上に第1の半導体層を形成し、
前記第1の半導体層に、前記絶縁膜に達する開口を形成し、
前記開口及び第1の半導体層にレーザ光を照射することにより、前記開口において前記第1の半導体層の端部を溶融し、前記溶融した第1の半導体層の一部を開口の前記絶縁膜上に流動させ前記開口を充填して第2の半導体層とし、前記開口であった領域の第2の半導体層は前記開口であった領域の周辺の第2の半導体層よりも薄く、
前記第2の半導体層において、
前記開口であった領域にチャネル形成領域を、
前記開口であった領域の周辺にソース領域及びドレイン領域を、形成することを特徴とする半導体装置の作製方法。 An insulating film is formed on the substrate,
Forming a first semiconductor layer on the insulating film;
Forming an opening reaching the insulating film in the first semiconductor layer ;
By applying a laser beam to the opening and the first semiconductor layer, wherein the melting the end portion of the first semiconductor layer in the opening, the molten first semiconductor layer said insulating layer part of the opening of the and filling the opening to flow upward as a second semiconductor layer, a second semiconductor layer of said an opening area smaller than the second semiconductor layer around said was open area,
In the second semiconductor layer ,
A channel formation region in the region that was the opening ,
A method for manufacturing a semiconductor device, wherein a source region and a drain region are formed around a region which is the opening .
前記絶縁膜上に第1の半導体層を形成し、
前記第1の半導体層に、前記絶縁膜に達するスリット状の複数の開口を形成し、
前記複数の開口及び第1の半導体層にレーザ光を照射することにより、前記複数の開口において前記スリット状の複数の開口間の前記第1の半導体層を溶融し、前記溶融した第1の半導体層を複数の開口の前記絶縁膜上に流動させ前記複数の開口を充填して第2の半導体層とし、前記複数の開口であった領域の第2の半導体層は前記複数の開口であった領域の周辺の第2の半導体層よりも薄く、
前記第2の半導体層において、
前記複数の開口であった領域にチャネル形成領域を、
前記複数の開口であった領域の周辺にソース領域及びドレイン領域を、形成することを特徴とする半導体装置の作製方法。 An insulating film is formed on the substrate,
Forming a first semiconductor layer on the insulating film;
Forming a plurality of slit-shaped openings reaching the insulating film in the first semiconductor layer ;
By irradiating a laser beam to said plurality of openings and the first semiconductor layer, and melting the first semiconductor layer between said plurality of slit-like openings in the plurality of openings, the first semiconductor to which the molten A layer is flowed over the insulating film having a plurality of openings to fill the plurality of openings to form a second semiconductor layer, and the second semiconductor layer in the region that is the plurality of openings is the plurality of openings. Thinner than the second semiconductor layer around the region,
In the second semiconductor layer ,
A channel formation region in the region that was the plurality of openings ,
A method for manufacturing a semiconductor device, wherein a source region and a drain region are formed around a region which is the plurality of openings .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007114570A JP5127288B2 (en) | 2007-04-24 | 2007-04-24 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007114570A JP5127288B2 (en) | 2007-04-24 | 2007-04-24 | Method for manufacturing semiconductor device |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2008270664A JP2008270664A (en) | 2008-11-06 |
JP2008270664A5 true JP2008270664A5 (en) | 2010-05-20 |
JP5127288B2 JP5127288B2 (en) | 2013-01-23 |
Family
ID=40049745
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007114570A Expired - Fee Related JP5127288B2 (en) | 2007-04-24 | 2007-04-24 | Method for manufacturing semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5127288B2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8603841B2 (en) * | 2010-08-27 | 2013-12-10 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing methods of semiconductor device and light-emitting display device |
KR101733196B1 (en) * | 2010-09-03 | 2017-05-25 | 삼성디스플레이 주식회사 | Thin film transistor and method for manufacturing the same and display divce using the same |
CN109496359B (en) * | 2018-10-08 | 2020-04-28 | 长江存储科技有限责任公司 | Method for forming three-dimensional memory device with channel structure by using native oxide layer |
-
2007
- 2007-04-24 JP JP2007114570A patent/JP5127288B2/en not_active Expired - Fee Related
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