JP2008267809A - Capacity detection circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a capacity detection circuit that reduces spike-like noise occurring at an output terminal and allows operation at low voltage. <P>SOLUTION: This capacity detection circuit includes a first capacitor and second capacitor connected in series, a first switch group for alternately repeating on and off, a second switch group for repeating on and off in response to the on and off of the first switch group, an amplifier for inputting the voltage between a first capacitor and second capacitor, and a sample hold capacitor for sample-holding the voltage value relevant to the capacitances of the first capacitor and second capacitor. When the first switch group is on, the capacity detection circuit takes a first connection form where the first capacitor and second capacitor are charged between the power supply voltage and ground and the input terminal and output terminal of the amplifier are short-circuited. When the second switch group is on, the capacity detection circuit takes a second connection form where both ends of the first capacitor and second capacitor and the output terminal of the amplifier are connected to the sample hold capacitor. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  In particular, the present invention relates to a tilt detection sensor that detects a tilt by detecting a capacitance between a plurality of electrode patterns provided on a substrate, and a capacitance detection circuit used for a tilt switch.

  Capacitive sensors are used in a wide range of fields such as pressure and acceleration because of their high sensitivity and good temperature characteristics, and their use is expected to expand in the future. In addition, tilt sensors, tilt switches, and the like are important devices in surveying, attitude control, and the like, and there is a great demand in the field of moving object control devices and mobile devices. Since such a capacitive sensor has a small capacitance value, the performance of the capacitance detection circuit is important, and circuits that apply principles such as diode bridges, switched capacitors, and synchronous detection have been proposed.

One of the capacitance detection circuits is proposed in, for example, Patent Document 1 (Japanese Patent No. 3262013). A circuit proposed in Patent Document 1 is shown in FIG. FIG. 23 is a diagram showing a conventional capacitance detection circuit. This circuit is a circuit using the principle of charge balance. This method has a simple configuration of an operational amplifier and a switch, a feedback capacitor, and a hold capacitor. When φ2 is ON without being affected by the offset of the operational amplifier, Vout = C ₁ V _dd / (C ₁ + C ₂ ) A stable output is obtained.
Japanese Patent No. 3262013

In the circuit of FIG. 23 of Patent Document 1, Vout fluctuates periodically in order to alternately repeat the state when φ1 is turned on and the state when φ2 is turned on. Here, looking immediately after φ2 is turned on, a voltage corresponding to the capacitance difference between C ₁ and C ₂ is applied to the input of the operational amplifier. There is a problem that spike-like noise is instantaneously generated in Vout.

  On the other hand, in a CMOS integrated circuit, a digital circuit used for a CPU is miniaturized, and accordingly, a power supply voltage is lowered to 1 to 1.8 V. That is, when a tilt sensor or a tilt switch is mounted on a mobile device or the like mainly composed of a digital circuit, it is desirable that the capacitance detection circuit for these sensors also operate at about 1 to 1.8V. However, the circuit of FIG. 23 of Patent Document 1 has a problem that it is difficult to reduce the voltage because an operational amplifier is used. That is, in order to realize a high-precision operational amplifier, a power supply voltage of about several volts is required. Therefore, the circuit method of FIG. 23 is difficult to use at 1 to 1.8 V, which is the mainstream in digital circuits. A problem occurs. Therefore, conventionally, when a tilt sensor or a tilt switch is mounted on a mobile device or the like, it is necessary to use two power supply voltages, that is, a power supply voltage of about 1 to 1.8 V and a power supply voltage of about several volts. There was a problem that the circuit configuration of the system had to be complicated.

  If such a problem is solved and the capacitance detection circuit for the inclination sensor and the inclination switch also has an operating voltage of about 1 to 1.8 V, the capacitance detection circuit can be integrated into a single chip together with the digital circuit, which is convenient. However, this is not possible with a circuit using a conventional operational amplifier.

  In order to solve the above-described problem, the invention according to claim 1 of the present invention provides a first capacitor group, a second capacitor connected in series with each other, and a first switch group that alternately repeats an on state and an off state. A second switch group that alternately repeats turning off when the first switch group is on and turning on when the first switch group is off, the first capacitor, and the second capacitor A capacitor detection circuit comprising: an inverter amplifier that inputs a voltage between the first capacitor; and a sample and hold capacitor that samples and holds a voltage value related to the capacitance of the first capacitor and the second capacitor; When one switch group is on, the first capacitor and the second capacitor are charged between the power supply voltage and the ground, and the inverter amplifier is connected to the inverter amplifier. When the second switch group is in the ON state, the first capacitor connected in series, both ends of the second capacitor, and the inverter amplifier are connected to each other. The output terminal is connected to the sample and hold capacitor in a second connection form.

  According to a second aspect of the present invention, a first capacitor and a second capacitor connected in series with each other, a first switch group that alternately repeats an on state and an off state, and the first switch group are in an on state. A second switch group that repeatedly turns off when the first switch group is turned off, and a voltage between the first capacitor and the second capacitor is passed through the third capacitor. And a sample hold capacitor that samples and holds a voltage value related to the capacitance of the first capacitor and the second capacitor, wherein the first switch group is turned on. In the state, the first capacitor and the second capacitor are charged between the power supply voltage and the ground, and the inverter amplifier is an input terminal of the inverter amplifier. When the second switch group is in an ON state, the first capacitor connected in series, both ends of the second capacitor, the output terminal of the inverter amplifier, Is connected to the sample and hold capacitor in a second connection form.

  The invention according to claim 3 is the capacitance detection circuit according to claim 1 or 2, wherein a resistor is interposed between the output terminal of the inverter amplifier and the sample hold capacitor. To do.

  According to a fourth aspect of the present invention, in the capacitance detection circuit according to the first or second aspect, a multistage RC filter is interposed between the output terminal of the inverter amplifier and the sample and hold capacitor. Features.

  According to a fifth aspect of the present invention, in the capacitance detection circuit according to any one of the first to fourth aspects, an amplifier circuit including an inverter amplifier is connected to the sample and hold capacitor. .

  According to a sixth aspect of the present invention, in the capacitance detection circuit according to any one of the first to fifth aspects, an offset adjustment circuit comprising an inverter amplifier is connected to the sample and hold capacitor. To do.

  According to a seventh aspect of the present invention, in the capacitance detection circuit according to any one of the first to fifth aspects, an amplifier circuit including a three-stage inverter amplifier is connected to the sample and hold capacitor. Features.

  According to an eighth aspect of the present invention, in the capacitance detection circuit according to the seventh aspect, an oscillation prevention capacitor is connected to the amplifier circuit including the three-stage inverter amplifier.

  According to the capacitance detection circuit of the present invention, it is possible to reduce spike noise generated at the output terminal Vout. In addition, since the capacity detection circuit of the present invention uses an inverter amplifier, the operating voltage can be set to about 1 to 1.8 V. When the capacity detection circuit is mounted on a mobile device, the power supply voltage is supplied to the mobile device. It is not necessary to provide two systems of an analog power supply voltage (about 3 to 5 V) and a digital power supply voltage (1 to 1.8 V). That is, it can be said that the capacitance detection circuit of the present invention has high affinity when used in combination with a digital IC or the like. Further, according to the present invention, the capacitance detection circuit can be set to an operating voltage of about 1 to 1.8 V, and the capacitance detection circuit can be made into one chip together with other digital circuits.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram of a capacitance detection circuit according to an embodiment of the present invention. In FIG. 1, Vdd is a power supply voltage, S1 and S2 are switches, Cm is a sample and hold capacitor (capacitance is Cm), INV is an inverter amplifier, Vinv-in is an input voltage of the inverter amplifier INV, Vinv− out represents the output voltage of the inverter amplifier INV, and Vout represents the output terminal of the capacitance detection circuit. Reference numeral 100 denotes an equivalent circuit of the tilt sensor 100 composed of capacitors Cx ⁺ and Cx ⁻ , and the tilt sensor 100 is connected to the circuit using lead terminals a to c. The inverter amplifier INV is composed of a pair of a P-type MOS transistor and an N-type MOS transistor as shown in the figure.

  The three switches S1 are turned on / off at the same time, and the three switches S2 are turned on / off at the same time. The three switches S1 are turned on when the three switches S2 are off, and the three switches S2 are turned on when the three switches S1 are off. The frequency of the on / off period of these switches is the drive frequency of the capacitance detection circuit. FIG. 2 is a diagram showing on / off timings of the switch S1 and the switch S2 of the capacitance detection circuit according to the embodiment of the present invention.

  Next, the inclination sensor 100 to which the capacitance detection circuit according to the embodiment of the present invention is connected will be described. 3 is a diagram showing a cross section of the tilt sensor 100, FIGS. 4 and 5 are diagrams showing electrode patterns on the substrate of the tilt sensor 100, and FIG. 3 to 6, 100 is a tilt sensor (or tilt switch), 111 is a substrate, 113 is a cap portion substrate, 114 is a detection liquid, 115 is a gas portion, 120 is a common electrode for detection, and 121 is a first drive. Electrode 122, second driving electrode 125, and lead wire 125. The cross-sectional view of the tilt sensor 10 shown in FIG. 3 shows the electrode pattern in FIGS. 4 and 5 taken along line A-A ′. The tilt sensor 100 is a uniaxial tilt sensor, and detects the tilt θ of the tilt sensor 100 in a state as shown in FIG.

  A first driving electrode 121 and a second driving electrode 122 are formed in an electrode pattern as shown on the substrate 111 of the tilt sensor 100. The first drive electrode 121 and the second drive electrode 122 are substantially semicircular patterns having substantially the same area, and are configured to be connected to lead terminals b and c, respectively. A common electrode for detection 120 is formed on the cap portion substrate 113 in a circular electrode pattern as shown in the figure. A lead-out terminal a is connected to the detection common electrode 120.

A detection liquid 114 is sealed in a sealed space between the substrate 111 and the cap portion substrate 113 in the tilt sensor 100. According to such a detection liquid 114, when the inclination sensor 100 is set up as shown in FIG. 6, the capacitance Cx ⁺ is between the detection common electrode 120 and the first drive electrode 121. A capacitor having a capacitance Cx ⁻ is formed between the detection common electrode 120 and the second drive electrode 122.

  The tilt sensor 100 configured as described above is in a state as shown in FIG. 6 and is used as a uniaxial tilt sensor for detecting the tilt θ of the tilt sensor 100.

Next, the detection principle of the tilt sensor 100 will be described. The dielectric constant of the detection liquid 114 is ε ₁ , the distance between the electrodes is d ₁ , the area of the first drive electrode 121 in contact with the detection liquid 114 is S ⁺ , and the second drive electrode 22 When the area in contact with the upper detection liquid 114 is S ⁻ , the capacitance Cx ^{+ of} the capacitor and the capacitance Cx ⁻ of the capacitor are

となる。

It becomes.

Further, the area S ^{+ in contact} with the detection liquid 114 on the first drive electrode 121 and the area in contact with the detection liquid 114 on the second drive electrode 122 are independent of the inclination angle θ of the inclination sensor 100. Since S ⁻ and the sum S are equal, the following expression is established.

容量検出回路の出力電圧Voutは、当該回路の電源電圧をVｄｄとするとき、

The output voltage Vout of the capacitance detection circuit is as follows when the power supply voltage of the circuit is Vdd:

によって、求めることができる。

Can be obtained.

The change of the area S ⁺ is proportional to the inclination angle θ of the inclination sensor 100, and the relationship between the output voltage Vout of the capacitance detection circuit and the inclination angle θ of the inclination sensor 100 due to the relationship of the equations (1) to (4). Can be obtained by the following equation.

なお、図６に示すように、検出用共通電極１２０、第１駆動用電極１２１、第２駆動用電極１２２には、引き出し用端子ａ乃至ｃが設けられている関係上、傾斜センサ１０が測定可能な傾斜角θは略±８０°以内である。

As shown in FIG. 6, the inclination sensor 10 measures the common electrode 120 for detection, the first drive electrode 121, and the second drive electrode 122 because the lead terminals a to c are provided. The possible inclination angle θ is approximately within ± 80 °.

  A capacitance detection circuit used with the inclination sensor 100 configured as described above will be described. A situation when the switches S1 and S2 are alternately turned on and off will be described.

When the switch S1 is on and the switch S2 is off, the capacitors Cx ⁺ and Cx ⁻ of the two inclination sensors 10 are connected in series between the power supply voltage Vdd and the ground, and the power supply voltage Vdd Capacitor Cx ⁺ and capacitor Cx ⁻ are charged. If the charge stored in the capacitor Cx ⁺ is Q ⁺ and the charge stored in the capacitor Cx ⁻ is Q−,

が成立する。また、

Is established. Also,

と表すことができる。

It can be expressed as.

  Looking at the inverter amplifier INV when the switch S1 is on and the switch S2 is off, the input voltage Vinv-in and the output voltage Vinv-out are short-circuited. FIG. 7 is a diagram showing the relationship between the input and output of the inverter amplifier INV. In the case of the switch S1, it can be seen that the inverter amplifier INV is in a state at the operating point in FIG. 7, which is equal to the input voltage Vinv-in and the output voltage Vinv-out.

Next, let us consider a state where the switch S2 is on and the switch S1 is off. If there is an inflow of charge from the capacitor Cx ⁺ and the capacitor Cx ⁻ (inclination sensor 100) to the inverter amplifier INV, the operating point moves in the direction a, and the capacitor Cx ⁺ and the capacitor Cx ⁻ (inclination sensor 100) When the electric charge is extracted, the operating point moves in the direction b.

Further, the switch S2 is turned on, a state switch S1 is in the OFF state, the two capacitors Cx ⁺ and capacitor Cx of the tilt sensor 100 ^- is in a state of being disconnected from the power supply voltage Vdd and ground.

  When the switches S1 and S2 are repeatedly turned on and off at the drive frequency as described above to reach a steady state, the charge / discharge of the sample hold capacitor Cm is saturated. At this time,

の関係となる。定常状態ではＶout＝Ｖｍ＝Ｖinv-out＝Ｖinv-inであるので、このような式を得ることができる。なお、本回路においては電圧Vmを出力とすることでクロック動作に伴う電圧変動の少ない安定した出力が得られる。

It becomes the relationship. Since Vout = Vm = Vinv-out = Vinv-in in the steady state, such an expression can be obtained. In this circuit, by using the voltage Vm as an output, a stable output with little voltage fluctuation accompanying the clock operation can be obtained.

In the capacitance detecting circuit used in the inclination sensor 100 according to this embodiment, as described above, the switch S1 is turned on, when the switch S2 is turned off, the capacitor Cx ⁺ and capacitor Cx ^- is between the power supply voltage Vdd and the ground to be serially connected state, the capacitor is charged, the switch S2 is on, when the switch S1 is in the oFF state, the capacitor Cx ⁺ and capacitor Cx ^- the charge in a state of being connected in parallel to move.

Due to the movement of charges related to the capacitors Cx ⁺ and Cx ⁻ , charges are input to the input terminal of the inverter amplifier INV, or charges are extracted from the input terminal of the inverter amplifier INV. When charges are input from the capacitor Cx ⁺ and the capacitor Cx ⁻ to the input terminal of the inverter amplifier INV, the output voltage Vinv-out of the output terminal of the inverter amplifier INV decreases, and conversely, the capacitor Cx from the input terminal of the inverter amplifier INV. ^When charge is extracted to ⁺ and the capacitor Cx ⁻ , the output voltage Vinv-out of the inverter amplifier INV increases. Such increase or decrease in the output voltage Vout (Vm) is charged in the capacitor Cm, the switches S1 and S2 are repeatedly turned on and off at the drive frequency as described above, and Vout (Vm) stabilizes and converges in a steady state. . This convergence condition is that the charge input to the inverter amplifier INV and the charge output from the inverter amplifier INV are just balanced. Between the inverter amplifier INV and the capacitor group composed of Cx ⁺ and Cx ^−. This is the point where there is no charge movement. That is, in the capacitance detection circuit used for the tilt sensor 100 according to the present embodiment, in a steady state,

が成立する。この式と、式（６）及び式（７）の関係からも、式（４）を得ることができる。

Is established. Equation (4) can also be obtained from the relationship between this equation and equations (6) and (7).

  As described above, the present invention has a circuit configuration that obtains a voltage output corresponding to the capacitance value by using the inverter amplifier INV instead of the conventional operational amplifier. According to such a circuit of the present invention, the theoretical expression of the output voltage is the same as that using an operational amplifier, but as shown in FIG. 7, the voltage amplification factor is the amplification factor of an ordinary operational amplifier (several hundred thousand). Therefore, the spike noise when the switch S2 is turned on is reduced. Further, since the inverter amplifier INV is used, it operates reliably even at a power supply voltage of 1 to 1.8 V of the CMOS digital integrated circuit. Note that the influence of the voltage fluctuation can be reduced by using the voltage Vm of the hold capacitor as an output and increasing the capacitance value of the hold capacitor.

Next, a capacitance detection circuit used for the tilt sensor 10 according to another embodiment of the present invention will be described. FIG. 8 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. In FIG. 8, Vdd is a power supply voltage, S1 and S2 are switches, Cm is a sample hold capacitor (each capacitance is Cm), INV is an inverter amplifier, Vinv-in is an input voltage of the inverter amplifier INV, Vinv− out represents the output voltage of the inverter amplifier INV, and Vout represents the output terminal of the capacitance detection circuit. An equivalent circuit of the inclination sensor 10 composed of the capacitors Cx ⁺ , Cx ⁻ , and Co is connected to the capacitance detection circuit as shown in FIG. 11 using the lead terminals a to c. The inverter amplifier INV is composed of a pair of a P-type MOS transistor and an N-type MOS transistor as shown in the figure.

  All three switches S1 are turned on and off at the same time, and all three switches S2 are turned on and off at the same time. The three switches S1 are turned on when the three switches S2 are off, and the three switches S2 are turned on when the three switches S1 are off. The frequency of the on / off period of these switches is the driving frequency. As described above, in the present invention, several hundred Hz to several hundred kHz, which is the driving frequency at which the detection liquid 14 apparently behaves as a conductor, is used. The on / off timing of the switch S1 and the switch S2 of the capacitance detection circuit according to another embodiment of the present invention is the same as that shown in FIG.

  Next, an inclination sensor 10 to which a capacitance detection circuit according to another embodiment of the present invention is connected will be described. FIG. 9 is a diagram showing a cross section of a tilt sensor used in a capacitance detection circuit according to another embodiment, and FIG. 10 is a diagram showing an electrode pattern on the substrate of the tilt sensor used in the capacitance detection circuit according to another embodiment. FIG. 11 is a diagram illustrating a usage state of the inclination sensor used in the capacitance detection circuit according to another embodiment. 9 to 11, 10 is a tilt sensor (or tilt switch), 11 is a substrate, 12 is an insulating film, 13 is a cap, 14 is a detection liquid, 15 is a gas portion, 20 is a common electrode for detection, and 21 is The first drive electrode, 22 is the second drive electrode, and 25 is the lead wire. The cross-sectional view of the tilt sensor 10 shown in FIG. 9 shows the electrode pattern on the substrate 11 shown in FIG. 10 taken along line A-A ′. The tilt sensor 10 is a uniaxial tilt sensor, and detects the tilt θ of the tilt sensor 10 as shown in FIG.

  On the substrate 11 of the tilt sensor 10, a detection common electrode 20, a first drive electrode 21, and a second drive electrode 22 are formed in an electrode pattern as illustrated. The first drive electrode 21 and the second drive electrode 22 are substantially semicircular patterns having substantially the same area, and are configured to be connected to lead terminals b and c, respectively. The detection common electrode 20 is formed so as to surround the pattern of the first drive electrode 21 and the second drive electrode 22 and is connected to the lead terminal a. A gap g is formed between the end of the detection common electrode 20 and the lead-out terminal c of the second drive electrode 22 so as to ensure sufficient insulation. Lead wires 25 are connected to the lead terminals a to c, and signals from the detection common electrode 20, the first drive electrode 21, and the second drive electrode 22 can be taken out of the tilt sensor 10.

  An insulating film 12 made of glass, a silicon-based organic material, a fluorine-based organic material, or the like is formed on the substrate 11 on which the detection common electrode 20, the first driving electrode 21, and the second driving electrode 22 are formed. . The insulating film 12 is provided with a cap 13 that covers the entire insulating film 12, provides an internal space between the insulating film 12 and the cap 13, and seals the internal space. A detection liquid 14 is enclosed in a sealed space between the insulating film 12 and the cap 13. As the detection liquid 14, a liquid (for example, an organic solvent, water, etc.) or a conductive liquid (for example, a saline solution, an ionic liquid) that is easily polarized (high in relative dielectric constant) is used. When the tilt sensor 10 is set up as shown in FIG. 10, the detection liquid 14 is detected on substantially half of the detection common electrode 20, the first drive electrode 21, and the second drive electrode 22. An amount of liquid 14 is sealed.

  In addition to the electrical properties as described above, the detection liquid 14 has a physical property that moves following the tilt angle θ of the tilt sensor 10 in the internal space between the insulating film 12 and the cap 13. Is also required.

  For the detection liquid 14 of the tilt sensor 10, propylene carbonate (see Table 1) having a low kinematic viscosity in addition to the electrical properties as described above is suitable. This propylene carbonate has advantages such as high safety, high boiling point, low freezing point, and low cost.

以上のように構成される傾斜センサ１０は、図１１に示すような状態とし、当該傾斜センサ１０の傾きθを検出する一軸傾斜センサとして利用する。

The tilt sensor 10 configured as described above is in a state as shown in FIG. 11 and is used as a uniaxial tilt sensor for detecting the tilt θ of the tilt sensor 10.

  Next, the detection principle of the inclination sensor 10 configured as described above will be described. FIG. 12 is a diagram showing an equivalent circuit of the tilt sensor 10 used in the capacitance detection circuit of another embodiment, and FIG. 13 shows an internal state in a measurement state of the tilt sensor 10 used in the capacitance detection circuit of another embodiment. FIG.

  When the drive frequency in the capacitance detection circuit used for the tilt sensor 10 is several hundred Hz to several hundred kHz, the detection liquid 14 which is a liquid that is easily polarized behaves as a conductor. Accordingly, in FIG. 12, the insulating film 12 between the detection common electrode 20 and the detection liquid 14, the insulating film 12 between the first drive electrode 21 and the detection liquid 14, the second drive electrode 22 and The insulating film 12 between the detection liquid 14 behaves as a capacitor under a driving frequency of several hundred Hz to several hundred kHz.

The dielectric constant of the insulating film 12 is ε, the distance between each electrode and the surface layer of the insulating film 12 is d, and the area where the surface layer of the insulating film 12 on the first driving electrode 21 is in contact with the detection liquid 14 is S. ⁺ , Where S ⁻ is the area where the surface layer of the insulating film 12 on the second driving electrode 22 is in contact with the detection liquid 14, the insulating film 12 is formed between the first driving electrode 21 and the detection liquid 14. The capacitance Cx ⁺ of the capacitor to be formed, and the capacitance Cx ⁻ of the capacitor formed by the insulating film 12 between the second drive electrode 22 and the detection liquid 14 are:

となる。なお、検出用共通電極２０と検出用液体１４との間の絶縁膜１２が形成するキャパシタの静電容量はＣｏとする。

It becomes. The capacitance of the capacitor formed by the insulating film 12 between the detection common electrode 20 and the detection liquid 14 is Co.

Regardless of the inclination angle θ of the inclination sensor 10, the area S ⁺ where the surface of the insulating film 12 on the first driving electrode 21 is in contact with the detection liquid 14 and the surface layer of the insulating film 12 on the second driving electrode 22. the area S of detecting liquid 14 is in contact ^- so the sum S is equal, the following equation is established.

本実施形態における容量検出回路の出力電圧Voutは、当該回路の電源電圧をVｄｄとするとき、

The output voltage Vout of the capacitance detection circuit in the present embodiment is as follows when the power supply voltage of the circuit is Vdd:

によって、求めることができる。

Can be obtained.

The change of the area S ⁺ is proportional to the inclination angle θ of the inclination sensor 10 and the relationship between the output voltage Vout of the capacitance detection circuit and the inclination angle θ of the inclination sensor 10 by the relationship of the expressions (1) to (4). Can be obtained by the following equation.

なお、図１１に示すように、検出用共通電極２０、第１駆動用電極２１、第２駆動用電極２２には、引き出し用端子ａ乃至ｃが設けられている関係上、傾斜センサ１０が測定可能な傾斜角θは略±８０°以内である。

As shown in FIG. 11, since the detection common electrode 20, the first drive electrode 21, and the second drive electrode 22 are provided with lead terminals a to c, the inclination sensor 10 performs measurement. The possible inclination angle θ is approximately within ± 80 °.

  The internal state in the measurement state of the tilt sensor 10 is as shown in FIG. The detection liquid 14 filled in the internal space between the insulating film 12 and the cap 13 is attracted to the inner wall surface of the cap 13 by the meniscus force as shown in S of FIG. That is, in the inclination sensor 10, it is easy to physically create a state where the detection liquid 14 is stably present on the insulating film 12 where the detection common electrode 20 is present, which is very suitable as an inclination sensor.

  The capacitance detection circuit used for the tilt sensor 10 configured as described above will be described. First, the situation when the switches S1 and S2 are alternately turned on and off will be described.

When the switch S1 is on and the switch S2 is off, the capacitors Cx ⁺ and Cx ⁻ of the two inclination sensors 10 are connected in series between the power supply voltage Vdd and the ground, and the power supply voltage Vdd Capacitor Cx ⁺ and capacitor Cx ⁻ are charged. Note that, when the driving frequency is several hundred Hz to several hundred kHz, the capacitor Co can be regarded as being almost short-circuited. If the charge stored in the capacitor Cx ⁺ is Q ⁺ and the charge stored in the capacitor Cx ⁻ is Q−,

が成立する。また、

Is established. Also,

と表すことができる。

It can be expressed as.

  Looking at the inverter amplifier INV when the switch S1 is on and the switch S2 is off, the input voltage Vinv-in and the output voltage Vinv-out are short-circuited. FIG. 7 is a diagram showing the relationship between the input and output of the inverter amplifier INV. In the case of the switch S1, it can be seen that the inverter amplifier INV is in a state at the operating point in FIG. 7, which is equal to the input voltage Vinv-in and the output voltage Vinv-out.

Next, let us consider a state where the switch S2 is on and the switch S1 is off. If there is an inflow of charge from the capacitor Cx ⁺ and the capacitor Cx ⁻ (inclination sensor 10) to the inverter amplifier INV, the operating point moves in the direction a, and the capacitor Cx ⁺ and the capacitor Cx ⁻ (inclination sensor 10) When the electric charge is extracted, the operating point moves in the direction b.

Further, the switch S2 is turned on, a state switch S1 is in the OFF state, the capacitor Cx ⁺ and capacitor Cx of two tilt sensors 10 ^- is in a state of being disconnected from the power supply voltage Vdd and ground.

  When the switches S1 and S2 are repeatedly turned on and off at the drive frequency as described above to be in a steady state, the charge / discharge of the capacitor Cm is saturated. At this time,

の関係となる。定常状態ではＶout＝Ｖｍ＝Ｖinv-out＝Ｖinv-inであるので、このような式を得ることができる。なお、本回路においては電圧Vmを出力とすることでクロック動作に伴う電圧変動の少ない安定した出力が得られる。

It becomes the relationship. Since Vout = Vm = Vinv-out = Vinv-in in the steady state, such an expression can be obtained. In this circuit, by using the voltage Vm as an output, a stable output with little voltage fluctuation accompanying the clock operation can be obtained.

In the capacitance detecting circuit used in the inclination sensor 10 according to the present embodiment, as described above, the switch S1 is turned on, when the switch S2 is turned off, the capacitor Cx ⁺ and capacitor Cx ^- is between the power supply voltage Vdd and the ground to be serially connected state, the capacitor is charged, the switch S2 is on, when the switch S1 is in the oFF state, the capacitor Cx ⁺ and capacitor Cx ^- the charge in a state of being connected in parallel to move.

Due to the movement of charges related to the capacitors Cx ⁺ and Cx ⁻ , charges are input to the input terminal of the inverter amplifier INV, or charges are extracted from the input terminal of the inverter amplifier INV. When charges are input from the capacitor Cx ⁺ and the capacitor Cx ⁻ to the input terminal of the inverter amplifier INV, the output voltage Vinv-out of the output terminal of the inverter amplifier INV decreases, and conversely, the capacitor Cx from the input terminal of the inverter amplifier INV. ^When charge is extracted to ⁺ and the capacitor Cx ⁻ , the output voltage Vinv-out of the inverter amplifier INV increases. Such increase or decrease in the output voltage Vout (Vm) is charged in the capacitor Cm, the switches S1 and S2 are repeatedly turned on and off at the drive frequency as described above, and Vout (Vm) stabilizes and converges in a steady state. . The condition for this convergence is that the charge input to the inverter amplifier INV and the charge output from the inverter amplifier INV are just balanced, and between the inverter amplifier INV and the capacitor group consisting of Cx ⁺ and Cx ^−. This is the point where there is no charge movement. That is, in the capacitance detection circuit used for the tilt sensor 10 according to the present embodiment, in a steady state,

が成立する。この式と、式（１５）及び式（１６）の関係からも、式（１３）、（１７）を得ることができる。

Is established. Expressions (13) and (17) can also be obtained from the relationship between this expression and Expressions (15) and (16).

  Note that the influence of voltage fluctuation can be reduced by using the voltage Vm of the sample hold capacitor as an output and increasing the capacitance value of the hold capacitor.

  As described above, the present invention has a circuit configuration that obtains a voltage output corresponding to the capacitance value by using the inverter amplifier INV instead of the conventional operational amplifier. According to such a circuit of the present invention, the theoretical expression of the output voltage is the same as that using a conventional operational amplifier, but as shown in FIG. Therefore, the spike noise when the switch S2 is turned on is reduced. Further, since the inverter amplifier INV is used, it operates reliably even at a power supply voltage of 1 to 1.8 V of the CMOS digital integrated circuit. When such a capacitance detection circuit is mounted on a mobile device or the like, the power supply voltage is divided into two systems: an analog power supply voltage (about 3 to 5 V) system and a digital power supply voltage (1 to 1.8 V) system. There is no need to provide a system. That is, it can be said that the capacitance detection circuit of the present invention has high affinity when used in combination with a digital IC or the like.

  Next, another embodiment of the present invention will be described. FIG. 14 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. The embodiment in FIG. 14 is different from the previous embodiment only in that a resistor R is inserted between the terminal Vm and the terminal Vinv-out, and other configurations are the same as those of the previous embodiment. It is. According to such an embodiment, an RC low-pass filter is formed between the resistor R between the inverter amplifier output terminal Vinv-out and the sample and hold capacitor Cm, and the sample and hold capacitor Cm. Thus, a low noise voltage output Vout can be obtained.

  For verification of the present embodiment, the circuit of FIG. 23 and the present embodiment was designed with a 0.35 μm CMOS circuit, SPICE simulation was performed, and operation was confirmed. According to the result of this SPICE simulation, in the circuit of FIG. 23, the noise voltage is as large as 5.7 mVrms even if the configuration of reading the voltage of the sample hold capacitor portion or using a large sample hold capacitor of 10 μF is reduced. In order to achieve this, it was necessary to put LPF in the latter stage.

  On the other hand, in the circuit of FIG. 1, the noise voltage was almost equal to that of FIG. Furthermore, when the capacitance was 10 μF, an extremely low noise voltage of 0.1 mVrms was obtained. Furthermore, in the case of the embodiment of FIG. 14 in which the resistance R between the inverter amplifier output terminal Vinv-out and the sample hold capacitor Cm is 100 kΩ, the hold capacity of 100 pF is extremely 0.1 mVrms. A low noise voltage was obtained. The values of 100 kΩ and 100 pF can be built in the integrated circuit, and a capacitance detection integrated circuit without external components corresponding to the low voltage digital circuit can be realized.

  In the circuit of the embodiment of FIG. 14, when the sample and hold capacity is increased, the response speed of the output becomes slow due to the formed RC filter, and the time constant τ is given by τ = RC. Therefore, for example, when R = 100 kΩ and C = 1 uF, the time constant is 0.1 s. In capacitive tilt sensors that use liquids, there are situations where the response speed required for the sensor is slow, and sensors with a slow response speed are more suitable for practical applications in terms of preventing noise contamination due to vibration and shock acceleration. Such a circuit having a relatively slow time constant is suitable for such an application.

  Next, still another embodiment of the present invention will be described. FIG. 15 is a main part circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. In the embodiment in FIG. 14, the resistor R is inserted between the terminal Vm and the terminal Vinv-out. However, in this embodiment, a multistage RC passive filter is inserted instead of the resistor R. . According to such an embodiment, it is possible to obtain a low noise voltage output Vout with further noise reduction.

  Next, a capacitance detection circuit according to another embodiment of the present invention will be described. FIG. 16 is a diagram illustrating a capacitance detection circuit according to another embodiment of the present invention, and FIG. 17 is a diagram illustrating an electrode pattern on a substrate of a tilt sensor according to another embodiment of the present invention. FIG. 18 is a diagram illustrating a usage state of a tilt sensor according to another embodiment of the present invention.

  A tilt sensor according to another embodiment of the present invention is a biaxial tilt sensor. A tilt sensor according to another embodiment of the present invention has the same basic structure as that of the tilt sensor 10 of the previous embodiment, but the electrode pattern on the substrate 11 and the capacitance detection circuit are different. Is. 16 to 18, 30 is a tilt sensor, 31-1 is a first common electrode for detection, 31-2 is a second common electrode for detection, 32 is a first drive electrode, 33 is a second drive electrode, Reference numeral 34 denotes a third drive electrode, and 35 denotes a fourth drive electrode. Such a tilt sensor is used in a state as shown in FIG. 18 and detects the tilts θx and θy of the tilt sensor 30.

  On the substrate 11 of the biaxial tilt sensor 30, the first detection common electrode 31-1, the second detection common electrode 31-2, the first drive electrode 32, the second drive electrode 33, and the third drive. The electrode 34 and the fourth driving electrode 35 are formed in an electrode pattern as shown. The first driving electrode 32, the second driving electrode 33, the third driving electrode 34, and the fourth driving electrode 35 are substantially ¼ circular patterns having substantially the same area, and each has a lead terminal b, e, c, and f are connected. The first detection common electrode 31-1 is a pattern of the first drive electrode 32 and the fourth drive electrode 35, and the second detection common electrode 31-2 is the second drive electrode 33 and the third drive electrode 34. The lead-out terminals a and d are connected to the respective patterns. Between the terminal of the first detection common electrode 31-1 and the lead terminal f of the fourth drive electrode 35, and for the lead of the terminal of the second detection common electrode 31-2 and the third drive electrode 34 Between the terminal c, gaps g2 and g1 having a distance sufficient to provide sufficient insulation are formed. Lead wires 25 are connected to the lead terminals a to f so that signals from the respective electrodes can be taken out of the inclination sensor 30.

  In the biaxial tilt sensor 30 configured as described above, for example, the capacitor formed by the insulating film 12 between the first detection common electrode 31-1 and the detection liquid 14 is Co1, and the second detection common is used. The capacitor formed by the insulating film 12 between the electrode 31-2 and the detection liquid 14 is Co2, and the capacitor formed by the insulating film 12 between the first drive electrode 32 and the detection liquid 14 is Cx +. The capacitor formed by the insulating film 12 between the driving electrode 33 and the detection liquid 14 is Cx−, the capacitor formed by the insulating film 12 between the third driving electrode 34 and the detection liquid 14 is Cy +, A capacitor formed by the insulating film 12 between the four driving electrodes 35 and the detection liquid 14 is used as Cy−.

  A capacitance detection circuit for the tilt sensor 30 configured as described above is shown in FIG. In this circuit, time division is performed by switches S1 to S4 by a four-phase clock circuit (not shown). FIG. 19 is a diagram showing on / off timings of the switches S1 to S4 of the capacitance detection circuit according to another embodiment of the present invention. Thereby, output voltages Vxout and Vyout for two axes can be obtained. In this circuit, the voltages Vm1 and Vm2 are disconnected from the circuit and hold the voltage during the operation of the other circuit. By using these as outputs, a stable output with little voltage fluctuation accompanying the clock operation can be obtained.

  Next, a capacitance detection circuit according to another embodiment of the present invention will be described. FIG. 20 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. The embodiment of FIG. 20 is different from the embodiment of FIG. 1 in that a circuit including an inverter amplifier that amplifies the output of the capacitance detection circuit is provided in the embodiment of FIG. More specifically, in the present embodiment, such an amplifier circuit including an inverter amplifier is inserted between the terminal Vm to which the sample hole capacitor Cm is connected and the output terminal Vinv. Yes.

  The inverter amplifier INV is composed of a pair of a P-type MOS transistor and an N-type MOS transistor. More specifically, the gate of the P-type MOS transistor and the gate of the N-type MOS transistor are connected to each other, and this connection midpoint is used as the input Vinv-in of the inverter amplifier INV. The source of the P-type MOS transistor is connected to the power supply voltage Vdd, and the source of the N-type MOS transistor is connected to the ground. Further, the drain of the P-type MOS transistor and the drain of the N-type MOS transistor are connected to each other, and this connection midpoint is taken out as the output Vinv-out of the inverter amplifier INV.

  In this embodiment, as the inverter amplifier INV for amplifying the output of the terminal Vm, a resistor R1 is connected between the Vm terminal and the input Vinv-in terminal of the inverter amplifier INV, and a P-type MOS transistor and an N-type transistor are connected. A resistor R2 is connected between the common gate connection terminal (Vinv-in terminal) of the MOS transistor and the common drain connection terminal (Vinv-out terminal) of the P-type MOS transistor and the N-type MOS transistor. It has become. According to the amplifier circuit composed of such an inverter amplifier, the output shown in Expression (19) can be obtained.

ただし、Ｒ２／Ｒ１の大きさはインバータアンプ自体の増幅度よりも十分小さい値とする。

However, the magnitude of R2 / R1 is set to a value sufficiently smaller than the amplification degree of the inverter amplifier itself.

  According to the embodiment provided with the amplifier circuit including the inverter amplifier as described above, the output can be amplified when the output from the inclination sensor is small. In addition, because the amplifier circuit uses an inverter, the capacitance detection circuit has the same offset and temperature characteristics and high compatibility with other digital circuits. Power supplies such as mobile devices that incorporate the capacitance detection circuit are used for analog and digital applications. There is no need to provide two systems.

  Next, a capacitance detection circuit according to another embodiment of the present invention will be described. FIG. 21 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. The embodiment shown in FIG. 21 is different from the embodiment shown in FIG. 1 in that the embodiment shown in FIG. 21 is provided with a circuit including an inverter amplifier that adjusts the output of the capacitance detection circuit. More specifically, in the present embodiment, an offset adjustment circuit composed of an inverter amplifier as shown in FIG. 21 is inserted between the terminal Vm to which the sample hole capacitor Cm is connected and the output terminal Vinv. It is the composition which becomes.

  According to the embodiment in which the offset adjustment circuit including such an inverter amplifier is provided, the output can be adjusted when the offset adjustment is necessary for the tilt sensor. Moreover, since the offset adjustment circuit uses an inverter amplifier, it has high compatibility with other digital circuits, and there is no need to provide two systems for analog and digital power supplies such as a mobile device incorporating a capacitance detection circuit.

  Next, a capacitance detection circuit according to another embodiment of the present invention will be described. FIG. 22 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. The embodiment of FIG. 22 differs from the embodiment of FIG. 1 in that the output stage of the capacitance detection circuit of FIG. 22 is provided with an inverter amplifier circuit having three stages and an inverter amplifier circuit for adjusting the offset. It is. More specifically, this embodiment is characterized in that a resistor R3 and a capacitor C1 are connected to the first-stage and third-stage inverter amplifiers as viewed from the output side of the sample-hold capacitor Cm.

  In the single-stage inverter amplifier, the amplification degree itself is several tens of times, and therefore the amplification degree obtained by the equation (19) is about several times to 10 times. However, as shown in this embodiment, the inverter is composed of three stages. When the amplifier circuit is used, the total amplification factor is several tens of thousands of times, the amplification factor can be several tens to 100 times, and it is possible to cope with the case where the output from the sensor or the like is weak. In the inverter amplifier INV circuit having three stages, the amplification degree can be determined mainly by the resistance ratio of R1 and R3 by interposing a resistor R3 as shown in the figure. In a three-stage inverter amplifier INV circuit, oscillation is likely to occur in a high frequency region, but this problem can also be solved by providing a capacitor C1 in parallel with the resistor R3. Here, since such a capacitor C1 can be of the pF order, there is no need for external connection even when an IC is made.

  Further, according to the embodiment provided with such a three-stage inverter amplifier circuit and an offset adjustment circuit including the inverter amplifier, the output can be adjusted when the offset adjustment is required for the tilt sensor. it can. Moreover, since the offset adjustment circuit uses an inverter amplifier, it has high compatibility with other digital circuits, and there is no need to provide two systems for analog and digital power supplies such as a mobile device incorporating a capacitance detection circuit.

  As described above, according to the capacitance detection circuit of the present invention, spike noise generated at the output terminal Vout can be reduced. In addition, since the capacity detection circuit of the present invention uses an inverter amplifier, the operating voltage can be set to about 1 to 1.8 V. When the capacity detection circuit is mounted on a mobile device, the power supply voltage is supplied to the mobile device. It is not necessary to provide two systems of an analog power supply voltage (about 3 to 5 V) and a digital power supply voltage (1 to 1.8 V). That is, it can be said that the capacitance detection circuit of the present invention has high affinity when used in combination with a digital IC or the like. Further, according to the present invention, the capacitance detection circuit can be set to an operating voltage of about 1 to 1.8 V, and the capacitance detection circuit can be made into one chip together with other digital circuits.

  Further, various embodiments according to the present invention have been described above, but the present invention includes embodiments composed of arbitrary combinations of components of the respective embodiments.

1 is a circuit diagram of a capacitance detection circuit according to an embodiment of the present invention. It is a figure which shows the on-off timing of switch S1 and switch S2 of the capacity | capacitance detection circuit based on embodiment of this invention. 2 is a view showing a cross section of the tilt sensor 100. FIG. It is a figure which shows the electrode pattern on the board | substrate of the inclination sensor. It is a figure which shows the electrode pattern on the board | substrate of the inclination sensor. It is a figure which shows the use condition of the inclination sensor. It is a figure which shows the relationship between the input and output of inverter amplifier INV. FIG. 6 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. It is a figure which shows the cross section of the inclination sensor used for the capacity | capacitance detection circuit of other embodiment. It is a figure which shows the electrode pattern on the board | substrate of the inclination sensor used for the capacity | capacitance detection circuit of embodiment. It is a figure which shows the use condition of the inclination sensor used for the capacity | capacitance detection circuit of other embodiment. It is a figure which shows the equivalent circuit of the inclination sensor 10 used for the capacity | capacitance detection circuit of other embodiment. It is a figure which shows the internal state in the measurement state of the inclination sensor 10 used for the capacity | capacitance detection circuit of other embodiment. FIG. 6 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. It is a principal part circuit diagram of the capacity | capacitance detection circuit which concerns on other embodiment of this invention. It is a figure which shows the capacity | capacitance detection circuit which concerns on other embodiment of this invention. It is a figure which shows the electrode pattern on the board | substrate of the inclination sensor which concerns on other embodiment of this invention. It is a figure which shows the use condition of the inclination sensor which concerns on other embodiment of this invention. It is a figure which shows the on-off timing of switch S1 thru | or switch S4 of the capacity | capacitance detection circuit based on other embodiment of this invention. FIG. 6 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. FIG. 6 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. FIG. 6 is a circuit diagram of a capacitance detection circuit according to another embodiment of the present invention. It is a figure which shows the conventional capacity | capacitance detection circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Tilt sensor (or tilt switch), 11 ... Board | substrate, 12 ... Insulating film, 13 ... Cap, 14 ... Liquid for detection, 15 ... Gas part, 20 ... Common electrode for detection, 21 ... first drive electrode, 22 ... second drive electrode, 25 ... lead wire, 30 ... tilt sensor, 31-1 ... common for first detection Electrode, 31-2 ... second detection common electrode, 32 ... first drive electrode, 33 ... second drive electrode, 34 ... third drive electrode, 35 ... first 4 driving electrodes, 100... Tilt sensor (also... Tilt switch), 111... Substrate, 113... Cap portion substrate, 114. ... Detection common electrode, 121 ... First drive electrode, 122 ... Second drive electrode, 125 ... Lead wire

Claims (8)

A first capacitor and a second capacitor connected in series;
A first switch group that alternately repeats an on state and an off state;
A second switch group that alternately turns off when the first switch group is on and turns on when the first switch group is off;
An inverter amplifier for inputting a voltage between the first capacitor and the second capacitor;
A capacitance detection circuit comprising: a first hold capacitor; a sample hold capacitor that samples and holds a voltage value related to the capacitance of the second capacitor;
When the first switch group is in the ON state, the first capacitor and the second capacitor are charged between the power supply voltage and the ground, and the inverter amplifier has a short circuit between the input terminal and the output terminal of the inverter amplifier. The first connection form
A second connection configuration in which when the second switch group is in an ON state, the first capacitor connected in series, both ends of the second capacitor, and the output terminal of the inverter amplifier are connected to the sample hold capacitor; A capacitance detection circuit characterized by that. A first capacitor and a second capacitor connected in series;
A first switch group that alternately repeats an on state and an off state;
A second switch group that alternately turns off when the first switch group is on and turns on when the first switch group is off;
An inverter amplifier for inputting a voltage between the first capacitor and the second capacitor via a third capacitor;
A capacitance detection circuit comprising: a first hold capacitor; a sample hold capacitor that samples and holds a voltage value related to the capacitance of the second capacitor;
When the first switch group is in the ON state, the first capacitor and the second capacitor are charged between the power supply voltage and the ground, and the inverter amplifier has a short circuit between the input terminal and the output terminal of the inverter amplifier. The first connection form
A second connection configuration in which when the second switch group is in an ON state, the first capacitor connected in series, both ends of the second capacitor, and the output terminal of the inverter amplifier are connected to the sample hold capacitor; A capacitance detection circuit characterized by that. 3. The capacitance detection circuit according to claim 1, wherein a resistor is interposed between the output terminal of the inverter amplifier and the sample hold capacitor. 3. The capacitance detection circuit according to claim 1, wherein a multistage RC filter is interposed between the output terminal of the inverter amplifier and the sample and hold capacitor. 5. The capacitance detection circuit according to claim 1, wherein an amplification circuit including an inverter amplifier is connected to the sample and hold capacitor. 6. The capacitance detection circuit according to claim 1, wherein an offset adjustment circuit including an inverter amplifier is connected to the sample and hold capacitor. 6. The capacitance detection circuit according to claim 1, wherein an amplification circuit including a three-stage inverter amplifier is connected to the sample and hold capacitor. 8. The capacitance detection circuit according to claim 7, wherein a capacitor for preventing oscillation is connected to the amplifier circuit including the three-stage inverter amplifier.

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