JP2008263286A - Variable frequency amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable frequency amplifier which is compact and has a wide band of frequencies to be matched. <P>SOLUTION: In the variable frequency amplifier having an input matching circuit between a signal input terminal 1 and a semiconductor element 2 for signal amplification, the input matching circuit has a first series circuit 10 comprising a series connection of a first transmission line 11, a first capacitor 12, a second transmission line 13, and a second capacitor 14, a second series circuit 20 including a series connection of a first short stub 21, a first switch 22, and a third transmission line 23, and a third series circuit 30 comprising a series connection of a second short stub 31, a second switch 32, and a fourth transmission line 33, where the first series circuit 10 is connected between the semiconductor element 2 and input terminal 1, the second series circuit 20 has one end connected in parallel between the first capacitor 12 and second transmission line 13, and the third series circuit 30 has one end connected in parallel between the second capacitor 14 and input terminal 1. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a frequency variable amplifier mainly used in a VHF band, a UHF band, a microwave band, and a millimeter wave band.

  FIG. 16 is a diagram showing a configuration of a conventional frequency variable amplifier. This conventional variable frequency amplifier includes an input terminal 1, a semiconductor element 2, a first transmission line 51, a second transmission line 52, a first switch 53, a second switch 54, a first open stub 55, and It is composed of a second open stub 56.

  Here, the first transmission line 51, the second transmission line 52, the first switch 53, the second switch 54, the first open stub 55, which are between the input terminal 1 and the semiconductor element 2, and The circuit configured by the second open stub 56 corresponds to an input matching circuit.

  A first transmission line 51 and a second transmission line 52 are connected in series between the input terminal 1 and the semiconductor element 2. The other end of the first switch 53 whose one end is connected in series with the first open stub 55 is connected in parallel between the first transmission line 51 and the second transmission line 52. Furthermore, the other end of the second switch 54 whose one end is connected in series with the second open stub 56 is connected in parallel between the second transmission line 52 and the input terminal 1. In addition, here, in order to simplify the description, a case where the number of open stubs is two is shown.

  Next, the operation will be described. A signal input from the input terminal 1 is input to the semiconductor element 2 through an input matching circuit that transforms the impedance of the input terminal 1 into the input impedance of the semiconductor element 2, and is amplified. The matching frequency is switched by turning on one of the first switch 53 and the second switch 54.

  FIG. 17 is a pseudo equivalent circuit when the first switch 53 is turned off and the second switch 54 is turned on in the conventional frequency variable amplifier shown in FIG. FIG. 18 is a pseudo equivalent circuit when the first switch 53 is turned on and the second switch 54 is turned off in the conventional frequency variable amplifier shown in FIG. Each input matching circuit is composed of a serial transmission line and one parallel open stub.

  FIG. 19 is a schematic diagram in which the input impedance of the semiconductor element 2 at a certain high frequency and the input impedance of the semiconductor element 2 at a certain low frequency are transformed into the impedance of the input terminal 1. As shown in FIG. 19, at a low frequency, matching to the impedance of the input terminal 1 is realized by turning off the first switch 53 and turning on the second switch 54.

  Further, at a high frequency, matching the impedance of the input terminal 1 is realized by turning on the first switch 53 and turning off the second switch 54. Thereby, the circuit shown in FIG. 16 operates as a frequency variable amplifier.

  As described above, in the conventional variable frequency amplifier, for one frequency to be matched, only one switch is turned on and used for matching, and the remaining switches are turned off so as not to contribute to matching. That is, the transformation from the input impedance of the semiconductor element 2 to the impedance of the input terminal 1 is performed by a one-stage transformation circuit (see, for example, Non-Patent Document 1).

“A 0.9-5-GHz Wide-Range 1W-Class Reconfigurable Power Amplifier Employing RF-MEMS Switches” 2006 IEEE

However, the prior art has the following problems.
FIG. 20 is a diagram schematically showing frequency bands of frequencies matched in a conventional frequency variable amplifier. As shown in FIG. 20, the conventional frequency variable amplifier has a problem that the band of each frequency to be matched becomes narrow. Furthermore, when the frequency to be matched is increased, it is necessary to increase the number of serial transmission lines and open stubs, resulting in a problem that the circuit size is increased.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a frequency variable amplifier that is small in size and has a wide band of matched frequencies.

  The frequency variable amplifier according to the present invention is a frequency variable amplifier having an input matching circuit between a signal input terminal and a semiconductor element for signal amplification, wherein the input matching circuit includes a first transmission line, a first capacitor, A first series circuit in which a second transmission line and a second capacitor are connected in series, and a second series circuit in which a first short stub, a first switch, and a third transmission line are connected in series And a third series circuit in which a second short stub, a second switch, and a fourth transmission line are connected in series, and the first series circuit is connected between the semiconductor element and the input terminal. In the second series circuit, one end of a third transmission line corresponding to one end of the series circuit is connected in parallel between the first capacitor and the second transmission line, and the third series circuit is connected in series. One end of the fourth transmission line corresponding to one end of the circuit is connected to the second capacitor and the input terminal. Those having a structure that is connected in parallel between.

  According to the present invention, a plurality of circuits configured by connecting transmission lines, switches, and short stubs in series are provided, and a matching circuit for a plurality of frequencies is configured according to a combination of on / off states of the switches. In addition, it is possible to obtain a variable frequency amplifier having a wide band of matched frequencies.

  Hereinafter, preferred embodiments of a variable frequency amplifier according to the present invention will be described with reference to the drawings.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of a variable frequency amplifier according to Embodiment 1 of the present invention. The variable frequency amplifier according to the first embodiment includes an input terminal 1, a semiconductor element 2, a first series circuit 10, a second series circuit 20, and a third series circuit 30. Here, a circuit constituted by the first series circuit 10, the second series circuit 20, and the third series circuit 30 between the input terminal 1 and the semiconductor element 2 corresponds to an input matching circuit.

  The first series circuit 10 includes a first transmission line 11, a first capacitor 12, a second transmission line 13, and a second capacitor 14 connected in series. The second series circuit 20 is configured by connecting a third transmission line 21, a first switch 22, and a first short stub 23 in series. The third series circuit 30 is configured by connecting a fourth transmission line 31, a second switch 32, and a second short stub 33 in series.

  A first series circuit 10 is connected between the input terminal 1 and the semiconductor element 2. Further, the second series circuit 20 is connected in parallel by connecting one end of the third transmission line 21, which is one end thereof, between the first capacitor 12 and the second transmission line 13. Similarly, the third series circuit 30 is connected in parallel by connecting one end of the fourth transmission line 31, which is one end thereof, between the second capacitor 14 and the input terminal 1. Here, a circuit for applying a bias to the semiconductor element 2 and an output matching circuit are omitted.

  Next, the operation will be described. A signal input from the input terminal 1 is input to the semiconductor element 2 through an input matching circuit that transforms the impedance of the input terminal 1 into the input impedance of the semiconductor element 2, and is amplified.

  At this time, the second series circuit 20 and the third series circuit 30 configured by the transmission line, the switch, and the short stub are each configured by the transmission line, the switch, and the short stub when the switch is turned on. When the switch is turned off, it functions as an open stub consisting only of transmission lines. Therefore, the combination of the short stub and the open stub can be switched by the combination of the on / off states of the switches, and the degree of freedom in design is improved.

  Use of such an input matching circuit results in the use of two elements, a short stub or an open stub, for the frequency to be matched, and the band can be widened. Furthermore, the conventional frequency variable amplifier uses two parallel elements for only one matching frequency. On the other hand, the variable frequency amplifier according to the first embodiment can be applied to four matching frequencies by combining the on / off states of the switches, and has an advantage that the frequency to be matched can be increased.

  As described above, according to the first embodiment, there are a plurality of circuits configured by connecting transmission lines, switches, and short stubs in series, and a matching circuit for a plurality of frequencies according to combinations of on / off states of the switches. Thus, it is possible to obtain a frequency variable amplifier that is small and has a wide band of matched frequencies.

Embodiment 2. FIG.
FIG. 2 is a configuration diagram of the variable frequency amplifier according to the second embodiment of the present invention. The configuration in FIG. 2 is the same as that in FIG. 1 in the first embodiment, but the capacitance value and inductance component of each element are defined by symbols. Specifically, the inductance component of the first transmission line 11 is L1, the capacitance value of the first capacitor 12 is C1, the inductance component of the second transmission line 13 is L2, and the capacitance value of the second capacitor 14 is C2. It is said.

And in this Embodiment 2, the relationship of each element value C1, C2, L1, L2 is selected as follows.
1 / (ω _l C1)> ω _l L1, ₁ / (ω _l C2)> ω _l L2 at low angular frequency ω _l (1)
1 / (ω _h C1) <ω _h L1, 1 / (ω _h C2) <ω _h L2 (2) at the high angular frequency ω _h

  Further, the two frequency bands are switched when the first switch 22 is turned on and the second switch 32 is turned on, and when the first switch 22 is turned off and the second switch 32 is turned off. The frequency characteristic of the input impedance of the semiconductor element 2 is made to intersect the real axis by a circuit to which a bias is applied, and in the following description, the frequency band in the inductive region is set using the frequency intersecting the real axis as a guide. The frequency band in the high frequency and capacitive range is low frequency.

  Next, the operation will be described. When a low-frequency signal is input to the circuit of FIG. 2, the matching circuit is more capacitive by the first capacitor 12 than by the first transmission line 11 due to the relationship of the above equation (1). And the capacitance due to the second capacitor 14 is larger than the inductivity due to the second transmission line 13.

  Further, since the first switch 22 is turned on and the second switch 32 is turned on, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. Both 30 function as short stubs. FIG. 3 is a pseudo equivalent circuit when the first switch 22 is turned on and the second switch 32 is turned on in the variable frequency amplifier according to the second embodiment of the present invention shown in FIG. Thus, at the low frequency, the circuit configuration of FIG. 2 is equivalent to the circuit configuration of FIG. 3 in a pseudo manner.

  On the other hand, when a high-frequency signal is input to the circuit of FIG. 2, the inductivity due to the first transmission line 11 is the capacitance due to the first capacitor 12 due to the relationship of the above equation (2). The inductivity due to the second transmission line 13 is greater than the capacitance due to the second capacitor 14.

  Further, since the first switch 22 is turned off and the second switch 32 is turned off, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. Both 30 function as open stubs. FIG. 4 is a pseudo equivalent circuit when the first switch 22 is turned off and the second switch 32 is turned off in the variable frequency amplifier according to the second embodiment of the present invention shown in FIG. Thus, at a high frequency, the circuit configuration of FIG. 2 is equivalent to the circuit configuration of FIG. 4 in a pseudo manner.

  As shown in FIG. 3, at a low frequency, a two-stage high-pass filter including two parallel short stubs and two series capacitors is configured. Further, as shown in FIG. 4, at a high frequency, a two-stage low-pass filter including two open stubs and two serial transmission lines is formed.

  FIG. 5 is a schematic diagram for transforming the input impedance of the semiconductor element 2 into the impedance of the input terminal 1 at each of the high frequency and low frequency in the second embodiment of the present invention. FIG. 6 is a diagram schematically showing frequency bands of frequencies matched in the variable frequency amplifier according to the second embodiment of the present invention. As shown in the equivalent circuits of FIGS. 3 and 4 above, the frequency variable amplifier according to the second embodiment uses a two-stage filter for matching, so that each frequency band can be widened.

  As described above, according to the second embodiment, there are a plurality of circuits configured by connecting transmission lines, switches, and short stubs in series, and a two-stage high-pass filter according to the combination of on / off states of the switches. A two-stage low-pass filter can be switched and used for matching, and a small frequency variable amplifier having a wide frequency band to be matched can be obtained.

  Here, the two frequency bands are switched when the first switch 22 is turned on and the second switch 32 is turned on, and when the first switch 22 is turned off and the second switch 32 is turned off. Explained the case. However, the first switch 22 may be turned on, the second switch 32 may be turned off, or the first switch 22 may be turned off and the second switch 32 may be turned on. In that case, the matching frequency and matching impedance change.

Embodiment 3 FIG.
In the third embodiment, a specific configuration of an input matching circuit different from that of the second embodiment will be described. The configuration of the variable frequency amplifier in the third embodiment is the same as the configuration in FIG. 2 in the second embodiment.

In the circuit configuration of FIG. 2, in the third embodiment, the relationship between the element values C1, C2, L1, and L2 is selected as follows.
1 / (ω _l C1)> ω _l L1, ₁ / (ω _l C2)> ω _l L2 (3) at low frequency ω _l
1 / (ω _h C1) <ω _h L1, 1 / (ω _h C2)> ω _h L2 (4) at an angular frequency ω _h in the high band

  Furthermore, the two frequency bands are switched when the first switch 22 is turned on and the second switch 32 is turned off, and when the first switch 22 is turned off and the second switch 32 is turned on.

  Next, the operation will be described. When a low-frequency signal is input to the circuit of FIG. 2, the matching circuit is more capacitive due to the first capacitor 12 than inductivity due to the first transmission line 11 due to the relationship of the above equation (3). And the capacitance due to the second capacitor 14 is larger than the inductivity due to the second transmission line 13.

  Further, since the first switch 22 is turned on and the second switch 32 is turned off, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. 30 functions as a short stub and an open stub, respectively. FIG. 7 shows a pseudo equivalent circuit when the first switch 22 is turned on and the second switch 32 is turned off in the variable frequency amplifier according to the third embodiment of the present invention. Thus, at the low frequency, the circuit configuration of FIG. 2 is equivalent to the circuit configuration of FIG. 7 in a pseudo manner.

  On the other hand, when a high frequency signal is input to the circuit of FIG. 2, the inductivity of the first transmission line 11 is the capacitance of the first capacitor 12 due to the relationship of the above equation (4). The capacitance due to the second capacitor 14 is greater than the inductivity due to the second transmission line 13.

  In addition, since the first switch 22 is turned off and the second switch 32 is turned on, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. 30 functions as an open stub and a short stub, respectively. FIG. 8 is a pseudo equivalent circuit when the first switch 22 is turned off and the second switch 32 is turned on in the variable frequency amplifier according to the third embodiment of the present invention. As described above, at a high frequency, the circuit configuration of FIG. 2 is equivalent to the circuit configuration of FIG. 8 in a pseudo manner.

  As shown in FIG. 7, at a low frequency, a one-stage high-pass filter composed of one parallel short stub and a series capacitor is formed. Further, as shown in FIG. 8, at a high frequency, a two-stage band-pass filter including a serial transmission line and an open stub, and a serial capacitor and a short stub is formed.

  FIG. 9 is a schematic diagram for transforming the input impedance of the semiconductor element 2 to the impedance of the input terminal 1 at each of the high frequency and low frequency in the third embodiment of the present invention. FIG. 10 is a diagram schematically showing frequency bands of matched frequencies in the variable frequency amplifier according to the third embodiment of the present invention. As shown in FIG. 8, since a two-stage filter is used for matching for a high frequency, the frequency band can be widened.

  In addition, at a high frequency, a gain other than the necessary band can be reduced as compared with the case where a low-pass filter is configured.

  As described above, according to the third embodiment, there are a plurality of circuits configured by connecting transmission lines, switches, and short stubs in series, and one-stage high-pass filter according to the combination of on / off states of the switches. A two-stage band-pass filter can be switched and used for matching, and a small frequency variable frequency amplifier having a wide frequency band to be matched can be obtained. Furthermore, a band-pass filter can be used at a high frequency, and a variable frequency amplifier capable of reducing the gain other than the necessary band can be obtained.

  Here, the two frequency bands are switched when the first switch 22 is turned on and the second switch 32 is turned off, and when the first switch 22 is turned off and the second switch 32 is turned on. Explained the case. However, the first switch 22 may be turned on, the second switch 32 may be turned on, or the first switch 22 may be turned off and the second switch 32 may be turned off. In that case, the matching frequency and matching impedance change.

Embodiment 4 FIG.
FIG. 11 is a configuration diagram of the variable frequency amplifier according to the fourth embodiment of the present invention. The configuration of FIG. 11 is different from the configuration of FIG. 2 in the previous second and third embodiments in that the input matching circuit further includes a fifth transmission line 41. The fifth transmission line 41 is provided between the first transmission line 11 and the semiconductor element 2.

And in this Embodiment 4, the relationship of each element value C1, C2, L1, L2 is selected as follows.
1 / (ω ₁ C1) <ω ₁ L1, ₁ / (ω ₁ C2)> ω ₁ L2 at the angular frequency ω ₁ in the low band (5)
1 / (ω _h C1) <ω _h L1, 1 / (ω _h C2) <ω _h L2 at the high frequency ω _h (6)

  Further, the two frequency bands are switched when the first switch 22 is turned off and the second switch 32 is turned on, and when the first switch 22 is turned on and the second switch 32 is turned off. Further, in the fourth embodiment, by providing the fifth transmission line 41, the frequency characteristic of the input impedance of the semiconductor element 2 including the bias circuit is inverted, and the capacitive characteristics at the high frequency and the low frequency are obtained. To make it inductive.

  Next, the operation will be described. When a low-frequency signal is input to the circuit of FIG. 11, the matching circuit is more inductive by the first transmission line 11 than capacitive by the first capacitor 12 due to the relationship of the above equation (5). And the capacitance due to the second capacitor 14 is greater than the inductivity due to the second transmission line 13.

  In addition, since the first switch 22 is turned off and the second switch 32 is turned on, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. 30 functions as an open stub and a short stub, respectively. FIG. 12 is a pseudo equivalent circuit when the first switch 22 is turned off and the second switch 32 is turned on in the variable frequency amplifier according to the fourth embodiment of the present invention shown in FIG. As described above, at the low frequency, the circuit configuration of FIG. 11 is substantially equivalent to the circuit configuration of FIG.

  On the other hand, when a high-frequency signal is input to the circuit of FIG. 11, the inductivity due to the first transmission line 11 is the capacitance due to the first capacitor 12 due to the relationship of the above equation (6). The inductivity due to the second transmission line 13 is greater than the capacitance due to the second capacitor 14.

  Further, since the first switch 22 is turned on and the second switch 32 is turned off, the second series circuit 20 and the third series circuit connected in parallel between the input terminal 1 and the semiconductor element 2. 30 functions as a short stub and an open stub, respectively. FIG. 13 is a pseudo equivalent circuit when the first switch 22 is turned on and the second switch 32 is turned off in the variable frequency amplifier according to the fourth embodiment of the present invention shown in FIG. Thus, at a high frequency, the circuit configuration of FIG. 11 is equivalent to the circuit configuration of FIG. 13 in a pseudo manner.

  As shown in FIG. 12, at a low frequency, a two-stage band-pass filter including a serial transmission line and an open stub, and a series capacitor and a short stub is formed. Further, as shown in FIG. 13, at a high frequency, a one-stage low-pass filter including a serial transmission line and an open stub is formed.

  FIG. 14 is a schematic diagram for transforming the input impedance of the semiconductor element 2 into the impedance of the input terminal 1 at each of the high frequency and low frequency in the fourth embodiment of the present invention. FIG. 15 is a diagram schematically showing frequency bands of matched frequencies in the variable frequency amplifier according to the fourth embodiment of the present invention. As shown in FIG. 12, the variable frequency amplifier according to the fourth embodiment uses a two-stage filter for matching with respect to the low frequency range, so that the frequency band can be widened.

  In addition, a gain other than a necessary band can be reduced at a low frequency compared to the case where a high-pass filter is configured.

  As described above, according to the fourth embodiment, the transmission line, the switch, and the plurality of circuits configured by connecting the short stubs in series are provided, and further, the transmission line is further provided in the previous stage of the semiconductor element. A two-stage band-pass filter and a one-stage low-pass filter can be used for matching by switching according to the combination of the on / off states of the switch, and a small-sized frequency variable amplifier having a wide frequency band to be matched is obtained. be able to. Furthermore, a band-pass filter can be used at a low frequency, and a variable frequency amplifier capable of reducing the gain outside the necessary band can be obtained.

  In the first to fourth embodiments described above, the case where two circuits configured by connecting transmission lines, switches, and short stubs in series are specifically described. However, the present invention is not limited to this configuration. It is also possible to use a combination of on and off states of three or more switches using three or more circuits. Further, a capacitor for cutting the direct current of the bias of the switch and the bias of the semiconductor element 2 may be provided separately.

  Furthermore, the input matching circuit described in the first to fourth embodiments may be applied to the output matching circuit. When applied to an input matching circuit, it is more effective for low noise amplifiers such as switching of noise characteristics. Further, when applied to an output matching circuit, it is more effective for realizing a high output amplifier such as switching of output characteristics. Further, the switch may be composed of MEMS, which is more effective for miniaturization and low loss.

It is a block diagram of the frequency variable amplifier in Embodiment 1 of this invention. It is a block diagram of the frequency variable amplifier in Embodiment 2 of this invention. In the variable frequency amplifier according to the second embodiment of the present invention shown in FIG. 2, a pseudo equivalent circuit when the first switch is turned on and the second switch is turned on. 2 is a pseudo equivalent circuit when the first switch is turned off and the second switch is turned off in the variable frequency amplifier according to the second embodiment of the present invention shown in FIG. It is a schematic diagram which transform | transforms the input impedance of the semiconductor element in each frequency of the high region and low region in Embodiment 2 of this invention into the impedance of an input terminal. It is the figure which showed typically the frequency band of the frequency matched in the frequency variable amplifier of Embodiment 2 of this invention. In the variable frequency amplifier according to the third embodiment of the present invention, this is a pseudo equivalent circuit when the first switch is turned on and the second switch is turned off. In the variable frequency amplifier of Embodiment 3 of this invention, it is a pseudo | simulation equivalent circuit when a 1st switch is turned off and a 2nd switch is turned on. It is a schematic diagram which transform | transforms the input impedance of the semiconductor element in each frequency of the high region and low region in Embodiment 3 of this invention into the impedance of an input terminal. It is the figure which showed typically the frequency band of the frequency matched in the frequency variable amplifier of Embodiment 3 of this invention. It is a block diagram of the frequency variable amplifier in Embodiment 4 of this invention. 11 is a pseudo equivalent circuit when the first switch is turned off and the second switch is turned on in the variable frequency amplifier according to the fourth embodiment of the present invention shown in FIG. FIG. 11 is a pseudo equivalent circuit when the first switch is turned on and the second switch is turned off in the variable frequency amplifier according to the fourth embodiment of the present invention shown in FIG. It is a schematic diagram which transform | transforms the input impedance of the semiconductor element in each frequency of the high region and low region in Embodiment 4 of this invention into the impedance of an input terminal. It is the figure which showed typically the frequency band of the frequency matched in the frequency variable amplifier of Embodiment 4 of this invention. It is the figure which showed the structure of the conventional frequency variable amplifier. FIG. 17 is a pseudo equivalent circuit when the second switch is turned on and the first switch is turned off in the conventional variable frequency amplifier shown in FIG. 16. FIG. 17 is a pseudo equivalent circuit when the second switch is turned off and the first switch is turned on in the conventional frequency variable amplifier shown in FIG. 16. It is a schematic diagram which transforms the input impedance of the semiconductor element at a certain high frequency and the input impedance of the semiconductor element at a certain low frequency into the impedance of the input terminal. It is the figure which showed typically the frequency band of the frequency matched in the conventional frequency variable amplifier.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Input terminal, 2 Semiconductor element, 11 1st transmission line, 12 1st capacity | capacitance, 13 2nd transmission line, 14 2nd capacity | capacitance, 21 3rd transmission line, 22 1st switch, 23 1st switch Short stub, 31 fourth transmission line, 32 second switch, 33 second short stub, 41 fifth transmission line.

Claims (5)

In a variable frequency amplifier having an input matching circuit between a signal input terminal and a semiconductor element for signal amplification,
The input matching circuit is
A first series circuit in which a first transmission line, a first capacitor, a second transmission line, and a second capacitor are connected in series;
A second series circuit in which a first short stub, a first switch, and a third transmission line are connected in series;
A third series circuit in which a second short stub, a second switch, and a fourth transmission line are connected in series;
The first series circuit is connected between the semiconductor element and the input terminal,
In the second series circuit, one end of the third transmission line corresponding to one end of the series circuit is connected in parallel between the first capacitor and the second transmission line,
The third series circuit includes a configuration in which one end of the fourth transmission line corresponding to one end of the series circuit is connected in parallel between the second capacitor and the input terminal. Variable amplifier. The frequency variable amplifier according to claim 1,
The input matching circuit has a higher capacitance due to the first capacitance than an inductivity due to the first transmission line at a low frequency, and the second matching than the inductivity due to the second transmission line. Capacitance due to capacitance is large, and at high frequencies, inductivity due to the first transmission line is greater than capacitance due to the first capacitance, and inductivity due to the second transmission line is greater than the second An inductance component of the first transmission line in the first series circuit, an inductance component of the second transmission line, a capacitance value of the first capacitor, and Each of the capacitance values of the two capacitors is selected, and the on / off states of the first switch in the second series circuit and the second switch in the third series circuit are combined. More, the frequency variable amplifier, characterized in that switching the frequency of the high range and low range for matching. The frequency variable amplifier according to claim 1,
The input matching circuit has a higher capacitance due to the first capacitance than an inductivity due to the first transmission line at a low frequency, and the second matching than the inductivity due to the second transmission line. Capacitance due to capacitance is large, and at high frequencies, the inductivity due to the first transmission line is larger than the capacitance due to the first capacitance, and the second inductivity is greater than the inductivity due to the second transmission line. The first transmission line inductance component, the second transmission line inductance component in the first series circuit, the capacitance value of the first capacitance, and the first capacitance Each of the capacitance values of the two capacitors is selected, and the on / off states of the first switch in the second series circuit and the second switch in the third series circuit are combined. More, the frequency variable amplifier, characterized in that switching the frequency of the high range and low range for matching. The frequency variable amplifier according to claim 1,
The input matching circuit further includes a fifth transmission line inserted in series between the semiconductor element and the first series circuit. The variable frequency amplifier according to claim 4, wherein
In the input matching circuit, the inductivity due to the first transmission line is larger than the capacitance due to the first capacitor at a low frequency, and the inductivity due to the second transmission line is higher than the inductivity due to the second transmission line. Capacitance due to capacitance is large, and at high frequencies, inductivity due to the first transmission line is greater than capacitance due to the first capacitance, and inductivity due to the second transmission line is greater than the second An inductance component of the first transmission line in the first series circuit, an inductance component of the second transmission line, a capacitance value of the first capacitor, and Each of the capacitance values of the two capacitors is selected, and the on / off states of the first switch in the second series circuit and the second switch in the third series circuit are combined. More, the frequency variable amplifier, characterized in that switching the frequency of the high range and low range for matching.

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