JP2008263227A5 - - Google Patents

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JP2008263227A5
JP2008263227A5 JP2008177064A JP2008177064A JP2008263227A5 JP 2008263227 A5 JP2008263227 A5 JP 2008263227A5 JP 2008177064 A JP2008177064 A JP 2008177064A JP 2008177064 A JP2008177064 A JP 2008177064A JP 2008263227 A5 JP2008263227 A5 JP 2008263227A5
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impurity
photoelectric conversion
region
concentration
conversion device
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JP2008177064A
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JP4587187B2 (en
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第一導電型の電荷蓄積領域と複数の第二導電型の不純物領域とを含んで構成される光電変換素子と、前記光電変換素子にて生じた電荷を転送する転送MOSトランジスタと、前記転送MOSトランジスタによって電荷が転送される第一導電型の不純物領域と、が第一導電型の半導体基板に配されたCMOS型光電変換装置であって、
前記複数の第二導電型の不純物領域は、前記電荷蓄積領域の下部から前記転送MOSトランジスタのゲート電極の下部まで連続して配され、且つ、少なくとも第1の不純物領域と、該第1の不純物領域と前記電荷蓄積領域との間に配された第2の不純物領域と、該第2の不純物領域と前記電荷蓄積領域との間に配された第3の不純物領域と、を含み、
前記第1の不純物領域の不純物濃度ピークの濃度C1と、前記第2の不純物領域の不純物濃度ピークの濃度C2と、前記第3の不純物領域の不純物濃度ピークの濃度C3とが、C2<C3<C1
の関係を満たし、
前記CMOS型光電変換装置は、前記第3の不純物領域の上部かつ前記転送MOSトランジスタのゲート電極の下部に配された第二導電型のチャネルドープ領域を有していることを特徴とするCMOS型光電変換装置。
A photoelectric conversion element including a charge accumulation region of a first conductivity type and a plurality of impurity regions of a second conductivity type; a transfer MOS transistor for transferring charges generated in the photoelectric conversion element; and the transfer MOS A first-conductivity-type impurity region to which charge is transferred by a transistor, and a CMOS-type photoelectric conversion device disposed on a first-conductivity-type semiconductor substrate,
The plurality of second conductivity type impurity regions are continuously arranged from a lower part of the charge storage region to a lower part of the gate electrode of the transfer MOS transistor, and at least the first impurity region and the first impurity A second impurity region disposed between the region and the charge storage region, and a third impurity region disposed between the second impurity region and the charge storage region,
The concentration C1 of the impurity concentration peak of the first impurity region, the concentration C2 of the impurity concentration peak of the second impurity region, and the concentration C3 of the impurity concentration peak of the third impurity region are C2 <C3 < C1
Satisfy the relationship
The CMOS photoelectric conversion device has a second conductivity type channel dope region disposed above the third impurity region and below the gate electrode of the transfer MOS transistor. Photoelectric conversion device.
前記第3の不純物領域の不純物濃度ピークは、前記第3の不純物領域の前記電荷蓄積領域側に配されていることを特徴とする請求項1に記載のCMOS型光電変換装置。   2. The CMOS photoelectric conversion device according to claim 1, wherein an impurity concentration peak of the third impurity region is arranged on the charge storage region side of the third impurity region. 前記第1の不純物領域の不純物濃度ピークの濃度C1と前記第2の不純物領域の不純物濃度ピークの濃度C2との関係が、3×C2≦C1であることを特徴とする請求項1あるいは2に記載のCMOS型光電変換装置。   3. The relationship between the concentration C1 of the impurity concentration peak of the first impurity region and the concentration C2 of the impurity concentration peak of the second impurity region is 3 × C2 ≦ C1. The described CMOS photoelectric conversion device. 前記第1の不純物領域の不純物濃度ピークの濃度C1と前記第2の不純物領域の不純物濃度ピークの濃度C2との関係が、5×C2≦C1であることを特徴とする請求項3に記載のCMOS型光電変換装置。   The relationship between the concentration C1 of the impurity concentration peak of the first impurity region and the concentration C2 of the impurity concentration peak of the second impurity region is 5 × C2 ≦ C1. CMOS photoelectric conversion device. 前記第1の不純物領域の不純物濃度ピークの濃度C1が1×1016cm−3<C1<1×1018cm−3であり、
前記第2の不純物領域の不純物濃度ピークの濃度C2が1×1015cm−3<C2<5×1016cm−3であり、
前記第3の不純物領域の不純物濃度ピークの濃度C3が2×1015cm−3<C3<2×1017cm−3であることを特徴とする請求項1乃至4のいずれか1項に記載のCMOS型光電変換装置。
The concentration C1 of the impurity concentration peak of the first impurity region is 1 × 10 16 cm −3 <C1 <1 × 10 18 cm −3 ,
The concentration C2 of the impurity concentration peak in the second impurity region is 1 × 10 15 cm −3 <C2 <5 × 10 16 cm −3 ,
The impurity concentration peak concentration C3 of the third impurity region is 2 × 10 15 cm −3 <C3 <2 × 10 17 cm −3. 5. CMOS type photoelectric conversion device.
前記複数の第二導電型の不純物領域のそれぞれは、前記電荷蓄積領域の下部から前記光電変換素子に隣接した素子分離部の下部まで連続して配されていることを特徴とする請求項1乃至5のいずれか1項に記載のCMOS型光電変換装置。   The plurality of impurity regions of the second conductivity type are continuously arranged from a lower part of the charge storage region to a lower part of an element isolation part adjacent to the photoelectric conversion element. 6. The CMOS photoelectric conversion device according to any one of 5 above. 第一導電型の電荷蓄積領域と第二導電型の不純物領域とを含んで構成される光電変換素子と、前記光電変換素子にて生じた電荷を転送する転送MOSトランジスタと、前記転送MOSトランジスタによって電荷が転送される第一導電型の不純物領域と、が第一導電型の半導体基板に配されたCMOS型光電変換装置であって、
前記第二導電型の不純物領域は、前記電荷蓄積領域の下部から前記転送MOSトランジスタのゲート電極の下部まで連続して配され、且つ、前記半導体基板の深部から前記電荷蓄積部に向かって順に位置する第1の不純物濃度ピークと、第2の不純物濃度ピークと、第3の不純物濃度ピークとを少なくとも有し、
前記第1の不純物濃度ピークの濃度C1と、前記第2の不純物濃度ピークの濃度C2と、前記第3の不純物濃度ピークの濃度C3とが、
C2<C3<C1
の関係を満たし、
前記CMOS型光電変換装置は、前記第二導電型の不純物領域の上部かつ前記転送MOSトランジスタのゲート電極の下部に配された第二導電型の不純物領域を有していることを特徴とするCMOS型光電変換装置。
A photoelectric conversion element including a charge accumulation region of a first conductivity type and an impurity region of a second conductivity type, a transfer MOS transistor for transferring charges generated in the photoelectric conversion element, and the transfer MOS transistor A first-conductivity-type impurity region to which charges are transferred, and a CMOS-type photoelectric conversion device arranged on a first-conductivity-type semiconductor substrate,
The impurity region of the second conductivity type is continuously arranged from the lower part of the charge storage region to the lower part of the gate electrode of the transfer MOS transistor, and is positioned in order from the deep part of the semiconductor substrate toward the charge storage part. Having at least a first impurity concentration peak, a second impurity concentration peak, and a third impurity concentration peak,
The concentration C1 of the first impurity concentration peak, the concentration C2 of the second impurity concentration peak, and the concentration C3 of the third impurity concentration peak are:
C2 <C3 <C1
Satisfy the relationship
The CMOS photoelectric conversion device has a second conductivity type impurity region disposed above the second conductivity type impurity region and below the gate electrode of the transfer MOS transistor. Type photoelectric conversion device.
前記光電変換素子は、前記電荷蓄積領域の表面側に接して形成された第二導電型の表面不純物領域を有する請求項1乃至7のいずれか1項に記載のCMOS光電変換装置。   8. The CMOS photoelectric conversion device according to claim 1, wherein the photoelectric conversion element has a second conductivity type surface impurity region formed in contact with a surface side of the charge storage region. 9. 請求項1乃至8のいずれか1項に記載のCMOS型光電変換装置と、
該CMOS型光電変換装置へ光を結像する光学系と、
該CMOS型光電変換装置からの信号を処理する信号処理回路とを有することを特徴とする撮像システム。
A CMOS photoelectric conversion device according to any one of claims 1 to 8,
An optical system for imaging light onto the CMOS photoelectric conversion device;
An image pickup system comprising: a signal processing circuit that processes a signal from the CMOS photoelectric conversion device.
JP2008177064A 2003-12-12 2008-07-07 CMOS photoelectric conversion device and imaging system Expired - Fee Related JP4587187B2 (en)

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JP5959877B2 (en) * 2012-02-17 2016-08-02 キヤノン株式会社 Imaging device
JP6355311B2 (en) 2013-10-07 2018-07-11 キヤノン株式会社 Solid-state imaging device, manufacturing method thereof, and imaging system
JP6541361B2 (en) 2015-02-05 2019-07-10 キヤノン株式会社 Solid-state imaging device
JP2018107358A (en) * 2016-12-27 2018-07-05 キヤノン株式会社 Manufacturing method of imaging apparatus and imaging system
JP7406887B2 (en) 2019-08-07 2023-12-28 キヤノン株式会社 Photoelectric conversion device, radiation imaging system, photoelectric conversion system, mobile object

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US6504194B1 (en) * 1999-12-01 2003-01-07 Innotech Corporation Solid state imaging device, method of manufacturing the same, and solid state imaging system
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JP3688980B2 (en) * 2000-06-28 2005-08-31 株式会社東芝 MOS type solid-state imaging device and manufacturing method thereof
JP2002043557A (en) * 2000-07-21 2002-02-08 Mitsubishi Electric Corp Semiconductor device comprising solid-state imaging element and manufacturing method thereof
JP4270742B2 (en) * 2000-11-30 2009-06-03 Necエレクトロニクス株式会社 Solid-state imaging device
US7324148B2 (en) * 2002-04-26 2008-01-29 Olympus Optical Co., Ltd. Camera and image pickup device unit used therefor having a sealing structure between a dust proofing member and an image pick up device
JP4174468B2 (en) * 2003-12-12 2008-10-29 キヤノン株式会社 Photoelectric conversion device and imaging system

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