JP2008258276A - Method of manufacturing semiconductor device, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device including a plurality of semiconductor elements of different characteristics on a substrate with higher controllability and reduced cost. <P>SOLUTION: The method of manufacturing a semiconductor device including the plurality of semiconductor elements on the substrate including a heating and controlling layer forming step to form, on the substrate, a heating and controlling layer having a plurality of regions with different amounts of heat radiation and heat conductivity and a heating step to heat the substrate forming the heating and controlling layer. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device having a plurality of semiconductor elements on a substrate and the semiconductor device.

  In order to reduce the size and increase the functionality of a semiconductor device, it is required to integrate and form a plurality of semiconductor elements having different characteristics on one substrate. For example, as an optical semiconductor device used for wavelength division multiplexing (WDM) optical communication, a multiwavelength laser array element is disclosed in which semiconductor laser elements having different oscillation wavelengths are formed in an array on a single substrate (non-patent document). Reference 1-5).

  For example, as a multi-wavelength laser array element using a vertical cavity surface emitting laser (VCSEL) element, in Non-Patent Document 1, a cavity is formed on the back surface of a substrate by etching, and a molecular beam growth method (MBE). A technique is disclosed in which a semiconductor layer constituting an optical resonator is epitaxially grown on a substrate by the method, and then the semiconductor layer is thermally etched. According to this technique, a temperature difference can be generated in the substrate between the cavity forming portion and the non-forming portion, so that the etching rates of thermal etching are different from each other. As a result, since optical resonators having different resonator lengths can be formed on one substrate, a multi-wavelength laser array element can be realized.

  Further, in Non-Patent Document 2, when a semiconductor layer is epitaxially grown on a substrate by MOCVD, a mask having openings having different diameters is provided, and different thicknesses are obtained by differentiating the growth rate of the semiconductor layer. The semiconductor layer is formed. In Non-Patent Document 3, a step is provided on the substrate, and semiconductor layers having different thicknesses are formed.

W. Yuen et al., "Multiple-Wavelength Vertical-Cavity Surface-Emitting Laser Arrays", IEEE Journal of Selected Topics in Quantum Electron., Vol.3, No.2, pp.422-428 (1997) F. Koyama et al., "Wavelength Control of Vertical Cavity Surface-Emitting Laser by Using Nonpolar MOCVD", IEEE Photon. Technol. Lett., Vol.7 No.1, pp.10-12 (1995) M. Arai et al., "Growth of Highly Strained GaInAs-GaAs Quantum Wells on Patterned Substrate and Its Application for Multiple-Wavelength Vertical-Cavity Surface Emitting Laser Array", IEEE Journal of Selected Topics in Quantum Electron., Vol.8, No.4, pp.811-815 (2002) H. Saito et al., "Uniform CW operation of Multiple-Wavelength Vertical-Cavity Surface-Emitting Lasers Fabricated by Mask Molecular Beam Epitaxy", IEEE Photon. Technol. Lett., Vol.8 No.9, pp.1118-1120 (1996) Connie J. Chang-Hasnain, "Tunable VCSEL", IEEE Journal of Selected Topics in Quantum Electron., Vol.6, No.6, pp.978-987 (2000)

  By the way, in order to realize a multi-wavelength laser array element, in order to increase the degree of integration, for example, it is necessary to change the oscillation wavelength characteristic in a very small region whose one side is within 1 mm, the thickness of the semiconductor layer, etc. It is required that the control accuracy of the characteristics of the above is high. Moreover, since it is required in large quantities, it is also required that the manufacturing cost is low. However, the conventional methods disclosed in Non-Patent Documents 1 to 5 do not satisfy the controllability of characteristics and the manufacturing cost at the same time.

  The present invention has been made in view of the above, and a semiconductor device manufacturing method capable of manufacturing a semiconductor device having a plurality of semiconductor elements having different characteristics on a substrate with high controllability and low cost, and An object is to provide a semiconductor device.

  In order to solve the above-described problems and achieve the object, a method for manufacturing a semiconductor device according to the present invention is a method for manufacturing a semiconductor device having a plurality of semiconductor elements on a substrate. The method includes a heating control layer forming step of forming a heating control layer having a plurality of regions having different heat conduction amounts, and a heating step of heating the substrate on which the heating control layer is formed.

  In the semiconductor device manufacturing method according to the present invention, in the above invention, the heating step includes a stacking step of stacking a semiconductor layer on the substrate while heating the substrate on which the heating control layer is formed. And

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the method includes a stacking step of stacking a semiconductor layer on the substrate, and the heating step thermally etches the stacked semiconductor layer. .

  The method of manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the method includes a stacking step of stacking a semiconductor layer on the substrate, and the heating step anneals the stacked semiconductor layer.

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the heating control layer forming step forms the heating control layer on at least one of a surface and an inside of the substrate.

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the heating control layer forming step forms the heating control layer so as to have different patterns in each region.

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the heating control layer forming step forms the heating control layer so that reflection amounts of radiant heat are different from each other in each region. .

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, the heating control layer forming step forms the heating control layer so that the radiant heat absorption amount is different in each region. .

  The method for manufacturing a semiconductor device according to the present invention is characterized in that, in the above invention, a heating control layer removing step of removing the formed heating control layer from the substrate is provided.

  A semiconductor device according to the present invention is a semiconductor device manufactured by the method according to the above invention, and includes a plurality of semiconductor elements having semiconductor layers having different thicknesses.

  A semiconductor device according to the present invention is a semiconductor device manufactured by the method according to the above invention, and includes a plurality of semiconductor elements having semiconductor layers having different light absorption peak wavelengths.

  The semiconductor device according to the present invention is a semiconductor device manufactured by the method according to the present invention, and includes a plurality of semiconductor elements having semiconductor active layers having different gain peak wavelengths.

  According to the present invention, a heating control layer forming step of forming a heating control layer having a plurality of regions having different amounts of heat radiation or heat conduction on the substrate, and a heating step of heating the substrate on which the heating control layer is formed, Since each region can be heated under different temperature conditions, a semiconductor device having a plurality of semiconductor elements having different characteristics on a substrate can be manufactured with high controllability and low cost. There is an effect.

  Embodiments of a semiconductor device manufacturing method and a semiconductor device according to the present invention will be described below in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

(Embodiment 1)
First, the semiconductor device according to the first embodiment of the present invention will be described. The semiconductor device according to the first embodiment is a multi-wavelength laser element using a surface emitting laser element.

  FIG. 1 is a schematic cross-sectional view schematically showing the multi-wavelength laser element according to the first embodiment. As shown in FIG. 1, the multiwavelength laser element 100 according to the first embodiment includes surface emitting laser elements VCSELa and VCSELb. This will be specifically described below.

  In the multi-wavelength laser element 100, a heating control layer 2 is formed on the lower surface of an n-GaAs substrate 1 which is a semiconductor substrate. The heating control layer 2 includes portions 2a and 2b having different heat radiation amounts due to different reflection amounts of radiation heat in the rectangular regions Aa and Ab. An n-DBR (Distributed Bragg Reflector) mirror 3 that is a multilayer film reflecting mirror is formed on the upper surface of the n-GaAs substrate 1 over the regions Aa and Ab.

  In the region Aa, an n-GaAs cladding layer 4a, an active layer 5a having a multiple quantum well structure, a p-GaAs cladding layer 6a, a current confinement layer 7a, and a p-DBR mirror 8a are formed on the n-DBR mirror 3. The n-DBR mirror 3 and the p-DBR mirror 8a are sequentially stacked to constitute an optical resonator. Similarly, in the region Ab, on the n-DBR mirror 3, an n-GaAs cladding layer 4b, an active layer 5b having a multiple quantum well structure, a p-GaAs cladding layer 6b, a current confinement layer 7b, and a p-DBR mirror 8b. Are sequentially stacked, and the n-DBR mirror 3 and the p-DBR mirror 8b constitute an optical resonator. The n-GaAs cladding layer 4a to the p-DBR mirror 8a and the n-GaAs cladding layer 4b to the p-DBR mirror 8b each have a mesa post structure, and an insulating film 9 made of SiN is formed around each mesa post structure. Is formed. Further, p-side electrodes 10a and 10b having openings are formed on the upper surfaces of the p-DBR mirrors 8a and 8b, respectively, and an n-side electrode 11 is formed on the lower surface of the heating control layer 2 over the regions Aa and Ab. .

  Here, as shown in FIG. 1, since the n-GaAs cladding layer 4a and the n-GaAs cladding layer 4b have different thicknesses, the surface emitting laser elements VCSELa and VCSELb have different resonator lengths. As a result, the surface emitting laser elements VCSELa and VCSELb respectively output laser beams La and Lb having different oscillation wavelengths. Since the oscillation wavelength is the same as the resonator length of each optical resonator, the layer thickness of each semiconductor layer is adjusted so as to realize a desired oscillation wavelength. The wavelengths of La and Lb are, for example, 1280 nm and 1300 nm, respectively.

FIG. 2 is a schematic plan view schematically showing the heating control layer 2. As shown in FIG. 2, the portions 2 a and 2 b of the heating control layer 2 have a rectangular pattern including a filling portion F and a blank portion B on which a metal film such as Cr or Ti is formed. The portions 2a and 2b have patterns formed so that the area ratios of the filling portion F and the blank portion B are different from each other, and the amounts of reflection of radiant heat are different from each other. With such an equally divided rectangular pattern, the area ratio between the filling portion F and the blank portion B can be easily set to a desired value, and the amount of reflected radiant heat can be easily controlled. The filling portion F may be a dielectric film or a dielectric multilayer film made of SiO ₂ , TiO ₂ , SiN, MgF, Al ₂ O ₃ , TiN, AlNSiO ₂ or the like instead of the metal film.

Hereinafter, the configuration of the multi-wavelength laser element 100 will be described more specifically. On the surface of the n-GaAs substrate 1, an n-GaAs buffer layer having a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ is laminated with a thickness of 0.1 μm for smoothing the surface. Further, when the oscillation wavelength of the multi-wavelength laser element 100 is 1300 nm and the refractive index of each constituent material is n, the n-DBR mirror 3 has an n-type Al _0.9 Ga _0.1 As layer and an n-type layer each having a layer thickness of λ / 4n. A multilayer film having a pair of a type GaAs layer and 35.5 pairs is laminated. The p-DBR mirrors 8a and 8b are formed by stacking 23 pairs of multilayer films each having a pair of a p-type Al _0.9 Ga _0.1 As layer and a p-type GaAs layer having a layer thickness of λ / 4n. .

On the other hand, each of the active layers 5a and 5b is configured by alternately stacking quantum well layers made of GaIn _0.37 N _0.01 As and barrier layers made of GaAs. The current confinement layers 7a and 7b have a layer thickness of 15 nm and are located at the center of the selective oxidation portions 7ab and 7bb made of aluminum oxide formed by selective oxidation and the selective oxidation portions 7ab or 7bb, and p-Al _{It has} disk-shaped current confinement portions 7aa and 7ba made of _0.98 GaAs. The current confinement layers 7a and 7b limit the path of current supplied by applying a voltage to the p-side electrodes 10a and 10b and the n-side electrode 11, and increase the current density.

  Next, a method for manufacturing the multi-wavelength laser element 100 according to the first embodiment will be described with reference to FIGS. First, as shown in FIG. 3, the heating control layer 2 having the above-described pattern is formed on the lower surface of the n-GaAs substrate 1. Next, any one of the molecular beam epitaxy (MBE) method, the gas source MBE method, the chemical molecular beam epitaxy (CBE) method, for example, while the n-GaAs substrate 1 is radiantly heated by the radiant heat of infrared rays generated by the heater H. Thus, the n-DBR mirror 3 and the n-GaAs cladding layer 4 are sequentially epitaxially grown. Here, since the heating control layer 2 has the above-described pattern, the n-GaAs substrate 1 is heated to different temperatures according to the amount of reflection in the regions Aa and Ab by thermal radiation. In this epitaxial growth, the n-GaAs substrate 1 is heated so that the temperature is about 550 to 700 ° C. Within this temperature range, even if there is a temperature difference between the regions Aa and Ab, the growth rates of the n-DBR mirror 3 and the n-GaAs cladding layer 4 are substantially the same and are formed to have a uniform thickness.

  Next, as shown in FIG. 4, under the As beam irradiation, the n-GaAs substrate 1 is heated to a temperature of about 700 to 800 ° C., and the n-GaAs cladding layer 4 is thermally etched from the surface. At this time, since the heating control layer 2 has the above-described pattern, the portion 1a corresponding to the region Aa of the n-GaAs substrate 1 has a higher temperature than the portion 1b corresponding to the region Ab. As a result, the n-GaAs cladding layer 4 has a higher etching rate in the region Aa than in the region Ab, so that the etching amount is increased, and n-GaAs cladding layers 4a and 4b having different thicknesses are formed. That is, by appropriately designing the pattern of the heating control layer 2, the temperature of the portions 1a and 1b of the n-GaAs substrate 1 can be controlled to achieve an optimum etching rate, so that the areas of the regions Aa and Ab are small, Even if the degree of integration is high, the thicknesses of the n-GaAs cladding layers 4a and 4b can be accurately controlled. As a result, the oscillation wavelengths of the surface emitting laser elements VCSELa and VCSELb can be accurately controlled.

Thereafter, as shown in FIG. 5, the n-GaAs substrate 1 is heated again so as to have a temperature of about 550 to 700 ° C., and is composed of the active layer 5, the p-GaAs cladding layer 6, and p-Al _0.98 GaAs. The current confinement layer 7 and the p-DBR mirror 8 are sequentially epitaxially grown with a uniform thickness.

Thereafter, a SiN film is formed on the growth surface of the p-DBR mirror 8 by plasma CVD, and a circular pattern having a diameter of about 30 μm is transferred using a photolithographic technique using a photoresist. Using this transferred circular resist mask, the SiN film is etched by reactive ion etching (RIE) using CF ₄ gas. Further, etching is performed by a reactive ion beam etching (RIBE) method using chlorine gas until the n-DBR mirror 3 is reached, and columnar structure mesa posts having a diameter of about 30 μm are formed in the regions Aa and Ab, respectively. Note that the etching depth by the RIBE method is stopped in the n-DBR mirror 3.

  Next, in this state, it is heated to 400 ° C. in a water vapor atmosphere and left to stand for selective oxidation to form selective oxidation portions 7ab and 7bb and current confinement portions 7aa and 7ba in the current confinement layers 7a and 7b. The current confinement portions 7aa and 7ba have a diameter of 3 to 10 μm, for example, 6 μm. Thereafter, the SiN film is completely removed by the RIE method, and then the SiN film is laminated again, and the insulating film 9 is formed by removing the SiN film in the region corresponding to the p-side electrodes 10a and 10b, and then Ti / Pt Ring-shaped p-side electrodes 10a and 10b made of / Au are formed. Then, an n-side electrode 11 made of AuGeNi / Au is formed on the lower surface of the n-GaAs substrate 1 and separated for each element, whereby the multi-wavelength laser element 100 is completed.

  In addition, according to said manufacturing method, since the n-GaAs board | substrate 1 can be enlarged easily, the manufacturing cost of the multiwavelength laser element 100 can be reduced easily.

  As described above, according to the first embodiment, a multi-wavelength laser element using a surface emitting laser element having a well-controlled oscillation wavelength can be manufactured with high integration and low cost.

  In the first embodiment, the p-GaAs cladding layer 6 is also subjected to thermal etching to adjust its thickness, and in the surface emitting laser elements VCSELa and VCSELb, the active layers 5a and 5b are located at the center positions of the optical resonators. As a result, the optical confinement factor in the active layers 5a and 5b can be increased, and the threshold currents of the surface emitting laser elements VCSELa and VCSELb can be reduced.

  Further, when performing selective oxidation, if the processing temperature is adjusted to change the oxidation rate of the current confinement layers 7a and 7b for each mesa, surface emitting lasers having different diameters of the current confinement portions 7aa and 7ba, that is, different aperture diameters. Elements can be manufactured on the same substrate.

  Further, the heating control layer 2 has the portions 2a and 2b having different radiant heat reflection amounts. However, for example, as shown in FIG. 6, other rectangular portions 2c and 2d having mutually different radiant heat reflection amounts. 2e, 2f. The portions 2c to 2f are formed with patterns so that the area ratios of the filling portion F and the blank portion B are different from each other. As described above, in the thermal etching, the corresponding regions Ac to Af Since n-GaAs cladding layers having different thicknesses can be formed, optical resonators having different resonator lengths can be formed. As a result, surface emitting laser elements having different oscillation wavelengths can be formed in the regions Ac to Af.

(Embodiment 2)
Next, a semiconductor device according to the second embodiment of the present invention will be described. The semiconductor device according to the second embodiment is a multi-wavelength laser element using a Fabry-Perot laser element.

  FIG. 7 is a schematic perspective view schematically showing the multi-wavelength laser element according to the second embodiment. As shown in FIG. 7, the multiwavelength laser element 200 according to the second embodiment includes Fabry-Perot laser elements FPLg, FPLh, and FPLi. This will be specifically described below.

  In the multi-wavelength laser element 200, a heating control layer 13 is formed on the lower surface of an n-GaAs substrate 12 that is a semiconductor substrate. As in the first embodiment, the heating control layer 2 has one of the patterns shown in FIGS. 2 and 6 in the rectangular regions Ag, Ah, and Ai, and the heat radiation is different due to the difference in the amount of reflected radiant heat. It includes portions 13g, 13h, and 13i having different amounts. An n-AlGaAs cladding layer 14 that also serves as a lower cladding is formed on the upper surface of the n-GaAs substrate 12 over the regions Ag to Ai.

  In the region Ag, the lower GaAs-SCH (Separate Confinement Heterostructure) layer 15 g, the GaInNAs (Sb) active layer 16 g, and the upper GaAs-SCH layer 17 g whose composition is continuously changed are formed on the n-AlGaAs cladding layer 14. The p-AlGaAs cladding layer 18g is sequentially laminated. A p-AlGaAs cladding layer 19g is formed on the upper surface of the p-AlGaAs cladding layer 18g, and a current blocking layer 20g in which an n-AlGaAs layer is stacked on the n-GaAs layer is formed. Further, a p-AlGaAs cladding layer 21g and a p-GaAs contact layer 22g are laminated on the upper surfaces of the p-AlGaAs cladding layer 19g and the current blocking layer 20g, and have a mesa stripe structure as a whole.

  Similarly, in the region Ah, on the n-AlGaAs cladding layer 14, a lower GaAs-SCH layer 15h, a GaInNAs (Sb) active layer 16h, an upper GaAs-SCH layer 17h, a p-AlGaAs cladding layer 18h, a p-AlGaAs cladding. A layer 19h, a current blocking layer 20h, a p-AlGaAs cladding layer 21h, and a p-GaAs contact layer 22h are laminated. Similarly, in the region Ai, the lower GaAs-SCH layer 15i, the GaInNAs (Sb) active layer 16i, the upper GaAs-SCH layer 17i, the p-AlGaAs cladding layer 18i, p- An AlGaAs cladding layer 19i, a current blocking layer 20i, a p-AlGaAs cladding layer 21i, and a p-GaAs contact layer 22i are laminated.

  In addition, each mesa stripe structure is formed with an insulating film 23 made of SiN around it and separated by a trench groove T. The insulating film 23 has openings on the p-GaAs contact layers 22g to 22i, and p-side electrodes 24g, 24h, and 24i are formed in these openings, respectively. An n-side electrode 25 is formed on the lower surface of the heating control layer 13 over the regions Ag to Ai. Further, a reflective film HR having a reflectance of 99% is formed on the rear end surface BS of each mesa stripe structure, and an antireflection film (not shown) is formed on the front end surface FS. That is, Fabry-Perot laser elements FPLg, FPLh, and FPLi are formed in the regions Ag to Ai, respectively.

  In the Fabry-Perot laser elements FPLg to FPLi, the GaInNAs (Sb) active layers 16g to 16i have gain spectra having different peak wavelengths, and output laser beams having different wavelengths from the front end face FS. The wavelengths of these laser beams are, for example, 1280 nm, 1300 nm, and 1320 nm, respectively. Hereinafter, the manufacturing method of the multi-wavelength laser element 200 will be specifically described with reference to FIGS. In the following, for convenience of explanation, for example, each layer before the lower GaAs-SCH layers 15g to 15i are separated by the trench groove T will be referred to as a lower GaAs-SCH layer 15 or the like.

  First, as in the first embodiment, an MBE method or the like is used to form an n-AlGaAs cladding layer 14, a lower GaAs-SCH layer 15, a GaInNAs (Sb) active layer 16, an upper GaAs-SCH layer on an n-GaAs substrate 12. 17, The p-AlGaAs cladding layer 18 is epitaxially grown sequentially, and then the heating control layer 13 is formed. In this epitaxial growth, as in the first embodiment, the n-GaAs substrate 12 is heated to a temperature of about 550 to 700 ° C., and the n-AlGaAs cladding layer is formed in each region Ag to Ai. 14 to the p-AlGaAs cladding layer 18 are formed to have a uniform thickness.

FIG. 9 is a diagram showing the well-type potential of the GaInNAs (Sb) active layer 16 after the epitaxial growth described above. The vertical axis represents the energy hν, the symbols Wg, Wh, and Wi represent the well-type potential of the GaInNAs (Sb) active layer 16 in the regions Ag, Ah, and Ai, respectively, and the symbols Ug, Uh, and Ui represent the well-type potential of the conduction band. , Lg, Lh, and Li indicate a well-type potential in the valence band. At this time, the band gap energy of the GaInNAs (Sb) active layer 16 is hν ₀ in any of the regions Ag to Ai. Here, h is a Planck constant, ν, and ν ₀ frequency.

Here, the GaInNAs (Sb) active layer 16 is annealed by heating so that the temperature of the n-GaAs substrate 12 becomes about 600 to 900 ° C., and Ga and In are diffused between the well layer and the barrier layer. . At this time, since the heating control layer 13 has the above pattern, the temperature of the n-GaAs substrate 12 is highest in the region Ag and lowest in the region Ai. As a result, different extents of mutual diffusion occur in the GaInNAs (Sb) active layer 16 in the regions Ag, Ah, and Ai, and GaInNAs (Sb) having different well-type potentials Wg to Wi as shown in FIG. The active layers 16g, 16h, and 16i are formed. Therefore, the band gap energies in the well-type potentials Wg to Wi are also different from each other, hν _g , hν _h , and hν _i , and the GaInNAs (Sb) active layers 16g, 16h, and 16i have gain spectra having different peak wavelengths. It becomes. In other words, by appropriately designing the pattern of the heating control layer 13, even if the area of each region Ag to Ai of the n-GaAs substrate 12 is small and the degree of integration of the elements is high, the temperature is controlled to achieve an optimum degree of mutual interaction. Since diffusion can occur, the peak wavelength of the gain of the GaInNAs (Sb) active layers 16g to 16i can be accurately controlled.

  Thereafter, an n-GaAs layer and an n-AlGaAs layer are epitaxially grown on the p-AlGaAs cladding layer 18, and the portions other than the p-AlGaAs cladding layers 19g to 19i are covered with a photoresist, and the photoresist is used as a mask. The n-AlGaAs layer and the n-GaAs layer are selectively etched. At this time, an n-GaAs layer forming a part of the current blocking layer 20 is left slightly on the p-AlGaAs cladding layer 18.

  Subsequently, the photoresist is removed and heated to 650-800 ° C. while irradiating As molecular beam in the MBE apparatus. The remaining n-GaAs layer is evaporated by this treatment, and the p-AlGaAs cladding layer 18 is exposed. In this process, the GaAs layer selectively evaporates and the AlGaAs layer does not evaporate. Therefore, in the current blocking layer 20, the n-AlGaAs layer on the surface prevents evaporation, and the p-AlGaAs cladding layer 18 does not evaporate. The heat treatment for removing the n-GaAs layer and the heat treatment for annealing the active layer for interdiffusing Ga and In between the well layer and the barrier layer may be performed simultaneously.

  Next, the p-AlGaAs cladding layers 19g to 19i are epitaxially grown, and the p-AlGaAs cladding layer 21 and the p-GaAs contact layer 22 are sequentially epitaxially grown.

  Next, a pattern corresponding to the trench groove T is formed, and etching is performed to a depth reaching a part of the n-AlGaAs cladding layer 14 using the SiN film as a mask to form the trench groove T. Thus, Fabry-Perot laser elements FPLg to FPLi are electrically separated.

  Next, after removing the mask of the SiN film, an SiN film is deposited again on the entire surface, and openings for the Fabry-Perot laser elements FPLg to FPLi are formed to form the insulating film 23, and each opening is made of pnZn made of AuZn / Au. Side electrodes 24g to 24i are formed. On the other hand, an n-side electrode 25 made of AuGeNi / Au is formed on the lower surface of the n-GaAs substrate 12.

  Finally, after forming a reflection film HR on the rear end face BS of the Fabry-Perot laser elements FPLg to FPLi and forming an antireflection film (not shown) on the front end face FS, the multi-wavelength laser element 200 is separated for each element. Complete. Similar to the first embodiment, according to the above manufacturing method, the substrate can be easily enlarged, and thus the manufacturing cost of the multi-wavelength laser element 100 can be easily reduced.

  As described above, according to the second embodiment, a multi-wavelength laser element using a Fabry-Perot laser element having a well-controlled oscillation wavelength can be manufactured with high integration and low cost.

  In the first embodiment, similarly to the second embodiment, the active layers 5a and 5b may be annealed to have different gain spectra.

  In the first and second embodiments, the heat control layers 2 and 13 may be removed by polishing the lower surfaces of the n-GaAs substrates 1 and 12 before forming the n-side electrodes 11 and 25, for example. Good.

  In the first and second embodiments, the semiconductor layer is grown using the MBE method or the like, but a metal organic chemical vapor deposition (MOCVD) method can also be used. In this case, the heater is disposed in close contact with the lower surface of the n-GaAs substrates 1 and 12 on which the heating control layers 2 and 13 are formed, and heats the n-GaAs substrates 1 and 12 by heat conduction. 2 and 13 have different patterns formed in the respective portions 2a and 2b or the respective portions 13g to 13i, and have different heat conduction amounts, so that the respective regions Aa and Ab or the respective regions Ag to Ai are different from each other. It becomes temperature.

  Further, the pattern of the heating control layer is not limited to a rectangle as in the first and second embodiments. FIG. 11 is a schematic plan view showing another example of the heating control layer. As shown in FIG. 11, the portions 26j and 26k of the heating control layer 26 are obtained by forming a wavy line pattern L made of metal. If the area ratio between the line pattern L and the blank portion is changed by increasing or decreasing the number of line patterns L to be formed, the amount of heat radiation of the portions 26j and 26k of the heating control layer 26 can be easily changed, and the portions 26j and 26k. It is easy to make the distribution of the amount of heat radiation in the surface uniform.

  Further, the heating control layer is not limited to the one in which a pattern of metal or the like is formed to make a difference in the amount of heat radiation, and a film made of a material having a different heat radiation rate may be uniformly formed in each region. The difference in the amount of heat radiation in each region may be realized by making a difference in the amount of absorbed radiant heat. FIG. 12 is a schematic cross-sectional view showing another example of the heating control layer. As shown in FIG. 12, the heating control layer 27 is formed on the upper surface of the n-GaAs substrate 1, and portions 27l and 27m of the heating control layer 27 are n-GaAs doped with different kinds of dopants. It consists of

  FIG. 13 is a diagram showing a transmission spectrum of the portions 27 l and 27 m of the heating control layer 27. As shown in FIG. 13, the portion 27l has a transmission spectrum indicated by a line S1 with the wavelength of the absorption edge being λ1. On the other hand, the portion 27m has a transmission spectrum indicated by a line Sm with the wavelength of the absorption edge being λm. As a result, the portion 27l and the portion 27m have different absorption amounts of infrared radiant heat from the heater, so that the temperatures when heated are also different from each other, and heating at different temperatures is performed in the corresponding regions Al and Am. It can be carried out. For example, when the heater temperature is 600 ° C., the radiated infrared rays have a wavelength of about 1.0 to 100 μm centered on 3.3 μm, but 1% nitrogen N is added to the portion 27l, and the portion 27m If nothing is added, the wavelength of the absorption edge is 1155 nm for λ1 and 1390 nm for λm, and the absorption amount of radiant heat is different from each other in the above-described infrared band, and the amount of thermal radiation is also different.

  Note that In, Sb, P, Zn, C, Mg, Si, S, Se, or the like can be used as the dopant to be added. Further, the same kind of dopant may be added in different amounts without using different kinds of dopants.

  The heating control layer may be formed on the upper surface, the lower surface, or both surfaces of the substrate, or may be formed inside the substrate. FIG. 14 is a schematic cross-sectional view showing an example in which a heat control layer is formed inside a semiconductor substrate. As shown in FIG. 14, the heating control layer 32 is made of n-GaAs to which the same kind of dopant as described above is added, and is formed inside the n-GaAs substrate 31. Since the portions 32n and 32o of the heating control layer 32 have different layer thicknesses and differ in the amount of infrared radiation heat absorbed from the heater, the temperature when heated also includes the portions 31n and 31o of the n-GaAs substrate 31. It becomes different from each other, and the corresponding regions An and Ao can be heated at different temperatures. Such a heat control layer 32 can be formed by implanting dopant ions to be added into the n-GaAs substrate 31 by using an ion implantation method.

  In addition, various optical semiconductor devices can be manufactured by applying the present invention. For example, by utilizing the substrate temperature difference between the regions, the semiconductor layers are epitaxially grown at different growth rates in the respective regions, thereby having semiconductor optical waveguides having different thicknesses in the respective regions. It is possible to manufacture optical waveguide arrays having different values. Also, a distributed feedback (DFB) laser element can be manufactured as the laser element. In this case, the gain peak wavelengths may be different from each other, and the characteristics of the grating in each region may be different from each other correspondingly. It is also possible to form an EA-DFB laser element by forming an EA modulation element in a certain region and forming a DFB laser element in a region adjacent thereto. It is also possible to manufacture an array of light emitting diodes (LEDs) having different emission wavelengths and semiconductor optical amplifier (SOA) elements having different gain characteristics.

  In addition, a semiconductor layer having a different dopant concentration in each region can be formed by using a process in which the amount of dopant added varies depending on the substrate temperature. This also makes it possible to manufacture a multi-wavelength laser element. Further, a multi-wavelength light receiving element (PD) array can be manufactured by forming semiconductor layers having different light absorption coefficients in each region. Also, resonator type PD arrays having different resonator lengths can be manufactured. It is also possible to manufacture spot size converter arrays having different spot sizes in each region. Also, an optical integrated device in which each of the above devices and an optical combiner such as an MMI coupler are monolithically integrated on the same substrate can be manufactured.

  Moreover, although the case where an optical semiconductor device was mainly manufactured was demonstrated above, this invention is not limited to this, It can apply also to the semiconductor device for electronic devices.

It is sectional drawing which represented typically the multiwavelength laser element which concerns on Embodiment 1 of this invention. It is the plane schematic which represented typically the part from which the reflection amount of the radiant heat of a heating control layer mutually differs. It is a figure explaining the manufacturing method of the multiwavelength laser element which concerns on Embodiment 1 of this invention. It is a figure explaining the manufacturing method of the multiwavelength laser element which concerns on Embodiment 1 of this invention. It is a figure explaining the manufacturing method of the multiwavelength laser element which concerns on Embodiment 1 of this invention. It is the plane schematic which represented typically an example of the other part from which the reflection amount of the radiant heat of a heating control layer differs mutually. It is the schematic perspective view which represented typically the multiwavelength laser element which concerns on Embodiment 2 of this invention. It is a figure explaining the manufacturing method of the multiwavelength laser element which concerns on Embodiment 2 of this invention. It is a figure which shows the well type potential of the active layer after making it epitaxially grow. It is a figure which shows the well-type potential of the active layer after annealing. It is a plane schematic diagram showing another example of a heating control layer. It is a cross-sectional schematic diagram which shows another example of a heating control layer. It is a figure which shows the transmission spectrum of each part of the heating control layer shown in FIG. It is the cross-sectional schematic which shows the example which formed the heating control layer in the inside of a semiconductor substrate.

Explanation of symbols

1, 12, 31 n-GaAs substrate 1a, 1b, 2a to 2f, 13g to 13i, 26j, 26k, 27l, 27m, 31n, 31o part 2, 13, 26, 32 Heating control layer 3 n-DBR mirror 4, 4a, 4b n-GaAs cladding layer 5, 5a, 5b active layer 6, 6a, 6b p-GaAs cladding layer 7, 7a, 7b current confinement layer 7aa, 7ba current confinement portion 7ab, 7bb selective oxidation portion 8, 8a, 8b p-DBR mirror 9, 23 Insulating film 10a, 10b, 24g-24i p-side electrode 11, 25 n-side electrode 14 n-AlGaAs cladding layer 15, 15g-15i Lower GaAs-SCH layer 16, 16g-16i GaInNAs (Sb) Active layer 17, 17g-17i Upper GaAs-SCH layer 18, 19, 21, 18g-18i, 19g-19i 21g to 21i p-AlGaAs cladding layer 20, 20g to 20i Current blocking layer 22, 22g to 22i p-GaAs contact layer 100, 200 Multiwavelength laser element Aa to Ao region B Blank portion BS Rear end face F Filling portion FPLg to FPLi Fabry Perot laser element FS Front end face H Heater HR Reflective film L Line pattern La, Lb Laser light Lg-Li, Ug-UiWg-Wi Well-type potential S1, Sm line T Trench groove VCSELa, VCSELb Surface emitting laser element

Claims (12)

A method of manufacturing a semiconductor device having a plurality of semiconductor elements on a substrate,
A heating control layer forming step of forming a heating control layer having a plurality of regions having different amounts of heat radiation or heat conduction on the substrate; and
A heating step of heating the substrate on which the heating control layer is formed;
A method for manufacturing a semiconductor device, comprising:   The method of manufacturing a semiconductor device according to claim 1, wherein the heating step includes a stacking step of stacking a semiconductor layer on the substrate while heating the substrate on which the heating control layer is formed. Including a laminating step of laminating a semiconductor layer on the substrate;
The method of manufacturing a semiconductor device according to claim 1, wherein the heating step includes thermally etching the stacked semiconductor layers. Including a laminating step of laminating a semiconductor layer on the substrate;
The method of manufacturing a semiconductor device according to claim 1, wherein the heating step anneals the stacked semiconductor layers.   5. The method of manufacturing a semiconductor device according to claim 1, wherein the heating control layer forming step forms the heating control layer on at least one of a surface and an inside of the substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the heating control layer forming step forms the heating control layer so as to have different patterns in each region.   The manufacturing method of a semiconductor device according to claim 1, wherein in the heating control layer forming step, the heating control layer is formed so that a reflection amount of radiant heat is different from each other in each region. Method.   The manufacturing method of a semiconductor device according to claim 1, wherein in the heating control layer forming step, the heating control layer is formed so that a radiant heat absorption amount is different in each region. Method.   The method for manufacturing a semiconductor device according to claim 1, further comprising a heating control layer removing step of removing the formed heating control layer from the substrate. A semiconductor device manufactured by the method according to claim 1,
A semiconductor device comprising a plurality of semiconductor elements having semiconductor layers having different thicknesses. A semiconductor device manufactured by the method according to claim 1,
A semiconductor device comprising a plurality of semiconductor elements having semiconductor layers having different light absorption peak wavelengths. A semiconductor device manufactured by the method according to claim 1,
A semiconductor device comprising a plurality of semiconductor elements having semiconductor active layers having different gain peak wavelengths.

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