JP2008251948A - Method of manufacturing circuit component - Google Patents

Method of manufacturing circuit component Download PDF

Info

Publication number
JP2008251948A
JP2008251948A JP2007093139A JP2007093139A JP2008251948A JP 2008251948 A JP2008251948 A JP 2008251948A JP 2007093139 A JP2007093139 A JP 2007093139A JP 2007093139 A JP2007093139 A JP 2007093139A JP 2008251948 A JP2008251948 A JP 2008251948A
Authority
JP
Japan
Prior art keywords
resin molded
molded body
circuit component
wiring pattern
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007093139A
Other languages
Japanese (ja)
Inventor
Toshinobu Kanai
敏信 金井
Toshiro Abe
俊郎 安部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Meiko Co Ltd
Original Assignee
Victor Company of Japan Ltd
Meiko Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Meiko Co Ltd filed Critical Victor Company of Japan Ltd
Priority to JP2007093139A priority Critical patent/JP2008251948A/en
Publication of JP2008251948A publication Critical patent/JP2008251948A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a circuit component which improves productivity and enables down-spacing within an electronic device. <P>SOLUTION: Regarding a method of manufacturing a circuit component for manufacturing the circuit component comprising a wiring pattern on a surface of a resin mold, while abutting a member 21 to a resin mold 1 including a plated area to which a plating catalyst is applied, the member 21 covering the plated area while remaining a void 34 and comprising two openings 33a and 33b respectively linking the void and the outside, a plating liquid 22 is supplied from one opening 33a through the void to the other opening 33b, thereby forming a wiring pattern 3 constituted of a plating film in the plated area. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

本発明は、回路部品の製造方法に係り、特に、樹脂成形体の表面に沿って配線パターンを3次元に形成した回路部品であるMIDの製造方法に関する。   The present invention relates to a method of manufacturing a circuit component, and more particularly to a method of manufacturing an MID that is a circuit component in which a wiring pattern is three-dimensionally formed along the surface of a resin molded body.

電子機器の小型化,軽量化,高性能化に伴って、プリント配線板のファインパータン化及び多層化が求められていると共に、電子機器内部の空きスペースを有効に活用する検討が積極的に行われている。
電子機器内部の空きスペースを活用する手段の1つにMID(Molded Interconnect device)がある。
MIDは、所定の立体形状に射出成形された樹脂成形体の表面に沿って配線パターンを3次元に形成した回路部品であり、その外形形状を電子機器内部の空きスペースに応じた形状とすることによりこのMIDを上記空きスペースに配置することができるので、電子機器内部の省スペース化が図れ、電子機器の小型化が可能になる。
As electronic devices become smaller, lighter, and have higher performance, printed circuit boards are required to have fine patterns and multilayers, and studies are being actively conducted to make effective use of free space inside electronic devices. It has been broken.
One of means for utilizing an empty space inside an electronic device is a MID (Molded Interconnect device).
The MID is a circuit component in which a wiring pattern is three-dimensionally formed along the surface of a resin molded body that is injection-molded into a predetermined three-dimensional shape, and its outer shape is a shape corresponding to an empty space inside the electronic device. Thus, the MID can be arranged in the empty space, so that the space inside the electronic device can be saved and the electronic device can be downsized.

MIDの製造方法として、一般的に、特許文献1に記載されているような“一回成形法”と、特許文献2に記載されているような“二回成形法”と、がある。   As a method for producing MID, there are generally a “single molding method” as described in Patent Document 1 and a “double molding method” as described in Patent Document 2.

“一回成形法”は、樹脂成形体の表面全体を粗面化した後、粗面化された表面にめっき触媒を付与しさらに無電解銅めっきを行うことによって樹脂成形体の表面全体に導電膜を形成し、この導電膜をフォトリソグラフィ法を用いて加工することによって樹脂成形体に配線パターンを3次元に形成する方法である。
配線パターン形成方法としては、上記導電膜をパターン化されたエッチングレジストを用いてエッチングするサブトラクティブ法や、上記導電膜をめっき導通膜としてパターン化されためっきレジストを用いて電気銅めっきを行うセミアディティブ法がある。
The “one-time molding method” is a method in which the entire surface of the resin molded body is made conductive by roughening the entire surface of the resin molded body, then applying a plating catalyst to the roughened surface and performing electroless copper plating. In this method, a wiring pattern is three-dimensionally formed on a resin molded body by forming a film and processing the conductive film using a photolithography method.
As a wiring pattern forming method, a subtractive method in which the conductive film is etched using a patterned etching resist, or a semiconducting method in which electrolytic copper plating is performed using a plating resist patterned using the conductive film as a plating conductive film. There is an additive method.

しかしながら、“一回成形法”は、上記エッチングレジストやめっきレジストをフォトリソグラフィ法を用いてパターン化する際に、詳しくは上記エッチングレジストやめっきレジストを部分的に露光する際に、平行光である露光光と直交する面でのパターン化は比較的容易であるが、露光光に対して平行な面においては露光精度が悪化すると共に露光量の管理が難しいため、この面でのパターン化は難しいのが実状である。   However, the “single molding method” is parallel light when the etching resist or plating resist is patterned using a photolithography method, and more specifically, when the etching resist or plating resist is partially exposed. Patterning on the surface orthogonal to the exposure light is relatively easy, but on the surface parallel to the exposure light, the exposure accuracy deteriorates and it is difficult to manage the exposure amount, so patterning on this surface is difficult. This is the actual situation.

一方、“二回成形法”は、めっき触媒が付与されて無電解めっき膜が形成可能な第1の樹脂成形体と、めっき触媒が付与されていない即ち無電解めっき膜が形成されない第2の樹脂成形体とが一体化した状態で、フルアディティブ法による無電解銅めっきを施すことにより、第1の樹脂成形体が露出した部分に配線パターンを形成する方法である。
即ち、“二回成形法”は、“一回成形法”のような露光工程を行うことなく配線パターンを形成できるため、上述した“一回成形法”の課題を解決することができる。
On the other hand, the “double molding method” includes a first resin molded body that can be provided with a plating catalyst and can form an electroless plating film, and a second resin that is not provided with a plating catalyst, that is, an electroless plating film is not formed. This is a method of forming a wiring pattern in a portion where the first resin molded body is exposed by performing electroless copper plating by a full additive method in a state where the resin molded body is integrated.
In other words, the “two-time molding method” can form the wiring pattern without performing the exposure process like the “one-time molding method”, and thus can solve the above-mentioned problem of the “one-time molding method”.

しかしながら、“二回成形法”は、“一回成形法”に比べて、少なくとも2回の成形工程が必要であるため生産性が劣り、また、少なくとも2つの樹脂成形体を有するので製造されたMIDの外形サイズが大きくなるため、電子機器内部の省スペース化に対して不利である。
また、配線パターン形成後に第2の樹脂成形体を除去することも考えられるが、この場合は第2の樹脂成形体の除去工程がさらに必要になるため、生産性をより悪化させる要因となる。
However, the “double molding method” is inferior in productivity because it requires at least two molding steps as compared with the “single molding method”, and is manufactured because it has at least two resin molded bodies. Since the outer size of the MID becomes large, it is disadvantageous for space saving inside the electronic device.
In addition, it is conceivable to remove the second resin molded body after the wiring pattern is formed. In this case, however, a process for removing the second resin molded body is further required, which causes the productivity to be further deteriorated.

そこで、露光工程を行うことなく、また、2つの樹脂成形体を必要とすることなく配線パターンを形成する手段が特許文献3に記載されている。
特許文献3に記載の回路部品の製造方法は、めっき触媒が付与された樹脂成形体の表面及びその近傍のめっき触媒を除去した後、この表面及びその近傍をレーザ光で部分的に除去して内部のめっき触媒付与部を露出させ、露出しためっき触媒付与部に無電解銅めっきを施すことによって、配線パターンを形成するものである。
特開昭61−43497号公報 特開平5−299815号公報 特開2007−48827号公報
Therefore, Patent Document 3 describes a means for forming a wiring pattern without performing an exposure process and without requiring two resin moldings.
In the method of manufacturing a circuit component described in Patent Document 3, the surface of the resin molded body to which the plating catalyst is applied and the plating catalyst in the vicinity thereof are removed, and then the surface and the vicinity thereof are partially removed with a laser beam. A wiring pattern is formed by exposing an internal plating catalyst application part and performing electroless copper plating on the exposed plating catalyst application part.
JP 61-43497 A JP-A-5-299815 JP 2007-48827 A

しかしながら、特許文献3に記載の回路部品の製造方法では、樹脂成形体が複雑な外形形状を有する場合、例えば穴部を有する場合、穴部内へのめっき触媒除去溶液の循環が他の部分に比べて悪いため、穴部の内面におけるめっき触媒を完全に除去できない虞がある。
めっき触媒が完全に除去されていないとこの部分に電解銅めっき膜が形成されるため、この電解銅めっき膜によって配線パターン同士が短絡する場合がある。
また、めっき触媒が除去されている領域における表面からの深さのばらつきが大きい場合、表層内部のめっき触媒付与部が完全に露出しない領域が生じる虞がある。
めっき触媒付与部が露出していない領域には電解銅めっき膜が形成されないため、断線不良となった配線パターンが形成される場合がある。
However, in the method of manufacturing a circuit component described in Patent Document 3, when the resin molded body has a complicated outer shape, for example, when it has a hole, the circulation of the plating catalyst removal solution into the hole is more difficult than other parts. Therefore, the plating catalyst on the inner surface of the hole may not be completely removed.
If the plating catalyst is not completely removed, an electrolytic copper plating film is formed in this portion, so that the wiring patterns may be short-circuited by this electrolytic copper plating film.
Moreover, when the variation in the depth from the surface in the region where the plating catalyst is removed is large, there is a possibility that a region where the plating catalyst applying portion inside the surface layer is not completely exposed may occur.
Since the electrolytic copper plating film is not formed in the region where the plating catalyst application portion is not exposed, a wiring pattern having a disconnection may be formed.

また、表層における配線パターンを形成する領域をレーザ加工により除去するので、膨大なレーザ加工時間を要するため、このレーザ加工工程が生産性を悪化させる要因となる。   In addition, since the region where the wiring pattern is formed on the surface layer is removed by laser processing, an enormous laser processing time is required, and this laser processing step becomes a factor that deteriorates productivity.

そこで、本発明が解決しようとする課題は、生産性を向上することができ、電子機器内部の省スペース化が可能な回路部品の製造方法を提供することにある。   Therefore, the problem to be solved by the present invention is to provide a circuit component manufacturing method that can improve productivity and can save space in an electronic device.

上記の課題を解決するために、本願各発明は次の手段を有する。
1)樹脂成形体の表面に配線パターンが設けられてなる回路部品を製造する回路部品の製造方法において、めっき触媒が付与された被めっき領域を有する樹脂成形体(1)に、前記被めっき領域を空隙(34)を有して覆うと共に該空隙と外部とをそれぞれ連結する2つの開口部(33a,33b)を備えた部材(21)を当接させた状態で、前記一方の開口部(33a)から前記空隙を通過して前記他方の開口部(33b)に向かってめっき液(22)を供給し、前記被めっき領域にめっき膜からなる配線パターン(3)を形成するようにしたことを特徴とする回路部品(10)の製造方法である。
2)前記樹脂成形体は凹み部(42)を有し、前記被めっき領域は前記凹み部に設けられてなることを特徴とする1)項記載の回路部品の製造方法。
In order to solve the above problems, each invention of the present application has the following means.
1) In a circuit component manufacturing method for manufacturing a circuit component in which a wiring pattern is provided on the surface of a resin molded body, the resin molded body (1) having a plated area to which a plating catalyst is applied is provided on the plated area. In the state in which the member (21) provided with two openings (33a, 33b) for connecting the gap and the outside is brought into contact with the one opening ( A plating solution (22) is supplied from 33a) through the gap to the other opening (33b) to form a wiring pattern (3) made of a plating film in the area to be plated. This is a method for manufacturing a circuit component (10).
2) The method of manufacturing a circuit component according to 1), wherein the resin molded body has a recess (42), and the plated region is provided in the recess.

本発明によれば、生産性を向上することができ、電子機器内部の省スペース化が可能になるという効果を奏する。   According to the present invention, it is possible to improve productivity and achieve an effect of saving space inside the electronic device.

本発明の実施の形態を、好ましい実施例により図1〜図4を用いて説明する。
図1〜図4は、本発明の回路部品の製造方法の実施例を説明するための図である。
実施例では、回路部品の一形態であるMID(Molded Interconnect device)の製造方法を例に挙げて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described with reference to FIGS.
1 to 4 are diagrams for explaining an embodiment of a circuit component manufacturing method according to the present invention.
In the embodiment, a manufacturing method of an MID (Molded Interconnect device) which is one form of a circuit component will be described as an example.

<実施例>
まず、図1に示すように、無電解めっき用の触媒であるパラジウム(Pd)が約0.1重量%混入された絶縁性樹脂を射出成形することによって、直方体状の樹脂成形体1を作製する。図1は、樹脂成形体1を示す斜視図である。
この樹脂成形体1は後述するMID10の基体となるものであり、その形状は第1実施例に限定されるものではなく、MID10が配置される電子機器の空間スペースに応じた形状とすることができる。
実施例では、樹脂成形体1の長さL1及び幅W1高さH1をそれぞれ2.4cm、高さH1を1cmとした。
<Example>
First, as shown in FIG. 1, a rectangular parallelepiped resin molded body 1 is produced by injection molding an insulating resin mixed with about 0.1% by weight of palladium (Pd), which is a catalyst for electroless plating. To do. FIG. 1 is a perspective view showing a resin molded body 1.
The resin molded body 1 serves as a base of the MID 10 described later, and the shape thereof is not limited to the first embodiment, but may be a shape corresponding to the space of the electronic device in which the MID 10 is disposed. it can.
In the example, the length L1 and the width W1 of the resin molded body 1 were 2.4 cm and the height H1 was 1 cm, respectively.

次に、無電解めっき装置20を用いて、樹脂成形体1に配線パターン3を形成する方法について説明する。   Next, a method for forming the wiring pattern 3 on the resin molded body 1 using the electroless plating apparatus 20 will be described.

まず、無電解めっき装置20について図2を用いて説明する。
図2は、無電解めっき装置20を説明するための模式図であり、図2中の(a)は無電解めっき装置20の概略構成図、(b)は(a)におけるABCD断面における断面図、(c)は(a)におけるEFGH断面における断面図である。
First, the electroless plating apparatus 20 will be described with reference to FIG.
FIG. 2 is a schematic diagram for explaining the electroless plating apparatus 20, where (a) in FIG. 2 is a schematic configuration diagram of the electroless plating apparatus 20, and (b) is a cross-sectional view in the ABCD section in (a). (C) is sectional drawing in the EFGH cross section in (a).

図2に示すように、無電解めっき装置20は、主として、本体部21と、無電解めっき液22を溜めておくタンク部23と、タンク部23から本体部21に無電解めっき液22を圧送する圧送手段24と、圧送手段24によって圧送された無電解めっき液22の流量を調整する流量調整手段25と、無電解めっき液22の分析及び管理を行う分析調整装置26と、本体部21,タンク部23,圧送手段24,流量調整手段25,及び分析調整装置26を接続する配管部29と、樹脂成形体1を本体部21に固定するための固定手段27と、により構成されている。   As shown in FIG. 2, the electroless plating apparatus 20 mainly includes a main body portion 21, a tank portion 23 that stores an electroless plating solution 22, and a pumping of the electroless plating solution 22 from the tank portion 23 to the main body portion 21. The pressure feeding means 24, the flow rate adjusting means 25 for adjusting the flow rate of the electroless plating solution 22 fed by the pressure feeding means 24, the analysis adjusting device 26 for analyzing and managing the electroless plating solution 22, the main body 21, The tank portion 23, the pressure feeding means 24, the flow rate adjusting means 25, and a piping portion 29 for connecting the analysis adjusting device 26, and a fixing means 27 for fixing the resin molded body 1 to the main body portion 21 are configured.

本体部21は、無電解めっき液22に対して耐食性を有する材料(例えばステンレス)からなり、主として、樹脂成形体1が収容される収容部31と、この収容部31の内面に形成されると共に無電解めっき液22の流路34となる凹み部32と、凹み部32を囲むように凹み部32の外周部に沿って設けられた弾性を有するシール部21bと、凹み部32と配管部29とを接続する空隙部33a,33bと、雌ねじ部21aと、により構成されている。   The main body 21 is made of a material (for example, stainless steel) having corrosion resistance with respect to the electroless plating solution 22, and is mainly formed on the housing 31 for housing the resin molded body 1 and the inner surface of the housing 31. A recess 32 serving as a flow path 34 for the electroless plating solution 22, an elastic seal portion 21 b provided along the outer periphery of the recess 32 so as to surround the recess 32, a recess 32, and a piping portion 29. Are formed by gaps 33a and 33b and female thread 21a.

タンク部23は、図示しない加熱制御手段を備え、この加熱制御手段で無電解めっき液22を所定温度に加熱して制御することができる。   The tank unit 23 includes heating control means (not shown), and the heating control means can control the electroless plating solution 22 by heating it to a predetermined temperature.

固定手段27は、主として、弾性を有する押圧手段27aと、本体部21の雌ねじ部21aと対向する位置に設けられた貫通孔27bと、により構成されている。
実施例では、押圧手段27aとしてバネ部材を用いた。
そして、雄ねじ28を、貫通孔27bに挿通させて雌ねじ部21aに螺合することによって、固定手段27を本体部21に固定することができる。
The fixing means 27 is mainly constituted by a pressing means 27a having elasticity and a through hole 27b provided at a position facing the female screw portion 21a of the main body portion 21.
In the embodiment, a spring member is used as the pressing means 27a.
Then, the fixing means 27 can be fixed to the main body portion 21 by inserting the male screw 28 through the through hole 27 b and screwing into the female screw portion 21 a.

タンク部23,圧送手段24,流量調整手段25,分析調整装置26,及び配管部29は、周知のものを用いることができる。   As the tank unit 23, the pressure feeding unit 24, the flow rate adjusting unit 25, the analysis adjusting unit 26, and the piping unit 29, known ones can be used.

次に、この無電解めっき装置20を用いて上述した樹脂成形体1に配線パターン3を形成する方法について図1〜図4を用いて説明する。   Next, a method for forming the wiring pattern 3 on the resin molded body 1 using the electroless plating apparatus 20 will be described with reference to FIGS.

まず、樹脂成形体1(図1参照)を無電解めっき装置20における本体部21の収容部31(図2参照)に収容する。
次に、図3に示すように、雄ねじ28を、固定手段27の貫通孔27bに挿通させて本体部21の雌ねじ部21aに螺合することによって、固定手段27を本体部21に固定する。
固定手段27を本体部21に固定することにより、樹脂成形体1は、押圧手段27aによってシール部21bを介して本体部21に押圧されて保持されると共に、本体部21の凹み部32とシール部21bと樹脂成形体1の表面とによって無電解めっき液22の流路34となる空隙部34が形成される。
First, the resin molded body 1 (see FIG. 1) is housed in the housing portion 31 (see FIG. 2) of the main body 21 in the electroless plating apparatus 20.
Next, as shown in FIG. 3, the fixing means 27 is fixed to the main body portion 21 by inserting the male screw 28 through the through hole 27 b of the fixing means 27 and screwing into the female screw portion 21 a of the main body portion 21.
By fixing the fixing means 27 to the main body part 21, the resin molded body 1 is pressed and held by the main body part 21 via the seal part 21b by the pressing means 27a, and the sealing part 21 and the recessed part 32 of the main body part 21 are sealed. A gap 34 serving as a flow path 34 for the electroless plating solution 22 is formed by the portion 21 b and the surface of the resin molded body 1.

次に、圧送手段24により、タンク部23内の無電解めっき液22を本体部21へ圧送すると共に、圧送された無電解めっき液22の流量を流量調整手段25によって調整する。
そして、本体部21に圧送された無電解めっき液22は、空隙部33a,流路34,空隙部33bを順次通過して、タンク部23に戻る。
従って、樹脂成形体1が収容部31に収容された状態において、タンク部23内の無電解めっき液22を本体部21の流路34を通過させながら循環することができる。
無電解めっき液22を流路34を通過させながら循環することによって、樹脂成形体1の表面における無電解めっき液22と接する領域に無電解めっき膜からなる配線パターン3が形成される。即ち、樹脂成形体1の表面における凹み部32が設けられた範囲に対応する範囲に無電解めっき膜からなる配線パターン3が形成される。
配線パターン3の厚さは、無電解めっき液22の温度やめっき時間等の無電解めっき条件を調整することによって制御することができる。
実施例では、無電解めっき液22として無電解銅めっき液を用い、配線パターン3の厚さが5μmとなるように無電解めっき条件を調整した。
Next, the electroless plating solution 22 in the tank unit 23 is pumped to the main body 21 by the pumping unit 24, and the flow rate of the electroless plating solution 22 that is pumped is adjusted by the flow rate adjusting unit 25.
Then, the electroless plating solution 22 pumped to the main body portion 21 sequentially passes through the gap portion 33 a, the flow path 34, and the gap portion 33 b and returns to the tank portion 23.
Therefore, in a state where the resin molded body 1 is accommodated in the accommodating portion 31, the electroless plating solution 22 in the tank portion 23 can be circulated while passing through the flow path 34 of the main body portion 21.
By circulating the electroless plating solution 22 while passing through the flow path 34, the wiring pattern 3 made of an electroless plating film is formed in a region in contact with the electroless plating solution 22 on the surface of the resin molded body 1. That is, the wiring pattern 3 made of the electroless plating film is formed in a range corresponding to the range where the recess 32 is provided on the surface of the resin molded body 1.
The thickness of the wiring pattern 3 can be controlled by adjusting the electroless plating conditions such as the temperature of the electroless plating solution 22 and the plating time.
In the examples, an electroless copper plating solution was used as the electroless plating solution 22, and the electroless plating conditions were adjusted so that the wiring pattern 3 had a thickness of 5 μm.

その後、無電解めっき液22の圧送を止めて、固定手段27を本体部21から離脱した後、樹脂成形体1を無電解めっき装置20から取り出すことによって、図4に示すように、樹脂成形体1の表面に配線パターン3が形成されたMID10を得る。   Thereafter, the pumping of the electroless plating solution 22 is stopped, the fixing means 27 is detached from the main body 21, and then the resin molded body 1 is taken out from the electroless plating apparatus 20, as shown in FIG. The MID 10 having the wiring pattern 3 formed on the surface of 1 is obtained.

次に、上述した実施例の変形例を第1変形例及び第2変形例として、図5及び図6を用いて説明する。
図5及び図6は、実施例の第1変形例及び第2変形例をそれぞれ説明するための斜視図であり、各図中の(a)及び(b)は製造過程の状態をそれぞれ示している。
Next, a modified example of the above-described embodiment will be described as a first modified example and a second modified example with reference to FIGS.
5 and 6 are perspective views for explaining a first modification and a second modification of the embodiment, respectively, and (a) and (b) in each figure show the state of the manufacturing process, respectively. Yes.

まず、第1変形例について図5を用いて説明する。   First, a first modification will be described with reference to FIG.

<第1変形例>
第1変形例は、上述した実施例に対して、樹脂成形体41の配線パターン43が形成される領域に、予め凹み部42を設ける点が異なり、それ以外については実施例と同様である。
この樹脂成形体41は、実施例と同様に、無電解めっき用の触媒であるパラジウム(Pd)が約0.1重量%混入された絶縁性樹脂を射出成形することによって作製することができる。
そして、この樹脂成形体41に、実施例と同様の無電解めっき装置20を用いて配線パターン43を形成することにより、MID40を得る。
MID40は、基体である樹脂成形体41に予め凹み部42を設けておくことにより、配線パターン43が樹脂成形体41の表面よりも外部に向かって突出しない構成となる。
この構成によれば、配線パターン43上に電子部品等を実装する場合、電子部品が配線パターン43からズレ落ちることがないので、実施例よりも電子部品の実装位置精度を向上することができる。
<First Modification>
The first modified example is different from the above-described embodiment in that a recessed portion 42 is provided in advance in a region where the wiring pattern 43 of the resin molded body 41 is formed, and the rest is the same as the embodiment.
Similar to the embodiment, the resin molded body 41 can be manufactured by injection molding an insulating resin mixed with about 0.1 wt% of palladium (Pd), which is a catalyst for electroless plating.
And MID40 is obtained by forming the wiring pattern 43 in this resin molding 41 using the electroless-plating apparatus 20 similar to an Example.
The MID 40 is configured such that the wiring pattern 43 does not protrude outward from the surface of the resin molded body 41 by providing a recessed portion 42 in advance in the resin molded body 41 as a base.
According to this configuration, when an electronic component or the like is mounted on the wiring pattern 43, the electronic component is not displaced from the wiring pattern 43. Therefore, the mounting position accuracy of the electronic component can be improved as compared with the embodiment.

次に、第2変形例について図6を用いて説明する。   Next, a second modification will be described with reference to FIG.

<第2変形例>
第2変形例は、上述した実施例に対して、樹脂成形体51が凹み部52を有する点と、この樹脂成形体51に複数の配線パターン、例えば4つの配線パターン53a,53b,53c,53dを形成する点が異なる。
この樹脂成形体51は、実施例と同様に、無電解めっき用の触媒であるパラジウム(Pd)が約0.1重量%混入された絶縁性樹脂を射出成形することによって作製することができる。
<Second Modification>
The second modified example is different from the above-described embodiment in that the resin molded body 51 has a recess 52 and a plurality of wiring patterns, for example, four wiring patterns 53a, 53b, 53c, and 53d. Is different.
Similar to the embodiment, the resin molded body 51 can be manufactured by injection molding an insulating resin mixed with about 0.1 wt% of palladium (Pd), which is a catalyst for electroless plating.

このように、凹み部52を有する樹脂成形体51に複数の配線パターン53a,53b,53c,53dを形成する場合、実施例の無電解めっき装置20の本体部21に、各配線パターン53a,53b,53c,53dに対応する凹み部をそれぞれ設ければよい。
即ち、この本体部に樹脂成形体51を固定した後、これら凹み部によって形成された無電解めっき液の流路に、無電解めっき液をそれぞれ圧送することにより、樹脂成形体51に複数の配線パターン53a,53b,53c,53dを形成することができる。
Thus, when forming several wiring patterns 53a, 53b, 53c, 53d in the resin molding 51 which has the recessed part 52, each wiring pattern 53a, 53b is provided in the main-body part 21 of the electroless-plating apparatus 20 of an Example. , 53c and 53d may be provided.
That is, after fixing the resin molded body 51 to the main body portion, a plurality of wirings are connected to the resin molded body 51 by pumping the electroless plating solution into the flow path of the electroless plating solution formed by the recesses. Patterns 53a, 53b, 53c, and 53d can be formed.

以上、詳述したように、本発明に係る回路部品の製造方法によれば、複雑な工程を必要とすることなく、無電解めっきによって、直接、配線パターンを形成することができるので、従来よりも生産性を向上することができる。
また、本発明に係る回路部品の製造方法によれば、樹脂成形体の外形形状によることなく、この樹脂成形体の表面に配線パターンを形成することができるので、回路部品を、この回路部品が配置される電子機器の空間スペースに応じた外形形状とすることができるため、この空間スペースを有効に活用することができ、電子機器内部の省スペース化が可能になる。
As described above in detail, according to the method for manufacturing a circuit component according to the present invention, a wiring pattern can be directly formed by electroless plating without requiring a complicated process. Can also improve productivity.
In addition, according to the method for manufacturing a circuit component according to the present invention, a wiring pattern can be formed on the surface of the resin molded body without depending on the outer shape of the resin molded body. Since it can be set as the external shape according to the space space of the electronic device arrange | positioned, this space space can be utilized effectively and the space saving inside an electronic device is attained.

本発明の実施例は、上述した構成及び手順に限定されるものではなく、本発明の要旨を逸脱しない範囲において変形例としてもよいのは言うまでもない。   The embodiment of the present invention is not limited to the configuration and procedure described above, and it goes without saying that modifications may be made without departing from the scope of the present invention.

例えば、実施例,第1変形例,及び第2変形例では、無電解めっき用の触媒が混入された絶縁性樹脂を射出成形することによって、樹脂成形体1,41,51を作製したが、これに限定されるものではなく、無電解めっき用の触媒が混入されていない絶縁性樹脂を射出成形して樹脂成形体を作製した後、樹脂成形体における少なくとも配線パターンが形成される領域を粗化し、さらにこの領域のみに無電解めっき用の触媒を付与するようにしてもよい。   For example, in the example, the first modified example, and the second modified example, the resin molded bodies 1, 41, 51 were produced by injection molding an insulating resin mixed with a catalyst for electroless plating. However, the present invention is not limited to this. After a resin molded body is manufactured by injection molding an insulating resin not mixed with an electroless plating catalyst, at least a region where a wiring pattern is formed in the resin molded body is roughened. Furthermore, a catalyst for electroless plating may be applied only to this region.

また、実施例では、固定手段27を本体部21に固定する方法として、ねじを螺合する方法を用いたが、これに限定するものではない。   In the embodiment, as a method of fixing the fixing means 27 to the main body portion 21, a method of screwing screws is used, but the method is not limited to this.

また、実施例では、押圧手段27aとしてバネ部材を用いたが、これに限定するものではない。   In the embodiment, a spring member is used as the pressing means 27a, but the present invention is not limited to this.

また、実施例では、回路部品の製造方法として、MIDの製造方法を例に挙げて説明したが、これに限定させるものではなく、基体の表面に配線パターンを有する回路部品の製造方法について、本発明を利用することができる。   In the embodiment, the MID manufacturing method has been described as an example of the circuit component manufacturing method. However, the present invention is not limited to this, and the circuit component manufacturing method having a wiring pattern on the surface of the substrate is not limited thereto. The invention can be used.

本発明の回路部品の製造方法の実施例を説明するための図であり、実施例における樹脂成形体を示す斜視図である。It is a figure for demonstrating the Example of the manufacturing method of the circuit component of this invention, and is a perspective view which shows the resin molding in an Example. 本発明の回路部品の製造方法の実施例を説明するための図であり、実施例における無電解めっき装置を説明するための模式図である。It is a figure for demonstrating the Example of the manufacturing method of the circuit components of this invention, and is a schematic diagram for demonstrating the electroless-plating apparatus in an Example. 本発明の回路部品の製造方法の実施例を説明するための図であり、実施例における配線パターンの形成方法を説明するための模式図である。It is a figure for demonstrating the Example of the manufacturing method of the circuit component of this invention, and is a schematic diagram for demonstrating the formation method of the wiring pattern in an Example. 本発明の回路部品の製造方法の実施例を説明するための図であり、実施例におけるMIDを示す斜視図である。It is a figure for demonstrating the Example of the manufacturing method of the circuit component of this invention, and is a perspective view which shows MID in an Example. 実施例の第1変形例を説明するための斜視図である。It is a perspective view for demonstrating the 1st modification of an Example. 実施例の第2変形例を説明するための斜視図である。It is a perspective view for demonstrating the 2nd modification of an Example.

符号の説明Explanation of symbols

1 樹脂成形体、 3 配線パターン、 10 MID、 20 無電解めっき装置、 21 本体部、 21a 雌ねじ部、 21b シール部、 22 無電解めっき液、 23 タンク部、 24 圧送手段、 25 流量調整手段、 26 分析調整装置、 27 固定手段、 27a 押圧手段、 27b 貫通孔、 28 雄ねじ、 29 配管部、 31 収容部、 32 凹み部、 33a,33b 空隙部、 34 流路(空隙部)、 L1 長さ、 W1 幅、 H1 高さ DESCRIPTION OF SYMBOLS 1 Resin molding, 3 Wiring pattern, 10 MID, 20 Electroless plating apparatus, 21 Main body part, 21a Female thread part, 21b Seal part, 22 Electroless plating solution, 23 Tank part, 24 Pressure feeding means, 25 Flow rate adjustment means, 26 Analytical adjustment device, 27 fixing means, 27a pressing means, 27b through hole, 28 male screw, 29 piping part, 31 accommodating part, 32 dent part, 33a, 33b gap part, 34 channel (gap part), L1 length, W1 Width, H1 height

Claims (2)

樹脂成形体の表面に配線パターンが設けられてなる回路部品を製造する回路部品の製造方法において、
めっき触媒が付与された被めっき領域を有する樹脂成形体に、前記被めっき領域を空隙を有して覆うと共に該空隙と外部とをそれぞれ連結する2つの開口部を備えた部材を当接させた状態で、前記一方の開口部から前記空隙を通過して前記他方の開口部に向かってめっき液を供給し、前記被めっき領域にめっき膜からなる配線パターンを形成するようにしたことを特徴とする回路部品の製造方法。
In the method of manufacturing a circuit component for manufacturing a circuit component in which a wiring pattern is provided on the surface of the resin molded body,
A resin molded body having a plating area to which a plating catalyst is applied is contacted with a member having two openings for covering the plating area with a gap and connecting the gap and the outside. In this state, a plating solution is supplied from the one opening to the other opening through the gap, and a wiring pattern made of a plating film is formed in the plated area. Circuit component manufacturing method.
前記樹脂成形体は凹み部を有し、前記被めっき領域は前記凹み部に設けられてなることを特徴とする請求項1記載の回路部品の製造方法。   The method of manufacturing a circuit component according to claim 1, wherein the resin molded body has a recessed portion, and the plated region is provided in the recessed portion.
JP2007093139A 2007-03-30 2007-03-30 Method of manufacturing circuit component Pending JP2008251948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007093139A JP2008251948A (en) 2007-03-30 2007-03-30 Method of manufacturing circuit component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007093139A JP2008251948A (en) 2007-03-30 2007-03-30 Method of manufacturing circuit component

Publications (1)

Publication Number Publication Date
JP2008251948A true JP2008251948A (en) 2008-10-16

Family

ID=39976523

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007093139A Pending JP2008251948A (en) 2007-03-30 2007-03-30 Method of manufacturing circuit component

Country Status (1)

Country Link
JP (1) JP2008251948A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2010087336A1 (en) * 2009-01-27 2012-08-02 パナソニック株式会社 Semiconductor chip mounting method, semiconductor device obtained by using the method, semiconductor chip connection method, three-dimensional structure provided with wiring on the surface, and manufacturing method thereof
US9070393B2 (en) 2009-01-27 2015-06-30 Panasonic Corporation Three-dimensional structure in which wiring is provided on its surface
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
CN113299626A (en) * 2021-06-29 2021-08-24 广东佛智芯微电子技术研究有限公司 Conductive assembly for multi-chip packaging and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6029485A (en) * 1983-07-26 1985-02-14 Yamada Mekki Kogyosho:Kk Electroplating device
JPH08222834A (en) * 1995-02-13 1996-08-30 Toppan Printing Co Ltd Formation of wiring circuit and manufacture of multilayered wiring circuit board
JP2001308497A (en) * 2000-04-27 2001-11-02 Sankyo Kasei Co Ltd Stereoscopic circuit board and method for manufacturing the same
WO2006100790A1 (en) * 2005-03-22 2006-09-28 Cluster Technology Co., Ltd. Process for producing wiring board, and wiring board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6029485A (en) * 1983-07-26 1985-02-14 Yamada Mekki Kogyosho:Kk Electroplating device
JPH08222834A (en) * 1995-02-13 1996-08-30 Toppan Printing Co Ltd Formation of wiring circuit and manufacture of multilayered wiring circuit board
JP2001308497A (en) * 2000-04-27 2001-11-02 Sankyo Kasei Co Ltd Stereoscopic circuit board and method for manufacturing the same
WO2006100790A1 (en) * 2005-03-22 2006-09-28 Cluster Technology Co., Ltd. Process for producing wiring board, and wiring board

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9082438B2 (en) 2008-12-02 2015-07-14 Panasonic Corporation Three-dimensional structure for wiring formation
JPWO2010087336A1 (en) * 2009-01-27 2012-08-02 パナソニック株式会社 Semiconductor chip mounting method, semiconductor device obtained by using the method, semiconductor chip connection method, three-dimensional structure provided with wiring on the surface, and manufacturing method thereof
US8759148B2 (en) 2009-01-27 2014-06-24 Panasonic Corporation Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
US8901728B2 (en) 2009-01-27 2014-12-02 Panasonic Corporation Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
US9070393B2 (en) 2009-01-27 2015-06-30 Panasonic Corporation Three-dimensional structure in which wiring is provided on its surface
US9795033B2 (en) 2009-01-27 2017-10-17 Panasonic Corporation Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
CN113299626A (en) * 2021-06-29 2021-08-24 广东佛智芯微电子技术研究有限公司 Conductive assembly for multi-chip packaging and manufacturing method thereof

Similar Documents

Publication Publication Date Title
JP4152274B2 (en) Injection molding conductor support device and manufacturing method thereof
JP2008251948A (en) Method of manufacturing circuit component
JP5350138B2 (en) Electric circuit manufacturing method and electric circuit board obtained by the method
JP2007013018A (en) Wiring circuit board
TWI392405B (en) Circuit structure
TWI507098B (en) The flexible printed circuit board
KR20110009790A (en) Flexible printed circuit board and method for manufacturing the same
KR101541730B1 (en) Plastic injection molded parts having electric circuit and manufacturing process thereof
CN106332444B (en) Circuit board and manufacturing method thereof
JP2010087155A (en) Method of manufacturing multilayer cubic circuit board
JP6032096B2 (en) Electronic control unit and manufacturing method thereof
JP6338547B2 (en) Molded circuit component, method for manufacturing molded circuit component, and circuit module
EP2750172A1 (en) Wiring substrate
JP2005203586A (en) Manufacturing method of multilayer wiring board
JP2007042977A (en) Semiconductor device
CN109788661B (en) Flexible circuit board and preparation method thereof
JP2013162007A (en) Production method of fine wiring pattern
JP2002290010A (en) Printed wiring board and its manufacturing method
TWI678953B (en) Molded interconnect element and method for manufacturing the same
JP2009081212A (en) Method for manufacturing printed wiring board
JP2005286207A (en) Flexible board and its manufacturing method
TWI511631B (en) Printed circuit board for mounting chip and method of manufacturing the same
JP2014239101A (en) Wiring structure for flexible wiring board and method of manufacturing flexible wiring board
JP5913486B2 (en) Plating rack
KR20100040068A (en) The improvement method of bending and heat emission effect by the two-sided structure of single-size board

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100329

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20100329

A521 Written amendment

Effective date: 20100329

Free format text: JAPANESE INTERMEDIATE CODE: A821

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20111012

A131 Notification of reasons for refusal

Effective date: 20111019

Free format text: JAPANESE INTERMEDIATE CODE: A131

A02 Decision of refusal

Effective date: 20120229

Free format text: JAPANESE INTERMEDIATE CODE: A02