JP2008245257A5 - - Google Patents
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- JP2008245257A5 JP2008245257A5 JP2008030387A JP2008030387A JP2008245257A5 JP 2008245257 A5 JP2008245257 A5 JP 2008245257A5 JP 2008030387 A JP2008030387 A JP 2008030387A JP 2008030387 A JP2008030387 A JP 2008030387A JP 2008245257 A5 JP2008245257 A5 JP 2008245257A5
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- circuit
- pulse
- pulse generation
- output
- template
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- 230000000875 corresponding Effects 0.000 claims 4
- 238000001514 detection method Methods 0.000 claims 1
- 230000001105 regulatory Effects 0.000 claims 1
Claims (8)
供給された制御信号に応じて連続的に前記テンプレートパルスを出力する連続出力モードと、断続的に前記テンプレートパルスを出力する断続出力モードとの何れかの出力モードによって前記テンプレートパルスを発生させるように出力モードを切換える出力モード切換え回路
を備えていることを特徴とするテンプレートパルス発生回路。 A template pulse generation circuit for generating a template pulse used for detection of a received pulse in pulse communication,
The template pulse is generated in any one of a continuous output mode in which the template pulse is continuously output according to the supplied control signal and an intermittent output mode in which the template pulse is intermittently output. A template pulse generation circuit comprising an output mode switching circuit for switching an output mode.
前記テンプレートパルスを断続的に発生させる断続パルス発生回路と、を備え、
前記出力モード切換え回路は前記連続パルス発生回路および前記断続パルス発生回路の何れか一方のパルス発生回路の出力を選択することによって前記出力モードを切換える
ことを特徴とする請求項1に記載のテンプレートパルス発生回路。 A continuous pulse generating circuit for continuously generating the template pulse;
An intermittent pulse generation circuit for intermittently generating the template pulse,
2. The template pulse according to claim 1, wherein the output mode switching circuit switches the output mode by selecting an output of one of the continuous pulse generation circuit and the intermittent pulse generation circuit. Generation circuit.
前記出力モード切換え回路は前記発振モード切換信号を前記モード可変パルス発生回路の前記モード制御信号入力端に供給すること
を特徴とする請求項1に記載のテンプレートパルス発生回路。 A mode variable pulse generating circuit for generating the template pulse continuously or intermittently according to an oscillation mode switching signal supplied to a mode control signal input terminal;
The template pulse generation circuit according to claim 1, wherein the output mode switching circuit supplies the oscillation mode switching signal to the mode control signal input terminal of the mode variable pulse generation circuit.
前記多段インバータ回路部は前記モード制御信号入力端に供給される前記発振モード切換信号に応じて所定の複数段部分における最終段の前記インバータの出力を前記複数段部分の初段の入力端に帰還させる閉ループを結んでリング発振回路を構成する帰還ループ回路の断続が切換えられるように構成され、
前記パルス発生論理回路部は、前記帰還ループ回路の断続の切換えに応じて連続的または断続的に前記テンプレートパルスを生成すること
を特徴とする請求項3に記載のテンプレートパルス発生回路。 The mode variable pulse generation circuit includes a multi-stage inverter circuit unit configured to include a cascade connection of a plurality of inverters, and a plurality of switching elements whose opening / closing is controlled by the output of the inverter of the multi-stage inverter circuit unit, Intermittent higher frequency than the clock pulse signal supplied to the input terminal of the first-stage inverter among the inverters by connecting a predetermined output terminal to the positive or negative side of the power supply according to the opening and closing of a plurality of switching elements And a pulse generation logic circuit part capable of generating the template pulse which is a typical pulse signal,
The multi-stage inverter circuit unit feeds back the output of the inverter at the final stage in a predetermined multi-stage part to the input terminal of the first stage of the multi-stage part according to the oscillation mode switching signal supplied to the mode control signal input terminal It is configured to switch the intermittent loop of the feedback loop circuit that forms the ring oscillation circuit by connecting the closed loop,
4. The template pulse generation circuit according to claim 3, wherein the pulse generation logic circuit unit generates the template pulse continuously or intermittently according to switching of the feedback loop circuit.
前記出力モード切換え回路は、前記カウンタの計数値に応じて前記断続出力モードにおける前記テンプレートパルスの持続時間を規定するように構成されていること
を特徴とする請求項4〜5の何れか一項に記載のテンプレートパルス発生回路。 A counter for counting oscillation pulses by the ring oscillation circuit;
The said output mode switching circuit is comprised so that the duration of the said template pulse in the said intermittent output mode may be prescribed | regulated according to the count value of the said counter. 2. A template pulse generation circuit according to 1.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008030387A JP4992748B2 (en) | 2007-02-28 | 2008-02-12 | Template pulse generator |
US12/038,199 US8031809B2 (en) | 2007-02-28 | 2008-02-27 | Template pulse generating circuit, communication device, and communication method |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007049338 | 2007-02-28 | ||
JP2007049338 | 2007-02-28 | ||
JP2008030387A JP4992748B2 (en) | 2007-02-28 | 2008-02-12 | Template pulse generator |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2008245257A JP2008245257A (en) | 2008-10-09 |
JP2008245257A5 true JP2008245257A5 (en) | 2011-02-17 |
JP4992748B2 JP4992748B2 (en) | 2012-08-08 |
Family
ID=39915976
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008030387A Expired - Fee Related JP4992748B2 (en) | 2007-02-28 | 2008-02-12 | Template pulse generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4992748B2 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5109668B2 (en) * | 2007-03-09 | 2012-12-26 | セイコーエプソン株式会社 | Receiving apparatus and receiving method |
US8856842B2 (en) * | 2012-01-10 | 2014-10-07 | Intel Corporation | Wireless video clock synchronization to enable power saving |
JP6256739B2 (en) * | 2013-09-17 | 2018-01-10 | 国立研究開発法人情報通信研究機構 | Wireless transmitter, wireless receiver, wireless communication system, and wireless communication method |
CN111007765A (en) * | 2019-12-13 | 2020-04-14 | 贵州航天计量测试技术研究所 | Fast-edge pulse signal generating device with adjustable pulse parameters |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3564108B2 (en) * | 2002-03-08 | 2004-09-08 | イビデン産業株式会社 | Wire spread spectrum communication apparatus, communication method thereof, and wire spread spectrum communication system |
JP4406326B2 (en) * | 2004-06-28 | 2010-01-27 | 株式会社ルネサステクノロジ | Receiving device and communication device using the same |
-
2008
- 2008-02-12 JP JP2008030387A patent/JP4992748B2/en not_active Expired - Fee Related
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