JP2008244729A - Terminating resistance adjusting method and terminating resistance adjustment circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To accurately meet the resistance value of a replica resistance for adjusting a terminating resistance with an external reference resistance without depending upon a parasitic resistance. <P>SOLUTION: Voltage measurement circuits 11 and 12, a determination circuit 13 and an adjustment code generation circuit 14 are provided in a terminating resistance adjustment circuit 101 provided in an LSI 100. One end of a replica resistance Rrep is connected to a power terminal VDD, and the other end is connected to the voltage measurement circuit 11 and also connected to an external reference resistance Rref. One end of the reference resistance Rref is connected to the voltage measurement circuit 12. Measurement results of the voltage measurement circuit 11 and the voltage measurement circuit 12 are inputted to the determination circuit 13 to be compared, and a determination result code formed on the basis of the result is outputted to the adjustment code generation circuit 14. The replica resistance Rrep is adjusted by an adjustment code outputted by the adjustment code generation circuit 14. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a termination resistance adjustment method and a termination resistance adjustment circuit. More specifically, the present invention relates to adjustment of a replica resistance built in an LSI using a resistor externally attached to the LSI as a reference, and built in the LSI based on the result. The present invention relates to a method and a circuit for adjusting termination resistance.

  In an LSI that handles a high-speed signal, for example, a high-speed logic circuit having a fast signal rise and fall time, it is necessary to handle the signal line as a transmission line of a distributed constant circuit, and it is necessary to consider signal reflection. When a circuit having an impedance different from the characteristic impedance of the transmission line is connected to the transmission line, signal reflection occurs at the connection point, and the quality of the transmission signal deteriorates. In this case, if the input and output ends are terminated with the characteristic impedance of the transmission line, signal reflection is avoided. For this reason, a termination resistor for matching with the impedance of the transmission line is provided in the input / output unit of the LSI. This termination resistor is widely built in an LSI (see, for example, Patent Document 1).

  However, it is generally difficult to form a resistor with high accuracy in an LSI. When the termination resistor built in the LSI does not match the impedance of the transmission line, signal reflection occurs and the significance of providing the termination resistor is reduced. In addition, the resistance formed in the LSI is highly temperature dependent, and the resistance value changes greatly as the temperature changes. Therefore, even if the termination resistor is formed to match the impedance of the transmission line at a certain temperature, if the temperature deviates from that temperature, the matching cannot be achieved. In order to avoid such an inconvenience, a highly accurate resistor having a low temperature dependency is externally attached to the LSI as a reference resistor, and the resistance value of the external resistor is added to the resistance value of the external resistor. It has been conventionally performed to follow.

FIG. 8 is a circuit diagram showing a conventional example of a circuit for causing a termination resistor incorporated in such an LSI to follow an external resistor. In this kind of adjustment circuit, the resistance value of the termination resistor is not directly measured and adjusted, but a replica resistor that simulates the termination resistor is provided in the LSI, and this replica resistor is made to follow the external resistor, thereby terminating the termination resistor. Generally, the resistance value is adjusted. As shown in FIG. 8, a part other than the external resistor of the termination resistance adjustment circuit 101 is installed in the LSI 100, and the replica resistance Rrep provided in the termination resistance adjustment circuit 101 is connected via a terminal T1. It is connected in series with an external reference resistor Rref, and is connected between the power supply terminal VDD and ground. The terminal on the opposite side of the power supply of the replica resistor Rrep is input to the other input terminal of the comparator 22 in which a voltage half the power supply voltage is applied to one input terminal. The output of the comparator 22 is input to the determination circuit 23 and converted into a determination result code. Further, the determination result code is converted into an adjustment code by the adjustment code generation circuit 24, and the replica resistor Rrep is adjusted based on the adjustment code. Further, the termination resistor (not shown) installed in the LSI 100 is adjusted using this adjustment code.
JP 08-139272 A

In the conventional replica resistance adjusting method described above, as shown in FIG. 8, the resistance value of the parasitic resistance Rpar such as the wiring is added to the resistance value of the external reference resistance Rref. It becomes impossible to accurately match the resistance value of the reference resistor Rref. In particular, when an LSI test is performed using an LSI tester, the contact resistance of the LSI tester probe (probe) to the LSI pad is added to the parasitic resistance Rpar. As a result, the test is performed in a state in which the resistance value of the termination resistor is greatly deviated, which is a serious problem.
An object of the present invention is to solve the above-mentioned problems of the prior art, the purpose of which is to adjust the replica resistance to the resistance value of the reference resistance without being affected by the parasitic resistance, and to It is to be able to accurately adjust the built-in termination resistance to the target resistance value.

  In order to achieve the above object, according to the present invention, in a termination resistance adjusting method for adjusting a resistance value of a replica resistor built in an LSI using a reference resistor external to the LSI as a reference, a first power source, a second power source, A series circuit of the replica resistor and the reference resistor is formed between the two terminals of the replica resistor by the first voltage measuring unit, and the two terminals of the reference resistor by the second voltage measuring unit. And adjusting the resistance value of the replica resistor based on the voltage between the two terminals of the replica resistor and the voltage between the two terminals of the reference resistor. A method is provided.

  In order to achieve the above object, according to the present invention, in the termination resistance adjusting circuit for adjusting the resistance value of the replica resistor built in the LSI using the reference resistor external to the LSI as a reference, the first power supply and the second power supply A series circuit of the replica resistor and the reference resistor is formed between the power source and a first voltage measuring circuit for measuring a voltage between two terminals of the replica resistor, and a voltage between the two terminals of the reference resistor A second voltage measuring circuit for measuring the voltage, a determination circuit for comparing the measured voltage values of the two resistors, and a code corresponding to the adjustment value of the resistance value of the replica resistor based on the determination result of the determination circuit And a termination resistance adjustment circuit comprising: an adjustment code generation circuit that outputs.

[Action]
According to the present invention, the voltage between both terminals of the replica resistor and the voltage between both terminals of the reference resistor are measured independently, the two voltage measurements are compared, and based on the result, the replica resistor is connected to the reference resistor. It is adjusted to the resistance value. That is, as shown in FIG. 1, a series circuit of a replica resistor and a reference resistor is formed, and the replica resistor is adjusted so that the voltage V1 generated at the replica resistor is equal to the voltage V2 generated at the reference resistor. Is done. When the current flowing through the series circuit of the replica resistor and the reference resistor is I, and the resistance values of the replica resistor and the reference resistor are Rrep and Rref, respectively, and Rrep is adjusted so that V1 = V2, V1 = Rrep · I Since V2 = Rref · I, Rrep = Rref, and Rrep is equal to Rref regardless of the resistance value of the parasitic resistance Rpar. Therefore, the resistance value of the termination resistor accurately follows the resistance value of the reference resistor.

  According to the present invention, the resistance value of the replica resistor can be matched to the resistance value of the reference resistor without depending on the resistance value of the parasitic resistor attached to the external reference resistor. Therefore, according to the present invention, it is possible to accurately follow the termination resistor incorporated in the LSI without affecting the resistance value of the external reference resistor by the resistance value of the parasitic resistance.

Hereinafter, embodiments of the present invention will be specifically described with reference to the accompanying drawings.
[First Embodiment]
FIG. 2 is a block diagram showing the first embodiment of the present invention. As shown in FIG. 2, the LSI 100 includes an input circuit 102 connected to the input terminals T4 to T9 and a portion other than the external resistor of the termination resistance adjusting circuit 101. A buffer 10 is provided in the input circuit 102, and a termination resistor Rter is connected to a signal line connected to the input terminal of the buffer 10. In the termination resistance adjustment circuit 101, voltage measurement circuits 11 and 12, a determination circuit 13 and an adjustment code generation circuit 14 are provided in addition to the replica resistance Rrep. One end of the replica resistor Rrep is connected to the power supply terminal VDD, and the other end is connected to the input terminal of the voltage measuring circuit 11, and is connected to one end of the external reference resistor Rref via the terminal T1. The other end of the reference resistor Rref is grounded. One end of the reference resistor Rref is connected to the input terminal of the voltage measurement circuit 12 via the terminal T1. The power source and the ground are connected to the + terminal and the − terminal of the voltage measuring circuit 11 and the voltage measuring circuit 12, respectively, with or without inversion. The measurement result codes generated by the voltage measurement circuit 11 and the voltage measurement circuit 12 are input to the determination circuit 13 and compared, and the determination result code generated based on the result is output to the adjustment code generation circuit 14. . Then, the replica resistance Rrep is adjusted by the adjustment code output from the adjustment code generation circuit 14, and the resistance value of the replica resistance Rrep is adjusted to the resistance value of the reference resistance Rref. Specifically, the resistance value of the reference resistor Rref is adjusted as follows. When the determination circuit 13 determines from the measurement result codes output from the voltage measurement circuit 11 and the voltage measurement circuit 12 that the replica resistance Rrep is smaller than the reference resistance Rref, the determination circuit 13 determines that “0” is large. In this case, “1” is generated and output as a determination result code. The adjustment code generation circuit 14 adjusts the resistance value of the reference resistor Rref by changing the adjustment code bit by bit according to the determination result code. By repeating this operation, the resistance value of the replica resistor Rrep approaches the resistance value of the reference resistor Rref, and when the replica resistor Rrep changes due to temperature fluctuation or the like, it follows. The termination resistor Rter provided in the input circuit 102 is similarly controlled by the same code as the adjustment code for adjusting the replica resistor Rrep. According to this replica resistance adjusting method, the replica resistance is adjusted without being affected by the parasitic resistance Rpar attached to the reference resistance Rref, and the replica resistance Rrep and therefore the termination resistance Rter are accurately set to the reference resistance Rref. It becomes possible to adjust the resistance value. As described above, the external reference resistor Rref is a resistor having a low temperature dependency and is formed with high accuracy. Therefore, the termination resistor Rter is also adjusted with high accuracy regardless of temperature. .

  FIG. 3 is a circuit diagram showing a specific configuration of the voltage measurement circuits 11 and 12. In the voltage measurement circuit 11, the + terminal is grounded and the − terminal is connected to the power supply terminal VDD. In the voltage measurement circuit 12, the + terminal is connected to the power supply terminal VDD and the-terminal is grounded. A voltage dividing resistor is connected between the + terminal and the − terminal, and each divided value of the voltage dividing resistor is input to the inverting input terminal of the comparison circuit 15. The positive input terminal of the comparison circuit 15 is connected to one end of a resistor (Rrep or Rref) whose voltage is to be measured. The output of each comparison circuit 15 is input to the coder 16 as it is in the voltage measurement circuit 12 via the inverter 19 in the voltage measurement circuit 11, and the measurement result code corresponding to the output result of the comparison circuit 15 is output from the coder 16. The

FIG. 4 is a circuit diagram showing a specific configuration of the replica resistor Rrep. The replica resistor Rrep is obtained by connecting a series circuit of a resistor Rk (k is 1, 2, 3, or 4) and a p-channel MOS transistor Mk in parallel. The common connection point of the resistors R1 to R4 is connected to the power supply terminal VDD, and the sources of the MOS transistors M1 to M4 are commonly connected to the node N1 shown in FIG. The adjustment codes output from the adjustment code generation circuit are input to the gates of the MOS transistors M1 to M4, respectively, and the ON / OFF of each MOS transistor is controlled. The resistance values of the resistors R1 to R4 are different from each other. Therefore, (2 ⁴ −1) = 15 resistance values can be obtained by the illustrated circuit. For the sake of simplicity, FIG. 4 shows a circuit having only four resistors, but the number of resistors connected in parallel is appropriately selected according to the required adjustment accuracy.
The termination resistor Rter connected to the input circuit 102 of FIG. 2 is also constituted by a parallel connection circuit of a series connection body of a resistor and a p-channel MOS transistor as shown in FIG.

[Second Embodiment]
FIG. 5 is a block diagram showing the main part of the second embodiment of the present invention. 5, parts that are the same as the parts of the first embodiment shown in FIG. 2 are given the same reference numerals, and redundant descriptions are omitted. Further, in FIG. 5, the illustration of the input circuit to which the termination resistor is connected is omitted. In the present embodiment, the voltage measurement circuit 12 installed in the LSI 100 in the circuit of the first embodiment is mounted outside the LSI 100. The voltage measurement circuit 12 measures the voltage of the external reference resistor Rref, and the measurement result code formed in the voltage measurement circuit 12 is taken into the LSI 100 via the terminal T3 and input to the determination circuit 13. . Other operations are the same as those in the first embodiment.
In the second embodiment, only the voltage measurement circuit 12 is installed outside the LSI, but the voltage measurement circuit 11 can also be installed outside the LSI. Furthermore, the determination circuit 13 or the determination circuit 13 and the adjustment code generation circuit 14 may be installed outside the LSI. In general, since an external circuit has less variation than a circuit formed in an LSI, more accurate adjustment can be performed by mounting one or more circuits outside the LSI.

[Third Embodiment]
FIG. 6 is a block diagram showing the main part of the third embodiment of the present invention. 6, parts that are the same as the parts of the first embodiment shown in FIG. 2 are given the same reference numerals, and redundant descriptions are omitted. Further, in FIG. 6, illustration of an input circuit to which a termination resistor is connected is omitted. In the present embodiment, all of the voltage measurement circuits 11, 12, the determination circuit 13, and the adjustment code generation circuit 14 installed in the LSI 100 in the first embodiment are mounted outside the LSI 100, and instead in the LSI 100. Includes a nonvolatile memory 18 in which an adjustment code for adjusting a replica resistor (termination resistor) is stored, and an adjustment code received from the adjustment code generation circuit 14 via a terminal T3, and the nonvolatile memory of the adjustment code A control circuit 17 that controls writing to 18 is installed in the LSI 100.

According to the present embodiment, since the adjustment code is recorded in the nonvolatile memory, readjustment is not necessary once resistance adjustment is performed. For example, the adjustment with reference to the reference resistor is performed only when the LSI is shipped from the factory or when the information processing system incorporating the LSI is started, and thereafter, the adjustment is performed using the adjustment code stored in the nonvolatile memory. be able to. In this case, the terminal T3 can be used as an adjustment code input only when adjusting the resistance value of the replica resistor, and can be used as an input / output pin for other signals in other cases. In such a case, the control circuit 17 writes into the nonvolatile memory 18 using the signal (adjustment code) from the terminal T3 as write data only when adjusting the resistance value of the replica resistor.
In general, the resistance value of the LSI built-in resistor changes due to the power supply voltage fluctuation and environmental temperature change of the LSI. Therefore, voltage fluctuation correction data and temperature change correction data that compensates for changes in the resistance value of the built-in resistor due to power supply voltage fluctuations and environmental temperature changes are stored in the nonvolatile memory, and the adjustment code is changed according to voltage fluctuations and temperature changes. If changes are made, accurate resistance adjustment is possible regardless of these changes.

[Fourth Embodiment]
FIG. 7 is a block diagram showing the main part of the fourth embodiment of the present invention. In FIG. 7, parts that are the same as the parts of the third embodiment shown in FIG. 6 are given the same reference numerals, and redundant descriptions are omitted. Further, in FIG. 7, the illustration of the input circuit to which the termination resistor is connected is omitted. In the present embodiment, the voltage measurement circuit 11, the determination circuit 13, and the adjustment code generation circuit 14 that are mounted outside the LSI in the third embodiment are incorporated in the LSI. The control circuit is divided into 17a and 17b, and the control circuit 17a is installed outside the LSI. By doing so, the number of pins used can be reduced by one as compared to the case of the third embodiment. In the present embodiment, at the time of adjusting the resistance value of the replica resistor, the control circuit 17b sends the measurement result code input from the terminal T3 to the determination circuit 13 and the adjustment code formed by the adjustment code generation circuit 14. Control to write to the non-volatile memory. In this embodiment, it is necessary to input the measurement result code into the LSI. However, it is possible to superimpose it on a signal of an LSI control system mounted on a large-scale LSI or convert it into a command. No additional pins are required using this pin.

  Although preferred embodiments have been described above, the present invention is not limited to these embodiments, and appropriate modifications can be made without departing from the scope of the present invention. For example, in the embodiment, the termination resistor connected to the input circuit has been described. However, the present invention can be applied to the case where the termination resistor is connected to the output circuit. In addition, as a transistor for explaining connection / disconnection of the replica resistor, an n-channel transistor may be used instead of a p-channel transistor, and a MES or bipolar transistor may be used.

The resistance connection circuit diagram for demonstrating the principle of this invention. The block diagram which shows the 1st Embodiment of this invention. The circuit diagram of the voltage measurement circuit used in embodiment of this invention. FIG. 3 is a circuit diagram of a replica resistor used in the embodiment of the present invention. The block diagram which shows the 2nd Embodiment of this invention. The block diagram which shows the 3rd Embodiment of this invention. The block diagram which shows the 4th Embodiment of this invention. The block diagram of a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Buffer 11, 12 Voltage measurement circuit 13, 23 Judgment circuit 14, 24 Adjustment code generation circuit 15 Comparison circuit 16 Coder 17, 17a, 17b Control circuit 18 Non-volatile memory 19 Inverter 22 Comparator 100 LSI
101 termination resistance adjusting circuit 102 input circuit Rpar parasitic resistance Rref reference resistance Rrep replica resistance Rter termination resistance

Claims (12)

In a termination resistance adjusting method for adjusting a resistance value of a replica resistor built in an LSI using an external LSI reference resistor as a reference, the replica resistor and the reference resistor are connected in series between a first power source and a second power source. Forming a circuit, measuring a voltage between the two terminals of the replica resistor by a first voltage measuring means, and measuring a voltage between the two terminals of the reference resistor by a second voltage measuring means; A termination resistance adjusting method, wherein the resistance value of the replica resistor is adjusted based on a voltage between the two terminals of the reference resistor. 2. The termination resistance adjusting method according to claim 1, wherein when the LSI performs an original circuit operation, the resistance value of the replica resistor is adjusted in parallel with the circuit operation. The termination resistance adjusting method according to claim 1, wherein the LSI is incorporated in an information processing apparatus, and the resistance value of the replica resistor is adjusted when the information processing apparatus is started up. The termination resistance adjusting method according to claim 1, wherein the adjustment of the resistance value of the replica resistor is performed by an adjustment code stored in a nonvolatile memory. The termination resistance adjusting method according to claim 4, wherein the nonvolatile memory stores a temperature change correction code for changing the adjustment code in response to a temperature change. In a termination resistance adjusting circuit that adjusts the resistance value of a replica resistor built in an LSI using a reference resistor external to the LSI as a reference, the replica resistor and the reference resistor are connected in series between a first power source and a second power source. A first voltage measuring circuit that forms a circuit and measures a voltage between the two terminals of the replica resistor; a second voltage measuring circuit that measures a voltage between the two terminals of the reference resistor; A termination resistance adjustment circuit comprising: a determination circuit that compares voltage values of resistors; and an adjustment code generation circuit that outputs a code corresponding to an adjustment value of the resistance value of the replica resistor based on a determination result of the determination circuit. A nonvolatile memory circuit is further provided, the output code of the adjustment code generation circuit is stored in the nonvolatile memory circuit, and the resistance value of the replica resistor is adjusted based on the stored code of the nonvolatile memory circuit. The termination resistance adjusting circuit according to claim 6. The termination resistance adjusting circuit according to claim 7, wherein the nonvolatile memory circuit stores temperature change correction data for correcting the stored adjustment code in accordance with an environmental temperature. 7. The first voltage measurement circuit, the second voltage measurement circuit, the determination circuit, and the adjustment code generation circuit other than the reference resistor are installed in the LSI. To a termination resistance adjusting circuit according to any one of 8 to 8. The reference resistor, the first voltage measurement circuit, the second voltage measurement circuit, the determination circuit, and the adjustment code generation circuit other than the replica resistor are installed outside the LSI. The termination resistance adjusting circuit according to claim 6. 7. The first voltage measurement circuit, the determination circuit, and the adjustment code generation circuit other than the reference resistor and the second voltage measurement circuit are installed in the LSI. To a termination resistance adjusting circuit according to any one of 8 to 8. 7. The first voltage measurement circuit and the second voltage measurement circuit have the same circuit configuration, and a power connection terminal and a ground connection terminal are inverted from each other. To the terminal resistance adjusting circuit according to any one of 11 to 11.

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