JP2008218439A - Quantum element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem wherein tunnel junction and island electrodes are affected poorly and sufficient charge resolution, or the like cannot be obtained, when a suspension type element is formed by etching a substrate using CF4. <P>SOLUTION: A resist base section formed by resist removed by ashing is provided on a substrate, and an element section, such as tunnel junction and island electrodes, is formed on the resist base section. After the element section is formed on the resist base section, the resist base section is removed by ashing, thus composing a suspension type element without etching the substrate by CF4, or the like. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a quantum device and a method for manufacturing the same, and more particularly to a single-electron transistor, a single electron pump, a single electron box, and other quantum devices having a single-electron circuit structure and a method for manufacturing the same.

  Recently, quantum computers that perform operations using qubits have attracted attention as means for solving problems that require a large amount of calculation. In the quantum element of the quantum computer, a single-electron structure circuit (single-electron circuit) such as a single-electron transistor, a single-electron pump, and a single-electron box is used. In many cases, an element having a single-electron circuit structure is also used as the quantum arithmetic element.

  An example using a quantum element of this type, single-electron circuit structure will be described with reference to Patent Document 1. The example shown in Patent Document 1 includes a qubit structure including a superconducting box electrode and a readout circuit, and each of the qubit structure and the readout circuit has a single electronic circuit structure. Specifically, the qubit structure shown in Patent Document 1 is arranged to face the counter electrode via a counter electrode that operates as a source electrode and a first tunnel barrier formed by a thin film. A superconducting box electrode, a trap electrode provided to face the superconducting box electrode across the second tunnel barrier, and a gate electrode coupled to the superconducting box electrode via a capacitor. Further, the readout circuit described above is constituted by a single electron transistor, and the single electron transistor is constituted by a source electrode, an island electrode, a drain electrode, and a gate electrode. The source electrode and the island electrode of the single electron transistor are coupled by a third tunnel barrier, and the island electrode and the drain electrode are coupled by a fourth tunnel barrier. Furthermore, the gate electrode and the island electrode are coupled via a gate capacitance.

  Thus, Patent Document 1 discloses that the quantum state of the superconducting quantum box can be read out by a single trial using a single-electron circuit for the qubit structure and the reading circuit.

  Here, the quantum element having a single electronic circuit structure is formed on an insulating substrate, for example, a silicon oxide film or a silicon nitride film. For this reason, each electrode, for example, the island electrode and the superconducting quantum box, of the quantum arithmetic element described above is in contact with the substrate.

  According to recent research, when the single-electron transistor, particularly when the island electrode of the single-electron transistor is in contact with the substrate, the influence of charge fluctuations due to the substrate, that is, the influence of noise from the substrate cannot be avoided. It has been pointed out.

  Non-Patent Document 1 proposes a single-electron transistor having a structure in which an island electrode and a substrate are not in contact with each other in order to prevent the influence of fluctuation of electric charges due to the substrate. That is, Non-Patent Document 1 discloses a suspension type (that is, a suspension type) formed on a wire suspended on a substrate so that the island electrode and two tunnel barriers (junctions) sandwiching the island electrode are not in contact with the substrate. A single electron transistor of structure is disclosed.

  Here, the method disclosed in Non-Patent Document 1 will be described more specifically. In Non-Patent Document 1, a suspended single-electron transistor is formed on a nitrided silicon wafer by performing a double vapor deposition method in which vapor deposition is performed from directions crossing each other and reactive ion etching. That is, a two-layer resist containing polymethyl methacrylate (PMMA) is applied on a nitrided silicon wafer, and the upper resist is patterned, and the lower resist is selectively removed, and the patterned upper resist is removed. Is partially supported by the underlying resist to form a suspended mask that is lifted hollow.

  After constructing the suspension mask, a tunnel junction is formed by an ordinary double vapor deposition method in which vapor deposition is performed from different directions. That is, a first metal film is deposited from a predetermined angle with respect to the substrate, and the oxide film barrier is formed by oxidizing the first metal film. Next, the second metal layer is vapor-deposited from the direction crossing the vapor deposition direction of the first metal layer, and two tunnel junctions are formed at the overlapping portion of the first and second metal layers.

Next, in Non-Patent Document 1, two tunnel junctions and a substrate located under an island electrode are subjected to two-step RIE etching (that is, anisotropic etching and isotropic etching) using O ₂ and CF ₄ gas flows. As a result, the linear region including the tunnel junction and the island electrode is left suspended on the substrate, that is, suspended.

  In the single-electron transistor having this configuration, since the tunnel junction is not in contact with the substrate, the tunnel junction is expected to prevent charge noise due to the influence of the substrate.

JP2004-200509A Applied Physics Letters 86,093101 (2005) “Suspended single-electron transducers: Fabrication and measurement” (GS Paraoanu and AM Halvari).

However, as in Non-Patent Document 1 performs the RIE using CF _4, when realized single electron transistor structure of the suspension-type substrate is etched, the tunnel junction, the island electrode RIE, CF ₄ or the like, the active Be exposed to strong gas. As a result, it has been found that the suspended single electron transistor produced by the method of Non-Patent Document 1 cannot obtain desired characteristics.

  A main object of the present invention is to provide a method that can be applied to a quantum device having various single-electron circuit structures, such as a general charge sensor or a single-electron transistor as a qubit, to reduce the noise. It is.

A specific object of the present invention is to provide a method of manufacturing a quantum element (particularly, a suspended element) having a single-electron circuit configuration that does not require etching of a substrate by RIE using CF ₄ gas.

  Another object of the present invention is to provide a method of manufacturing a suspended quantum device having excellent charge resolution.

  Still another object of the present invention is to provide a method of manufacturing a quantum device with low noise and, as a result, high charge measurement accuracy.

  Another object of the present invention is to provide a single electronic circuit capable of maintaining the coherence of charged qubits for a long time.

  According to the first aspect of the present invention, the first step of selectively forming a resist stage formed of a predetermined resist on the substrate surface, and the element region is formed on the resist stage. A quantum process comprising: a second step; and a third step of removing the resist base portion by ashing without exposing to the active gas to form a suspended structure to obtain a suspended quantum device. An element manufacturing method is obtained.

  According to a second aspect of the present invention, in the first aspect, the second step uses a mask forming step of providing a suspension mask on the resist stage, and the suspension mask. And a device forming process for forming the device region.

  According to a third aspect of the present invention, in the second aspect, in the mask formation step, first, second, and third resist layers different from each other are sequentially formed in a region including the top of the resist stage. Using the third resist layer as a mask, forming a pattern on the second resist layer, removing the third resist layer, and selectively removing the first resist layer Thus, there is obtained a method of manufacturing a quantum device comprising the step of forming the suspended mask.

  According to a fourth aspect of the present invention, in the third aspect, the element forming step of the second step is performed from different directions using the suspension mask formed by the second resist layer. There is obtained a method of manufacturing a quantum device, comprising a step of depositing a metal and a step of oxidizing the deposited metal to form a tunnel junction.

  According to a fifth aspect of the present invention, in the fourth aspect, the quantum element is at least one of a single electron transistor, a single electron pump, a single electron box, a qubit, a readout circuit, and a charge sensor. The manufacturing method of the quantum element characterized by this can be obtained.

  According to a sixth aspect of the present invention, in any one of the first to fifth aspects, the third step leaves a part of the resist base portion located below the element region, and the element region. A method for manufacturing a quantum device, characterized in that the ashing is performed so as to constitute the support portion of the quantum device, is obtained.

  According to a seventh aspect of the present invention, there is provided the method for manufacturing a quantum device according to any one of the first to sixth aspects, wherein the resist constituting the resist base portion is calixarene.

  According to an eighth aspect of the present invention, in the third aspect, the first resist layer is a lift-off resist, the second resist layer is Ge, and the third resist layer is A method for producing a quantum device characterized by being PMMA (Polymethylmethacrylate) is obtained.

  According to the ninth aspect of the present invention, the substrate, the support portion disposed on the surface of the substrate at an interval and formed by a predetermined resist, and the suspended element provided between the support portions And a metal wiring that is electrically connected to the suspended element portion and drawn on the substrate.

  According to a tenth aspect of the present invention, in the ninth aspect, the suspended element portion constitutes a single-electron transistor having two tunnel junctions and an island electrode provided between the two tunnel junctions. Thus, a quantum device can be obtained.

  According to an eleventh aspect of the present invention, in the tenth aspect, there is obtained a quantum device characterized in that the substrate surface located under the suspended element portion is not etched.

  According to a twelfth aspect of the present invention, in any of the ninth to eleventh aspects, the quantum device further includes another conductor layer electrically connected to the metal wiring. Is obtained.

  According to a thirteenth aspect of the present invention, there is provided the quantum device according to any one of the ninth to twelfth aspects, wherein the predetermined resist constituting the support portion is calixarene. .

  In the present invention, the resist layer is left on the surface of the substrate located below the suspended element portion, and the resist layer is removed by ashing without performing etching. Since the suspended element portion is not affected by the etching gas, the charge resolution can be improved when a single electron transistor having the suspended element portion is configured. Further, according to the present invention, when a qubit is configured, noise can be reduced and a qubit with a long decoherence time can be obtained. Furthermore, when other single-electron elements such as a single-electron pump are configured, their noise can be reduced.

With reference to FIGS. 1A to 1F, a case of manufacturing a single-electron transistor as a quantum device according to an embodiment of the present invention will be described in the order of steps. First, as shown in FIG. 1A, a silicon substrate 10 is prepared. Although the illustrated silicon substrate 10 is described as having an insulating film (not shown) such as a silicon oxide film (SiO ₂ ) or a silicon nitride film on the surface, the present invention is not oxidized on the surface. It can also be applied to non-silicon substrates.

  In FIG. 1A, a metal conductor layer (here, a gold layer) 12 is selectively formed on the surface of a silicon substrate 10 having an insulating film. These metal conductor layers 12 are connected to a single-electron transistor, and constitute a quantum device circuit together with the single-electron transistor.

  Next, calixarene, which is a kind of resist, is deposited on the silicon substrate 10 and the metal conductor layer 12 by spin coating and then baked. After the calixarene is baked, electron beam exposure is performed. Subsequently, the calixarene is selectively removed, and a patterned resist base portion 14 is formed on the surface of the silicon substrate 10 as shown in FIG. leave. As shown in FIG. 1B, the resist base portion 14 is disposed on the surface of the substrate 10 between the metal conductor layers 12. Here, the step of forming the resist base 14 is referred to as a first step.

  After the first step, as shown in FIG. 1C, the three-layer resist film made up of the first, second, and third resist films 20, 22, and 24 is formed into a resist base portion 14, a substrate, and a substrate. The surface is formed on the surface of the metal conductor layer 12. In the illustrated example, as the first, second, and third resist films 22, LOR (lift off resist), Ge, and polymethyl methacrylate (PMMA) are used, respectively.

  In FIG. 1D, a pattern is formed on the Ge film as the second resist film 22 through the third resist film, that is, PMMA, and the first resist film 20 is selectively removed. As a result, a suspension mask 25 supported by the first resist film 20 and having a pattern defined by the second resist film 22 is formed on the resist base portion 14.

  Subsequently, in a state in which the suspension mask 25 is formed, metal (here, aluminum) is vapor-deposited from different directions through the suspension mask 25 by a conventionally known double vapor deposition method, and is oxidized to be oxidized. As shown in (e), the metal layer 26 is formed on the silicon substrate 10, the resist platform 14, and the conductor layer 12, while the tunnel junction 30 is formed. As a result, a single-electron transistor having two tunnel junctions 30 and an island electrode 32 sandwiched between the tunnel junctions 30 is formed on the resist platform 14.

  After the formation of the resist stage 14 shown in FIG. 1B, the process from FIG. 1C to FIG. 1E is referred to as a second process. That is, in the second step, as shown in FIG. 1C, three layers of resist films 20, 22, and 22 are formed on the substrate 10 to form the element region shown in FIG. It is a process to do.

  As shown in FIG. 1F, the resist base 14 is removed by ashing to obtain a suspended single-electron transistor. The step of removing the resist base portion 14 is referred to as a third step. In the illustrated example, the resist base portion 14 is partially left to form leg portions (that is, support portions) 14a and 14b, and the leg portions 14a and 14b form island electrodes 32 of a single electron transistor, The tunnel junction 30 has a supported configuration.

As described above, RIE by CF ₄ is not performed in the above method. Therefore, the island electrode 32 of the single-electron transistor, the tunnel junction 30, the resist base portion 14 formed by the calixarene, and the silicon substrate 10 below the resist base portion 14 are not exposed to CF ₄ .

As described above, in the present invention, the island electrode 32 and the tunnel junction 30 of the single-electron transistor are not exposed to an active gas such as CF ₄ , so that the characteristics of the island electrode 32 and the tunnel junction 30 do not change due to CF 4 or the like. As a result, a suspended element having desired characteristics can be obtained. Further, as is apparent from FIG. 1 (f), the element portion of the single-electron transistor, which is a suspended element according to the present invention, is supported by a resist, and the silicon substrate 10 below the single-electron transistor is It can be characterized by not being etched.

  Referring to FIG. 2, a perspective view of the suspended single electron transistor shown in FIG. 1 is shown. As shown in the drawing, the single electron transistor according to the embodiment of the present invention includes a wire-like structure suspended on the silicon substrate 10, and the suspended portion includes two tunnel junctions 30 and both tunnel junctions 30. It has an sandwiched island electrode 32. The island electrode 32 is coupled to the source 34 and the drain 36 through the tunnel junction 30. Further, the suspended portion is supported by leg portions 14a and 14b made of resist that is selectively left in the same manner as in FIG. 1 (f).

  The island electrode 32 is capacitively coupled to the gate 38, and the electrostatic potential of the island electrode 32 can be controlled by the gate voltage applied to the gate 38, and the state transition of the qubit can be controlled via the tunnel junction 30. . The illustrated gate 38 is supported by a support portion 14c made of calixarene left at the bottom.

As described above, the suspended single-electron transistor according to the embodiment of the present invention can realize a suspended quantum device structure without exposing the island electrode 32 and the tunnel junction 30 to an active gas such as CF ₄ . Therefore, the single-electron transistor shown in the figure exhibits excellent charge resolution, and when a charge pump is configured, the charge detection accuracy can be improved. Furthermore, it was confirmed that the coherence of the qubit can be maintained for a long time.

  In the embodiment described above, an example in which calixarene is used as a resist that is selectively left on the substrate 10 and can be removed by ashing has been described. However, the present invention is not limited to this, and can be replaced by NEB31 (trade name) which is a negative resist in principle. Since NEB31 requires an exposure dose of 1/10 compared to calixarene, the exposure time can be reduced to 1/10.

  Referring to FIG. 3, the quantum device according to the second embodiment of the present invention includes a suspended Cooper pair box 40. More specifically, the illustrated quantum device includes leg portions 14a and 14b formed of a resist such as calixarene, and a suspended Cooper pair box 40 provided in a portion supported by the leg portions 14a and 14b. Have. Further, a Josephson junction 30a is formed between the suspension-type Cooper pair box 40 and the counter electrode 34 that extends from the opposite side of the suspension-type Cooper pair box 40 and is supported by the legs 14a. . Accordingly, in the illustrated quantum device, a suspended element portion is formed by the suspended Cooper pair box 40 and the Josephson junction 30a.

  Further, the illustrated Cooper pair box 40 is capacitively coupled with a pulse gate 38a supported by a support portion 14c formed of resist, and the counter electrode 34 is further supported by a resist. The DC gate 38b supported by the portion 14d is capacitively coupled. Note that a probe (not shown) may be coupled to the counter electrode 34.

The quantum device having the illustrated suspended element portion can also be manufactured by the method described with reference to FIG. 1, and the Cooper pair box 40 and the Josephson junction 30a are not exposed to CF ₄ or the like. A highly accurate Cooper pair box can be constructed.

  The present invention is not limited to a single-electron transistor, but can be applied to a single-electron pump, a single-electron box, and other single-electron circuits, and can also be applied to a superconducting qubit composed of a single-electron box.

(A), (b), (c), (d), (e), and (f) are sectional views showing a method of manufacturing a suspended element according to the present invention in the order of steps. It is sectional drawing which shows the structure of the suspension type quantum element which concerns on embodiment which concerns on this invention. It is sectional drawing which shows the quantum element which concerns on other embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Board | substrate 12 Metal conductor layer 14 Resist base part 14a, 14b, 14c, 14d Leg part (support part)
20 First resist film 22 Second resist screen 24 Third resist film 30 Tunnel junction 34 Source, counter electrode 36 Drains 38, 38a, 38b Gate 30a Josephson junction 40 Cooper pair box

Claims (13)

  A first step of selectively forming a resist platform formed of a predetermined resist on the substrate surface; a second step of forming an element region on the resist platform; and the resist platform A method for producing a quantum device comprising: a third step of forming a suspended structure by removing by ashing without exposing to an active gas to obtain a suspended quantum device.   2. The method according to claim 1, wherein the second step includes a mask forming step of providing a suspended mask on the resist base portion, and an element forming step of forming the element region using the suspended mask. A manufacturing method of a quantum device characterized by the above.   3. The mask forming step according to claim 2, wherein the first resist layer, the second resist layer, and the third resist layer are sequentially formed in a region including the top of the resist base, and the third resist layer is used as a mask. A step of forming a pattern on the second resist layer, and a step of forming the suspended mask by removing the third resist layer and selectively removing the first resist layer. A method for producing a quantum device, comprising:   4. The element forming step of the second step includes the steps of depositing metal from different directions and using the suspended mask formed of the second resist layer and the deposited metal. A method of manufacturing a quantum device comprising a step of oxidizing to form a tunnel junction.   5. The method of manufacturing a quantum device according to claim 4, wherein the quantum device is at least one of a single electron transistor, a single electron pump, a single electron box, a qubit, a readout circuit, and a charge sensor.   6. The method according to claim 1, wherein in the third step, ashing is performed so that a part of the resist base portion located below the element region is left to constitute a support portion of the element region. A method of manufacturing a quantum device, which is a process.   The method of manufacturing a quantum device according to claim 1, wherein the resist constituting the resist base portion is calixarene.   4. The quantum according to claim 3, wherein the first resist layer is a lift-off resist, the second resist layer is Ge, and the third resist layer is PMMA (Polymethylmethacrylate). Device manufacturing method.   A substrate, a support portion disposed on the surface of the substrate at an interval and formed by a predetermined resist, a suspension element portion provided between the support portions, and an electrical connection to the suspension element portion And a metal wiring connected to the substrate and drawn out on the substrate.   10. The quantum device according to claim 9, wherein the suspended element unit has a single electron structure having two tunnel junctions and an island electrode provided between the two tunnel junctions.   The quantum device according to claim 10, wherein the substrate surface located under the suspended element portion is not etched.   12. The quantum element according to claim 9, further comprising another conductor layer electrically connected to the metal wiring.   The quantum device according to claim 9, wherein the predetermined resist constituting the support portion is calixarene.

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