JP2008211188A5 - - Google Patents

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Publication number
JP2008211188A5
JP2008211188A5 JP2008011473A JP2008011473A JP2008211188A5 JP 2008211188 A5 JP2008211188 A5 JP 2008211188A5 JP 2008011473 A JP2008011473 A JP 2008011473A JP 2008011473 A JP2008011473 A JP 2008011473A JP 2008211188 A5 JP2008211188 A5 JP 2008211188A5
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JP
Japan
Prior art keywords
semiconductor element
semiconductor device
circuit region
resin layer
semiconductor
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Application number
JP2008011473A
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Japanese (ja)
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JP5193611B2 (en
JP2008211188A (en
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Publication date
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Priority to JP2008011473A priority Critical patent/JP5193611B2/en
Priority claimed from JP2008011473A external-priority patent/JP5193611B2/en
Priority to US12/022,840 priority patent/US7893539B2/en
Priority to CN2008101092128A priority patent/CN101286507B/en
Publication of JP2008211188A publication Critical patent/JP2008211188A/en
Publication of JP2008211188A5 publication Critical patent/JP2008211188A5/ja
Application granted granted Critical
Publication of JP5193611B2 publication Critical patent/JP5193611B2/en
Expired - Fee Related legal-status Critical Current
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Claims (10)

第1の半導体素子と、
前記第1の半導体素子上に積層され、前記第1の半導体素子の外縁から突出している突出部を有する第2の半導体素子と、
を備え、
前記第2の半導体素子は第1の回路領域とこの第1の回路領域よりも高い温度に発熱しやすい第2の回路領域とを有し、この第2の回路領域が前記突出部を含むように配置されていることを特徴とする半導体装置。
A first semiconductor element;
A second semiconductor element stacked on the first semiconductor element and having a protruding portion protruding from an outer edge of the first semiconductor element;
With
The second semiconductor element has a first circuit region and a second circuit region that easily generates heat at a temperature higher than that of the first circuit region, and the second circuit region includes the protruding portion. A semiconductor device characterized in that the semiconductor device is disposed.
前記第1の半導体素子および前記第2の半導体素子は、基板上に配置されるとともに、この基板上に形成された樹脂層により封止され、
前記樹脂層は、前記第2の半導体素子の前記第2の回路領域を含む端部とこれに対応する前記樹脂層の側壁面との間隔がそれ以外の端部における間隔よりも短くなるように形成されていることを特徴とする請求項1に記載の半導体装置。
The first semiconductor element and the second semiconductor element are disposed on a substrate and sealed with a resin layer formed on the substrate,
The resin layer has an interval between the end portion including the second circuit region of the second semiconductor element and a corresponding side wall surface of the resin layer shorter than an interval at the other end portion. The semiconductor device according to claim 1, wherein the semiconductor device is formed.
前記第1の回路領域に含まれる電極部と基板に設けられている端子とを接続する第1の配線を流れる電流量は、前記第2の回路領域に含まれる電極部と基板に設けられている端子とを接続する第2の配線を流れる電流量よりも小さいことを特徴とする請求項2に記載の半導体装置。   The amount of current flowing through the first wiring connecting the electrode portion included in the first circuit region and the terminal provided on the substrate is provided on the electrode portion and substrate included in the second circuit region. 3. The semiconductor device according to claim 2, wherein the amount of current is smaller than the amount of current flowing through the second wiring connecting to the terminal. 前記第2の配線が接続される基板の端子は、前記第2の回路領域を含む端部とこれに対応する前記樹脂層の側壁面との間の領域とは異なる領域に設けられていることを特徴とする請求項3に記載の半導体装置。   The terminal of the board to which the second wiring is connected is provided in a region different from the region between the end including the second circuit region and the corresponding side wall surface of the resin layer. The semiconductor device according to claim 3. 前記樹脂層は、前記端部とこれに対応する前記樹脂層の側壁面との間隔が、前記第2の半導体素子の上面と前記樹脂層の上面との間隔よりも短くなるように形成されていることを特徴とする請求項2乃至4のいずれかに記載の半導体装置。   The resin layer is formed such that an interval between the end portion and a side wall surface of the resin layer corresponding to the end portion is shorter than an interval between the upper surface of the second semiconductor element and the upper surface of the resin layer. The semiconductor device according to claim 2, wherein the semiconductor device is provided. 前記第2の半導体素子は、該第2の半導体素子の複数の辺が前記第1の半導体素子の外縁から突出するように該第1の半導体素子に積層されていることを特徴とする請求項1乃
至5のいずれかに記載の半導体装置。
The second semiconductor element is stacked on the first semiconductor element such that a plurality of sides of the second semiconductor element protrude from an outer edge of the first semiconductor element. The semiconductor device according to any one of 1 to 5.
前記第2の半導体素子は、該第2の半導体素子の4辺が前記第1の半導体素子の外縁から突出するように該第1の半導体素子に積層されていることを特徴とする請求項1乃至5のいずれかに記載の半導体装置。   2. The second semiconductor element is stacked on the first semiconductor element such that four sides of the second semiconductor element protrude from an outer edge of the first semiconductor element. The semiconductor device according to any one of 1 to 5. 前記第1の半導体素子は、前記第2の半導体素子が積層されている側とは反対側の面に、基板と接続される複数の突起電極端子が形成されていることを特徴とする請求項1乃至7のいずれかに記載の半導体装置。   The plurality of protruding electrode terminals connected to the substrate are formed on a surface of the first semiconductor element opposite to a side where the second semiconductor element is stacked. 8. A semiconductor device according to any one of 1 to 7. 前記第2の回路領域は電極部を含み、
前記電極部は前記第1の半導体素子と前記第2の半導体素子とが重畳する領域に配置されていることを特徴とする請求項1乃至8のいずれかに記載の半導体装置。
The second circuit region includes an electrode portion;
The semiconductor device according to claim 1, wherein the electrode portion is disposed in a region where the first semiconductor element and the second semiconductor element overlap each other.
前記第2の回路領域は電極部を含み、
前記電極部は前記突出部に配置されていることを特徴とする請求項1乃至8のいずれかに記載の半導体装置。
The second circuit region includes an electrode portion;
The semiconductor device according to claim 1, wherein the electrode portion is disposed on the protruding portion.
JP2008011473A 2007-01-31 2008-01-22 Semiconductor device Expired - Fee Related JP5193611B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2008011473A JP5193611B2 (en) 2007-01-31 2008-01-22 Semiconductor device
US12/022,840 US7893539B2 (en) 2007-01-31 2008-01-30 Semiconductor apparatus and mobile apparatus
CN2008101092128A CN101286507B (en) 2007-01-31 2008-01-31 Semiconductor apparatus and mobile apparatus

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2007020683 2007-01-31
JP2007020683 2007-01-31
JP2008011473A JP5193611B2 (en) 2007-01-31 2008-01-22 Semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012279956A Division JP5431567B2 (en) 2007-01-31 2012-12-21 Semiconductor device

Publications (3)

Publication Number Publication Date
JP2008211188A JP2008211188A (en) 2008-09-11
JP2008211188A5 true JP2008211188A5 (en) 2011-03-03
JP5193611B2 JP5193611B2 (en) 2013-05-08

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Application Number Title Priority Date Filing Date
JP2008011473A Expired - Fee Related JP5193611B2 (en) 2007-01-31 2008-01-22 Semiconductor device
JP2012279956A Expired - Fee Related JP5431567B2 (en) 2007-01-31 2012-12-21 Semiconductor device

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Application Number Title Priority Date Filing Date
JP2012279956A Expired - Fee Related JP5431567B2 (en) 2007-01-31 2012-12-21 Semiconductor device

Country Status (2)

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JP (2) JP5193611B2 (en)
CN (1) CN101286507B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5535351B1 (en) 2013-03-01 2014-07-02 株式会社東芝 Semiconductor device
JP6081229B2 (en) 2013-03-01 2017-02-15 株式会社東芝 Semiconductor device, wireless device, and storage device
JP6004537B2 (en) 2013-03-18 2016-10-12 コベルコ建機株式会社 jib
KR102501845B1 (en) 2021-02-08 2023-02-20 경희대학교 산학협력단 Composition for skin regeneration and wound healing comprising the extract of Cynanchum wilfordii as an active ingredient

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05235113A (en) * 1992-02-21 1993-09-10 Toshiba Corp Semiconductor device
JPH06275752A (en) * 1993-03-18 1994-09-30 Hitachi Ltd Cooling device for semiconductor device
JP2001320014A (en) * 2000-05-11 2001-11-16 Seiko Epson Corp Semiconductor device and its manufacturing method
JP4554152B2 (en) * 2002-12-19 2010-09-29 株式会社半導体エネルギー研究所 Manufacturing method of semiconductor chip
JP2005150456A (en) * 2003-11-17 2005-06-09 Oki Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2005268533A (en) * 2004-03-18 2005-09-29 Shinko Electric Ind Co Ltd Laminated semiconductor device
JP2006196709A (en) * 2005-01-13 2006-07-27 Sharp Corp Semiconductor device and manufacturing method thereof
JP2008177241A (en) * 2007-01-16 2008-07-31 Toshiba Corp Semiconductor package

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