JP2008210078A - Constant voltage power supply circuit, test method thereof and electronic equipment using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To execute a test without increasing a circuit size even in the case of a large overcurrent protection current which can not be tested with a conventional test apparatus. <P>SOLUTION: The constant voltage power supply circuit 10 provided with an overcurrent protection circuit 12 for limiting an output current value Io from an output transistor M1 to a predetermined first limit current value and less has a circuit configuration for switching the operation of the overcurrent protection circuit 12 to first and second operation states by the trimming of a trimming fuse F1. For instance, in a test on a wafer stage, the output current Io of the output transistor M1 is limited to a second limit current value or less which is less than the first limit current value as the second operation state before trimming, and when trimming is executed after the test, the operation state is switched to the first operation state for limiting the output current Io of the output transistor M1 to the first limit current value and less. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a technology of a semiconductor device such as a constant voltage circuit, or a semiconductor device incorporating a constant voltage circuit, and in particular, even when the output current limit current value exceeds the measurement range of the inspection device. The present invention relates to a technique suitable for enabling measurement of a limit current value without increasing the circuit scale.

  In recent years, as electronic devices such as portable electronic devices have become more multifunctional, the current consumption of the devices has increased, and the current that can be supplied from the constant voltage power source that operates the circuits of the devices has also increased. For this reason, the limit current value of the output current of the constant voltage power supply has also become larger than before.

  In addition, power saving has progressed in individual semiconductor devices used in electronic devices, and circuits that operate with very little current are used in circuits in the semiconductor devices.

  As described above, the current range handled by a semiconductor device used in a portable device has become very wide from a very small current of several nA to a large current of several A. As a result, it has become necessary to inspect current values that exceed the measurement limits of conventional inspection apparatuses.

  Of course, it is possible to update the equipment and widen the range of current values that can be inspected, but this requires a large investment. Moreover, in the current situation where many current values that can be sufficiently inspected with conventional inspection apparatuses occupy a large number, it is not advantageous from the economic viewpoint to immediately introduce new equipment.

  As a conventional technique for solving this problem, for example, there is a technique described in Patent Document 1. Hereinafter, this technique will be described with reference to FIG.

  In FIG. 8, the constant voltage power supply 81 includes a constant voltage power supply circuit 82 and an overcurrent protection circuit 83. Since the output transistor M1d of the constant voltage power supply circuit 82 and the PMOS transistor M2d of the overcurrent protection circuit 83 constitute a current mirror circuit, the drain current I2d of the PMOS transistor M2d is proportional to the output current Iod.

  The drain current I2d of the PMOS transistor M2d is the drain current of the NMOS transistor M4d. Since the NMOS transistor M4d and the NMOS transistor M5d constitute a current mirror circuit, the drain current I5d of the NMOS transistor M5d is a current proportional to the drain current I2d.

  The drain current I5d is supplied to the resistors R3d and R4d, and a voltage drop is generated. This voltage drop is the gate voltage of the PMOS transistor M6d. The drain of the PMOS transistor M6d is connected to the gate of the output transistor M1d.

  In such a configuration, the overcurrent protection circuit 83 performs an operation of limiting an increase in the output current Iod of the constant voltage power supply circuit 82 as follows.

  When the output current Iod of the constant voltage power supply circuit 82 increases and the current flowing through the PMOS transistor M1d increases, the current I5d flowing through the resistors R3d and R4d increases in proportion to increase the voltage drop.

  Thus, when the voltage drop across the resistors R3d and R4d increases, the source-gate voltage of the PMOS transistor M6d increases, and when the threshold voltage of the PMOS transistor M6d is exceeded, the PMOS transistor M6d is turned on.

  Since the drain of the PMOS transistor M6d is connected to the gate of the output transistor M1d, when the PMOS transistor M6d is turned on, the gate voltage of the output transistor M1d is increased, and an increase in the source-gate voltage of the output transistor M1d is suppressed. The on-resistance of the output transistor M1d increases, and the output voltage Vod can be lowered and the increase in the output current Iod can be suppressed.

  Further, in the circuit of FIG. 8, a PMOS transistor M10d is connected in parallel to the resistor R4d. The gate of the PMOS transistor M10d is connected to the terminal S1d. A low level signal is applied to the terminal S1d during normal operation, and the PMOS transistor M10d is on, but a high level signal is applied during testing to turn off the PMOS transistor M5d.

  When the PMOS transistor M10d is turned off in this way, the resistor R4d is connected in series with the resistor R3d, so that the voltage drop due to the drain current I5d increases, and as a result, the overcurrent protection is operated with a smaller output current Iod than in normal operation. Can be made.

  Since the ratio of the resistance values of the resistor R4d and the resistor R3d is hardly affected by the manufacturing process, it can be manufactured with extremely high accuracy. For this reason, since the accuracy of the “ratio” between the overcurrent protection current value measured with the resistor R4d connected in series and the overcurrent protection current value when the resistor R4d is short-circuited by the PMOS transistor M10d is good, the resistor R4d Can be connected in series, and the overcurrent protection current value when the resistor 4d is short-circuited can be predicted with high accuracy from the result of measurement in a state where the overcurrent protection current is reduced.

  As described above, in the circuit shown in FIG. 8, even in the case of a large overcurrent protection current that cannot be tested by the conventional inspection apparatus, the test is performed with the resistor R4d connected in series, so the overcurrent protection current value is small. Thus, a test using a conventional inspection apparatus becomes possible.

JP 2006-48116 A

  However, the above-described conventional technique requires the test terminal S1d. In a semiconductor device, the size of a package is determined by the number of terminals, and therefore by adding such a test terminal, a package that is one rank larger may be used. When the package becomes large, there is a problem that the cost is increased and further downsizing of an electronic device using the semiconductor device is hindered.

  In addition, since the on-resistance of the PMOS transistor M6d must be sufficiently smaller than the resistance value of the resistor R4d, there is a problem that the element size of the PMOS transistor M10d is increased.

  The problem to be solved is that in the conventional technology, a test terminal must be added in order to be able to perform a test even in the case of a large overcurrent protection current that cannot be tested by a conventional inspection device. In addition, the transistor size becomes large.

  An object of the present invention is to solve these problems of the prior art and to perform a test without increasing the circuit size even in the case of a large overcurrent protection current that cannot be tested by a conventional inspection apparatus. .

  In order to achieve the above object, according to the present invention, in a constant voltage power supply circuit including an overcurrent protection circuit that limits an output current value of an output transistor to a predetermined first limit current value or less, overcurrent protection is performed by trimming. Means for switching the operation of the circuit to the first and second operating states, and the second operating state before the trimming is set to the second operating state, and the output current of the output transistor is set to a second limiting current value less than the first limiting current value. It is limited to the following, and after trimming, the output current of the output transistor is switched to a first operation state in which the output current is limited to a first limit current value or less.

  According to the present invention, for example, in the confirmation test of the overcurrent protection operation in the wafer test stage, it is performed in the second operation state, trimming is performed after the test, and the measurement range of the inspection apparatus is switched to the second operation state. Enables inspection of evaluation items exceeding. As a result, even in the case of a large overcurrent protection current that cannot be tested by an inspection device, a transistor having a large element size is not required as in the prior art, and no additional test terminals are required, and testing is performed without increasing the circuit size. It becomes possible.

  The best mode for carrying out the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a first configuration example of a constant voltage power supply circuit according to the present invention, and FIG. 2 is an explanatory diagram showing an example of characteristics of output voltage and output current of the constant voltage power supply circuit in FIG. is there.

  In FIG. 1, a constant voltage power supply circuit 10 is used for an electronic device such as a mobile phone, and includes a reference voltage Vr, an error amplification circuit 11, an overcurrent protection circuit 12, an output transistor M1, an output voltage detection resistor R1, and an output. The voltage detection resistor R2 includes a power input terminal Vdd and an output terminal Vout. Further, a load 20 is connected between the output terminal Vout and the ground.

  The overcurrent protection circuit 12 includes a current generation circuit 13 that generates a current proportional to the output current Io, a resistor R3, and a PMOS transistor M6. The resistor R3 and the PMOS transistor M6 constitute a current-voltage conversion circuit according to the present invention.

  The current generation circuit 13 includes PMOS transistors M2 and M3, NMOS transistors M4 and M5, and a trimming fuse F1. The trimming fuse F1 and the PMOS transistor M3 constitute an operation state switching circuit according to the present invention.

  The PMOS transistor M2 and the PMOS transistor M3 constitute a current mirror circuit with the output transistor M1.

  The drain of the PMOS transistor M3 is connected to the drain of the PMOS transistor M2 via the trimming fuse F1, and the drain of the PMOS transistor M2 is connected to the drain of the NMOS transistor M4.

  Since the gate and source of the NMOS transistor M4 are commonly connected to the NMOS transistor M5 and the gate is connected to its own drain, the NMOS transistor M4 and the NMOS transistor M5 also constitute a current mirror circuit.

  The drain of the NMOS transistor M5 is connected to the power supply input terminal Vdd via the resistor R3, and is connected to the gate of the PMOS transistor M6.

  The PMOS transistor M6 has a source connected to the power supply input terminal Vdd and a drain connected to the gate of the output transistor M1.

  2 shows the relationship between the output voltage Vo and the output current Io before and after the trimming fuse F1 of the constant voltage power supply circuit of FIG. 1 is cut. Hereinafter, the overcurrent in FIG. 1 will be described with reference to FIG. The operation of the protection circuit 12 will be described.

  Since the PMOS transistor M2 and the PMOS transistor M3 form a current mirror circuit with the output transistor M1, the drain current I2 of the PMOS transistor M2 and the drain current I3 of the PMOS transistor M3 are both proportional to the output current Io.

  Before cutting the trimming fuse F1, the drain current I2 and the drain current I3 are added to become the drain current of the NMOS transistor M4. The NMOS transistor M4 and NMOS transistor M5 are current mirror circuits, and the drain current I5 of the NMOS transistor M5 on the output side is a current proportional to “drain current I2 + drain current I3”.

  The drain current I5 is supplied to the resistor R3 to generate a voltage drop. This voltage drop becomes the gate voltage (input voltage) of the PMOS transistor M6. In such a configuration, when the output current Io increases, the drain current I5 (= drain current I2 + drain current I3) of the NMOS transistor M5 increases in proportion to increase the voltage drop in the resistor R3.

  When this voltage drop exceeds the gate threshold voltage of the PMOS transistor M6, the PMOS transistor M6 is turned on and the gate voltage of the output transistor M1 is raised, so that the on-resistance of the output transistor M1 increases, as shown by the thick solid line in FIG. The output voltage Vo is lowered and the increase in the output current Io is suppressed by the output current Io1. In this way, the overcurrent protection operation works.

  When the trimming fuse F1 is cut with a laser beam or the like, the drain current I3 of the PMOS transistor M3 is not supplied to the drain of the NMOS transistor M4, so that the voltage drop in the resistor R3 is reduced.

  As a result, as indicated by the thin solid line in FIG. 2, the output current for which the overcurrent protection works is the output current Io3, which is larger than the output current Io1 before the trimming fuse F1 is cut.

  Even when the output current Io necessary for the operation of the overcurrent protection circuit 12 is equal to or greater than the maximum measured current Io2 of the inspection apparatus indicated by the alternate long and short dash line as in the case of the output current Io3, the trimming fuse F1 is attached. When the test is performed, the operation test of the overcurrent protection circuit 12 can be performed with the output current Io1 smaller than the maximum measurement current Io2 of the inspection apparatus.

  Note that the wafer state is suitable for the test performed with the trimming fuse F1 attached.

  The drain current I2 of the PMOS transistor M2 and the drain current I3 of the PMOS transistor M3 can be set according to the element size. That is, if the element size ratio of the PMOS transistor M2 and the PMOS transistor M3 is “1: n−1”, the current value supplied to the resistor R3 by cutting the trimming fuse F1 is multiplied by “1 / n”. The output current Io at which the overcurrent protection circuit 12 operates can be increased n times.

  Further, the resistance value of the resistor R3 is variable by trimming so that the current value of the output current Io1 at which the overcurrent protection circuit 12 operates is within the tolerance width Δ1 in FIG. 2 according to the wafer test result. It is possible to make fine adjustments. A conventional trimming technique can be applied to the trimming technique for adjusting the resistance value of the resistor R3.

  The voltage drop in the resistor R3 is a product of the resistance value of the resistor R3 and the drain current I5 of the NMOS transistor M5, and is proportional to the drain current I5. For this reason, when the tolerance width Δ1 is set to 1 / n of the tolerance width Δ2 in the output current Io3 in which the overcurrent protection circuit 12 operates during normal use, the tolerance width Δ1 is kept within the tolerance width Δ2 even after the trimming fuse F1 is cut. be able to.

  As described above, the constant voltage power supply circuit 10 shown in FIG. 1 suppresses the increase in the input voltage of the output transistor M1 when the output current value of the output transistor M1 increases beyond the predetermined first limit current value. The overcurrent protection circuit 12 is provided for limiting the output current value of the output transistor M1 to be equal to or less than the first limit current value. The overcurrent protection circuit 12 receives a current proportional to the output current of the output transistor M1. A current generation circuit 13 that generates and outputs, a resistor R3 as a current-voltage conversion circuit that converts the proportional current output from the current generation circuit 13 into an input voltage of the output transistor M1, and a PMOS transistor M6 are provided. The generation circuit 13 is provided with an operation state switching circuit including a trimming fuse F1 and a PMOS transistor M3. The F1 trimming, changing the value of the proportional current generating, before trimming, the output current of the output transistor M1, limited to not more than the second limit current value smaller than the first current limit value.

  That is, the current generation circuit 13 includes a current mirror circuit composed of two transistors, PMOS transistors M2 and M3, and the sum (drain current) of the output currents of the two PMOS transistors M2 and M3 constituting the current mirror circuit. I2 + I3) is output as a proportional current to the current-voltage conversion circuit (resistor R3, PMOS transistor M6), and the trimming fuse F1 is trimmed to disconnect the PMOS transistor M3, whereby the transistors constituting the current mirror circuit are output. The value of the proportional current is changed by changing the number (“drain current I2 + I3” → “drain current I2”).

  Thus, in the example of FIG. 1, the PMOS transistor M2 generates and outputs a current proportional to the output current Io of the output transistor M1, and the current mirror circuit composed of the NMOS transistor M4 and the NMOS transistor M5 A current corresponding to the current output from M2 is output to the current-voltage conversion circuit (resistor R3, PMOS transistor M6), and the operation state switching circuit according to the present invention is connected to form a current mirror circuit with the PMOS transistor M2. This PMOS transistor M3 (second transistor) and a trimming fuse F1 connected in series to the PMOS transistor M2 are configured.

  With such a configuration and operation, the constant voltage power supply circuit 10 of this example switches the operation of the overcurrent protection circuit from the first operation state to the second operation state by the trimming fuse F1. That is, after the trimming, the first operation state in which the output current of the output transistor M1 is limited to the first limit current value or less, and before the trimming, the output current of the output transistor M1 is less than the first limit current value. The operation state is switched to the second operation state that is limited to the second limit current value or less.

  As a result, for example, in the test of the constant voltage power supply circuit 10, particularly in the wafer test stage, it is possible to inspect evaluation items that exceed the measurement range of the inspection apparatus, no inspection terminal is required, and the circuit size is reduced. be able to.

  More specifically, the wafer test stage is inspected before trimming and the normal operation is performed after the test. In the operation at the time of the test, the limited continuous current value at the time of limiting current measurement is compared with the normal operation. For example, even in an inspection apparatus with a maximum measurement current of 300 mA, the measurement of the limit current is 250 mA with respect to the limit current of the constant voltage power supply circuit with a limit current of 500 mA during normal operation. By doubling this measured value, the current limit value of 500 mA during normal operation can be obtained.

  Next, a different configuration example of the operation state switching circuit in the example shown in FIG. 1 will be described with reference to FIGS. 6 is a circuit diagram showing a second embodiment of the constant voltage power supply circuit according to the present invention, and FIG. 7 is an explanatory diagram showing an example of characteristics of the output voltage and output current of the constant voltage power supply circuit in FIG. is there.

  The constant voltage power supply circuit 10c shown in FIG. 6 is different from the constant voltage power supply circuit 10 shown in FIG. 1 in that the trimming fuse F1c constituting the operation state switching circuit according to the present invention includes the gate of the PMOS transistor M3c and the power input terminal. This is connected between Vddc, and the gate of the PMOS transistor M3c is connected to the gate of the output transistor M1c via the resistor R7c.

  In the operation state switching circuit having such a configuration, since the PMOS transistor M3c is turned off by the trimming fuse F1c, for example, the current supplied to the drain of the NMOS transistor M4c is only the drain current I2c during the wafer test.

  However, if the trimming fuse F1c is cut after the wafer test, the drain current I3c of the NMOS transistor M3c is added, and the drain current of the NMOS transistor M4c and the drain current I5c of the NMOS transistor M5c become the sum of the drain current I2c and the drain current I3c. The current increases, and the operation control is the same as that of the constant voltage power supply circuit 10 in FIG.

  FIG. 7 shows the relationship between the output voltage Voc and the output current Ioc before and after cutting the trimming fuse F1c of the constant voltage power supply circuit 10c in FIG. 6, and before the trimming fuse F1c is cut, the overcurrent protection circuit 12c The operating current value is the output current Io1c larger than the measured minimum current Io2c of the inspection apparatus, but when the trimming fuse F1c is cut, the output current Io3c is smaller than the measured minimum current Io2c.

  The ratio between the current Io1c and the current Io3c is determined by the ratio between the PMOS transistor M2c and the PMOS transistor M3c. That is, when “M2: M3 = 1: n−1” is set, the output current Io3c is “1 / n” times the output current Io1c.

  Also, the resistance value can be changed by trimming the resistor R3c. The tolerance width Δ1 of the output current Io1c at this time also becomes a tolerance width Δ2 of “1 / n” times when the trimming fuse F1c is cut.

  Next, a constant voltage power supply circuit having a different current generation circuit configuration will be described with reference to FIG. FIG. 3 is a circuit diagram showing a third embodiment of the constant voltage power supply circuit according to the present invention.

  The constant voltage power supply circuit 10a shown in FIG. 3 is different from the constant voltage power supply circuit 10 shown in FIG. 1 in that the current generation circuit 13a includes a PMOS transistor in the current generation circuit 13 of the constant voltage power supply circuit 10 shown in FIG. M3 and the trimming fuse F1 are eliminated, and instead, NMOS transistors M4a and M5a and an NMOS transistor M7a constituting a current mirror circuit are added.

  The drain of the NMOS transistor M7a is connected to the drain of the NMOS transistor M5 via the trimming fuse F1a, and the trimming fuse F1a and the NMOS transistor M7a constitute an operation state switching circuit according to the present invention.

  In the current generating circuit 13a having such a configuration, the drain current I5a of the NMOS transistor M5a and the drain current I7a of the NMOS transistor M7a are both proportional to the drain current of the PMOS transistor M2a.

  Therefore, the relationship between the output voltage Vo and the output current Io before and after cutting the trimming fuse F1a in the constant voltage power supply circuit 10a is the same as the characteristic diagram shown in FIG.

  That is, in the wafer test stage before cutting the trimming fuse F1a, since the sum of the drain current I5a and the drain current I7a is supplied to the resistor R3a, the overcurrent protection operates with the output current Io1 in FIG. When the trimming fuse F1a is cut after the test, only the drain current I5a is obtained. Therefore, the output current at which the overcurrent protection operates becomes the output current Io3, which is larger than the output current Io1 before the cut.

  As in the case of the constant voltage power supply circuit 10 in FIG. 1, when the element size ratio between the NMOS transistor M5a and the NMOS transistor M7a is “1: n−1”, the current value supplied to the resistor R3a by cutting the trimming fuse F1a. Can be multiplied by 1 / n, and the output current at which the overcurrent protection circuit 12a operates can be multiplied by n.

  Fine adjustment of the resistance value of the resistor R3a by trimming is the same as in the case of the constant voltage power supply circuit 10 in FIG.

  Next, a constant voltage power supply circuit provided with another different overcurrent protection circuit configuration will be described with reference to FIGS. FIG. 4 is a circuit diagram showing a fourth embodiment of the constant voltage power supply circuit according to the present invention, and FIG. 5 is an explanatory diagram showing an example of the output voltage and output current characteristics of the constant voltage power supply circuit in FIG. is there.

  The constant voltage power supply circuit 10b shown in FIG. 4 is different from the constant voltage power supply circuit 10 shown in FIG. 1 in that the NMOS in the current generation circuit 13 constituting the overcurrent protection circuit 12 of the constant voltage power supply circuit 10 shown in FIG. The NMOS transistor 4 constituting the current mirror circuit with the transistor M5 is eliminated, and instead, three resistors R4b to R6b connected in series and NMOS transistors M8b and M9b are provided.

  The series-connected resistors R4b to R6b are connected between the drain of the PMOS transistor M2b and the ground.

  The source of the NMOS transistor M8b is grounded, the drain is connected to the connection point between the resistors R6b and R5b, and the gate is connected to the output terminal Voutb.

  The source of the NMOS transistor M9b is also grounded, the drain is connected to the connection point between the resistors R5b and R4b, and the gate is connected to the connection point between the output voltage detection resistor R1b and the output voltage detection resistor R2b.

  FIG. 5 shows the relationship between the output voltage Vob and the output current Iob before and after cutting the trimming fuse F1b in the current generation circuit 13b provided in the overcurrent protection circuit 12b of the constant voltage power supply circuit 10b.

  With the configuration of the current generation circuit 13b shown in FIG. 4, in the overcurrent protection circuit 12b, as shown in FIG. 5, the output current Iob can be reduced stepwise as the output voltage Vob decreases.

  Hereinafter, the operation of the overcurrent protection circuit 12b will be described with reference to FIGS. Since the output voltage Vob is high before the overcurrent protection is activated, the NMOS transistors M8b and M9b are both turned on. That is, the drain of the PMOS transistor M2b is grounded only through the resistor R4b.

  Before the trimming fuse F1b is cut, if the output current Iob increases, the voltage drop in the resistor R4b increases due to the sum of the drain current I2b and the drain current I3b.

  Since the voltage drop of the resistor R4b becomes the gate voltage of the NMOS transistor M5b, when the voltage drop of the resistor R4b increases, the drain current I5b of the NMOS transistor M5b increases and the voltage drop of the resistor R3b increases.

  By increasing the voltage drop of the resistor R3b, the gate voltage of the PMOS transistor M6b is lowered, and the gate voltage (input voltage) of the output transistor M1b is also lowered. As a result, the output current Iob increases.

  When the output current Iob increases and reaches the output current Io1b at which the overcurrent protection circuit 12b operates, the PMOS transistor M6b is turned on. That is, as the output current Iob increases, the current I2b flowing through the PMOS transistor M2b and the current I5b flowing through the NMOS transistor M5b increase, and the voltage drop at the resistor R3b increases. When the gate threshold voltage of the PMOS transistor M6b is exceeded, the PMOS The transistor M6b is turned on.

  In this way, when the PMOS transistor M6b is turned on, the gate voltage (input voltage) of the output transistor M1b is raised, so that the output voltage Vob is lowered and the increase in the output current Iob is suppressed.

  When the output voltage Vob drops to the output voltage Vo1b, first, the NMOS transistor M9b is turned off, and the resistor R5b is added in series to the resistor R4b. As a result, the gate voltage of the NMOS transistor M5b increases, the current I5b flowing through the NMOS transistor M5b, the current I2b flowing through the PMOS transistor M2b and the current flowing through the output transistor M1b decrease, and the output current Iob decreases to the output current Io2b. To do.

  Further, when the output voltage Vob decreases to the output voltage Vo2b, the NMOS transistor M8b is also turned off, and the resistor R6b is added in series to the series resistor R4b and the resistor R5b. As a result, the output current Iob further decreases to the output current Io3b.

  Also in the circuit of this example, in the wafer test stage, the sum current of the drain current I2b of the PMOS transistor M2b and the drain current I3b of the PMOS transistor M3b is supplied to the series resistors R4b to R6b, and the trimming fuse F1b is cut after the wafer test. Thus, the current at which the overcurrent protection circuit 12b operates can be increased as shown by Io1b ′, Io2b ′, and Io3b ′ in FIG.

  Further, the resistance values of the resistors R4b to R6b can be changed by trimming. By trimming the resistance values of the resistors R4b to R6b from the result of the wafer test, the output at which the overcurrent protection circuit 12b operates is output. The currents Io1b to Io3b can be finely adjusted.

  The change in the current amount of the current generation circuit 13b before and after the trimming fuse F1b is cut is determined by the ratio of the element sizes of the PMOS transistor M2b and the PMOS transistor M3b as in the example of FIG.

  As described above with reference to FIGS. 1 to 7, in this example, overcurrent protection that limits the output current values of the output transistors M1, M1a, M1b, and M1c to a predetermined first limit current value or less. In the constant voltage power supply circuit having the circuit, the operation of the overcurrent protection circuit is switched to the first and second operation states by the trimming fuses F1, F1a, F1b, and F1c, and the second operation state is set before the trimming. The first operating state in which the output current of the output transistor is limited to a second limited current value that is less than the first limited current value, and after the trimming, the output current of the output transistor is limited to the first limited current value or less. Switch to. Note that the adjustment amount by trimming of the resistors R3, R3a, and R3c also changes at the same rate before and after trimming of the trimming fuses F1, F1a, F1b, and F1c.

  As a result, for example, in the confirmation test of the overcurrent protection operation in the wafer test stage, the evaluation is performed in the second operation state, trimming after the test, and switching to the second operation state, thereby exceeding the measurement range of the inspection apparatus. Items can be inspected.

  As a result, even in the case of a large overcurrent protection current that cannot be tested by an inspection device, a transistor having a large element size is not required as in the prior art, and no additional test terminals are required, and testing is performed without increasing the circuit size. It becomes possible. Thereby, size reduction of electronic devices, such as a mobile telephone using the constant voltage power supply circuit of this example, can be achieved.

  In addition, this invention is not limited to the example demonstrated using FIGS. 1-7, A various change is possible in the range which does not deviate from the summary. For example, in this example, the embodiment applied to the overcurrent maintaining circuit of the constant voltage power supply circuit has been described. However, the present invention is not limited to the above application example but can be applied to various circuits. Furthermore, the condition for switching the operation state by trimming is not limited to the output current, and may be other conditions.

1 is a circuit diagram illustrating a first configuration example of a constant voltage power supply circuit according to the present invention. It is explanatory drawing which shows the example of a characteristic of the output voltage and output current of the constant voltage power supply circuit in FIG. It is a circuit diagram which shows the 3rd Example of the constant voltage power supply circuit which concerns on this invention. It is a circuit diagram which shows the 4th Example of the constant voltage power supply circuit which concerns on this invention. FIG. 5 is an explanatory diagram illustrating a characteristic example of an output voltage and an output current of the constant voltage power supply circuit in FIG. 4. It is a circuit diagram which shows the 2nd Example of the constant voltage power supply circuit which concerns on this invention. It is explanatory drawing which shows the example of a characteristic of the output voltage and output current of the constant voltage power supply circuit in FIG. It is a circuit diagram which shows the structural example of the conventional constant voltage power supply circuit.

Explanation of symbols

  10, 10a, 10b, 10c: constant voltage power supply circuit, 11, 11a, 11b, 11c: error amplification circuit, 12, 12a, 12b, 12c: overcurrent protection circuit, 13, 13a, 13b, 13c: current generation circuit, 20, 20a, 20b, 20c: load, M1, M1a, M1b, M1c: output transistor, M2, M2a, M2b, M2c, M3, M3b, M3c, M6, M6a, M6b, M6c: PMOS transistor, M4, M4a, M4b, M4c, M5, M5a, M5b, M5c, M7a, M8b, M9b: NMOS transistors, R1, R1a, R1b, R1c, R2, R2a, R2b, R2c, R3b: resistors, R3, R3b, R3c, R4b, R5b , R6b: Resistor (trimmable), F1, F1a, F1b, F1c: Trimming fuse Vdd, Vdda, Vddb, Vddc: power input terminal, Vout, Vouta, Voutb, Voutc: output terminal, Vo, Voa, Vob, Voc: output voltage, Vr, Vra, Vrb, Vrc: reference voltage, Io, Ioa, Iob , Ioc: output current, 81: constant voltage power supply circuit, 82: constant voltage circuit, 83: overcurrent protection circuit, 11d: error amplifier circuit, M1d: output transistor, M2d, M6d, M10d: PMOS transistor, M4d, M5d: NMOS transistor, R1d, R2d, R3d, R4d: resistor, Vddd: power input terminal, Voutd: output terminal, Vod: output voltage, Vrd: reference voltage, Iod: output current.

Claims (11)

A constant voltage power supply circuit including an overcurrent protection circuit that limits an output current value of an output transistor to a predetermined first limit current value or less,
An operation state switching circuit for switching the operation of the overcurrent protection circuit to the first and second operation states by trimming;
The operation state switching circuit limits the output current of the output transistor to a second limit current value less than the first limit current value as a second operation state before trimming, and outputs the output after trimming. A constant voltage power supply circuit, wherein the output current of the transistor is switched to a first operation state that limits the output current to a value equal to or less than the first limit current value. When the output current value of the output transistor increases beyond a predetermined first limit current value, the output current value of the output transistor is reduced by suppressing the increase in the input voltage of the output transistor. A constant voltage power supply circuit having an overcurrent protection circuit for limiting to a value below,
The overcurrent protection circuit
A current generation circuit that generates and outputs a current proportional to the output current of the output transistor;
A current-voltage conversion circuit that converts the proportional current output from the current generation circuit into the input voltage of the output transistor;
The current generation circuit is
An operation state switching circuit for changing the value of the proportional current to be generated by trimming;
The operating state switching circuit is
Before trimming, the constant current power supply is characterized in that the proportional current value with respect to the output current is changed so as to limit the output current of the output transistor to a second limit current value less than the first limit current value. circuit. The constant voltage power supply circuit according to claim 2,
The current generation circuit is
Comprising a current mirror circuit composed of a plurality of transistors;
The sum of the output currents of a plurality of transistors constituting the current mirror circuit is output to the current-voltage conversion circuit as the proportional current,
The operation state switching circuit is
A constant voltage power supply circuit characterized by changing the value of the proportional current by changing the number of transistors constituting the current mirror circuit by the trimming. The constant voltage power supply circuit according to claim 2,
The current generation circuit is
A first transistor that generates and outputs a current proportional to the output current of the output transistor;
A current mirror circuit that outputs a current corresponding to the current output from the first transistor to the current-voltage conversion circuit;
The operation state switching circuit is
A constant voltage power supply circuit comprising: a second transistor connected to form a current mirror circuit with the first transistor; and a trimming fuse connected in series to the second transistor. The constant voltage power supply circuit according to claim 2,
The current generation circuit is
A first transistor that generates and outputs a current proportional to the output current of the output transistor;
A current mirror circuit that outputs a current corresponding to the current output from the first transistor to the current-voltage conversion circuit;
The operation state switching circuit is
A second transistor connected to form a current mirror circuit with the first transistor; a resistor connected to the gate of the second transistor; and a gate connected to the source of the second transistor. A constant voltage power supply circuit comprising a trimming fuse. The constant voltage power supply circuit according to claim 2,
The current generation circuit is
A first transistor that generates and outputs a current proportional to the output current of the output transistor;
A current mirror circuit that outputs a current corresponding to the current output from the first transistor to the current-voltage conversion circuit;
The operation state switching circuit is
A constant voltage power supply circuit comprising: a second transistor connected in parallel with one of the transistors constituting the current mirror circuit; and a trimming fuse connected in series with the second transistor. A constant voltage power supply circuit according to any one of claims 2 to 6,
The current-voltage conversion circuit is
A resistor whose resistance value is variable by trimming, which generates a voltage drop by the proportional current output from the current generation circuit,
A transistor that changes the input voltage of the output transistor according to a voltage drop generated by the resistor,
A constant voltage power supply circuit characterized by finely adjusting a current value of an output current at which the overcurrent protection circuit operates to fall within a predetermined tolerance range by trimming the resistor. The constant voltage power supply circuit according to claim 2,
The output transistor is a PMOS transistor,
The current generation circuit is
A first PMOS transistor that generates and outputs a current proportional to the output current of the output transistor;
A first resistor, a second resistor and a third resistor, which are connected in series in order from the source of the first PMOS transistor to the ground, between the source of the first PMOS transistor and the ground;
A gate is connected to a connection point between the first resistor and the source of the first PMOS transistor, and a current corresponding to the current output from the first PMOS transistor is output to the current-voltage conversion circuit. NMOS transistors of
A drain is connected to a connection point with the first and second resistors, a source is grounded, and a gate is connected in series to an output terminal of the output transistor for detecting an output voltage, respectively. A second NMOS transistor that is turned off when the voltage at the output terminal of the output transistor drops to a predetermined first threshold,
The drain is connected to the connection point with the second and third resistors, the source is grounded, the gate is connected to the output terminal of the output transistor, and the voltage value of the output terminal is higher than the first threshold value. A third NMOS transistor that turns off when a low second threshold is exceeded,
The second and third NMOS transistors are turned on until the voltage at the output terminal of the output transistor drops to a predetermined first threshold, and the drain of the first NMOS transistor is connected to the first resistor. Through the ground,
As the operation state switching circuit,
A constant voltage power supply comprising: a second PMOS transistor connected to form a current mirror circuit with the first PMOS transistor; and a trimming fuse connected in series to the second PMOS transistor. circuit. A test method for a constant voltage power supply circuit according to any one of claims 1 to 8,
Testing the operation of limiting the output current of the output transistor below the second limit current value before trimming in the operation state switching circuit;
A test method for a constant voltage power supply circuit, wherein trimming is performed in the operation state switching circuit after the test. A test method for a constant voltage power supply circuit according to claim 7,
A test of an operation for limiting the output current of the output transistor to the second limit current value or less before trimming in the operation state switching circuit;
During the test, fine adjustment of the current value of the output current at which the overcurrent protection circuit operates by trimming the trimming resistor in the current-voltage conversion circuit,
A test method for a constant voltage power supply circuit, wherein trimming is performed in the operation state switching circuit after the test.   An electronic apparatus comprising the constant voltage power supply circuit according to claim 1.

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