JP2008198905A - Ceramic substrate, manufacturing method of ceramic circuit board, aggregate substrate and semiconductor module - Google Patents

Ceramic substrate, manufacturing method of ceramic circuit board, aggregate substrate and semiconductor module Download PDF

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JP2008198905A
JP2008198905A JP2007034561A JP2007034561A JP2008198905A JP 2008198905 A JP2008198905 A JP 2008198905A JP 2007034561 A JP2007034561 A JP 2007034561A JP 2007034561 A JP2007034561 A JP 2007034561A JP 2008198905 A JP2008198905 A JP 2008198905A
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substrate
ceramic
circuit board
pitch
depth
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Hiroyuki Tejima
博幸 手島
Yasuo Sawano
泰夫 澤野
Junichi Watanabe
渡辺  純一
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Proterial Ltd
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Hitachi Metals Ltd
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/362Laser etching
    • B23K26/364Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/40Removing material taking account of the properties of the material involved
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00Materials to be soldered, welded or cut
    • B23K2103/50Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/52Ceramics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Laser Beam Processing (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem of chipping defects, or the like, generated at the corner part or chamfered part of a ceramic substrate, and to provide the ceramic substrate or the like with a high yield and superior dimensional accuracy at low cost. <P>SOLUTION: In the ceramic substrate provided with a plurality of recessed parts on at least one side face of the substrate, the depth of the recessed parts near the corner part of the side face is larger than the depth of the recessed parts on the center part side of the side face and/or the pitch of the recessed parts near the corner part of the side face is narrower than the pitch of the recessed parts on the center part side of the side face. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、主に大電力半導体モジュールに用いられるセラミックス基板に関し、この基板を用いたセラミックス回路基板及びこのセラミックス回路基板の製造方法などに関する。   The present invention relates to a ceramic substrate mainly used in a high-power semiconductor module, and relates to a ceramic circuit substrate using the substrate, a method for manufacturing the ceramic circuit substrate, and the like.

現在、車両用分野や産業機械分野または民生用機器等の制御用電装部品には、種々のセラミックス基板またはセラミックス回路基板が用いられている。前記の主用途を例にとるとセラミックス回路基板の場合、前記回路基板に搭載されたPN接合構造を有する発熱素子(以下では半導体素子または素子と表現することもある)、が安定に動作するように前記素子から発生する熱を、前記回路基板を経由して放熱する働きと、素子を放熱部材と電気的に絶縁する働きをする。これは逆に外部からの熱を吸収する際にも用いることができる特性である。特にパワーモジュール素子を用いた大電力用途を例にすると、素子からの大量の発熱と、高温多湿な過酷な稼動環境において動作信頼性を確保するために、前記回路基板を経由して流れてきた熱を、前記回路基板と接続された熱伝導率の良好なベース板や冷却フィンと言われる放熱部材へ逃がし、最終的に冷却水や大気中に熱を放出し、かつ前記素子と放熱部材を電気的に絶縁させる重要な働きをする。これは既に拡大の一途をたどる、EV、HEV、燃料電池車、ディーゼルハイブリッド用のダイオード、IGBT、GTO、MOS−FETの各種素子やバイオ混合燃料を用いた車両等の用途への適用拡大も期待される。更に薄いセラミックス基板で誘電損失の小さい材料においては、素子に作用するノイズ低減効果も期待でき、また公共交通機関車両の用途や、大電力を扱うSMES電量貯蔵装置のサイリスタ装置システムなどにも利用可能である。このような半導体では年々要求される動作電圧・電流や動作周波数は増加する傾向をしめしている。したがって前記のようなモジュールに用いられるセラミックス基板やセラミックス回路基板には高放熱性と高い信頼性が求められている。   At present, various ceramic substrates or ceramic circuit substrates are used for control electrical components in the field of vehicles, industrial machinery or consumer equipment. Taking the main application as an example, in the case of a ceramic circuit board, a heating element having a PN junction structure mounted on the circuit board (hereinafter also referred to as a semiconductor element or an element) seems to operate stably. And radiates the heat generated from the element through the circuit board and electrically insulates the element from the heat radiating member. This is a characteristic that can also be used when absorbing heat from the outside. Especially in the case of high power applications using power module elements, a large amount of heat is generated from the elements, and it has flowed through the circuit board in order to ensure operation reliability in a severe operating environment of high temperature and humidity. The heat is released to a base plate with good thermal conductivity connected to the circuit board and a heat radiating member called a cooling fin, and finally heat is released into cooling water and the atmosphere. It plays an important role in electrically insulating. This is already expanding and expected to be expanded to EVs, HEVs, fuel cell vehicles, diesel hybrid diodes, IGBT, GTO, MOS-FET elements and vehicles using bio-mixed fuel. Is done. In addition, a thin ceramic substrate with low dielectric loss can be expected to reduce noise acting on the element. It can also be used for public transportation vehicles and SMES energy storage thyristor systems that handle high power. It is. In such semiconductors, operating voltages / currents and operating frequencies required year by year tend to increase. Therefore, high heat dissipation and high reliability are required for ceramic substrates and ceramic circuit substrates used in such modules.

現在では前記セラミックス基板として、電気的に高耐絶縁性と高熱伝導率を有する窒化物基板や硼化物基板(例えばcBN)、焼結ダイヤ、ベリリア等の基板や、ダイヤモンドライクカーボン(DLC)膜、ダイヤモンド薄膜を被覆したセラミックス基板の多用が増加している。また酸化物であるアルミナ、ジルコニア、ムライト基板を用いた回路基板の利用もコスト低減効果により従来より使用されている。中でも熱伝導率の優れた硼化物基板、窒化アルミ基板や、強度・靭性に優れた窒化珪素基板は、信頼性の観点から今後の需要拡大が注目されつつある。   At present, as the ceramic substrate, a nitride substrate, a boride substrate (for example, cBN), a sintered diamond, a beryllia, or the like having high electrical insulation resistance and high thermal conductivity, a diamond-like carbon (DLC) film, The use of ceramic substrates coated with diamond thin films is increasing. In addition, the use of circuit boards using alumina, zirconia, and mullite substrates, which are oxides, has been conventionally used because of cost reduction effects. Of these, boride substrates, aluminum nitride substrates with excellent thermal conductivity, and silicon nitride substrates with excellent strength and toughness are attracting attention in the future from the viewpoint of reliability.

前記セラミックス回路基板は、上述の主用途に関しては、一方の面に電気回路となる金属回路板を接合し、他方の面に放熱用の金属放熱板を接合した構造で使用される。また前記金属板には熱伝導性の良好な銅又はアルミニウムを主成分とした金属板や、多孔質物質と前記金属の複合体等を用いて、ろう材による活性金属法や、拡散接合法、直接接合するいわゆるDBAやDBCといった方法や、高熱伝導性のはんだやグリースや接着剤等でセラミックス基板と接合される。また金属回路板には電気回路がエッチング等により形成され、各種素子や外部との電気信号の授受を行うための端子やワイヤー等が接続される。更に、このセラミックス回路基板の金属放熱板は、既述したベース板や冷却フィン等の放熱部材に固着した状態や、または前記固着体がモジュールに組み込まれた形で使用される。   The ceramic circuit board is used in a structure in which a metal circuit board serving as an electric circuit is bonded to one surface and a metal heat radiating plate for heat dissipation is bonded to the other surface with respect to the main application described above. In addition, the metal plate is a metal plate mainly composed of copper or aluminum with good thermal conductivity, a porous material and a composite of the metal, etc., an active metal method using a brazing material, a diffusion bonding method, It is joined to the ceramic substrate by a method such as so-called DBA or DBC which is directly joined, or by a highly heat conductive solder, grease or adhesive. In addition, an electric circuit is formed on the metal circuit board by etching or the like, and terminals, wires, and the like for transmitting / receiving electric signals to / from various elements and the outside are connected. Further, the metal heat radiating plate of the ceramic circuit board is used in a state of being fixed to a heat radiating member such as the base plate or the cooling fin described above, or in a form in which the fixing body is incorporated in the module.

ここで、前記セラミックス基板(以下では単に基板と表現することもある。)や、セラミックス回路基板(以下では単に回路基板と表現することもある。)は、製品基板サイズにもよるが、一般には多数個取りで製造される。この多数個取りは、一般には一辺が50〜300mmサイズの一枚の集合基板から複数の基板を製造するもので、顧客先または製造工程の最終段階で個々小片の基板もしくは回路基板に分割し使用される。ところが、この分割工程において、各種の割れ不良形態が認められることも事実である。図12(a)に集合基板の一例を示す。尚、図中の破線は製造途中において、集合基板に形成した格子状の分割溝である。この分割溝はレーザー加工やブラスト加工などで形成することができる。また、分割溝の形態は分割したい線に沿って直線状に連続または断続的な点状の孔(貫通孔または非貫通孔)で構成される。レーザー加工の場合、スクライビング加工と呼ばれ、レーザーパルスにより分割したい線に沿って分割溝が最深部に曲率を有する円錐形状の孔(大部分は非貫通孔)で形成される(特許文献6参照)。強度・靭性の低いアルミナやヘキ開性の強い材料等では分割不良は殆ど問題とはならないが、特に強度・靭性の高い材料(例えば窒化珪素質材料)においては、あらかじめ集合基板に導入しておいた分割溝に沿って割れずに、製品に対して凹凸状の欠け不良を生じることが多い。   Here, the ceramic substrate (hereinafter sometimes simply referred to as a substrate) and the ceramic circuit substrate (hereinafter also simply referred to as a circuit substrate) generally depend on the size of the product substrate. Manufactured in multiple pieces. This multi-cavity manufacturing is generally used to manufacture a plurality of substrates from a single collective substrate with a size of 50 to 300 mm on a side, and is used by dividing it into individual pieces of substrates or circuit boards at the customer's end or the final stage of the manufacturing process. Is done. However, it is also true that various cracking defects are recognized in this dividing step. FIG. 12A shows an example of the collective substrate. Note that broken lines in the figure are lattice-shaped dividing grooves formed on the collective substrate during manufacture. This dividing groove can be formed by laser processing, blast processing, or the like. Further, the shape of the dividing groove is constituted by a continuous or intermittent dot-like hole (through hole or non-through hole) linearly along a line to be divided. In the case of laser processing, it is called scribing processing, and a dividing groove is formed by a conical hole (mostly a non-through hole) having a curvature at the deepest portion along a line to be divided by a laser pulse (see Patent Document 6). ). Inadequate partitioning is not a problem for materials such as alumina with low strength and toughness or materials with strong cleavage, but especially for materials with high strength and toughness (for example, silicon nitride materials), they are introduced into the aggregate substrate in advance. In many cases, uneven chipping defects are generated in the product without breaking along the divided grooves.

例えば、図12(b)(e)に示すように基板に食い込む凹状欠け不良10や(c)(d)(f)(g)に示すように基板に欠け残りが生じる凸状欠け不良11である。またこの割れ不良は分割工程のみならず、金属板を接合する工程から金属回路板に回路等を形成する工程間で、セラミックス基板に生じる接合残留応力が原因で生じる場合もある。仮に前記工程間でクラックが多少生じても、分割溝に沿ってクラックが進展すれば問題はないが、基板側へクラックが伸展するのは問題である。以上のことから基板分割工程での割れ不良は全体の歩留を低下させてしまう。   For example, as shown in FIGS. 12B and 12E, a concave chip defect 10 that bites into the substrate and a convex chip defect 11 that causes a chipping residue on the substrate as shown in FIGS. 12C, 12D, F, and G). is there. Moreover, this crack defect may be caused not only by the dividing process but also by the bonding residual stress generated in the ceramic substrate between the process of bonding the metal plate and the process of forming a circuit or the like on the metal circuit board. Even if some cracks are generated between the processes, there is no problem if the cracks propagate along the dividing grooves, but the cracks extend to the substrate side. From the above, a crack defect in the substrate dividing process reduces the overall yield.

ところで、上記分割溝はレーザー加工を例に挙げると、加工時間短縮、加工費削減と強度低下を解決するためにスクライビング加工で形成するのが一般的である。レーザー切断加工により完全に切断することも可能ではあるが、切断加工時の熱応力により、冷却用のガスを吹き付けてはいるものの、耐熱性のある窒化珪素基板ですらマイクロクラックが入ってしまい切断面近傍の基板強度を著しく低下させてしまうからである。尚、本発明ではスクライビング加工と区別するために、完全に切り離し加工する場合を切断加工と表現する。
また、セラミックス基板の角部にC、R等の面取り加工(以下では単に面取りと表現することもある。)が必要な場合、全てをスクライビング加工で形成した場合は、面取り部の分割除去に手間もかかり、また新たな不良を生じる可能性がある。一方、分割後にC、R等の面取り加工部を単純に実施してもよいが、工数が増加し、コスト増加は避けがたい。したがって集合基板の状態で面取りをすることが好ましい。そのため面取り部及びその近傍部の加工には工夫が必要である。
By the way, the above-mentioned divided grooves are generally formed by scribing to reduce processing time, processing cost, and strength, taking laser processing as an example. Although it is possible to cut completely by laser cutting, even a heat-resistant silicon nitride substrate has microcracks, although it is sprayed with a cooling gas due to thermal stress during the cutting process. This is because the substrate strength in the vicinity of the surface is significantly reduced. In the present invention, in order to distinguish from the scribing process, the case of completely separating is expressed as a cutting process.
In addition, when chamfering such as C or R is required at the corners of the ceramic substrate (hereinafter sometimes simply referred to as chamfering), if all of them are formed by scribing, it is troublesome to remove the chamfered parts. And may cause new defects. On the other hand, the chamfered parts such as C and R may be simply implemented after the division, but the number of man-hours increases and the increase in cost is unavoidable. Therefore, it is preferable to chamfer the aggregate substrate. Therefore, a device is required for processing the chamfered portion and the vicinity thereof.

さて、本発明に関与する従来技術としては以下の6件の特許文献が挙げられる。
先ず、特許文献1では、導体ペーストを印刷、熱処理し、回路形成する際の熱応力による、セラミックス基板端部からの自然発生的なクラック抑制を目的にしている。しかしながら、本発明のように金属板を接合する用途では基板に加わる残留熱応力は遥かに大きく、特許文献1の熱応力と同等にみることは出来ない。
The following six patent documents are listed as conventional techniques related to the present invention.
First, Patent Document 1 aims to suppress spontaneous cracks from the edge of a ceramic substrate due to thermal stress when a conductor paste is printed, heat-treated, and a circuit is formed. However, in the application of joining metal plates as in the present invention, the residual thermal stress applied to the substrate is much larger and cannot be seen to be equivalent to the thermal stress of Patent Document 1.

特許文献2では、スクライビング加工時の孔をオーバーラップ加工することが開示されている。これによりレーザー加工時間の短縮を目的としているが、多数個取りの集合基板や基板材料によっては必ずしも短縮できるとは限らない。   In Patent Document 2, it is disclosed to overlap a hole during scribing. This aims at shortening the laser processing time, but it cannot always be shortened depending on the multi-piece collective substrate and the substrate material.

特許文献3では、基板表面にあらかじめ所定厚さの保護膜を形成し、レーザーによるスクライビング加工時の被加工物の飛散付着を防止すると共に、ヒューム(加工孔外周の分解生成物等による盛り上がり)の発生を抑えることが開示されている。しかしながら、分割時の欠け不良等については言及されていない。   In Patent Document 3, a protective film having a predetermined thickness is formed in advance on the surface of the substrate to prevent the workpiece from being scattered and adhered during the scribing process with a laser, and fume (swelling due to decomposition products on the outer periphery of the processing hole). It is disclosed to suppress the occurrence. However, there is no mention of chipping defects at the time of division.

特許文献4では、レーザーによるスクライビング加工を実施した基板側面の表面粗度を規定するものである。しかしながら、文献に記載されたRa、Rmaxを満たすためには、レーザー加工以外の研磨または研削工程等が必要となり、逆に製造工数増加を招くことになる。   In Patent Document 4, the surface roughness of the side surface of the substrate on which scribing by laser is performed is specified. However, in order to satisfy Ra and Rmax described in the literature, a polishing or grinding process other than laser processing is required, and conversely, the number of manufacturing steps is increased.

特許文献5では、分割時の寸法不具合を改善する目的で、スクライビング加工を基板の表裏に導入する方法が開示されている。しかしながら、加工時間と工数は2倍になり加工コストが増加し、しかも基板上下のスクライブラインの位置合わせ精度の向上が必須となる。   Patent Document 5 discloses a method of introducing scribing processing on the front and back of a substrate for the purpose of improving dimensional defects at the time of division. However, the processing time and the man-hour are doubled, the processing cost is increased, and it is essential to improve the alignment accuracy of the scribe lines above and below the substrate.

特許文献6では、スクライビング加工の条件が詳細に検討されているものの分割時の欠け不良等については言及されておらず、角部や面取り部近傍での欠け不良等が生じないとは考え難い。 In Patent Document 6, although the scribing process conditions are studied in detail, the chipping defect or the like at the time of division is not mentioned, and it is difficult to think that the chipping defect or the like near the corner or the chamfered part does not occur.

特開平11−74065号公報Japanese Patent Laid-Open No. 11-74065 特開2000−44344公報JP 2000-44344 A 特開2003−285192公報JP 2003-285192 A 特開2003−31733公報JP 2003-31733 A 特開2003−31731公報JP 2003-31731 A 特開2002−176119公報JP 2002-176119 A

以上のように、従来、セラミックス基板の角部や面取り部に発生する欠け不良等に着目し、この問題を解決する手段は提供されていない。特に、多数個取りの集合基板での歩留まり改善(加工時間短縮含む)と寸法精度の安定化と共に欠け不良問題を解決することは出来ていなかった。
そこで、本発明は係る問題点に鑑み、セラミックス基板の角部や面取り部に発生する欠け不良等の問題を解消すると共に、低コストで高歩留まりと良好な寸法精度を有するセラミックス基板とこれを用いたセラミックス回路基板の製造方法と半導体モジュール、更にこれらの原型となる集合基板を提供することを目的とするものである。
As described above, conventionally, a means for solving this problem has not been provided by paying attention to chipping defects and the like generated at the corners and chamfered portions of the ceramic substrate. In particular, it has not been possible to solve the chip defect problem as well as yield improvement (including shortening of processing time) and stabilization of dimensional accuracy in a multi-piece collective substrate.
In view of the above problems, the present invention eliminates problems such as chipping defects occurring at corners and chamfers of ceramic substrates, and uses a ceramic substrate having high yield and good dimensional accuracy at low cost. It is an object of the present invention to provide a method for manufacturing a ceramic circuit board, a semiconductor module, and a collective substrate as a prototype of these.

本発明は、基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面の中央部側の凹部の深さよりも当該側面の角部近傍の凹部の深さが深くなっているセラミックス基板である。
このセラミックス基板において、前記凹部はスクライビング加工等による未貫通孔(スクライビング孔)の痕跡であるが、この孔の深さを変則的に変えることによって、欠け不良が生じ易い角部近傍の未貫通孔底部の応力集中を大きくして、分割線に沿って精度良くきれいに割ることができ欠け不良の無いセラミックス基板となる。尚、本発明において「側面の中央部側」とは具体的な位置を指すものではなく、角部近傍の凹部深さと比較して相違している部分の存在を指している。このことは以下の記載において同様である。
In the ceramic substrate in which a plurality of recesses are provided on at least one side surface of the substrate, the depth of the recesses near the corners of the side surfaces is deeper than the depth of the recesses on the center side side of the side surfaces. It is a ceramic substrate.
In this ceramic substrate, the concave portion is a trace of a non-through hole (scribing hole) by scribing or the like, but by changing the depth of this hole irregularly, a non-through hole in the vicinity of a corner portion where defects are likely to occur. By increasing the stress concentration at the bottom, the ceramic substrate can be cracked accurately and accurately along the dividing line, resulting in a ceramic substrate free from chipping defects. In the present invention, the “side central portion side” does not indicate a specific position but indicates the presence of a portion that is different from the depth of the recess near the corner. This is the same in the following description.

本発明は、基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面側の中央部の凹部のピッチよりも当該側面の角部近傍の凹部のピッチが狭くなっているセラミックス基板である。
このように孔のピッチを変則的に変えることによっても、欠け不良が生じ易い角部近傍の未貫通孔底部の応力集中を大きくし、分割線に沿って精度良くきれいに割ることができ欠け不良の無いセラミックス基板を得ることが出来る。
According to the present invention, in a ceramic substrate in which a plurality of recesses are provided on at least one side surface of the substrate, the pitch of the recesses near the corners of the side surface is narrower than the pitch of the recesses in the central portion on the side surface side. It is a ceramic substrate.
By irregularly changing the pitch of the holes in this way, the stress concentration at the bottom of the non-through holes near the corners where chipping defects are likely to occur can be increased, and the cracks can be cracked accurately and accurately along the dividing line. It is possible to obtain a ceramic substrate that does not exist.

本発明は、基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面の中央部側の凹部の深さよりも当該側面の角部近傍の凹部の深さが深くなっており、且つ前記側面の中央部側の凹部のピッチよりも当該側面の角部近傍の凹部のピッチが狭くなっているセラミックス基板である。
本発明では孔の深さあるいは孔のピッチを夫々変えることで上記効果を得ることが出来るが、孔の深さとピッチを同時に変則的に変えることにより、より効果的な結果を得ることが出来る。
In the ceramic substrate in which a plurality of recesses are provided on at least one side surface of the substrate, the depth of the recesses near the corners of the side surfaces is deeper than the depth of the recesses on the center side side of the side surfaces. And the pitch of the recesses in the vicinity of the corners of the side surface is narrower than the pitch of the recesses on the central side of the side surface.
In the present invention, the above effect can be obtained by changing the hole depth or the hole pitch, respectively, but more effective results can be obtained by simultaneously changing the hole depth and the pitch irregularly.

本発明のセラミックス基板において、前記基板の少なくとも1つの側面の角部に板厚方向に貫通する面取り部を形成することは望ましい。この面取り部の形態としてはC状あるいはR状が考えられる。
かかる構成によれば、欠け不良がより生じ易い角部が無くなり、ここに面取り部による空間が設けられるので、集合基板から分割する際に割り易く欠け不良も生じ難い。
In the ceramic substrate of the present invention, it is desirable to form a chamfered portion penetrating in the thickness direction at a corner portion of at least one side surface of the substrate. As the shape of the chamfered portion, a C shape or an R shape can be considered.
According to such a configuration, there is no corner portion where chipping defects are more likely to occur, and a space is provided by the chamfered portion, so that it is easy to split when dividing from the aggregate substrate, and chipping defects are unlikely to occur.

本発明のセラミックス基板において、前記基板の少なくとも1つの側面の角部に貫通孔による凹部を形成することができる。
かかる構成は、面取り部の代わりに貫通孔を形成するもので、短時間で効率的に面取り部の効果を得ることが出来る。また、極小さな面取りが必要な場合に有効である。
In the ceramic substrate of the present invention, a concave portion by a through hole can be formed in a corner portion of at least one side surface of the substrate.
Such a configuration forms a through hole instead of the chamfered portion, and can effectively obtain the effect of the chamfered portion in a short time. It is also effective when extremely small chamfering is required.

本発明は、上記した何れかのセラミックス基板の一面に金属回路板を設け、他面に金属放熱板を設けてなるセラミックス回路基板となし、前記金属回路板には半導体素子が搭載され、前記金属放熱板には冷却部材が固定されて用いられる半導体モジュールである。
セラミックス基板には金属回路板と金属放熱板を接合してセラミックス回路基板となすが、これらの接合工程において基板には熱収縮による引張り応力が作用する。しかし、本発明では角部近傍に設けた変則的なスクライビング加工面や面取り切断加工面があることによって前記応力等によるクラックの発生を抑制することができる。尚、前記セラミックス基板の板厚は0.63mm以下が一般的であり、材料は窒化ケイ素基板であることが望ましい。
The present invention is a ceramic circuit board in which a metal circuit board is provided on one surface of any one of the ceramic substrates described above and a metal heat sink is provided on the other surface, and a semiconductor element is mounted on the metal circuit board, It is a semiconductor module that is used with a cooling member fixed to the heat sink.
A ceramic circuit board is formed by bonding a metal circuit board and a metal heat radiating plate to the ceramic substrate. In these bonding processes, tensile stress due to thermal contraction acts on the substrate. However, in the present invention, the occurrence of cracks due to the stress or the like can be suppressed by the presence of an irregular scribing surface or chamfered cutting surface provided near the corner. The plate thickness of the ceramic substrate is generally 0.63 mm or less, and the material is preferably a silicon nitride substrate.

本発明は、セラミックス焼結体に複数の未貫通孔からなる格子状の分割溝をスクライビング加工で形成し、多数個取りの集合基板を形成する工程と、前記集合基板の未貫通孔が交差する角部に板厚方向に貫通する面取り部を切断加工で形成する工程と、前記集合基板に金属回路板および/または金属放熱板を接合する工程と、前記集合基板に金属回路板および/または金属放熱板を個々のセラミックス基板毎に加工する工程と、前記分割溝に沿って前記集合基板を破断して個々のセラミックス回路基板に分離する工程とを有するセラミックス回路基板の製造方法である。
本発明の製造方法によれば、集合基板に対しスクライビング加工の分割線と切断加工の面取り部とを夫々形成し、この集合基板の表裏に回路板と放熱板用の金属板を接合し、複数個の基板に対して一度に回路板と放熱板を加工することでセラミックス回路基板の集合体となし、その後、個々の基板に分割するものであるから、欠けやクラック等の分割不良が低減すると共に全体の製造歩留まりが向上する。
According to the present invention, a step of forming a grid-like divided groove comprising a plurality of non-through holes in a ceramic sintered body by scribing to form a multi-piece collective substrate intersects with the non-through holes of the collective substrate. A step of forming a chamfered portion penetrating the corner portion in the plate thickness direction by cutting, a step of bonding a metal circuit board and / or a metal heat sink to the aggregate substrate, and a metal circuit board and / or metal to the aggregate substrate A method for manufacturing a ceramic circuit board, comprising: a step of processing a heat dissipation plate for each ceramic substrate; and a step of breaking the aggregate substrate along the divided grooves to separate the ceramic substrate into individual ceramic circuit boards.
According to the manufacturing method of the present invention, a dividing line for scribing and a chamfered portion for cutting are formed on the collective substrate, respectively, and a circuit board and a heat sink metal plate are joined to the front and back of the collective substrate. A circuit board and a heat sink are processed into a single substrate to form an assembly of ceramic circuit boards, which are then divided into individual boards, thus reducing defects such as chipping and cracking. At the same time, the overall manufacturing yield is improved.

本発明のセラミックス基板の製造方法において、前記複数の未貫通孔からなる分割溝を形成する際、基板の側面の中央部側に相当する深さよりも当該側面の角部近傍の深さを深く、及び/又は前記側面の中央部側に相当するピッチよりも当該側面の角部近傍のピッチを狭く形成することができる。
また、本発明のセラミックス基板の製造方法において、前記面取り部を形成する代わりに貫通孔を形成することもできる。
また、前記集合基板には捨て代となる余肉部が設けられており、この余肉部にも面取り部を切断加工で形成することは望ましい。
In the method for manufacturing a ceramic substrate of the present invention, when forming the divided groove composed of the plurality of non-through holes, the depth near the corner portion of the side surface is deeper than the depth corresponding to the center side of the side surface of the substrate, And / or the pitch in the vicinity of the corner portion of the side surface can be formed narrower than the pitch corresponding to the central portion side of the side surface.
Further, in the method for manufacturing a ceramic substrate of the present invention, a through hole can be formed instead of forming the chamfered portion.
The aggregate substrate is provided with a surplus portion to be discarded, and it is desirable to form a chamfered portion in this surplus portion by cutting.

本発明は、セラミックス焼結体に複数の未貫通孔からなる格子状の分割溝をスクライビング加工で形成した多数個取りの集合基板であって、前記分割溝の最外周に捨て代となる余肉部を設け、当該余肉部にも面取り加工部が設けられている集合基板である。
かかる構成によれば、余肉部があるので基板強度を確保できるスクライビング加工が可能となり、また余肉部と分割線を挟んで隣接したセラミックス基板および/またはセラミックス回路基板の分割時の欠け不良を低減することができる。
The present invention relates to a multi-piece collective substrate formed by scribing a grid-like divided groove composed of a plurality of non-through holes in a ceramic sintered body, and has a surplus margin that is discarded at the outermost periphery of the divided groove This is a collective substrate in which a chamfered portion is also provided in the surplus portion.
According to this configuration, since there is a surplus portion, scribing can be performed to ensure the substrate strength, and chipping defects at the time of division of the ceramic substrate and / or the ceramic circuit substrate adjacent to the surplus portion with the dividing line therebetween can be prevented. Can be reduced.

本発明によれば、集合基板から基板を分割する時に生じる欠け不良や接合工程で発生するクラック不良を低減することができる。よって、低コストで歩留に優れ、良好な寸法精度を有するセラミックス基板およびセラミックス回路基板の製造方法、集合基板を提供できる。また、信頼性と放熱性に優れた特にパワー半導体分野における半導体モジュールを実現することができる。   ADVANTAGE OF THE INVENTION According to this invention, the chip defect produced when dividing | segmenting a board | substrate from an aggregate substrate and the crack defect generate | occur | produced in a joining process can be reduced. Therefore, it is possible to provide a ceramic substrate, a method for manufacturing a ceramic circuit substrate, and a collective substrate that are low in cost, excellent in yield, and have good dimensional accuracy. In addition, it is possible to realize a semiconductor module that is excellent in reliability and heat dissipation, particularly in the power semiconductor field.

以下、本発明について具体的な実施形態を示しながら説明する。ただし、本発明はこれらの実施形態に限定されるものではない。尚、図面において同一部材については同一符号を付し、その説明を省略する場合もある。   The present invention will be described below with reference to specific embodiments. However, the present invention is not limited to these embodiments. In the drawings, the same members are denoted by the same reference numerals, and description thereof may be omitted.

まず、セラミックス回路基板の製造方法について述べる。ここではセラミックス基板として窒化珪素基板を用いた場合について示す。ただし、その組成や製造方法・製造条件は下記の例に限定されるものではない。
まず、窒化ケイ素粉末を主成分とする原料粉末に、酸化物系のマグネシア(MgO)、イットリア(Y)のセラミックス焼結助剤粉末を加え、これに更に分散剤、粘結助剤、溶剤等を添加しボールミルで混合・粉砕し、所定粘度のスラリーを作製した。
次に、脱泡工程を経て、前記スラリーの粘度を更に基準範囲内に調整し、その後シート成形法によりグリーンシート(以下ではシートと表現することがある)を作製した。このシート成形時の条件を各種変更し、1枚のシート単体で用いたり、重ねたシートを圧着する積層工程により、焼結体サイズで厚さ0.1〜3.2mmtとなるように各種シートを作製する。ただし、基板としては、せいぜい厚くとも0.63mmt厚さの基板の需要が一般的である。完成したグリーンシートは適切なサイズに切断後、脱脂処理および焼結工程を経て窒化珪素基板の焼結体とした。焼結体のサイズは、基板の取り数や基板厚さにもよるが、焼結後の厚さ0.32mmtの場合には、現在最大で300mm程度まで可能である。ただしハンドリング工程の改善や、焼成炉の大型化により更に大きい基板サイズも製造可能である。
First, a method for manufacturing a ceramic circuit board will be described. Here, a case where a silicon nitride substrate is used as the ceramic substrate is shown. However, the composition, manufacturing method, and manufacturing conditions are not limited to the following examples.
First, oxide-based magnesia (MgO) and yttria (Y 2 O 3 ) ceramic sintering aid powders are added to the raw material powder mainly composed of silicon nitride powder, and further, a dispersant and a caking aid. Then, a solvent or the like was added and mixed and pulverized by a ball mill to prepare a slurry having a predetermined viscosity.
Next, after passing through a defoaming step, the viscosity of the slurry was further adjusted within a reference range, and then a green sheet (hereinafter sometimes referred to as a sheet) was produced by a sheet forming method. Various conditions can be used for forming the sheet, and various sheets can be used to make the sintered body size 0.1 to 3.2 mm thick by using a single sheet alone or by laminating the stacked sheets. Is made. However, as a substrate, a demand for a substrate having a thickness of at most 0.63 mmt is general. The completed green sheet was cut into an appropriate size, and then subjected to a degreasing treatment and a sintering process to obtain a sintered body of a silicon nitride substrate. The size of the sintered body depends on the number of substrates and the thickness of the substrate, but when the thickness after sintering is 0.32 mmt, it can be up to about 300 mm at present. However, larger substrate sizes can be manufactured by improving the handling process and increasing the size of the firing furnace.

その後、レーザー加工により所望の集合基板(1個取りや多数個取りの場合もある)に加工される。例えば9個取りの場合は図8、図9に示す集合基板5となる。ここで集合基板5の外周は、製造過程での位置合わせ精度の関係により切断加工としたが、寸法精度の問題が生じないようであれば、部分的にあるいは全てスクライビング加工で形成しても良い。尚、レーザー加工は後工程の途中や最後に実施しても、前記同様に寸法精度に問題なければ、どの段階で実施しても良い。ここでは、焼結後にレーザー加工を実施した場合について示す。即ち、レーザー加工により集合基板の片方の面にスクライビング加工により未貫通孔を所望形状に格子状に形成した。またCやRの面取り加工が必要な場合には、面取り部をレーザー切断加工によりくり貫いて形成する。ただし、この切断加工は後の工程で別途実施しても構わない。   Thereafter, it is processed into a desired collective substrate (in some cases, one piece or a plurality of pieces) by laser processing. For example, when nine are taken, the aggregate substrate 5 shown in FIGS. 8 and 9 is obtained. Here, the outer periphery of the collective substrate 5 is cut according to the alignment accuracy in the manufacturing process. However, if there is no problem of dimensional accuracy, it may be formed partially or entirely by scribing. . Even if laser processing is performed in the middle or at the end of the post-process, it may be performed at any stage as long as there is no problem in dimensional accuracy as described above. Here, a case where laser processing is performed after sintering will be described. That is, non-through holes were formed in a lattice shape in a desired shape on one surface of the aggregate substrate by laser processing. When C or R chamfering is required, the chamfered part is formed by laser cutting. However, this cutting process may be performed separately in a later step.

その後、あらかじめ脱脂・焼結前にシート表面に塗布しておいたh−BN等の潤滑物質等を湿式ブラスト処理で基板表面の清浄化と平滑化を行った。仮に顧客先にて基板単体で使用する場合には、以上の状態から個々の基板に分割して使用することができる。この窒化珪素基板1の特性は、3点曲げ強度700MPa以上、熱伝導率が90W/(m・K)以上、破壊靭性値が5MPa√m以上であった。ちなみに前記セラミックス基板であるが、焼結条件や助剤量や成分により熱伝導率が120W/(m・K)、のものから60W/(m・K)のものまで用途に応じて作製することが可能である。   Thereafter, the substrate surface was cleaned and smoothed by wet blasting with a lubricating material such as h-BN that had been applied to the sheet surface before degreasing and sintering. If the customer uses the substrate alone, it can be divided into individual substrates from the above state. The silicon nitride substrate 1 had a three-point bending strength of 700 MPa or more, a thermal conductivity of 90 W / (m · K) or more, and a fracture toughness value of 5 MPa√m or more. By the way, the ceramic substrate is manufactured according to the use from the one having a thermal conductivity of 120 W / (m · K) to the one having 60 W / (m · K) depending on sintering conditions, amount of auxiliary agent and components. Is possible.

以上のセラミックス基板(窒化珪素基板)を回路基板として使用するには、この後、金属板とセラミックス基板を接合する工程が行われる。本発明では集合基板の表裏面に対し1枚の金属板を接合し、その後この金属板を加工して各々金属回路板と金属放熱板を形成する方法を取っている。ここで放熱用の回路基板用途として用いる場合には、金属板に熱伝導率の高いアルミ平板や銅平板を用いて、活性金属を添加したろう材によるろう付接合で、セラミックス基板とほぼ同サイズの金属板をセラミックス基板に接合する。次に、ろう付接合した金属板とセラミックス基板の接合体の金属板上に感光性レジストをラミネーションにより貼り付け、露光・現像処理の後、表裏の金属板表面に所望のレジストパターンを形成する。その後、塩化鉄溶液等を用いた湿式エッチングにより、金属板の不要部を除去して所望の金属回路パターン(金属回路板および金属放熱板)を同時に形成する。次に前記のレジストを除去し、洗浄・乾燥をおこなう。集合基板の分割は、この工程後に行ってもよいし、または最終工程後に分割除去してもよい。   In order to use the above ceramic substrate (silicon nitride substrate) as a circuit substrate, a step of joining the metal plate and the ceramic substrate is performed thereafter. In the present invention, a method is adopted in which one metal plate is bonded to the front and back surfaces of the collective substrate, and then the metal plate is processed to form a metal circuit plate and a metal heat dissipation plate, respectively. Here, when used as a circuit board for heat dissipation, an aluminum flat plate or copper flat plate with high thermal conductivity is used for the metal plate, and brazing is performed using a brazing material to which an active metal is added. The metal plate is bonded to the ceramic substrate. Next, a photosensitive resist is stuck on the metal plate of the joined body of the brazed metal plate and the ceramic substrate by lamination, and after exposure / development processing, a desired resist pattern is formed on the front and back metal plate surfaces. Thereafter, unnecessary portions of the metal plate are removed by wet etching using an iron chloride solution or the like to simultaneously form a desired metal circuit pattern (metal circuit plate and metal heat dissipation plate). Next, the resist is removed, and cleaning and drying are performed. The aggregate substrate may be divided after this step, or may be removed after the final step.

さらに不要なろう材を除去する工程と、顧客要望により電解または無電解めっき(Ni−P組成等)工程や、または防錆処理工程等を経て、セラミックス回路基板の集合体を作製するものである。尚、金属回路板の表面は、はんだ材質に対して濡れ性向上処理を施すこともある。また、スクライビング加工部は分割後の基板強度の劣化が少ないことから、素子が実装される金属回路部がスクライビング導入面か否かに関係なしに用いることができる。このようにして作製したセラミックス基板および/または回路基板の用途の一実施例として図10に示すような半導体モジュールの構成部材として用いることができる。近年では電動化が自動車等あらゆる分野で進んでおり、これら全ての分野に応用できると考えている。   Further, an assembly of ceramic circuit boards is produced through a process of removing unnecessary brazing filler metal and an electrolytic or electroless plating (Ni-P composition etc.) process or a rust preventive treatment process according to customer requirements. . The surface of the metal circuit board may be subjected to a wettability improving process on the solder material. Further, since the scribing portion has little degradation of the substrate strength after the division, it can be used regardless of whether the metal circuit portion on which the element is mounted is the scribing introduction surface. As an example of the use of the ceramic substrate and / or circuit board thus produced, it can be used as a constituent member of a semiconductor module as shown in FIG. In recent years, electrification has progressed in all fields such as automobiles, and we believe that it can be applied to all these fields.

図10は近年需要が急激に増加しているハイブリッド自動車(HEV)用のIGBTインバータモジュール(半導体モジュール)に用いられる回路構成(樹脂ケース断面図)の一例を示したものである。セラミックス基板1の上面に金属回路板46、下面に金属放熱板47を活性ろう材で接合し、金属回路板46には半導体パワー素子45を、金属放熱板47にはベース板(冷却部材)48を半田で接合してセラミックス回路基板を構成している。半導体素子45と主端子42とはワイヤ44により接続され内部はシリコンゲル43で封じられている。回路パターン等の詳細は割愛するが、この回路パターン上に半導体素子(IGBT以外にダイオード、MOS−FET等)が搭載され、モジュールの動作時には、前記素子から急激な発熱が生じる。セラミックス回路基板はベース板との電気的絶縁性を維持しつつ、半導体素子が安定動作するように、前記の発熱をベース板へと放熱し、最終的に熱を冷却水または大気へと放出させる役目を果たすものである。   FIG. 10 shows an example of a circuit configuration (resin case cross-sectional view) used in an IGBT inverter module (semiconductor module) for a hybrid vehicle (HEV), for which demand is increasing rapidly in recent years. A metal circuit board 46 is bonded to the upper surface of the ceramic substrate 1 and a metal heat sink 47 is bonded to the lower surface with an active brazing material. A semiconductor power element 45 is bonded to the metal circuit board 46, and a base plate (cooling member) 48 is mounted to the metal heat sink 47. Are joined with solder to constitute a ceramic circuit board. The semiconductor element 45 and the main terminal 42 are connected by a wire 44 and the inside is sealed with a silicon gel 43. Although details of the circuit pattern and the like are omitted, semiconductor elements (diodes, MOS-FETs, etc. in addition to IGBTs) are mounted on the circuit pattern, and sudden heat generation occurs from the elements during the operation of the module. The ceramic circuit board radiates the heat to the base plate and finally releases the heat to cooling water or the atmosphere so that the semiconductor element operates stably while maintaining electrical insulation from the base plate. It plays a role.

次に、セラミックス基板に施すスクライビング加工や切断加工について集合基板の実施態様を基に更に詳しく説明する。
従来技術においては、欠け不良の発生箇所の多くは、図12に示すように角部近傍や面取り部近傍で認められる。従来、スクライビング加工により設けられる格子状の未貫通孔(スクライビング孔と言う)は、図11に示すように同じピッチで且つ同じ深さに形成されており、これが角部近傍や面取り部近傍で欠け不良が発生する一因である、またひいては接合工程で発生するクラック不良の原因となると考えられる。本発明はこの点に着目し、欠け不良などの分割不良発生箇所に変則的なスクライビング加工を施したセラミックス基板としたものである。即ち、不良発生箇所の近傍に近づくに連れてスクライビング孔の深さを角部近傍あるいは面取り部以外の、例えば中央部側の孔深さよりも深くすること、また或いは隣接するスクライビング孔の間隔(ピッチ)を他より狭めること、また或いは両者の組み合わせを用いることにより、角部近傍や面取り部近傍での欠け不良を抑制しながら分割線に沿って割れ易くすることが出来ることを知見したものである。
Next, scribing and cutting performed on the ceramic substrate will be described in more detail based on the embodiment of the aggregate substrate.
In the prior art, many occurrences of chipping defects are recognized near corners and chamfered portions as shown in FIG. Conventionally, the grid-like non-through holes (referred to as scribing holes) provided by scribing are formed at the same pitch and the same depth as shown in FIG. It is considered that this is a cause of the occurrence of defects, and also causes crack defects that occur in the joining process. The present invention pays attention to this point, and provides a ceramic substrate in which irregular scribing processing is applied to a location where divisional defects such as chipping defects occur. That is, the depth of the scribing hole is made deeper than the hole near the corner or chamfered portion, for example, at the center side as approaching the vicinity of the defect occurrence point, or the interval (pitch of adjacent scribing holes) ) Is narrower than others, or by using a combination of both, it has been found that cracks can be easily broken along the dividing line while suppressing chipping defects near corners and chamfers. .

図1は、面取り無し基板においてピッチと共に深さも変えた例を示している。(a)は分割後のセラミックス基板を示す上面図、(b)は基板の一側面を見た斜視図である。この例ではセラミック基板1の角部22の直近ではスクライビング孔のピッチを狭めオーバーラップさせると共に深さを深くしている。これにより基板の上下で分割が既に出来ている状態にあり欠け不良はより生じ難い。スクライビング孔は、未貫通孔で形成され先端に曲率を有する半円錐形状の凹部形状の凹部33となって現れるので、セラミック基板としては凹部33のピッチと深さが変わったものである。具体的には28で示す角部近傍の凹部のピッチ23を、中央部側の凹部のピッチ24よりも狭くしている。また、ここでは角部近傍の凹部深さ26を中央部側の凹部深さ27よりも深くしている。本例では基板に面取り加工がされていない例であるが、面取り部が有る基板でもこの例を実施することができることは言うまでもない。   FIG. 1 shows an example in which the depth is changed together with the pitch in a substrate without chamfering. (A) is the top view which shows the ceramic substrate after a division | segmentation, (b) is the perspective view which looked at one side of the board | substrate. In this example, the pitch of the scribing holes is narrowed and overlapped in the immediate vicinity of the corner portion 22 of the ceramic substrate 1 and the depth is increased. As a result, the upper and lower sides of the substrate are already divided, and chipping defects are less likely to occur. Since the scribing hole is formed as a non-through hole and appears as a concave portion 33 having a semiconical concave shape having a curvature at the tip, the pitch and depth of the concave portion 33 are changed as a ceramic substrate. Specifically, the pitch 23 of the recesses near the corner indicated by 28 is made narrower than the pitch 24 of the recesses on the center side. Here, the recess depth 26 in the vicinity of the corner is made deeper than the recess depth 27 on the center side. In this example, the substrate is not chamfered, but it goes without saying that this example can also be implemented on a substrate having a chamfered portion.

図2は、面取り無し基板においてスクライビング孔による凹部のピッチを変えた例を示している。(a)はスクライビング孔の形態を示す上面図、(b)は一側面を見た斜視図である。この例ではスクライビング孔を角部近傍から角部に向けてピッチを狭めており、角部の直近では孔をオーバーラップ32させている。従って、(b)に見られるように角部直近では凹部が連なり分割が既に出来ている状態と言える。このようなことからも欠け不良は生じ難くなる。   FIG. 2 shows an example in which the pitch of the recesses by the scribing holes is changed in the substrate without chamfering. (A) is the top view which shows the form of a scribing hole, (b) is the perspective view which looked at one side. In this example, the pitch of the scribing holes is narrowed from the vicinity of the corner toward the corner, and the holes are overlapped 32 in the immediate vicinity of the corner. Therefore, as can be seen in (b), it can be said that the recesses are connected in the immediate vicinity of the corner and the division has already been performed. For this reason, chipping defects are less likely to occur.

図3は、面取り無し基板においてスクライビング孔による凹部の深さを変えた例を示している。(a)はスクライビング孔の形態を示す上面図、(b)は一側面を見た斜視図である。この例ではスクライビング孔の深さ34を角部近傍から角部に向けて徐々に深くしている。従って、(b)に見られるように角部直近では凹部が深くなり、セラミックス基板の厚さに匹敵するようになっていると言える。このようなことからも欠け不良は生じ難くなる。   FIG. 3 shows an example in which the depth of the concave portion due to the scribing hole is changed in the substrate without chamfering. (A) is the top view which shows the form of a scribing hole, (b) is the perspective view which looked at one side. In this example, the depth 34 of the scribing hole is gradually increased from the vicinity of the corner toward the corner. Therefore, as can be seen in (b), it can be said that the recess becomes deep in the immediate vicinity of the corner, and is comparable to the thickness of the ceramic substrate. For this reason, chipping defects are less likely to occur.

既述したようにセラミック基板では角部に面取り施すことが望まれる場合がある。このとき面取り加工が切断加工で形成された場合には、基板強度はレーザー切断加工時の熱応力によるマイクロクラックの生成で、強度が低下する。抗折試験によれば、切断加工試料は、スクライビング加工試料と比較し1〜2割以上も強度が低下することが分かっている。そのため、スクライビング加工のみの集合基板の分割よりも、面取り切断加工を有する集合基板の分割の方が欠け不良の発生頻度が高い。しかしスクライビング加工により面取りを施すことは手間と時間が掛かり新たな不良も招きかねない。そこでスクライビング加工と切断加工を組み合わせることが考えられる。
この点で図4の例は、スクライビング加工による分割線と切断加工による面取り部を取り入れた例を示している。(a)はC面取りを形成した基板を示す上面図、(b)(c)は一側面を見た斜視図である。ここで(b)のC面取り部13は切断加工により形成しており、分割線はスクライビング加工で、面取り部の近傍の凹部のピッチ16を中央部のピッチ15よりも狭くしたものである。(c)は同じくC面取り部13の近傍の凹部の深さ18を中央部の深さ17よりも深くしたものである。
また、図5はR面取り加工が施されている例を示している。(b)ではR面取り部14の近傍の凹部のピッチ16を中央部のピッチ15よりも狭くしたものである。
As described above, it is sometimes desired to chamfer the corners of the ceramic substrate. At this time, when the chamfering is formed by cutting, the strength of the substrate decreases due to generation of microcracks due to thermal stress during laser cutting. According to the bending test, it is known that the strength of the cut processed sample is reduced by 10 to 20% or more as compared with the scribing processed sample. Therefore, the frequency of occurrence of chipping defects is higher in the division of the aggregate substrate having the chamfer cutting process than in the division of the aggregate substrate only by the scribing process. However, chamfering by scribing takes time and effort, and may lead to new defects. Therefore, it is conceivable to combine scribing and cutting.
In this regard, the example of FIG. 4 shows an example in which a dividing line by scribing and a chamfered portion by cutting are incorporated. (A) is the top view which shows the board | substrate which formed C chamfering, (b) (c) is the perspective view which looked at one side. Here, the C chamfered portion 13 in (b) is formed by cutting, and the dividing line is formed by scribing, and the pitch 16 of the recesses in the vicinity of the chamfered portion is made narrower than the pitch 15 of the central portion. (C) is also the depth 18 of the recess near the C chamfered portion 13 made deeper than the depth 17 of the central portion.
FIG. 5 shows an example in which R chamfering is performed. In (b), the pitch 16 of the recesses in the vicinity of the R chamfered portion 14 is made narrower than the pitch 15 in the central portion.

次に、図6は、面取り部に係わる更に他の実施例を示している。即ち、図6(b)でスクライビング孔の上面図を示すように、基板の角部に相当する格子の交差位に貫通孔29を設けたものである。この貫通孔29は、同図(c)で示すように一側面を見た場合、角部が抉られたような貫通凹部30を形成する。これは例えば半径1mm以下の非常に小さい孔でもC面取りの代りとなり得るものである。また、この例では貫通凹部30の近傍に向けてピッチを狭めている。   Next, FIG. 6 shows still another embodiment relating to the chamfered portion. That is, as shown in the top view of the scribing hole in FIG. 6B, the through holes 29 are provided at the intersections of the lattice corresponding to the corners of the substrate. The through-hole 29 forms a through-concave 30 having a corner that is cut when viewed from one side as shown in FIG. For example, even a very small hole having a radius of 1 mm or less can be used instead of C chamfering. In this example, the pitch is narrowed toward the vicinity of the through recess 30.

図7は、面取り部に係わる更に他の実施例を示す。この例では角部に相当する位置には、ほぼ板厚分の深さのスクライビング孔31を設け、上記した貫通孔を形成した場合と類似な形態としている。この例では角部に向けて凹部深さを深くしているが、このような変則的なスクライビング孔の構成でも欠け不良を低減する効果は見られる。   FIG. 7 shows still another embodiment relating to the chamfered portion. In this example, a scribing hole 31 having a depth substantially equal to the thickness of the plate is provided at a position corresponding to the corner portion, and the shape is similar to the case where the above-described through hole is formed. In this example, the depth of the concave portion is increased toward the corner portion, but the effect of reducing chipping defects can be seen even with such an irregular scribing hole configuration.

次に、この基板に面取り部(CまたはR面取り)を形成したセラミックス集合基板について説明する。
図8は1枚の集合基板5から9個のセラミックス基板1を作製する9個取りの一例である。集合基板の外周側面は、製造工程での基板寸法精度や回路基板パターン精度および位置合わせ精度を改善するためにレーザー切断加工で形成してある。また、基板の外周側の枠部には捨て代となる余肉部2を設けている。これは基板強度低下防止の観点から全ての基板側面を切断加工部ではなくスクライビング加工部にするためである。その理由は、既述したようにレーザー切断加工では熱応力によるマイクロクラックの生成で、基板強度が低下するためである。またそれ以外の理由として、ハンドリング性の改善、前記ハンドリングによる基板または回路基板の落下・突き当てによる欠け防止、回路基板を製造する際の金属/セラミックス接合部のボイド不良の低減なども理由として挙げられる。
Next, a ceramic aggregate substrate having a chamfered portion (C or R chamfer) formed on this substrate will be described.
FIG. 8 is an example of nine-piece production for producing nine ceramic substrates 1 from one collective substrate 5. The outer peripheral side surface of the collective substrate is formed by laser cutting in order to improve the substrate dimension accuracy, circuit board pattern accuracy, and alignment accuracy in the manufacturing process. Further, a surplus portion 2 is provided in the frame portion on the outer peripheral side of the substrate as a margin for disposal. This is for making all the substrate side surfaces into scribing parts instead of cutting parts from the viewpoint of preventing reduction in substrate strength. The reason is that, as described above, in laser cutting processing, the substrate strength is reduced due to generation of microcracks due to thermal stress. Other reasons include improved handling, prevention of chipping due to falling or butting of the substrate or circuit board due to the handling, reduction of void defects in metal / ceramic joints when manufacturing a circuit board, etc. It is done.

断続的なスクライビング孔による分割線3は格子状に形成され、格子状の分割線によって個々のセラミックス基板1が区画されている。スクライビング孔の加工部は基板厚さによって加工条件は異なるが、最深部に曲率を有する円錐状のノッチ状の孔(以下では凹部と表現することもある)を、所望の孔径で、所望の深さで、所望のピッチ間隔で導入するもので、通常は基板を貫通するものではない。また、前記孔の表面周囲には黒色のドロス状の物質が付着することもある。また、基板表面の加工孔周囲に盛り上がり箇所が出来ることもある。これらは基板中の酸化物や、分解した窒化物の残留物が付着したものであるが、アシストガスによる除去や、適正化した加工条件で加工した基板においては、基板の絶縁性能に問題を及ぼすものではないことを確認済みである。   The dividing lines 3 formed by intermittent scribing holes are formed in a lattice shape, and the individual ceramic substrates 1 are partitioned by the lattice-shaped dividing lines. Although the processing conditions of the processed portion of the scribing hole differ depending on the substrate thickness, a conical notch-shaped hole having a curvature at the deepest portion (hereinafter also referred to as a concave portion) has a desired hole diameter and a desired depth. Now, they are introduced at a desired pitch interval, and usually do not penetrate the substrate. In addition, a black dross-like substance may adhere around the surface of the hole. In addition, a raised portion may be formed around the processing hole on the substrate surface. These are oxides in the substrate and residues of decomposed nitrides attached. However, if the substrate is processed under assist gas removal or optimized processing conditions, it will cause problems with the insulation performance of the substrate. It has been confirmed that it is not a thing.

次に、四隅の面取り部については、板厚を貫通するレーザー切断加工により形成する。但し、面取り部の形状が大きく手作業での分割が容易である場合には、面取り部もスクライビング加工で対応しても良い。
レーザー切断加工では基板四隅の面取り部に位置する箇所を菱形状に加工してC面取り4を形成する。ここで、四隅のみを狙って面取りするのでも良いが、分割時の欠け不良を低減させるためには、図8に示すように余肉部2にも対称形状になるように面取り部4’を形成した方が好ましい。これは図9で示すようにR面取り6を設ける場合も同様で、四隅の加工部は対称形状になるようにし、余肉部2についてもR面取り部6’を施すことが望ましい。
Next, the chamfered portions at the four corners are formed by laser cutting processing that penetrates the plate thickness. However, when the shape of the chamfered portion is large and division by manual work is easy, the chamfered portion may be handled by scribing.
In the laser cutting process, the C chamfer 4 is formed by processing a portion located at the chamfered portion at the four corners of the substrate into a rhombus. Here, chamfering may be performed aiming at only the four corners, but in order to reduce chipping defects at the time of division, the chamfered portion 4 ′ is formed so that the surplus portion 2 is also symmetrical as shown in FIG. It is preferable to form it. This also applies to the case where the R chamfer 6 is provided as shown in FIG. 9, and it is desirable that the processed portions at the four corners have a symmetrical shape, and the surplus portion 2 is also provided with the R chamfer 6 '.

以下、本発明によるセラミックス基板を試作して試験した実施例について説明する。
実施例の集合基板は、図8に示す9個取りの50×30mmの集合基板であって、セラミックス基板の材質は窒化珪素、面取り有りの場合はC1.0mmの切断加工とし、余肉部にもC面取り加工を施したものを用いた。
次に、面取り部の端部から10mm以内の箇所を、スクライビング加工で、深さ、隣接する孔のピッチを種々変更した例を作製し、個々の基板に分割した。そして各基板に対する分割に起因する欠けなどの不良率を調査し評価した。
また、面取り加工が無い基板も上記と同様に、角部近傍のスクライビング加工条件を変化させて作製した。この面取りが無い場合の加工条件は全てスクライビング加工である。評価方法は上記と同様に実施した。
さらに、面取り加工が無い基板ではあるが、スクライビング孔加工の格子線(分割線)の交点に貫通孔を設けたものも作製した。
Hereinafter, examples in which a ceramic substrate according to the present invention was prototyped and tested will be described.
The collective substrate of the embodiment is a 9 × 50 × 30 mm collective substrate shown in FIG. 8, and the material of the ceramic substrate is silicon nitride. Also used was a C chamfered one.
Next, examples in which the depth and the pitch of adjacent holes were variously changed by scribing at a location within 10 mm from the end of the chamfered portion were divided into individual substrates. Then, the defect rate such as chipping caused by division on each substrate was investigated and evaluated.
A substrate without chamfering was also produced by changing the scribing conditions near the corners in the same manner as described above. The machining conditions when there is no chamfering are all scribing. The evaluation method was carried out in the same manner as described above.
Furthermore, although the substrate was not chamfered, a substrate in which through holes were provided at the intersections of grid lines (partition lines) for scribing hole processing was also produced.

また、基板製造、特に工程の長くなる回路基板の製造工程における、分割作業工程での歩留は極めて高くなければならない。そこで、本発明の効果を検証するために、製品サイズで50×30mm、9個取りの集合基板を各条件で2枚ずつ(1条件当たり製品サイズで計18枚)で実験を行った。尚、レーザー加工は、全出力が50〜500Wまで制御できる炭酸ガスレーザー装置を用いた。詳細な条件は割愛するが、加工時の種々のパラメータとして、周波数、パルス数、パルス幅、パルス長、ピーク出力値、送り速度、アシストガスの種類と圧力、パルス当たりのエネルギー値、焦点距離等々である。前記の条件を変更し、各々の試料を適正条件で所望のスクライビング加工形状になるように実施した。   In addition, the yield in the division work process must be extremely high in the board manufacturing process, particularly in the circuit board manufacturing process that requires a long process. Therefore, in order to verify the effect of the present invention, an experiment was performed with two aggregate substrates each having a product size of 50 × 30 mm and nine pieces under each condition (a total of 18 product sizes per condition). In addition, the laser processing used the carbon dioxide laser device which can control all the outputs to 50-500W. Although detailed conditions are omitted, various parameters during processing include frequency, number of pulses, pulse width, pulse length, peak output value, feed rate, assist gas type and pressure, energy value per pulse, focal length, etc. It is. The above-mentioned conditions were changed, and each sample was carried out to have a desired scribing shape under appropriate conditions.

また、分割工程での合否の判断基準は、目視判断できないものに関しては、基板外周の表裏を光学顕微鏡により観察した結果、分割線中央に対して最大0.1mmより大きな凸凹状の欠けがあった場合は不良とした。本実施例では試料片18枚のうち3枚以上不良が発生した場合は実用上好ましくないと考え比較例(*を付記)と表現した。尚、セラミックス基板の寸法公差は用途によりユーザーの要求仕様で決まるものではあるが、現時点での一般的な仕様である±0.1mm以内と暫定的に決定したが、この値に限定されるものではないことを明記しておきたい。以上の実験結果を表1に示す。ただし、表1に示す各値は、本試作例に用いたセラミックス基板の特性によって変わるものであり、表1に示す値に限定されるものではない。   In addition, regarding the criteria for determining whether or not to pass or fail in the dividing process, the front and back surfaces of the outer periphery of the substrate were observed with an optical microscope, and as a result, there was an irregular chip larger than 0.1 mm at the center of the dividing line. The case was bad. In this example, when three or more defects out of 18 sample pieces occurred, it was considered undesirable for practical use and expressed as a comparative example (* is added). Although the dimensional tolerance of the ceramic substrate is determined by the user's required specifications depending on the application, it was provisionally determined to be within ± 0.1 mm, which is the current general specification, but is limited to this value I want to state that it is not. The above experimental results are shown in Table 1. However, the values shown in Table 1 vary depending on the characteristics of the ceramic substrate used in this prototype, and are not limited to the values shown in Table 1.

Figure 2008198905
Figure 2008198905

表1の試作No.1〜No.3は、セラミックス基板の厚みが0.32mmtでC1.0mmの面取り部有りの従来技術による比較例である。ピッチおよび凹部の深さが一定である場合を示している。これらの比較例では、何れの厚さのセラミックス基板においても、その集合基板分割時に欠け不良が半数近く生じた。
尚、スクライブ孔(凹部)の深さ又は/及びピッチを変化させたところを以下変則スクライビングと呼ぶこととする。試作No.4〜No.8は角部近傍のピッチを逆に大きくした比較例を示し、試作No.9〜No.12は同様に凹部の深さを浅くした場合の比較例を示したものである。ここでは変則スクライビングを導入した距離を3mmで一定とし、この3mmの箇所でのスクライビング条件をセラミックス基板側面中央部に対し変化させている。いずれも不良が多く発生し良い結果は得られなかった。これらのことから、セラミックス基板に対して、分割時の不良を低減できる大凡の閾値があることがわかる。前記不良の大半はクラックが分割線に沿って進展しないことが原因である。
Prototype No. in Table 1 1-No. 3 is a comparative example according to the prior art in which the thickness of the ceramic substrate is 0.32 mm and there is a chamfered portion of C1.0 mm. The case where the pitch and the depth of a recessed part are constant is shown. In these comparative examples, almost half of chipping defects occurred in the ceramic substrate of any thickness when the aggregate substrate was divided.
In addition, the place where the depth or / and the pitch of the scribe holes (concave portions) are changed is hereinafter referred to as irregular scribing. Prototype No. 4-No. No. 8 shows a comparative example in which the pitch in the vicinity of the corner portion is increased conversely. 9-No. Similarly, 12 shows a comparative example when the depth of the concave portion is made shallow. Here, the distance at which the irregular scribing is introduced is made constant at 3 mm, and the scribing conditions at this 3 mm location are changed with respect to the central portion of the ceramic substrate side surface. In either case, many defects occurred and good results were not obtained. From these facts, it can be seen that there is a rough threshold value that can reduce defects at the time of division on the ceramic substrate. Most of the defects are caused by cracks that do not propagate along the dividing line.

次に本発明の実施例について説明する。試作No.13〜No.16は変則スクライビングのピッチを狭くした場合を示し、試作No.17〜No.19は変則スクライビングの凹部の深さが深い場合の例である。セラミックス基板の厚さによって値は異なるが、凹部のピッチを狭くした場合も深さを深くした場合も共に欠け不良を2/18個以下に抑えることができている。いずれも狭ピッチまたは深い凹部を用いることで、欠け不良が大幅に改善できることがわかる。特に凹部の深さに関しては、セラミックス基板厚の30%以上であることが大凡の目安となることが分かった。   Next, examples of the present invention will be described. Prototype No. 13-No. 16 shows a case where the irregular scribing pitch is narrowed. 17-No. 19 is an example in which the depth of the irregular scribing recess is deep. Although the value varies depending on the thickness of the ceramic substrate, chipping defects can be suppressed to 2/18 or less both when the pitch of the recesses is narrowed and when the depth is deepened. It can be seen that chipping defects can be greatly improved by using narrow pitches or deep recesses. In particular, with regard to the depth of the recess, it has been found that a rough standard is that it is 30% or more of the thickness of the ceramic substrate.

次に、変則スクライビングのピッチまたは凹部の深さを段階的に変化させた実施例について示す。試作No.20〜22はピッチを段階的に狭くした場合の例であり、試作No.23〜No.25は凹部の深さを段階的に深くした例である。いずれの場合も基板の中央部から徐々に変化させた。両者とも不良はほとんど発生しておらず、このように変則スクライビング全域において、狭ピッチまたは深い凹部にしなくても、段階的に変化させることでも欠け不良が低減できる効果が認められた。試作No.26〜28は、前記両者の特徴を併せ持つ実施例である。この場合は不良は発生しておらず、より好ましい効果が認められた。   Next, an embodiment in which the irregular scribing pitch or the depth of the recesses is changed stepwise will be described. Prototype No. Nos. 20 to 22 are examples in which the pitch is narrowed step by step. 23-No. Reference numeral 25 is an example in which the depth of the concave portion is increased stepwise. In either case, the temperature was gradually changed from the center of the substrate. In both cases, almost no defects were generated. Thus, it was confirmed that chip defects could be reduced by changing stepwise without forming narrow pitches or deep recesses throughout the irregular scribing. Prototype No. Reference numerals 26 to 28 are examples having the characteristics of both. In this case, no defect occurred, and a more preferable effect was recognized.

次に変則スクライビングの導入距離を変化させた場合の影響について試作した例を試作No.29〜38に示す。但し、試作No.29〜33はC面取り有りの場合、試作No.34〜38は面取り無しの場合である。この結果、変則スクライビングの導入距離においても、欠け不良に与える影響があり、既述したようにC面取り加工が有る方が、若干欠け不良が悪くなる傾向が認められた。不良頻度からすると変則スクライビング導入距離が10mm以上となった場合には、集合基板の格子状分割線の交点近傍部の強度低下のために、基板角部にバリが生じやすいと考えられる。よって、変則スクライビング領域は最大で10mm程度が好ましいと言える。以上ではC面取りの場合を示したが、R面取りを施した基板の場合においても同じである。尚、変則スクライビング加工装置のプログラミングには多少手間を要するが、これは初期の問題だけである。いずれにしろプログラミング時間や加工時間、加工費用の全てを考慮して、最適な条件を選択することができるので結果的には歩留まりは高まり、分割不良低減に効果があることが実証できた。   Next, an example of trial production of the effect of changing the introduction distance of irregular scribing is shown in Prototype No. Shown in 29-38. However, prototype No. Nos. 29 to 33 are prototype Nos. With C chamfering. Reference numerals 34 to 38 denote cases without chamfering. As a result, the introduction distance of irregular scribing also has an effect on chipping defects, and it has been recognized that chipping defects tend to be slightly worse when C chamfering is performed as described above. Considering the defect frequency, when the irregular scribing introduction distance is 10 mm or more, it is considered that burrs are likely to occur at the corners of the substrate due to a decrease in strength in the vicinity of the intersection of the grid-like dividing lines of the aggregate substrate. Therefore, it can be said that the irregular scribing region is preferably about 10 mm at the maximum. Although the case of C chamfering has been described above, the same applies to the case of a substrate with R chamfering. It should be noted that programming of the irregular scribing apparatus requires some effort, but this is only an initial problem. In any case, the optimum conditions can be selected in consideration of programming time, processing time, and processing cost. As a result, the yield is increased, and it has been proved that it is effective in reducing division defects.

次に角部に貫通孔を設けた場合の比較例および、本発明の実施例を示す。試作No.39では径2mmの貫通孔を設けた場合の例である。この場合、孔周囲にはレーザー加工時の熱応力によるクラックが生じており、分割線上に無い任意の孔縁からクラックが生じていたことが不良が比較的多くなった原因である。一方、試作No.40〜42では径1mm以下の貫通孔を設けた場合である。この場合はクラックは発生せず不良も少なかった。以上のことより貫通孔径はあまり大きくない方が好ましいことが分かる。
尚、いくつかの比較例および実施例において、レーザー加工時のパルス変動が原因で、凹部の導入が不完全な箇所付近からの欠けが認められた。したがって欠け不良の中には、前記の不完全な凹部が原因となる不良もいくつか含まれていた。このため、レーザーのパルス出力を安定させることは前提条件として重要である。
Next, a comparative example in which a through hole is provided in a corner and an example of the present invention will be shown. Prototype No. No. 39 is an example in which a through hole having a diameter of 2 mm is provided. In this case, cracks are generated around the holes due to thermal stress during laser processing, and the fact that cracks were generated from arbitrary hole edges not on the dividing line is the cause of the relatively large number of defects. On the other hand, the prototype No. In the case of 40 to 42, a through hole having a diameter of 1 mm or less is provided. In this case, cracks did not occur and there were few defects. From the above, it can be seen that it is preferable that the through-hole diameter is not so large.
In some comparative examples and examples, a chipping from a portion where the introduction of the concave portion was incomplete was recognized due to pulse fluctuation during laser processing. Therefore, some defects caused by the incomplete recesses are included in the chipping defects. Therefore, stabilizing the laser pulse output is an important prerequisite.

以上の結果から、本発明における効果を示したが、ハンドリングによる分割時の割り方にも注意が必要である。特に集合基板が大きくなるに連れて、分割線に対して、完全に垂直に曲げを加えることが難しくなる。仮に、分割線部の円錐形状の凹部に対して引張応力以外に、せん断応力が作用すると、凹部の最下点で割れなくなる可能性がある。本発明の実施例においても、前記理由によると思われる不良がいくつか認められる。この場合、専用の分割治具等を用いるなどで対策できる。
また、基板と金属板を接合した回路基板に関しては、ここでは割愛するが、回路基板の分割に対しても本実施例と同様の傾向が得られた。更に窒化珪素基板以外の窒化アルミ基板においても同様の結果が得られたことも追記しておきたい。
From the above results, the effect of the present invention has been shown, but attention should be paid to how to divide by handling. In particular, as the collective substrate becomes larger, it becomes difficult to bend it completely perpendicular to the dividing line. If shear stress acts on the conical concave portion of the dividing line portion in addition to the tensile stress, there is a possibility that the crack will not break at the lowest point of the concave portion. Also in the examples of the present invention, some defects that are considered to be due to the above reasons are recognized. In this case, countermeasures can be taken by using a dedicated dividing jig or the like.
Further, the circuit board in which the board and the metal plate are joined is omitted here, but the same tendency as in the present embodiment was obtained for the division of the circuit board. Furthermore, it should be added that similar results were obtained with aluminum nitride substrates other than silicon nitride substrates.

以上の実施例からスクライビング孔の深さやピッチを本発明のようにすることによって欠け不良を低減できる効果があることが分かった。本実施例から分かる本発明に従属して好ましい条件をまとめると以下のようになる。
まず、変則スクライビング加工部以外は、薄基板での取扱いを容易にするために、凹部深さ寸法がセラミックス基板厚の50%以下であり、かつ前記ピッチがセラミックス基板厚の30%程度であることが好ましい。したがって変則スクライビングの導入部においては前記ピッチをより狭く、また前記凹部深さをより深く形成することが好ましい。
また、前記セラミックス基板の角部またはC、R面取り加工部の端部から好ましくは10mm以内の少なくとも一箇所以上において、前記凹部深さがセラミックス基板厚の50%以上となる凹部形状を1個以上有するか、前記ピッチがセラミックス基板厚の30%よりも狭い箇所を1個以上有する場合も含まれることを明記したい。または前記の両方の特徴を併せ持たせることは良い。これはCやRの面取りがある基板へ図1〜5を応用したものである。
また、図6および図7に示すように、基板の角部や面取り加工部の両端部の位置で、板厚方向にR2.0mmより小さい貫通孔形成や、セラミックス基板厚さの70%以上の深い凹部を一箇所導入してもよい。これは単に角部の簡易的な欠け防止や、極小さな面取りが必要な場合に有効な手法である。
From the above examples, it was found that the chipping defects can be reduced by setting the depth and pitch of the scribing holes as in the present invention. Preferred conditions dependent on the present invention as understood from the present embodiment are summarized as follows.
First, except for the irregular scribing portion, in order to facilitate handling with a thin substrate, the depth of the recess is 50% or less of the ceramic substrate thickness, and the pitch is about 30% of the ceramic substrate thickness. Is preferred. Therefore, it is preferable that the pitch is narrower and the recess depth is deeper in the irregular scribing introduction portion.
In addition, at least one or more recesses having a depth of 50% or more of the thickness of the ceramic substrate, preferably at least one place within 10 mm from the corner of the ceramic substrate or the end of the C or R chamfered portion. It should be clearly stated that the case where the pitch has one or more portions where the pitch is narrower than 30% of the ceramic substrate thickness is included. Or it is good to have both the above-mentioned characteristics together. This is obtained by applying FIGS. 1 to 5 to a substrate having C or R chamfers.
Further, as shown in FIGS. 6 and 7, the formation of through holes smaller than R2.0 mm in the plate thickness direction and 70% or more of the thickness of the ceramic substrate at the corners of the substrate and the both ends of the chamfered portion. One deep recess may be introduced. This is simply an effective technique when it is necessary to prevent corners from being easily chipped or to have a very small chamfer.

本発明のセラミックス基板のスクライビング加工分割線の一例を示し、(a)は面取り無し基板の外観斜視図、(b)は基板角部近傍の拡大斜視図(孔ピッチと深さを変更)である。1 shows an example of a scribing parting line for a ceramic substrate of the present invention, where (a) is an external perspective view of a non-chamfered substrate, and (b) is an enlarged perspective view in the vicinity of a corner of the substrate (changing hole pitch and depth). . 本発明のセラミックス基板のスクライビング加工分割線の一例を示し、(a)は基板隅部近傍の拡大上面図、(b)は基板角部近傍の拡大斜視図(孔ピッチを変更)である。An example of the scribing parting line of the ceramic substrate of this invention is shown, (a) is an enlarged top view in the vicinity of the corner of the substrate, and (b) is an enlarged perspective view in the vicinity of the corner of the substrate (changing the hole pitch). 本発明のセラミックス基板のスクライビング加工分割線の一例を示し、(a)は基板隅部近傍の拡大上面図、(b)は基板角部近傍の拡大斜視図(孔深さを変更)である。An example of the scribing parting line of the ceramic substrate of this invention is shown, (a) is an enlarged top view in the vicinity of the corner of the substrate, and (b) is an enlarged perspective view in the vicinity of the corner of the substrate (changing the hole depth). 本発明のセラミックス基板のC面取りを有する集合基板分割後を示し、(a)はC面取り基板の外観斜視図、(b)は基板角部近傍の拡大斜視図(孔ピッチを変更)、(c)は基板角部近傍の拡大斜視図(孔深さを変更)である。The assembled substrate having C chamfering of the ceramic substrate of the present invention is shown, (a) is an external perspective view of the C chamfered substrate, (b) is an enlarged perspective view in the vicinity of the corner of the substrate (changing the hole pitch), (c ) Is an enlarged perspective view in the vicinity of the corner of the substrate (changing the hole depth). 本発明のセラミックス基板のR面取りを有する集合基板分割後を示し、(a)はR面取り基板の外観斜視図、(b)は基板角部近傍の拡大斜視図(孔ピッチを変更)である。The assembled substrate having R chamfering of the ceramic substrate of the present invention is shown after dividing, (a) is an external perspective view of the R chamfered substrate, and (b) is an enlarged perspective view in the vicinity of the corner of the substrate (changing the hole pitch). 本発明のセラミックス基板の貫通孔による面取りを有する集合基板分割後を示し、(a)は基板の外観斜視図、(b)は基板隅部近傍の拡大上面図、(c)は基板角部近傍の拡大斜視図(孔ピッチを変更)である。FIG. 2 shows an assembled substrate having chamfered chamfered through holes in the ceramic substrate of the present invention, (a) is an external perspective view of the substrate, (b) is an enlarged top view near the corner of the substrate, and (c) is near the corner of the substrate. FIG. 2 is an enlarged perspective view (changing hole pitch). 本発明のセラミックス基板のスクライビング孔による分割部を有する集合基板分割後を示し、(a)は基板の外観斜視図、(b)は基板隅部近傍の拡大上面図、(c)は基板角部近傍の拡大斜視図(孔深さ変更)である。FIG. 2 shows the ceramic substrate according to the present invention after dividing the aggregate substrate having a dividing portion by scribing holes, (a) is an external perspective view of the substrate, (b) is an enlarged top view in the vicinity of the substrate corner, and (c) is a substrate corner. It is an enlarged perspective view of the vicinity (change of hole depth). 本発明におけるC面取りを有する集合基板の一例を示す上面図である。It is a top view which shows an example of the aggregate substrate which has C chamfering in this invention. 本発明におけるR面取りを有する集合基板の一例を示す上面図である。It is a top view which shows an example of the aggregate substrate which has R chamfering in this invention. 本発明の半導体パワーモジュールの一例を示す断面図である。It is sectional drawing which shows an example of the semiconductor power module of this invention. 従来のセラミックス基板のスクライビング加工分割線を示す基板角部近傍の拡大斜視図である。It is an expansion perspective view of the board | substrate corner vicinity which shows the scribing process dividing line of the conventional ceramic substrate. 従来のセラミックス基板における集合基板分割時の欠け不良例を示し、(a)は分割前の基板の外観斜視図、(b)は面取り無し基板の凹状欠け不良を示す図、(c)は面取り無し基板の凸状欠け不良を示す図、(d)は面取り無し基板の凸状欠け不良を示す図、(e)はC面取り基板の凹状欠け不良を示す図、(f)はC面取り基板の凸状欠け不良を示す図、(g)はC面取り基板の凸状欠け不良を示す図である。Examples of chipping defects when dividing an aggregate substrate in a conventional ceramic substrate are shown, (a) is an external perspective view of the substrate before dividing, (b) is a diagram showing a concave chipping defect of a substrate without chamfering, and (c) is no chamfering. The figure which shows the convex chip | tip defect of a board | substrate, (d) is a figure which shows the convex chip | tip defect of a non-chamfered board, (e) is the figure which shows the concave chip | tip defect of a C chamfer board | substrate, (f) is the convex of a C chamfer board | substrate. The figure which shows a shape chip defect, (g) is a figure which shows the convex chip | tip defect of a C chamfer board | substrate.

符号の説明Explanation of symbols

1:セラミックス基板
2:余肉部
3:分割溝(スクライビング加工した格子線)
4:C面取り切断部
4’:余肉部のC面取り切断部
5:集合基板(多数個取り基板)
6:R面取り切断部
6’:余肉部のR面取り切断部
7:スクライビング加工した格子線の交点近傍
9:集合基板の外周線
10:不良形態1を示す基板から見て凹状の欠け
11:不良形態2を示す基板から見て凸状の欠け、バリ
13:C面取り部(切断加工部)
14:R面取り部(切断加工部)
15:面取り部を除く基板側面部のピッチ
16:面取り部近傍のピッチを狭くした部分
17:面取り部を除く基板側面部の深さ
18:面取り部近傍の深さを深くした部分
21:欠け不良の発生し易い基板の角部
22:基板の角部
23:変則スクライビング加工部の凹部のピッチ
24:中央部側の凹部のピッチ
25:基板表面の孔径
26:変則スクライビング加工部の凹部の深さ
27:中央部側の凹部の深さ
28:変則スクライビング加工領域
29:貫通孔または深さの深い孔
30:貫通孔による角部の凹状のR
31:基板厚の半分よりも深い凹部
32、34:オーバーラップしたスクライビング加工部
33:未貫通孔に形成され半円錐形状の凹部形状の凹部
40:ケース
41:ケースの蓋
42:主端子
43:シリコンゲル
44:ワイヤー
45:半導体素子
46:金属回路板
47:金属放熱板
48:ベース板(冷却部材)
1: Ceramic substrate 2: Remaining portion 3: Dividing groove (grid line subjected to scribing)
4: C chamfer cutting section 4 ′: C chamfer cutting section of surplus part 5: Collective substrate (multi-chip substrate)
6: R chamfer cut portion 6 ′: R chamfer cut portion of surplus portion 7: Near intersection of grid lines subjected to scribing 9: Peripheral line 10 of collective substrate 10: Recessed chip 11 seen from the substrate showing defective form 1 Convex chipping seen from the substrate showing the defect form 2, burr 13: C chamfered portion (cutting portion)
14: R chamfered part (cutting part)
15: Pitch of substrate side surface excluding chamfered portion 16: Part with narrow pitch near chamfered portion 17: Depth of substrate side surface portion excluding chamfered portion 18: Portion with deepened depth near chamfered portion 21: Chipping defect Substrate corner portion 22: substrate corner portion 23: pitch of concave portion of irregular scribing portion 24: pitch of concave portion on central side 25: hole diameter of substrate surface 26: depth of concave portion of irregular scribing portion 27: Depth of recess on the central side 28: Anomalous scribing region 29: Through hole or deep hole 30: Concave R at the corner due to the through hole
31: Recesses 32 and 34 deeper than half of substrate thickness 33: Overlapping scribing part 33: Recessed part formed in a non-through hole and having a semi-conical concave part 40: Case 41: Case lid 42: Main terminal 43: Silicon gel 44: Wire 45: Semiconductor element 46: Metal circuit board 47: Metal heat sink 48: Base plate (cooling member)

Claims (11)

基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面の中央部側の凹部の深さよりも当該側面の角部近傍の凹部の深さが深いことを特徴とするセラミックス基板。 A ceramic substrate having a plurality of recesses provided on at least one side surface of the substrate, wherein the depth of the recesses near the corners of the side surface is deeper than the depth of the recesses on the central side of the side surface. substrate. 基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面の中央部側の凹部のピッチよりも当該側面の角部近傍の凹部のピッチが狭いことを特徴とするセラミックス基板。 A ceramic substrate having a plurality of concave portions provided on at least one side surface of the substrate, wherein the pitch of the concave portions near the corners of the side surface is narrower than the pitch of the concave portions on the central side of the side surface. . 基板の少なくとも1つの側面に複数の凹部が設けられているセラミックス基板において、前記側面の中央部側の凹部の深さよりも当該側面の角部近傍の凹部の深さが深く、且つ前記側面の中央部側の凹部のピッチよりも当該側面の角部近傍の凹部のピッチが狭いことを特徴とするセラミックス基板。 In the ceramic substrate in which a plurality of recesses are provided on at least one side surface of the substrate, the depth of the recesses near the corners of the side surface is deeper than the depth of the recesses on the center side side of the side surface, and the center of the side surface A ceramic substrate characterized in that the pitch of the recesses in the vicinity of the corners of the side surface is narrower than the pitch of the recesses on the part side. 前記基板の少なくとも1つの側面の角部に板厚方向に貫通する面取り部を有することを特徴とする請求項1〜3の何れかに記載のセラミックス基板。 The ceramic substrate according to any one of claims 1 to 3, further comprising a chamfered portion penetrating in a thickness direction at a corner portion of at least one side surface of the substrate. 前記基板の少なくとも1つの側面の角部に貫通孔による凹部を有することを特徴とする請求項1〜3の何れかに記載のセラミックス基板。 The ceramic substrate according to any one of claims 1 to 3, further comprising a concave portion formed by a through hole at a corner portion of at least one side surface of the substrate. 請求項1〜5の何れかに記載のセラミックス基板の一面に金属回路板を設け、他面に金属放熱板を設けてなるセラミックス回路基板となし、前記金属回路板には半導体素子が搭載され、前記金属放熱板には冷却部材が固定されてなることを特徴とする半導体モジュール。 A ceramic circuit board comprising a metal circuit board provided on one surface of the ceramic substrate according to any one of claims 1 to 5 and a metal heat radiating plate provided on the other surface, a semiconductor element mounted on the metal circuit board, A semiconductor module, wherein a cooling member is fixed to the metal heat sink. セラミックス焼結体に複数の未貫通孔からなる格子状の分割溝をスクライビング加工で形成し、多数個取りの集合基板を形成する工程と、
前記集合基板の未貫通孔が交差する角部に板厚方向に貫通する面取り部を切断加工で形成する工程と、
前記集合基板に金属回路板および/または金属放熱板を接合する工程と、
前記集合基板に金属回路板および/または金属放熱板を加工する工程と、
前記分割溝に沿って前記集合基板を破断して個々のセラミックス回路基板に分離する工程と、
を備えたことを特徴とするセラミックス回路基板の製造方法。
Forming a grid-like divided groove comprising a plurality of non-through holes in a ceramic sintered body by scribing, and forming a multi-piece collective substrate;
Forming a chamfered portion that penetrates in the thickness direction at a corner portion where the non-through holes of the collective substrate intersect; and
Bonding a metal circuit board and / or a metal heat sink to the collective substrate;
Processing a metal circuit board and / or a metal heat sink on the aggregate substrate;
Breaking the collective substrate along the divided grooves and separating them into individual ceramic circuit boards;
A method of manufacturing a ceramic circuit board, comprising:
前記複数の未貫通孔からなる分割溝を形成する際、基板の側面の中央部側に相当する深さよりも当該側面の角部近傍の深さを深く、及び/又は前記側面の中央部側に相当するピッチよりも当該側面の角部近傍のピッチを狭く形成することを特徴とする請求項7に記載のセラミックス回路基板の製造方法。 When forming the dividing groove composed of the plurality of non-through holes, the depth in the vicinity of the corner portion of the side surface is deeper than the depth corresponding to the central portion side of the side surface of the substrate and / or the central portion side of the side surface. 8. The method for manufacturing a ceramic circuit board according to claim 7, wherein the pitch in the vicinity of the corner portion of the side surface is narrower than the corresponding pitch. 前記面取り部を形成する代わりに貫通孔を形成することを特徴とする請求項7又は8に記載のセラミックス回路基板の製造方法。 9. The method for manufacturing a ceramic circuit board according to claim 7, wherein a through hole is formed instead of forming the chamfered portion. 前記集合基板には捨て代となる余肉部が設けられており、前記余肉部にも面取り部を切断加工で形成することを特徴とする請求項7〜9の何れかに記載のセラミックス回路基板の製造方法。 10. The ceramic circuit according to claim 7, wherein a surplus part to be discarded is provided in the collective substrate, and a chamfered part is formed in the surplus part by cutting. A method for manufacturing a substrate. セラミックス焼結体に複数の未貫通孔からなる格子状の分割溝をスクライビング加工で形成した多数個取りの集合基板であって、前記分割溝の最外周に捨て代となる余肉部を設け、当該余肉部にも面取り加工部が設けられていることを特徴とする集合基板。 A multi-piece collective substrate formed by scribing a grid-like divided groove composed of a plurality of non-through holes in a ceramic sintered body, and provided with a surplus portion to be discarded at the outermost periphery of the divided groove, A collective substrate, wherein a chamfered portion is also provided in the surplus portion.
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