JP2008191001A - Driver circuit, and semiconductor testing apparatus using it - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driver circuit that has high stability to a capacitive load or load fluctuation and high following property to an input and can reduce the cost of a DUT. <P>SOLUTION: The driver circuit amplifies the input voltage Vin with a voltage amplification section 13, impedance-converts an amplified signal with a current buffer section 5, feeds back the output first voltage signal Vout to the voltage amplification section 13, and performs the follow-up control to the input voltage Vin. The driver circuit has a phase compensation section 14 connected between the output terminal of the voltage amplification section 13 and the output terminal of the current buffer section 5 through an alternating current impedance equivalent to or lower than the direct current output impedance of the current buffer section 5. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an improvement in the response of a driver circuit that is used in a semiconductor test apparatus such as an LSI tester and applies a test signal to a device under test.

  In order to measure DC voltage characteristics of various LSIs such as a memory, a DC level voltage driver circuit is generally used. In this case, in the LSI tester, the test data read from the memory is converted into a voltage signal by a DA converter, and a predetermined signal is applied to a predetermined pin of a device under test (hereinafter referred to as DUT) via a DC level voltage driver circuit. A voltage level is applied.

  FIG. 5 is a configuration circuit diagram showing an example of a conventional DC level voltage driver circuit. The circuit in FIG. 5 mainly includes a voltage amplification unit 3, a phase compensation unit 4, and a current buffer unit 5.

The voltage amplifier 3 amplifies the input voltage Vin to a predetermined voltage and feedback-controls the output voltage Vout of a DC level voltage driver circuit (hereinafter referred to as a driver circuit). An output voltage of a DA converter or the like is given as an input voltage Vin to the input terminal 1 of the driver circuit, and the input terminal 2 is connected to a reference potential of the driver circuit. In the operational amplifier U1, the input voltage Vin is applied to the non-inverting input terminal via the input resistor R1, and the inverting input terminal is connected to the reference potential via the resistor R4.

The current buffer unit 5 impedance-converts the voltage signal output from the voltage control unit 3 and clamps the output current when the output of the driver circuit is short-circuited. In the operational amplifier U2, the output signal of the operational amplifier U1 is applied to the non-inverting input terminal via the resistor R2, and the output terminal is connected to the inverting input terminal and has unity gain (amplification factor 1). The output terminal of the operational amplifier U2 is connected to the output terminal 6 of the driver circuit via a resistor R6 that sets the output impedance of the current buffer circuit 5 (ie, the DC output impedance of the driver circuit) and detects the output current. The diodes D1 and D2 are connected in parallel with a reverse polarity between the non-inverting input terminal of the operational amplifier U2 and the resistor R6 (output terminal 6), and clamp by current bypass when the output of the driver circuit is short-circuited. Here, the diodes D1 and D2 and the resistor R6 constitute an overcurrent protection circuit.

The phase compensation unit 4 stabilizes the operation of the driver circuit. The capacitor C1 connected between the output terminal and the inverting input terminal of the operational amplifier U1 and the resistor R3 connected between the capacitor C1 and the output terminal 6 constitute an RC circuit for phase compensation. Here, in general, the resistance of the resistor R3 is set so that the impedance is sufficiently higher than that of the resistor R6.

  The diode D3 connected between the positive power supply voltage + VCC and the output terminal 6 and the diode D4 connected between the negative power supply voltage −VEE and the output terminal 6 constitute a protective diode for protecting the driver circuit. . The output terminal 7 of the driver circuit is connected to a reference potential.

The operation of the circuit of FIG. 5 will be described below.
The input voltage Vin given from the DA converter is amplified to a predetermined voltage by the voltage amplification unit 3 and then impedance-converted by the current buffer unit 5. The output voltage Vout output from the operational amplifier U2 through the resistor R6 is fed back to the inverting input terminal of the operational amplifier U1 through the resistor R3, and is controlled by the operational amplifier U1 so as to follow the input voltage Vin. Here, the amplification factor of the entire driver circuit is expressed by the following equation.
G1 = (R3 + R4) / R4 (1)

When the driver output is short-circuited, the diodes D1 and D2 clamp the output current Iload when the voltage drop of the resistor R6 becomes Iload × R6 = Vf (Vf: forward voltage of the diode) and clamp the output current Iload. Protect the DUT. The protective diodes D3 and D4 are normally low Vf Schottky diodes or the like, and protect the driver circuit by clamping when the voltage of the DUT is higher than the power supply voltage + VCC + Vf of the driver circuit and lower than -VEE-Vf.

  In general, as a capacitive load is applied to the output terminal of the operational amplifier, the phase becomes unstable and phenomena such as overshoot, ringing, and oscillation tend to occur. However, the use of the phase compensator 4 allows connection to the DUT. The driver circuit can be operated stably even if there is a path capacity due to or a load variation on the DUT side.

  Prior art documents related to driver circuits include the following.

Japanese Patent Laid-Open No. 11-237438

However, in the conventional driver circuit, the more stable the system is, the larger the CR time constant of the phase compensation circuit 4 must be, and the response to the input voltage Vin deteriorates. As mentioned above,
R3 >> R6 (2)
Therefore, the current supplied from the operational amplifier U1 to the output side of the driver circuit via the capacitors C1 and R3 is negligibly small compared to the current supplied from the operational amplifier U2. As a result, there is a problem that the settling time (settling time) of the driver circuit is increased, the test time of the DUT is increased, and the cost required for the test is increased.

  The present invention is intended to solve such problems, and satisfies the conflicting requirements of stability against capacitive load and load fluctuation and followability to input, and as a result, a driver capable of reducing the cost of the DUT. An object is to provide a circuit.

In order to achieve such a problem, a driver circuit according to the invention described in claim 1 is provided.
The input voltage is amplified by the voltage amplification unit, the amplified signal is impedance-converted by the current buffer unit, and the first voltage signal output from the current buffer unit is fed back to the voltage amplification unit to follow the input voltage. In the driver circuit to be controlled,
A phase compensation unit connected between the output terminal of the voltage amplification unit and the output terminal of the current buffer unit with an AC impedance equal to or less than the DC output impedance of the current buffer unit.

The invention according to claim 2
The driver circuit according to claim 1, wherein
The previous phase compensation section
A first resistor that feeds back the first voltage signal to the voltage amplifier;
The first resistor and one end are connected to form a series circuit, and the other end is provided with a capacitor connected to the output terminal of the voltage amplifier.

The invention described in claim 3
In the driver circuit according to claim 1 or 2,
The current buffer unit includes an overcurrent protection circuit.

The invention according to claim 4
The driver circuit according to any one of claims 1 to 3,
The current buffer unit is
The transistor is composed of a class C output stage connected in a push-pull manner.

The invention according to claim 5
The driver circuit according to any one of claims 1 to 4,
The voltage amplifier is
A first operational amplifier in which the input voltage is applied to a non-inverting input terminal;
A second resistor connected between the first resistor and an inverting input terminal of the first operational amplifier;
And a third resistor connected between the inverting input terminal and a reference potential.

The invention described in claim 6
The driver circuit according to claim 3, wherein
The overcurrent protection circuit is
A fourth resistor for setting a DC output impedance, one end of which is connected to the output terminal of the current buffer unit;
An output terminal is connected to the other end of the fourth resistor. When an output current flowing through the fourth resistor is detected and exceeds a predetermined value, a constant current is controlled by controlling an input voltage of the current buffer unit. And a second operational amplifier that realizes a drooping characteristic.

A semiconductor test apparatus according to a seventh aspect of the invention comprises:
A driver circuit according to any one of claims 1 to 6 is used.

  As is apparent from the above description, according to the present invention, the input voltage is amplified by the voltage amplifying unit, the amplified voltage signal is impedance-converted by the current buffer unit, and the output first voltage signal is converted into the above-mentioned first voltage signal. In the driver circuit that feeds back to the voltage amplification unit and controls to follow the input voltage, the AC between the output terminal of the voltage amplification unit and the output terminal of the current buffer unit is equal to or less than the DC output impedance of the current buffer unit. By providing the phase compensator connected by impedance, it is possible to provide a driver circuit that is stable against capacitive loads and load fluctuations and can follow the input voltage at high speed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a configuration circuit diagram showing an example of a driver circuit according to an embodiment of the present invention. The same parts as those in FIG. In FIG. 1, the parts different from FIG. 5 are a voltage amplification unit 13 and a phase compensation unit 14.

The voltage amplifier 13 amplifies the input voltage Vin to a predetermined voltage and feedback-controls the output voltage Vout of the driver circuit. The operational amplifier U10 is an amplifier for gain adjustment. The input voltage Vin is applied to the non-inverting input terminal, the inverting input terminal is connected to the reference potential via the resistor R11, and the output terminal is connected to the inverting input terminal via the resistor R10. Is done. The non-inverting input terminal of the operational amplifier U1 is connected to the output terminal of the operational amplifier 10 via the input resistor R1.

The phase compensation unit 14 stabilizes the operation of the driver circuit. The capacitor C10 connected between the output terminal and the inverting input terminal of the operational amplifier U1 and the resistor R30 connected between the capacitor C10 and the output terminal 6 constitute an RC circuit for phase compensation. Here, between the capacitors C1 and C10, the resistors R3 and R30, and the resistor R6 of the output stage,
C10 ・ R30 >> C1 ・ R3 (3)
R30 ≦ R6 (4)
There is a relationship. As mentioned in the explanation of the conventional example,
R3 >> R6 (2)
Therefore, C10 >> C1 (5)
It is. That is, the output terminal of the voltage amplification unit 13 and the output terminal of the current buffer unit 5 are connected by the phase compensation unit 14 with an AC impedance equal to or less than the DC output impedance of the current buffer unit 5. For example, for C1 · R3 = 10 μs and C1 = 1000 pF, C10 · R30 = 100 μs and C10 = 0.1 μF.

  In the circuit of FIG. 1, the output voltage Vout of the current buffer unit 5 is impedance-converted by the current buffer unit and constitutes the output first voltage signal.

  Further, the resistor R30 constitutes a first resistor that feeds back the first voltage signal Vout to the voltage amplification unit U1.

  The resistor R30 and the capacitor C10 constitute a series circuit.

  The operation of the circuit of FIG. 1 will be described below. The input voltage Vin given from the DA converter or the like is amplified by the operational amplifier U10 to a predetermined voltage with the amplification degree (DC gain) (R11 + R10) / R11 in the voltage amplifier 13, and then the resistor R1 and the operational amplifier U1. Is sent to the current buffer unit 5 through an impedance and subjected to impedance conversion. The output voltage Vout output from the current buffer unit 5 through the output resistor R6 is fed back to the inverting input terminal of the operational amplifier U1 through the resistor R30 so that the operational amplifier U1 follows the output signal of the operational amplifier U10. Be controlled. The operation of the above circuit in each state will be described below.

  In the steady state, the circuit of FIG. 1 performs the same operation as the conventional example of FIG. That is, the DC voltage Vout amplified with a predetermined amplification is generated while following the input voltage Vin.

  In the transient state in which the input voltage Vin varies, the CR time constant of the phase compensation unit 4 is larger than that of the conventional driver circuit, as shown in the above-described equation (3), and thus is more stable. Further, as shown in the above equation (4), since R30 has a resistance value substantially equal to or smaller than R6, the series circuit including the capacitors C10 and R30 from the operational amplifier U1 toward the output side has an AC impedance with a current buffer. It becomes equal to or less than the DC output impedance of the unit 5, and a large current can flow. As a result, the AC output impedance of the driver circuit is lowered, and even when a delay element such as a capacitive load is present on the output side of the driver circuit, the driver circuit can be driven at a higher speed than the conventional one.

  When the output of the driver circuit is short-circuited, the steady-state current is 0 when the input bias current of the operational amplifier U1 and the leakage current of the capacitor C10 and the diodes D1 and D2 are ignored. Therefore, the loss of the operational amplifier U1 when the output is short-circuited It will be small. Therefore, since the steady loss at the time of output short-circuit in the circuit of FIG. 1 is not different from the conventional one, if the design satisfies the allowable loss of each circuit element in the transient state, the circuit of FIG. do not do.

  In the simulation result (not shown) of the circuit of FIG. 1, the response to the step input voltage hardly changed in the range of the capacitive load of 100 pF to 1000 pF and settled within several μs. On the other hand, in the case of the conventional example, the settling time increased to about 20 μs even in the state of the load capacitance of 100 pF, and in the case of the load capacitance of 1000 pF, the rising slew rate was further deteriorated. Furthermore, when the load capacitance is 0.01 μF, the amount of overshoot in the circuit of FIG. 1 is significantly improved compared to the circuit of FIG. Also in the result of simulating the response to the load fluctuation, the circuit in FIG. 1 converged more rapidly.

According to the driver circuit as shown in FIG. 1, the current buffer unit 5 supplies a steady component (DC component), and the voltage amplifier unit 13 supplies a transient component (AC component). Can be made compatible. That is, it is possible to increase the stability by providing the phase compensation unit 14 with a large CR time constant, and at the same time, it is possible to provide high speed with a larger transient current. As a result, it is possible to provide a driver circuit that is stable with respect to a high load capacity and can follow the input signal Vin at high speed, and thus can reduce the cost of the DUT.

FIG. 2 is a structural circuit diagram showing a modification of the circuit of FIG. 1 in which the current buffer unit 5 is replaced with a discrete component. The same parts as those in FIG. 1 are denoted by the same symbols, and redundant description is omitted. A portion different from FIG. 1 is a current buffer unit 15.

The current buffer unit 15 impedance-converts the signal output from the voltage amplification unit 13 and clamps the output current when the output of the driver circuit is short-circuited. The NPN transistor Q1 and the PNP transistor Q2 constitute a push-pull connected class C output stage of bias current 0, and the output signal of the operational amplifier U1 is input to each base terminal via the resistor R2, and the power supply voltage + VCC, −VEE Are connected to the collector terminals of the transistors Q1 and Q2, respectively, and the emitter terminals of the transistors Q1 and Q2 set the DC output impedance of the driver circuit and output the output of the driver circuit through resistors R61 and R62, respectively, that detect the output current. Connected to terminal 6. The series circuit of the diodes D11 and D12 is for current clamping, the cathode side is connected to the base terminal of the transistor Q1, and the anode side is connected to the output terminal 6. Similarly, in the series circuit of the diodes D21 and D22, the anode side is connected to the base terminal of the transistor Q2, and the cathode side is connected to the output terminal 6. Here, the diodes D11, D12, D21, D22 and the resistors R61, R62 constitute an overcurrent protection circuit. The resistor R20 is connected between the base terminals of the transistors Q1 and Q2 and the output terminal 6 as necessary in order to stabilize the circuit operation by adjusting the diode current.

  The operation of the circuit of FIG. 2 will be described below. The voltage signal output from the operational amplifier U1 is applied to the base terminals of the transistors Q1 and Q2 of the current buffer unit 15 via the resistor R2, and correspondingly, the output output from the emitter terminal via the resistors R61 and R62. The voltage Vout is fed back to the inverting input terminal of the operational amplifier U1 through the resistor R30, and controlled so as to follow the input voltage Vin by the operational amplifier U1. When the driver output is short-circuited, the diodes D11 and D12 or the diodes D21 and D22 start to flow when the voltage drop of the resistor R61 or R62 becomes Iload × R61 (or Iload × R62) = Vf, and clamps the output current Iload. Transistors Q1, Q2 and DUT are protected.

According to the driver circuit as shown in FIG. 2, the same effect as that of FIG. 1 is produced, and the cost can be reduced because the output stage is composed of discrete parts.

In addition, since a power loss component can be used for the output stage transistor, it is easy to increase the driver output current.

Further, since the transient output impedance is reduced by the operational amplifier U1 and the capacitor C10, the feedback loop can be stably operated even when the output stage transistor is connected to the class C, and it is not necessary to flow a bias current to the transistor. The number of parts and power loss can be reduced.

FIG. 3 is a configuration circuit diagram showing a modification of the circuit of FIG. 2, in which the operational amplifier 10 is omitted by giving the operational amplifier U 1 of the voltage amplifier 13 a gain of 1 or more. The same parts as those in FIG. 2 are denoted by the same symbols, and redundant description is omitted.

  In the current amplifier 23, the resistor R1 is connected between the input terminal 1 and the non-inverting input terminal of the operational amplifier U1, and the resistor R40 is connected to the capacitor C10 and the resistor R30 of the phase compensation unit 14 and the inverting input terminal of the operational amplifier U1. The resistor R41 is connected between the inverting input terminal of the operational amplifier U1 and the reference potential.

  In the circuit of FIG. 3, the operational amplifier U1 constitutes a first operational amplifier in which the input voltage Vin is applied to the non-inverting input terminal.

The resistor R40 constitutes a second resistor connected between the first resistor R30 and the inverting input terminal of the first operational amplifier U1, and the resistor R41 is connected to the inverting input terminal of the first operational amplifier U1. A third resistor connected between the reference potential and the reference potential is configured.

The operation of the circuit of FIG. 3 will be described below. The operation between the voltage amplifying unit 23 and other parts is the same as in the case of FIG. The amplification factor of the entire driver circuit is G = (R41 + R40 + R30) / R41 (6)
It is represented by

According to the drive circuit having such a configuration, the same effects as in FIG. 2 can be produced, and the number of operational amplifiers can be reduced, so that cost reduction and reliability can be further improved.

FIG. 4 is a circuit diagram showing a second modification of the circuit shown in FIG. 1, in which the overcurrent protection circuit of the current buffer unit is configured using an IC. The same parts as those in FIG. 1 are denoted by the same symbols, and redundant description is omitted.

In the overcurrent protection circuit of the current buffer unit 25, one end of the resistor R50 is connected to the positive power supply voltage + VCC, and the other end is connected to the anode terminal of the diode D33. The cathode terminal of the diode D33 is connected to the anode terminal of the diode D34, the cathode terminal is connected to one end of the resistor R51, and the other end is connected to the negative power supply voltage -VEE. The inverting input terminal of the operational amplifier U3 is connected to the anode terminal of the diode D33, and the non-inverting input terminal is connected to the terminal 6. The inverting input terminal of the operational amplifier U4 is connected to the cathode terminal of the diode D34, and the non-inverting input terminal is connected to the terminal 6. The output terminal of the operational amplifier U3 is connected to the anode terminal of the diode D31, and the cathode terminal of the diode D31 is connected to the non-inverting input terminal of the operational amplifier U2. The output terminal of the operational amplifier U4 is connected to the cathode terminal of the diode D32, and the anode terminal of the diode D32 is connected to the non-inverting input terminal of the operational amplifier U2.

In the circuit of FIG. 4, the resistor R <b> 6 constitutes a fourth resistor for setting DC output impedance connected to the output terminal 6 of the current buffer unit 15.

The operational amplifiers U3 and U4 constitute a second operational amplifier that controls the input voltage of the current buffer unit 25 and realizes a constant current drooping characteristic.

  The operation of the circuit of FIG. 4 will be described below. When the operational amplifier U2 serves as a current source, a voltage lower than the output voltage of the operational amplifier U2 by the forward voltage Vf is input to the inverting input terminal of the operational amplifier U4. When the voltage at the terminal of the resistor R6 (the non-inverting input terminal of the operational amplifier U4) is lower than the voltage at the inverting input terminal, the output of the operational amplifier U4 lowers the voltage at the non-inverting input terminal of the operational amplifier U2. Negative feedback is applied via the operational amplifier U2. As a result, the voltage across R6 is controlled equal to the forward voltage Vf, and the output source current is limited to Vf / R6. When the operational amplifier U2 becomes a current sink, the operational amplifier U3 operates in the same manner and the sink current is limited to Vf / R6.

In the circuit of FIG. 1, since the load current flows through the clamped diode itself, it is directly affected by the If-Vf characteristics (If: diode current) of the diodes D1 and D2, and as a result, the current at the time of short circuit is The power consumption at the time of short circuit of operational amplifier U1 became large. On the other hand, in the circuit of FIG. 4, since the forward voltage Vf of the diodes D33 and D34 for detecting current is determined only by the current flowing through the resistors R50 and R51, there is little difference in the forward voltage Vf depending on the operating point. The constant current drooping characteristic becomes steep, and the power consumption at the time of short circuit can be suppressed. Therefore, it is possible to use even an IC with a small allowable loss, so that the mounting area can be reduced and the cost can be reduced.

Although not shown, if the drooping characteristic of the overcurrent protection circuit is provided with a hysteresis characteristic, the power loss at the time of a short circuit can be further reduced.

If a shunt regulator or the like is used instead of the diode, the drooping characteristics can be further improved.

In each of the above-described embodiments, the case where a DC level voltage driver circuit is used as the driver circuit has been described. However, the present invention is not limited to this, and the present invention can be applied to various driver circuits that drive a capacitive load.

Further, in the driver circuits of FIGS. 1, 2, and 4, if the voltage amplifying unit 23 of FIG. 3 is used instead of the voltage amplifying unit 13, the cost can be further reduced and the reliability can be improved.

FIG. 3 is a configuration circuit diagram showing an example of a driver circuit according to an embodiment of the present invention. FIG. 6 is a configuration circuit diagram showing a modification of the circuit of FIG. 1. FIG. 5 is a configuration circuit diagram showing a modification of the circuit of FIG. 2. FIG. 10 is a configuration circuit diagram showing a second modification of the circuit of FIG. 1. It is a configuration circuit diagram showing an example of a conventional driver circuit.

Explanation of symbols

5, 15, 25 Current buffer unit 13, 23 Voltage amplification unit 14 Phase compensation unit C10 Capacitor Q1, Q2 Transistor R6 Fourth resistor R30 First resistor R40 Second resistor R41 Third resistor U1 First operational amplifier U3, U4 second operational amplifier Vin input voltage Vout first voltage signal

Claims (7)

The input voltage is amplified by the voltage amplification unit, the amplified signal is impedance-converted by the current buffer unit, and the first voltage signal output from the current buffer unit is fed back to the voltage amplification unit to follow the input voltage. In the driver circuit to be controlled,
A driver circuit comprising a phase compensation unit connected between an output terminal of the voltage amplification unit and an output terminal of the current buffer unit with an AC impedance equal to or less than a DC output impedance of the current buffer unit . The previous phase compensation section
A first resistor that feeds back the first voltage signal to the voltage amplifier;
2. The driver circuit according to claim 1, further comprising: a capacitor connected to the first resistor and one end to form a series circuit and having the other end connected to the output terminal of the voltage amplification unit.   The driver circuit according to claim 1, wherein the current buffer unit includes an overcurrent protection circuit. The current buffer unit is
The driver circuit according to any one of claims 1 to 3, wherein the transistor is configured by a class-C output stage having push-pull connection. The voltage amplifier is
A first operational amplifier in which the input voltage is applied to a non-inverting input terminal;
A second resistor connected between the first resistor and an inverting input terminal of the first operational amplifier;
5. The driver circuit according to claim 1, further comprising a third resistor connected between the inverting input terminal and a reference potential. The overcurrent protection circuit is
A fourth resistor for setting a DC output impedance, one end of which is connected to the output terminal of the current buffer unit;
An output terminal is connected to the other end of the fourth resistor. When an output current flowing through the fourth resistor is detected and exceeds a predetermined value, a constant current is controlled by controlling an input voltage of the current buffer unit. 4. The driver circuit according to claim 3, further comprising a second operational amplifier that realizes a drooping characteristic. A semiconductor test apparatus using the driver circuit according to claim 1.

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