JP2003316454A - Stabilized power circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To implement phase compensation for a stabilized power circuit so that it can stably operates even if an output condenser of low ESR (equivalent series resistance) is used. <P>SOLUTION: A resistor R3 and a capacitor C2 are connected between a collector and a base of a transistor Q2. In addition, a capacitor C3 is connected in parallel to the resistor R3. A first cut off frequency f1 is set with the capacitor C2, a miller capacity of the transistor Q2 and a current of a constant current circuit 22, and a phase margin in unity gain is secured with the resistor R3. In addition, in a frequency band including frequencies higher than the unity gain, a voltage gain is prevented from exceeding one with the resistor R3, the capacitors C2, C3, the miller capacity of the transistor Q2 and the current of the constant current circuit 22. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a stabilized power supply circuit, and more particularly to a technique for performing phase compensation.

[0002]

2. Description of the Related Art Stabilized power supply circuits for phase compensation include those described in Patent Documents 1 and 2, for example.

[0003]

[Patent Document 1] Japanese Patent Laid-Open No. 2000-47738 (FIG. 5)
And paragraph 0002)

[Patent Document 2] Japanese Patent Laid-Open No. 2001-195138 (FIGS. 5 to 8)

FIG. 9 shows a conventional stabilized power supply circuit (hereinafter referred to as a series regulator). The conventional series regulator 50 includes a voltage output unit 51 and an output voltage detection unit 5
2, an error amplification unit 53, and a reference voltage unit 54.

The reference voltage section 54 is connected to the error amplification section 53 in order to supply the reference voltage to the error amplification section 53. The error amplification unit 53 supplies a control signal to the voltage output unit 51 so that the error voltage between the output voltage Vout detected by the output voltage detection unit 52 and the reference voltage supplied from the reference voltage unit 54 becomes zero. Is. Error amplifier 53
Is a differential amplifier 55, an amplifier 56, and a phase compensation circuit 5
7 and 7.

The phase compensation circuit 57 is a circuit for performing phase compensation in order to stabilize the operation of the series regulator 50, and is composed of a circuit in which a resistor R51 and a capacitor C52 are connected in series.

Such a conventional series regulator 5
At 0, the voltage output unit 51 generates the output voltage Vout from the supply voltage Vin supplied from the input terminal Pin based on the control signal supplied from the error amplification unit 53, and outputs the output voltage Vout to the output terminal Pout.

The output voltage detector 52 detects the output voltage Vout output from the voltage output unit 51. Differential amplifier 5
Reference numeral 5 amplifies an error voltage between the detected output voltage Vout and the reference voltage supplied from the reference voltage unit 54, and an amplifier 56
Further amplifies the amplified error voltage to generate a control signal and supplies the control signal to the voltage output unit 51.

As described above, in the series regulator 50, the output voltage Vout is stabilized by feeding back the control signal corresponding to the error voltage to the voltage output section 51. An output capacitor C51 is generally connected to the output terminal Pout of the series regulator 50. The capacitor C51 is for improving the transient response when the load suddenly changes.

Some of the series regulators 50 are formed of semiconductor integrated circuits (ICs), and in this case, the capacitor C51 is externally attached to the IC-type series regulator 50.

Conventionally, an aluminum electrolytic capacitor has been used as the capacitor C51. However, in response to demands for ripple voltage reduction, high frequency characteristics, and mounting area reduction, multilayer ceramic capacitors having a smaller equivalent series resistance (ESR) than aluminum electrolytic capacitors are being used.

[0012]

When an aluminum electric field capacitor is used as the capacitor C51, since the ESR is large to some extent, the ESR acts as a feedback resistor and a phase margin can be secured. On the other hand, in the monolithic ceramic capacitor, the ESR is small and the phase return is small, so that it is difficult to secure the phase margin. It should be noted that this phase margin is defined by the frequency characteristics of the voltage gain and phase of the inverting amplifier (negative feedback) shown in FIGS.
360 ° for the phase at the frequency where the voltage gain becomes 1
Is a value (φ11).

This operation is shown in FIG. Figure 10 (a)
Shows the frequency characteristic of the voltage gain G, and FIG.
Shows the frequency characteristic of the phase angle φ. As shown in FIG. 10A, the cutoff frequency f1 is determined by the mirror capacitance formed by the capacitor C52 and the amplifier 56 of the phase compensation circuit 57 and the current I ₁ . If the frequency f is equal to or lower than the cutoff frequency f1 (f <f1), the voltage gain G
Is 1 or more.

When the frequency f increases and becomes a frequency band of f1 <f <f11, the voltage gain G attenuates. Here, the resistor R51 is a feedback resistor inserted in order to eliminate the phase delay in the vicinity of the voltage gain G of 1, and FIG.
The phase delay decreases near point A shown in (b).

However, the frequency f is further increased to f11.
When <f, the voltage gain G increases due to the influence of the resistor R51. The voltage gain G exceeds the voltage gain 1.
At this time, if there is a phase delay of the error voltage of the internal elements such as the differential amplifier 55, as shown in FIG. 10B, f = f1
At 2, the phase margin φ11 becomes small. If the phase margin is small, the operation of the series regulator 50 becomes unstable, and oscillation etc. may occur.

The present invention has been made in view of such conventional problems, and an object of the present invention is to provide a stabilized power supply circuit which can stably operate.

[0017]

In order to achieve the above object, a stabilized power supply circuit according to an aspect of the present invention is supplied with a DC voltage and outputs a DC output voltage based on a control signal. And an amplifier that amplifies the error voltage between the output voltage output by the voltage output unit and the reference voltage, and outputs the amplified signal to the voltage output unit as a control signal,
The amplification unit has a first cutoff frequency in a frequency band in which the gain for amplifying the error voltage exceeds 1, and is higher than the first cutoff frequency and has a gain of 1 or more.
Has a second cutoff frequency in the following frequency band, the phase margin is maintained in the range of 30 ° to 90 ° at a frequency higher than the first cutoff frequency, and the second cutoff It has a frequency characteristic that the gain does not exceed 1 at a frequency higher than the frequency. According to such a configuration, the stabilized power supply circuit is
It operates stably.

The phase margin of the amplification section is 30.
A first phase compensation circuit that feeds back the control signal to the error voltage to compensate the phase of the control signal so as to be held in the range of 90 ° to 90 °; and a frequency higher than the second cutoff frequency. So that the gain does not exceed 1 at frequency,
A second phase compensating circuit for compensating the phase of the control signal phase-compensated by the first phase compensating circuit.

In this case, the first phase compensation circuit includes a first capacitor and a resistor connected in series between a terminal for inputting the error voltage of the amplification section and a terminal for outputting the control signal. And the second phase compensation circuit may be configured by a second capacitor connected in parallel with the resistance of the first phase compensation circuit.

Further, the voltage output section includes a first main electrode, a second main electrode, and a first control electrode for controlling a conduction state between the first main electrode and the second main electrode. The amplifying section has the first control electrode connected to a terminal for outputting the control signal, the first main electrode connected to a terminal to which the DC voltage is supplied, and the output voltage is output. To the terminal
A first transistor connected to a main electrode of the differential amplifier for generating an error voltage between the output voltage output by the voltage output unit and a reference voltage; and the first main electrode. A constant current circuit connected between the first main electrode and the third control electrode, a third main electrode, a fourth main electrode and the third main electrode.
A second control electrode for controlling a conduction state between the main electrode and the fourth main electrode, the second control electrode being connected to the output terminal of the differential amplifier, and the third main electrode Is connected to the first control electrode, and the fourth main electrode is grounded to a second
And an amplifier formed by the transistor of FIG. In this case, the first transistor is NP
It may be either an N-type bipolar transistor, a PNP-type bipolar transistor, an N-channel type field effect transistor or a P-channel type field effect transistor. The second transistor is an NPN type bipolar transistor, a PNP type bipolar transistor,
It may be either an N-channel field effect transistor or a P-channel field effect transistor.

Further, the voltage output section includes a first main electrode, a second main electrode, and a first control electrode for controlling a conduction state between the first main electrode and the second main electrode. A plurality of transistors in Darlington connection, each of which has a first control electrode of a first-stage transistor of the transistors of the plurality of stages, is connected to a terminal from which the amplifier outputs the control signal; The terminal to which the DC voltage is supplied has the first of the last-stage transistors of the plurality of transistors.
And the second main electrode of the final-stage transistor may be connected to the terminal to which the output voltage is output.

Further, the amplifying unit includes a differential amplifier that generates an error voltage between the output voltage output from the voltage output unit and a reference voltage, and the first main electrode and the first control electrode. A constant current circuit connected to each other, a third main electrode, a fourth main electrode, and a second control electrode for controlling a conduction state between the third main electrode and the fourth main electrode. And an amplifier formed by a plurality of Darlington-connected transistors, the second control electrode of the first-stage transistor of the plurality of stages of transistors being connected to the output terminal of the differential amplifier, The third main electrode of the final-stage transistor of the final-stage transistors may be connected to the first control electrode, and the fourth main electrode of the final-stage transistor may be grounded.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION A stabilized power supply circuit according to an embodiment of the present invention will be described below with reference to the drawings. In the present embodiment, the stabilized power supply circuit will be described as a series regulator.

[First Embodiment] FIG. 1 shows a first embodiment of the present invention.
It is a block diagram which shows the series regulator which concerns on embodiment of FIG. The series regulator 1 according to the present embodiment is
The voltage output unit 11, the output voltage detection unit 12, the error amplification unit 13, and the reference voltage unit 14 are provided. The voltage output unit 11 generates the output voltage Vout from the supply voltage Vin supplied from the input terminal Pin based on the control signal supplied from the error amplification unit 13, and outputs the output voltage Vout to the output terminal Pout. . The voltage output unit 11 is, for example, NP
It is composed of an N-type bipolar transistor Q1.

A capacitor C1 is connected between the output terminal Pout and the ground to improve the transient response when the load suddenly changes. The output voltage detector 12 detects the output voltage, and is composed of resistors R1 and R2. The resistors R1 and R2 are connected in series between the output terminal Pout and the ground to form a voltage dividing circuit.

The reference voltage section 14 is connected to the error amplification section 13 and supplies the reference voltage Vref to the error amplification section 13. The error amplification unit 13 amplifies the error voltage between the detection voltage supplied from the output voltage detection unit 12 and the reference voltage Vref of the reference voltage unit 14, and outputs the amplified error voltage as a control signal to the transistor Q1. Is. The error amplification unit 13
A differential amplifier 21, a constant current circuit 22, an amplifier 23,
And a phase compensation circuit 24. Differential amplifier 21
Is for differentially amplifying the error voltage between the detection voltage supplied from the output voltage detection unit 12 and the reference voltage Vref supplied from the reference voltage unit 14, and includes the constant current circuit 25 and the transistors Q3 to Q6. I have it.

The constant current circuit 25 includes transistors Q3 to Q3.
6 is a circuit for supplying a constant current, and is connected to the input terminal Pin. The transistors Q3 and Q4 are PNP type bipolar transistors, and the transistors Q5 and Q6 are NPN type bipolar transistors. The transistors Q3 to Q6 are transistors for performing differential amplification, and the transistors Q5 and Q6 form a current mirror circuit.

The emitter of the transistor Q3 and the emitter of the transistor Q4 are connected to the constant current circuit 25. The base of the transistor Q3 is connected to the reference voltage unit 14, and the base of the transistor Q4 is connected to the connection point of the resistors R1 and R2.

The collector of the transistor Q5 is connected to the collector of the transistor Q3, and the emitter is grounded. The collector of the transistor Q6 is connected to the collector of the transistor Q4, and the emitter is grounded. The bases of the transistors Q5 and Q6 are both connected to the collector of the transistor Q6. The current mirror circuit composed of the transistors Q5 and Q6 has a relatively large mirror capacitance in the error amplifier 13.

On the other hand, the constant current circuit 22 includes a transistor Q
1 outputs a constant current, and is connected between the collector and the base of the transistor Q1. Amplifier 23
Is a circuit that controls the amount of current supplied to the base of the transistor Q1 based on the output signal output from the differential amplifier 21. The amplifier 23 is composed of, for example, an NPN bipolar transistor Q2. Transistor Q
The base of 2 is connected to the collector of the transistor Q5. The collector of the transistor Q2 is connected to the base of the transistor Q1, and the emitter of the transistor Q2 is grounded.

The phase compensation circuit 24 is a circuit for compensating the phase of the series regulator 1. Phase compensation circuit 24
Includes a resistor R3 and capacitors C2 and C3. The capacitor C2 and the resistor R3 are connected in series. This series capacitor C2 and resistor R3 are connected between the collector and base of the transistor Q2.
The capacitor C3 is connected in parallel across the resistor R3.

A capacitor C2 and a resistor R connected in series
3 is a circuit for ensuring a phase margin in unity gain (voltage gain 1). The capacitor C3 is
This is a capacitor for performing phase compensation corresponding to the operation delay of the internal elements of the series regulator 1 in a frequency band equal to or higher than the unity gain frequency. The capacitance value of the capacitor C3 is set so that the phase compensation by the capacitor C3 is performed in a lower frequency band than a band in which the operation delay of the internal elements of the series regulator 1 affects the phase.

Next, the operation of the series regulator 1 according to this embodiment will be described. The transistor Q1 outputs the output voltage Vout based on the base current supplied to the base from the supply voltage Vin supplied from the input terminal Pin.
The output voltage detector 12 divides the output voltage Vout and supplies the divided voltage to the differential amplifier 21.

The differential amplifier 21 amplifies the error voltage between the divided voltage supplied from the output voltage detection unit 12 and the reference voltage Vref supplied from the reference voltage unit 14, and the amplified error voltage is applied to the base of the transistor Q2. Supply to. A base current corresponding to the amplified error voltage flows through the base of the transistor Q2.

When the output voltage Vout decreases and the divided voltage supplied from the output voltage detecting section 12 becomes lower than the reference voltage Vref of the reference voltage section 14, the base current flowing through the base of the transistor Q2 decreases. Transistor Q2
When the base current of the transistor Q2 decreases, the collector current of the transistor Q2 decreases and the base current of the transistor Q1 increases. Therefore, the equivalent resistance of the transistor Q1 becomes small and the collector current of the transistor Q1 increases, so that the output voltage Vout rises.

On the other hand, the output voltage Vout rises, and the divided voltage supplied from the output voltage detection unit 12 becomes the reference voltage unit 14.
When it becomes higher than the reference voltage Vref of
The base current increases and the collector current increases. Therefore, the equivalent resistance of the transistor Q1 increases and the collector current of the transistor Q1 decreases, so that the output voltage Vout
Will fall.

In this way, the series regulator 1 which gives the control signal obtained by inverting and amplifying the error voltage to the transistor Q1 stabilizes the output voltage Vout. Next, the phase compensation operation of the series regulator 1 will be described with reference to FIG. 2 (a) shows the frequency characteristic of the voltage gain G, and FIG. 2 (b) shows the frequency characteristic of the phase angle φ.

The frequency characteristic of the error amplifier 13 is such that the capacitor C2 has a frequency band in which the voltage gain exceeds 1.
And a mirror capacitance formed by the transistor Q2,
It has the first cutoff frequency f1 determined by the current of the constant current circuit 22 and secures the phase margin near the unity gain.

The frequency characteristic of the error amplifying section 13 is such that the resistor R3 and the capacitor C are in a frequency band higher than the unity gain frequency and a frequency band in which the voltage gain is lower than 1.
3, a capacitor C2, a mirror capacitance formed by the transistor Q2, and a second cutoff frequency determined by the current of the constant current circuit 22.

As shown in FIG. 2A, the voltage gain G
Is constant when the frequency f is f <f0. Frequency f
When f0 ≦ f <f1, the voltage gain G becomes
It decreases as shown in FIG. This is the cutoff frequency f0 determined by the transistor Q1 and the capacitor C1.
Is the effect of. The straight line p shown in FIGS.
Indicates frequency characteristics determined by the impedance of the load connected to the capacitor C1.

When the frequency f is f1≤f <f3, the voltage is changed by the cutoff frequency f1 determined by the capacity of the capacitor C2, the current flowing through the constant current circuit 22 and the mirror capacity formed by the transistor Q2. The gain G is further reduced. In the vicinity of the unity gain frequency f2, the phase delay is reduced by the effect of the resistor R3, and the phase margin is secured at 30 ° to 90 °, as shown in FIG. 2 (b). As described above, the phase margin is the phase at the frequency at which the voltage gain becomes 1 in the frequency characteristics of the voltage gain and the phase of the inverting amplifier (negative feedback) shown in FIG.
The value obtained by adding 360 °.

When the frequency f becomes f3≤f <f4, the voltage gain G increases again as shown in FIG. 2 (a).
This is due to the action of the capacitor C2 and the resistor R3. When the frequency f becomes f4 ≦ f, the voltage gain G becomes
It decreases as shown in (a). This is the capacitor C3
This is because the effect of the resistor R3 is suppressed by. Also, capacitors C2 and C3 that are equivalently connected in series
The voltage gain G becomes less than 1 in the case of f> f3 due to the influence of the cutoff frequency determined by the current of the constant current circuit 22 and the mirror capacitance of the transistor Q2 and the current of the constant current circuit 22. Therefore, oscillation does not occur and the operation is stable.

As described above, according to this embodiment, the frequency characteristic of the error amplifying section 13 is determined by the mirror capacitance formed by the capacitor C2 and the transistor Q2 and the current of the constant current circuit 22. Frequency f1
And a cutoff frequency determined by the mirror capacitance formed by the resistor R3, the capacitor C3, the capacitor C2, and the transistor Q2, and the current of the constant current circuit 22. This ensures a phase margin at the unity gain frequency f2. Further, in the frequency band higher than the unity gain frequency f2, the phase compensation corresponding to the operation delay by the internal element is performed, so that the output capacitor C
Even when the ESR of 1 is low and the phase shift is small, the operation can be stabilized.

Further, since the phase delay of the IC internal element can be dealt with, the variation of the phase compensation of the series regulator 1 due to the variation of the process can be adjusted. Moreover, since the phase margin can be set only by the linear element of the capacitor and the resistor, the phase margin can be easily set. Further, the influence of the transition frequency (Trasition Frequency: frequency at which the current amplification factor is 1) of the element can be reduced.

[Second Embodiment] FIG. 3 shows a second embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, Comprising: The code | symbol common to the element common to the element in FIG. 1 is attached | subjected.

In the series regulator 1 of the first embodiment described above, the voltage output unit 11 is composed of the NPN bipolar transistor Q1 and the amplifier 23 is composed of the NPN bipolar transistor Q2. These transistors Q1 or Q2 can be changed to PNP type transistors.

In the series regulator 2 of FIG. 3, the voltage output section 11 is composed of a transistor Q7 which is a PNP type bipolar transistor. The amplifier 23 of the series regulator 2 of FIG. 3 is composed of a transistor Q8 which is a PNP bipolar transistor. The other configuration of the series regulator 2 is similar to that of FIG. The collector of the transistor Q7 has an output terminal Pou.
It is connected to t and the emitter of the transistor Q7 is connected to the input terminal Pin. The base of the transistor Q7 is connected to the emitter of the transistor Q8. The base of the transistor Q8 is connected to the collector of the transistor Q5. The collector of the transistor Q8 is grounded. The phase compensation circuit 24 is connected between the emitter and the base of the transistor Q8.

Next, the operation of the series regulator 2 will be described. The transistor Q7 outputs the output voltage Vout based on the base current supplied to the base from the collector. The output voltage detector 12 divides the output voltage Vout,
The divided voltage is supplied to the differential amplifier 21. The differential amplifier 21 amplifies the error voltage between the divided voltage supplied from the output voltage detection unit 12 and the reference voltage Vref supplied from the reference voltage unit 14, and supplies the amplified error voltage to the base of the transistor Q8. . A base current corresponding to the amplified error voltage flows through the base of the transistor Q8.

When the output voltage Vout decreases and the divided voltage supplied from the output voltage detecting unit 12 becomes lower than the reference voltage Vref of the reference voltage unit 14, the base current flowing through the base of the transistor Q8 increases. When the base current of the transistor Q8 increases, the emitter current of the transistor Q8 increases and the base current of the transistor Q7 increases. Therefore, the equivalent resistance of the transistor Q7 becomes small and the collector current of the transistor Q7 increases, so that the output voltage Vout rises.

On the other hand, the output voltage Vout rises, and the divided voltage supplied from the output voltage detection unit 12 becomes the reference voltage unit 14.
When it becomes higher than the reference voltage Vref of the transistor Q8,
Of the transistor Q8 decreases, and the emitter current of the transistor Q8 decreases. Therefore, the equivalent resistance of the transistor Q7 increases and the collector current of the transistor Q7 decreases, so that the output voltage Vout decreases.

As described above, in the series regulator 2 including the transistors Q7 and Q8, the transistors Q7 and Q8
8 operates similarly to the transistors Q1 and Q2 of the first embodiment. The phase compensation circuit 24 performs the phase compensation of the control signal, as in the first embodiment. Therefore, the series regulator 2 has the same effects as the series regulator 1 of the first embodiment.

[Third Embodiment] FIG. 4 shows a third embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, Comprising: The code | symbol common to the element common to the element in FIG. 1 is attached | subjected.

In the series regulator 1 of the first embodiment described above, the voltage output unit 11 is composed of the NPN bipolar transistor Q1 and the amplifier 23 is composed of the NPN bipolar transistor Q2. These transistors Q1 and Q2 and the transistors Q3 to Q6 in the differential amplifier 21 can be changed to field effect transistors.

In the series regulator 3 of FIG. 4, the voltage output section 11 is composed of a transistor Q9 which is an N-channel field effect transistor. The amplifier 23 of the series regulator 3 is composed of a transistor Q10 which is an N-channel field effect transistor. The differential amplifier 21 of the series regulator 3 includes transistors Q11 and Q which are P-channel field effect transistors.
12 and transistors Q13 and Q14 which are N-channel field effect transistors. The other configuration of the series regulator 3 is similar to that of FIG.

The source, which is the second main electrode of the transistor Q9, is connected to the output terminal Pout, and the transistor Q9
The drain, which is the first main electrode of, is connected to the input terminal Pin. The gate of the transistor Q9 which is the first control electrode is connected to the drain which is the third main electrode of the transistor Q10. The gate of the transistor Q10, which is the second control electrode, is connected to the drain of the transistor Q13 in the differential amplifier 21. The source of the transistor Q10, which is the fourth main electrode, is grounded. The phase compensation circuit 24 is connected between the drain and gate of the transistor Q10.

The source of the transistor Q11 and the source of the transistor Q12 of the differential amplifier 21 are the constant current circuit 2
Connected to 5. The gate of the transistor Q11 is
It is connected to the reference voltage unit 14 and the gate of the transistor Q12 is connected to the connection point of the resistors R1 and R2.

The drain of the transistor Q13 is connected to the drain of the transistor Q11, and the drain of the transistor Q1
The source of 3 is grounded. The drain of the transistor Q14 is connected to the drain of the transistor 12,
The source of the transistor Q14 is grounded.

The gates of the transistors Q13 and Q14 are
Both are connected to the drain of the transistor Q12. Next, the operation of the series regulator 3 will be described.
The transistor Q9 outputs the output voltage Vout based on the voltage supplied to the gate from the source. The output voltage detector 12 divides the output voltage Vout and supplies the divided voltage to the differential amplifier 21. The differential amplifier 21 amplifies the error voltage between the divided voltage supplied from the output voltage detection unit 12 and the reference voltage Vref supplied from the reference voltage unit 14, and supplies the amplified error voltage to the gate of the transistor Q10.

When the output voltage Vout decreases and the divided voltage supplied from the output voltage detecting unit 12 becomes lower than the reference voltage Vref of the reference voltage unit 14, the gate voltage of the transistor Q10 decreases. As a result, the transistor Q10
Between the gate and source of the transistor Q10
Drain current is reduced. Therefore, the transistor Q
The gate voltage of 9 becomes high. Therefore, the transistor Q
The equivalent resistance of 9 decreases, the current flowing through the transistor Q9 increases, and the output voltage Vout increases. On the other hand, when the output voltage Vout rises and the divided voltage supplied from the output voltage detector 12 becomes higher than the reference voltage Vref of the reference voltage unit 14, the gate voltage of the transistor Q10 becomes high and the drain current of the transistor Q10 increases. Will increase. Therefore, the gate voltage of the transistor Q9 drops. Therefore, the equivalent resistance of the transistor Q9 increases and the current flowing through the transistor Q9 decreases, so that the output voltage Vou
t decreases.

In the series regulator 3 including the field effect transistors Q9 and Q10 as described above, the transistors Q9 and Q10 function similarly to the transistors Q1 and Q2 of the first embodiment.
The phase compensation circuit 24 performs the phase compensation of the control signal, as in the first embodiment. Therefore, the same effect as that of the series regulator 1 of the first embodiment is obtained. Further, since each of the transistors Q9 to Q14 is of the voltage control type, it is possible to reduce the base current in the bipolar transistor, and it is possible to reduce the power consumption.

[Fourth Embodiment] FIG. 5 shows a fourth embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, and the common code | symbol is attached | subjected to the element common to the element in FIG.

In the series regulator 3 of the third embodiment described above, the voltage output section 11 is composed of the transistor Q9 which is an N-channel field effect transistor, and the amplifier 23
Is a transistor Q of an N-channel field effect transistor
It was composed of 10. These transistors Q9, Q
10 can be changed to a P-channel type field effect transistor.

In the series regulator 4 of FIG. 5, the voltage output section 11 is composed of a transistor Q15 which is a P-channel field effect transistor. The amplifier 23 of the series regulator 4 is composed of a transistor Q16 which is a P-channel field effect transistor.
The other configuration of the series regulator 4 is similar to that of the series regulator 3.

The source as the first main electrode of the transistor Q15 is connected to the input terminal Pin and
The drain, which is the second main electrode of 15, is the output terminal Pout.
It is connected to the. The gate of the transistor Q15, which is the first control electrode, is connected to the source, which is the third main electrode of the transistor Q16. The gate of the transistor Q16, which is the second control electrode, is connected to the drain of the transistor Q13 in the differential amplifier 21. The drain of the transistor Q16, which is the fourth main electrode, is grounded. The phase compensation circuit 24 is connected between the source and gate of the transistor Q16.

Next, the operation of the series regulator 4 will be described. The transistor Q15 outputs the output voltage Vout based on the voltage applied to the gate from the drain. The output voltage detector 12 divides the output voltage Vout and supplies the divided voltage to the differential amplifier 21. Differential amplifier 21
Amplifies the error voltage between the divided voltage supplied from the output voltage detection unit 12 and the reference voltage Vref supplied from the reference voltage unit 14, and supplies the amplified error voltage to the gate of the transistor Q16.

When the output voltage Vout decreases and the divided voltage supplied from the output voltage detecting unit 12 becomes lower than the reference voltage Vref of the reference voltage unit 14, the gate voltage of the transistor Q16 decreases. When the gate voltage of the transistor Q16 decreases, the gate-source voltage of the transistor Q16 increases. This increases the current flowing through the transistor Q16 and lowers the gate voltage of the transistor Q15. Therefore, the equivalent resistance of the transistor Q15 becomes small and the current flowing through the transistor Q15 increases, so that the output voltage Vout increases.

On the other hand, the output voltage Vout rises, and the divided voltage supplied from the output voltage detecting section 12 becomes the reference voltage section 14.
When it becomes higher than the reference voltage Vref of the transistor Q1,
6, the gate voltage of 6 rises, and the gate-source voltage of the transistor 16 drops. Therefore, the transistor Q
Since the equivalent resistance of 15 increases and the current flowing through the transistor Q15 decreases, the output voltage Vout decreases.

In the series regulator 4 having the transistors Q15 and Q16 as described above, the transistor Q1
5 and Q16 function similarly to the transistors Q9 and Q10 of the third embodiment. Phase compensation circuit 24
Performs phase compensation of the control signal as in the third embodiment. Therefore, the series regulator 4 has the same effects as the series regulator 3 of the third embodiment.

[Fifth Embodiment] FIG. 6 shows the fifth embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, Comprising: The code | symbol common to the element common to the element in FIG. 1 is attached | subjected.

In the series regulators 1 to 4 of the first to fourth embodiments, the voltage output section 11 and the amplifier 23 are each composed of one transistor, but these voltage output section 11 or The amplifier 23 may be composed of a plurality of transistors.

The voltage output unit 11 of the series regulator 5 shown in FIG. 6 is composed of a transistor Q17 which is an NPN bipolar transistor and a transistor Q18 which is an NPN bipolar transistor. The amplifier 23 of the series regulator 5 is composed of a transistor Q19 which is an NPN bipolar transistor and a transistor Q20 which is an NPN bipolar transistor. The other configuration of the series regulator 5 is the same as that of the series regulator 1, for example.

The collectors, which are the first main electrodes of the transistors Q17 and Q18 of the voltage output section 11, are
It is connected to the input terminal Pin. The emitter of the transistor Q17 is connected to the base of the transistor Q18. The emitter of the transistor Q18, which is the second main electrode, is connected to the output terminal Pout. That is, the transistors Q17 and Q18 are Darlington-connected. The base that is the first control electrode of the transistor Q17 in the first stage is connected to the collector that is the third main electrode of the transistors Q19 and Q20 in the amplifier 23.

The emitter of the transistor Q19 in the amplifier 23 is connected to the base of the transistor Q20. That is, the transistor Q19 and the transistor Q20 are Darlington connected. The base, which is the second control electrode of the first-stage transistor Q19, is the differential amplifier 2
1 is connected to the collector of the transistor Q5. The emitter of the transistor Q20, which is the fourth main electrode, is grounded. The phase compensation circuit 24 is connected between the collectors of the transistors Q19 and Q20 and the base of the transistor Q19.

In such a series regulator 5,
Voltage output section 1 composed of transistors Q17 and Q18
1 operates similarly to the voltage output unit 11 of the series regulator 1 including the transistor Q1. Further, the amplifier 23 composed of the transistors Q19 and Q20 operates similarly to the amplifier 23 of the series regulator 1 composed of the transistor Q2.

Therefore, the series regulator 5 has the first
The same effect as that of the series regulator 1 of the embodiment is obtained. Further, the voltage output section 1 of the series regulator 5
1 and the amplifier 23 are composed of the transistors Q17 and Q18 and the transistors Q19 and Q20 connected in Darlington, respectively, so that the amplification factor of the power transistor can be increased.

[Sixth Embodiment] FIG. 7 shows a sixth embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, and the common code | symbol is attached | subjected to the element common to the element in FIG.

In the series regulator 5 of the fifth embodiment described above, the voltage output section 11 and the amplifier 23 are each composed of a plurality of NPN type bipolar transistors, but they may be composed of PNP type bipolar transistors. is there.

The voltage output unit 11 of the series regulator 6 of FIG. 7 is composed of a transistor Q21 which is a PNP type bipolar transistor and a transistor Q22 which is a PNP type bipolar transistor. The amplifier 23 of the series regulator 6 is composed of a transistor Q23 which is a PNP type bipolar transistor and a transistor Q24 which is a PNP type bipolar transistor. Other configurations of the series regulator 6 are similar to those of the series regulator 5, for example.

The collectors, which are the second main electrodes of the transistors Q21 and Q22 of the voltage output section 11, are
It is connected to the output terminal Pout. Transistor Q21
The emitter of is connected to the base of the transistor Q22. The emitter of the transistor Q22, which is the first main electrode, is connected to the input terminal Pin. That is, the transistors Q21 and Q22 are Darlington-connected. The base that is the first control electrode of the transistor Q21 in the first stage is connected to the emitter that is the third main electrode of the transistor Q24 in the amplifier 23.

The emitter of the transistor Q23 in the amplifier 23 is connected to the base of the transistor Q24. That is, the transistor Q23 and the transistor Q24 are Darlington connected. The base, which is the second control electrode of the first-stage transistor Q23, is the differential amplifier 2
1 is connected to the collector of the transistor Q5. The collectors, which are the fourth main electrodes of the transistors Q23 and Q24, are grounded. The phase compensation circuit 24 is connected between the emitter of the transistor Q24 and the base of the transistor Q23.

In such a series regulator 6,
Voltage output unit 1 composed of transistors Q21 and Q22
1 operates similarly to the voltage output unit 11 of the series regulator 2 including the transistor Q7. Further, the amplifier 23 composed of the transistors Q23 and Q24 operates similarly to the amplifier 23 of the series regulator 2 composed of the transistor Q8.

Therefore, the series regulator 6 has the second
The same effect as that of the series regulator 2 of the embodiment is obtained. Further, the voltage output unit 1 of the series regulator 6
1 and the amplifier 23 are composed of the transistors Q21 and Q22 and the transistors Q23 and Q24 connected in Darlington, respectively, so that the amplification factor of the power transistor can be increased.

[Seventh Embodiment] FIG. 8 shows a seventh embodiment of the present invention.
It is a block diagram of the series regulator which concerns on embodiment of this, and the common code | symbol is attached | subjected to the element common to the element in FIG.

In the series regulators 5 and 6 of the fifth and sixth embodiments described above, the voltage output section 11 is composed of a plurality of N's.
The amplifier 23 is composed of a PN bipolar transistor or a PNP bipolar transistor, and the amplifier 23 is composed of a plurality of NPN bipolar transistors or PNP bipolar transistors. It is also possible to configure the voltage output unit 11 with an NPN type bipolar transistor and a PNP type bipolar transistor. The amplifier 23 is set to N
It is also possible to use a PN type bipolar transistor and a PNP type bipolar transistor.

The voltage output unit 11 of the series regulator 7 in FIG. 8 is composed of a transistor Q25 which is a PNP type bipolar transistor and a transistor Q26 which is an NPN type bipolar transistor. The amplifier 23 of the series regulator 7 is composed of a transistor Q27 which is a PNP type bipolar transistor and a transistor Q28 which is an NPN type bipolar transistor. The other configuration of the series regulator 7 is the same as that of the series regulator 6, for example.

The collector of the transistor Q25 of the voltage output unit 11 is connected to the base of the transistor Q26, the emitter of the transistor Q25 is connected to the collector of the transistor Q26, and the transistors Q25 and Q26 are Darlington connected. The collector of the transistor Q26, which is the first main electrode, is connected to the input terminal Pin. The emitter of the transistor Q26, which is the second main electrode, is connected to the output terminal Pout. The base of the transistor Q25 which is the first main electrode is connected to the emitter of the transistor Q27 in the amplifier 23 and the collector which is the third main electrode of the transistor Q28.

The collector of the transistor Q27 in the amplifier 23 is connected to the base of the transistor Q28. That is, the transistor Q27 and the transistor Q28 are Darlington-connected. The base, which is the second control electrode of the first-stage transistor Q27, is the differential amplifier 2
1 is connected to the collector of the transistor Q5. The emitter of the transistor Q28, which is the fourth main electrode, is grounded. The phase compensation circuit 24 is connected between the collector of the transistor Q28 and the base of the transistor Q27.

In such a series regulator 7,
Voltage output unit 1 composed of transistors Q25 and Q26
1 operates similarly to the voltage output unit 11 of the series regulator 6 of the sixth embodiment. Also, the transistor Q2
The amplifier 23 composed of Q7 and Q7 operates in the same manner as the amplifier 23 of the series regulator 6. Therefore, the series regulator 7 has the same effect as the series regulator 6 of the sixth embodiment. Various modes are conceivable in carrying out the present invention, and the present invention is not limited to the above-described modes. For example, the transistor Q1 forming the voltage output unit 11 can be changed to a Darlington-connected transistor having three or more stages.
Further, the transistor Q2 constituting the amplifier 23 can be changed to a transistor having Darlington connection in three or more stages.

[0089]

As described in detail above, according to the present invention, the stabilized power supply circuit operates stably.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a phase compensation operation of the stabilized power supply circuit of FIG.

FIG. 3 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a third embodiment of the present invention.

FIG. 5 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a fourth embodiment of the present invention.

FIG. 6 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a fifth embodiment of the present invention.

FIG. 7 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a sixth embodiment of the present invention.

FIG. 8 is a circuit diagram showing a configuration of a stabilized power supply circuit according to a seventh embodiment of the present invention.

FIG. 9 is a circuit diagram showing a configuration of a conventional stabilized power supply circuit.

FIG. 10 is an explanatory diagram showing a phase compensation operation of a conventional stabilized power supply circuit.

[Explanation of symbols]

1 to 7 series regulator 11 voltage output unit 12 output voltage detection unit 13 error amplification unit 14 reference voltage unit 22 constant current circuit 21 differential amplifier 23 amplifier 24 phase compensation circuit Q1, Q7, Q9, Q15, Q17, Q18, Q21,
Q22, Q25, Q26 Transistors (for output voltage control) Q2, Q8, Q10, Q16, Q19, Q20, Q2
3, Q24, Q27, Q28 Transistor (for amplification) C1 capacitor (for output voltage stabilization) C2, C3 capacitor (for phase compensation) R3 resistor (for phase compensation)

Claims (6)

[Claims] 1. A voltage output section which is supplied with a DC voltage and outputs a DC output voltage based on a control signal, and an error voltage between the output voltage output by the voltage output section and a reference voltage is amplified and amplified. An amplifier that outputs a signal as a control signal to the voltage output unit, wherein the amplifier has a first cutoff frequency in a frequency band in which a gain when amplifying the error voltage exceeds 1. The gain is higher than the first cutoff frequency and is 1
Has a second cutoff frequency in the following frequency band, the phase margin is maintained in the range of 30 ° to 90 ° at a frequency higher than the first cutoff frequency, and the second cutoff A stabilized power supply circuit having a frequency characteristic in which the gain does not exceed 1 at a frequency higher than the frequency. 2. The first amplification unit feeds back the control signal to the error voltage to compensate the phase of the control signal so that the phase margin is maintained in the range of 30 ° to 90 °. A phase compensating circuit, and a second phase compensating circuit for compensating the phase of the control signal phase-compensated by the first phase compensating circuit so that the gain does not exceed 1 at a frequency higher than the second cutoff frequency. The stabilized power supply circuit according to claim 1, further comprising: 3. The first phase compensation circuit includes a first capacitor and a resistor connected in series between a terminal for inputting the error voltage and a terminal for outputting the control signal of the amplifier. The stabilized power supply circuit according to claim 2, wherein the second phase compensation circuit is configured by a second capacitor connected in parallel with the resistance of the first phase compensation circuit. . 4. The voltage output section includes a first main electrode, a second main electrode, and a first control electrode for controlling a conduction state between the first main electrode and the second main electrode. The amplifying section has the first control electrode connected to a terminal for outputting the control signal, the first main electrode connected to a terminal to which the DC voltage is supplied, and the output voltage is output. A first transistor in which the second main electrode is connected to a terminal, and the amplification unit generates a difference voltage between an output voltage output from the voltage output unit and a reference voltage; The first
A constant current circuit connected between the main electrode and the first control electrode, and conduction between the third main electrode, the fourth main electrode, the third main electrode and the fourth main electrode. A second control electrode for controlling a state, the second control electrode being connected to the output terminal of the differential amplifier, the third main electrode being connected to the first control electrode, 4. The stabilized power supply circuit according to claim 2, further comprising an amplifier formed by a second transistor whose main electrode is grounded. 5. The voltage output section includes a first main electrode, a second main electrode, and a first control electrode for controlling a conduction state between the first main electrode and the second main electrode. A plurality of transistors in Darlington connection, each of which has a first control electrode of a first-stage transistor of the transistors of the plurality of stages, is connected to a terminal from which the amplifier outputs the control signal; The first main electrode of the final-stage transistor of the plurality of transistors is connected to the terminal to which the DC voltage is supplied, and the second main electrode of the final-stage transistor is connected to the terminal to which the output voltage is output. The stabilized power supply circuit according to claim 2 or 3, wherein the stabilized power supply circuit is connected. 6. The amplifying unit is provided between a differential amplifier that generates an error voltage between an output voltage output by the voltage output unit and a reference voltage, and the first main electrode and the first control electrode. A constant current circuit connected to each other, a third main electrode, a fourth main electrode, and a second control electrode for controlling a conduction state between the third main electrode and the fourth main electrode. And an amplifier formed by a plurality of Darlington-connected transistors, the second control electrode of the first-stage transistor of the plurality of-stage transistors being connected to the output terminal of the differential amplifier, A third main electrode of a final stage transistor of the stage transistors is connected to the first control electrode,
The stabilized power supply circuit according to claim 2 or 3, wherein the fourth main electrode of the final-stage transistor is grounded.