JP2008186860A - Semiconductor device and electronic circuit assembly - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which the wiring of a circuit board is easily laid out while suppressing the area of the circuit board and the deterioration of signal quality thereof, and also to provide an electronic circuit assembly equipped with the semiconductor device. <P>SOLUTION: Symbols A+, A-, B+, B-, C+, C-, D+ and D- are given to connector terminals 21, 22, 23, 24, 25, 26, 27 and 28 on a substrate connector 20 respectively, from one end to the other end of a physical arrangement. Circuit terminals 31, 32, 33 and 34 of a semiconductor device 30 are disposed in the order of A+(B<SB>1</SB>), A-(B<SB>2</SB>), B+(B<SB>3</SB>) and B-(B<SB>4</SB>) from bottom to top in Fig. 1, and circuit terminals 38, 37, 36 and 35 are disposed in the order of C+(B<SB>5</SB>), C-(B<SB>6</SB>), D+(B<SB>7</SB>) and D-(B<SB>8</SB>) from bottom to top in the Fig. 1, and the circuit terminals are connected by high-speed differential signal line pairs 11, 12; 13, 14; 15, 16; 17, 18 formed on the circuit board 10. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device fixed on the same substrate as an on-board connector fixed on a circuit board, and an electronic circuit assembly including the circuit board, the on-board connector, and the semiconductor device.

  Conventionally, as an interface with a plurality of high-speed differential signal pairs, a serial ATA interface that performs serial data transmission between a host device such as a computer and a hard disk device, and transmission of video, audio, and control signals There are known HDMI (High Definition Multimedia Interface) or PCI (Peripheral Component Interconnect) Express that groups data and transmits them as packets. In such an interface, the order of signals handled by the interface on the connector terminals of the on-board connector fixed on the circuit board is defined by industry standards and the like. For this reason, it is preferable that the order of terminal arrangement in a semiconductor device having an interface provided with a plurality of high-speed differential signal pairs is also in accordance with regulations such as industrial standards.

  FIG. 3 is a diagram showing a configuration of a conventional electronic circuit assembly including a circuit board, a connector on the board, and a semiconductor device.

  The electronic circuit assembly 100 shown in FIG. 3 includes a circuit board 110, a board connector 120, and a semiconductor device 130. The on-board connector 120 and the semiconductor device 130 are fixed on the same surface of the circuit board 110.

  The on-board connector 120 is prepared in accordance with the provisions of the industry standard. The on-board connector 120 is connected to the first high-speed differential signal pair A +, A− connector terminals 121 in order from the top of FIG. , 122, connector terminals 123, 124 for the second high-speed differential signal pair B +, B−, connector terminals 125, 126 for the third high-speed differential signal pair C +, C−, and a fourth high-speed Connector terminals 127 and 128 for the differential signal pair D + and D− are provided.

  The semiconductor device 130 includes circuit terminals 131 and 132 corresponding to the connector terminals 121 and 122, circuit terminals 133 and 134 corresponding to the connector terminals 123 and 124, and circuits corresponding to the connector terminals 125 and 126. Terminals 135 and 136 and circuit terminals 137 and 138 corresponding to the connector terminals 127 and 128 are provided.

  Further, a portion of the circuit board 110 sandwiched between the on-board connector 120 and the semiconductor device 130 has a first high-speed differential signal line pair 111, 112 and a second high-speed differential signal arranged in parallel to each other. Line pairs 113 and 114, third high-speed differential signal line pairs 115 and 116, and fourth high-speed differential signal line pairs 117 and 118 are formed.

  Connector terminals 121 and 122 and circuit terminals 131 and 132 are connected by a first high-speed differential signal line pair 111 and 112. The connector terminals 123 and 124 and the circuit terminals 133 and 134 are connected by a second high-speed differential signal line pair 113 and 114. Further, the connector terminals 125 and 126 and the circuit terminals 135 and 136 are connected by a third high-speed differential signal line pair 115 and 116. The connector terminals 127 and 128 and the circuit terminals 137 and 138 are connected by a fourth high-speed differential signal line pair 117 and 118.

  In this electronic circuit assembly 100, the connector terminal of the on-board connector 120 and the circuit terminal of the semiconductor device 130 are connected by a short high-speed differential signal line pair. For this reason, the deterioration of the area of the circuit board 110 and signal quality can be suppressed small.

  Here, by devising the wiring pattern shape of the differential transmission path that connects the semiconductor device on the circuit board and the connector, a substantially uniform characteristic impedance can be obtained over the entire length of the differential transmission path and the area can be reduced. Have been proposed (see Patent Document 1).

Further, a technique has been proposed in which a terminal resistor is connected to an empty pin of a connector on a circuit board for high-speed communication to reduce a transmission loss of a signal line due to the empty pin (see Patent Document 2).
JP 2006-128618 A JP 2004-273725 A

  Here, there is a case where the semiconductor device and the on-board connector are mounted on different surfaces on the circuit board depending on the convenience for circuit board production or device design. Then, the problem described below occurs.

  FIG. 4 is a diagram showing an electronic circuit assembly when the on-board connector and the semiconductor device are mounted on different surfaces on the circuit board. In addition, the same code | symbol is attached | subjected and demonstrated to the same component as the component shown in FIG.

  An electronic circuit assembly 200 shown in FIG. 4 includes a circuit board 210, an on-board connector 120 indicated by a dotted line fixed to the back surface of the circuit board 210, and a semiconductor device 130 fixed to the surface of the circuit board 210. Is provided.

  On the back surface of the circuit board 210, a first high-speed differential signal line pair 211a and 212a, a second high-speed differential signal line pair 213a and 214a, and a third high-speed differential signal line pair 215a indicated by dotted lines are shown. , 216a and a fourth high-speed differential signal line pair 217a, 218a.

  On the other hand, on the surface of the circuit board 210, the first high-speed differential signal line pair 211c and 212c, the second high-speed differential signal line pair 213c and 214c, and the third high-speed differential signal line pair 215c and 216c. And a fourth high-speed differential signal line pair 217c, 218c.

  Further, the circuit board 210 includes a first via hole pair 211b and 212b, a second via hole pair 213b and 214b, a third via hole pair 215b and 216b, and a fourth via hole pair 217b and 218b. And are formed.

  The connector terminals 121 and 122 of the on-board connector 120 and the circuit terminals 131 and 132 of the semiconductor device 130 are connected to the first high-speed differential signal line pair 211a and 212a and the first via hole pair 211b and 212b, respectively. They are connected by a pair of motion signal lines 211c and 212c. The connector terminals 123 and 124 of the on-board connector 120 and the circuit terminals 133 and 134 of the semiconductor device 130 are connected to the second high-speed differential signal line pair 213a and 214a, the second via hole pair 213b and 214b, and the second terminal. The high-speed differential signal line pair 213c and 214c are connected. Further, the connector terminals 125 and 126 of the on-board connector 120 and the circuit terminals 135 and 136 of the semiconductor device 130 are connected to the third high-speed differential signal line pair 215a and 216a, the third via hole pair 215b and 216b, and the third terminal. The high-speed differential signal line pair 215c and 216c are connected. The connector terminals 127 and 128 of the on-board connector 120 and the circuit terminals 137 and 138 of the semiconductor device 130 are connected to the fourth high-speed differential signal line pair 217a and 218a, the fourth via hole pair 217b and 218b, and the fourth terminal. The high-speed differential signal line pair 217c and 218c are connected.

  Here, each of the high-speed differential signal line pairs 211a, 212a; 213a, 214a; 215a, 216a; 217a, 218a formed on the back surface of the circuit board 210 has an upper portion of the on-board connector 120 as shown in FIG. It has a detoured wiring layout. Also, high-speed differential signal line pairs 211a, 212a; 213a, 214a; 215a, 216a; 217a, 218a formed on the back surface of the circuit board 210, and a high-speed differential signal line pair 211c formed on the surface of the circuit board 210. 212c; 213c, 214c; 215c, 216c; 217c, 218c, via hole pairs 211b, 212b; 213b, 214b; 215b, 216b; 217b, 218b are required.

  Therefore, the wiring layout of the circuit board 210 is complicated, and there arises a problem that the area of the circuit board 210 increases and the signal quality deteriorates. Further, since circuit board 210 requires a wiring space for bypass wiring and via holes, it may be difficult to mount semiconductor device 130 and on-board connector 120 on different surfaces on circuit board 210. .

  SUMMARY OF THE INVENTION In view of the above circumstances, the present invention provides a semiconductor device capable of easily performing a wiring layout of a circuit board while minimizing deterioration of the circuit board area and signal quality, and an electronic circuit assembly including the semiconductor device. The purpose is to provide.

A semiconductor device according to the present invention that achieves the above object includes a plurality of connector terminals that are fixed on a circuit board and coupled to a mating connector to transmit signals to and from the mating connector. In a semiconductor device having a plurality of circuit terminals wired between a connector on a substrate whose arrangement order is determined in advance and fixed on the same substrate as the connector on the substrate,
To the connector terminal, from one end of the physical arrangement toward the other _end, A _1, A 2, ..., reference numeral of the _{A n,} to the circuit _terminals, A _{1, A} 2, ..., each sequentially B _1, B 2 connected to the connector terminals each, labeled a _{n, ...,} when, labeled B _n,
B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n ) In that order.

In the semiconductor device of the present _{invention, A 1, A 2, ...} , respectively in the order B ₁ connected to the connector terminals each, labeled A _n, B _{2, ...,} a plurality of circuits that are labeled the B _n B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n) from one end of the physical array to the other end They are in order. In other words, the plurality of circuit terminals of the semiconductor device of the present invention are arranged in the order of B ₁ , B ₂ ,..., B _m from one end of the physical arrangement toward the other end, Are arranged in the order of B _{m + 1} , B _{m + 2} ,..., B _n−1 from the other end to the other end. In this way, as shown in the embodiments described later, even when the semiconductor device and the on-board connector are fixed (mounted) on the same surface on the circuit board, or different surfaces on the circuit board. Even when the semiconductor device and the on-board connector are fixed, it is possible to avoid a complicated wiring layout and the need for via holes. Therefore, it is possible to easily perform the wiring layout of the circuit board while keeping the deterioration of the circuit board area and signal quality small.

  Here, it is preferable that n is an even number and m is n / 2.

When the number n of circuit terminals included in the semiconductor device is an even number, in this way, the semiconductor devices are arranged in the order of B ₁ , B ₂ ,..., B _m from one end of the physical array to the other end. And the number of circuit terminals arranged in the order of B _{m + 1} , B _{m + 2} ,..., B _n−1 from the other end of the physical arrangement toward one end. Can do. Therefore, the wiring layout of the circuit board to which the semiconductor device having an even number of circuit terminals is fixed can be easily performed.

  It is also preferable that n is an odd number and m is an integer adjacent to n / 2.

When the number n of circuit terminals included in the semiconductor device is an odd number, in this way, one end of the physical array is changed from the other end except for a reference (for example, B _m ) attached to the center circuit terminal. towards the end _{B 1, B 2, ...,} the number of circuit terminals which are arranged in the order of _{B m-1, B m +} 1 toward the one end from the other end of the physical _{arrangement, B m + 2,} ..., the number of circuit terminals arranged in the order of B _n-1 can be made the same. Therefore, the wiring layout of the circuit board to which the semiconductor device having an odd number of circuit terminals is fixed can be easily performed.

  Furthermore, it is also a preferable aspect that the signal transmitted between the circuit terminal and the connector terminal is a differential signal, and the m is an even number.

In this case, in the semiconductor device having an interface including the circuit terminal pair for differential signals, B ₁ , B ₂ ,..., B _m in this order from one end of the physical array to the other end. The number of circuit terminal pairs arranged, and the number of circuit terminal pairs arranged in the order of B _{m + 1} , B _{m + 2} ,..., B _n−1 from the other end of the physical arrangement toward one end, Can be the same. Therefore, the wiring layout of the circuit board to which the semiconductor device having the interface having the differential signal circuit terminal pair is fixed can be easily performed.

  Further, it is preferable that n is a multiple of 4 and m is n / 2.

  When n is a multiple of 4, that is, when the number of circuit terminal pairs is an even number, in this way, the circuit terminal pairs arranged in order from one end of the physical array to the other end are arranged. The number and the number of circuit terminal pairs arranged in order from the other end of the physical arrangement toward the one end can be made the same. For this reason, it is possible to easily perform the wiring layout of the circuit board to which the semiconductor device having the interface having the even number of circuit terminal pairs is fixed.

  The n may be a multiple of 4 plus 2, and the m may be a multiple of 2 adjacent to n / 2.

  When n is a multiple of 4 plus 2, that is, when the number of circuit terminal pairs is an odd number, in this way, one of the physical sequences is excluded except for the code pair attached to the center circuit terminal pair. The number of circuit terminal pairs arranged in order from one end to the other end is made equal to the number of circuit terminal pairs arranged in order from the other end of the physical arrangement to one end. be able to. For this reason, the wiring layout of the circuit board to which the semiconductor device having the interface having the odd number of circuit terminal pairs is fixed can be easily performed.

The electronic circuit assembly of the present invention that achieves the above object is
A circuit board;
An on-board connector fixed on the circuit board and coupled with a mating connector to transmit signals to and from the mating connector, and the arrangement order of a plurality of connector terminals sharing the role of signal transmission is determined in advance. When,
In an electronic circuit assembly comprising a semiconductor device having a plurality of circuit terminals fixed on the circuit board and wired between the connector on the board,
To the connector terminal, from one end of the physical arrangement toward the other _end, A _1, A 2, ..., reference numeral of the _{A n,} to the circuit _terminals, A _{1, A} 2, ..., each sequentially B _1, B 2 connected to the connector terminals each, labeled a _{n, ...,} when, labeled B _n,
B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n ) In that order.

  Since the electronic circuit assembly according to the present invention includes the semiconductor device according to the present invention, the wiring layout of the circuit board can be easily performed while suppressing deterioration of the area of the circuit board and the signal quality.

  According to the present invention, it is possible to provide a semiconductor device capable of easily performing a circuit board wiring layout while minimizing deterioration of the circuit board area and signal quality, and an electronic circuit assembly including the semiconductor device. Can do.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a diagram showing a configuration of an electronic circuit assembly according to a first embodiment of the present invention, which includes an embodiment of a semiconductor device of the present invention.

  The electronic circuit assembly 1 shown in FIG. 1 includes a circuit board 10, a board connector 20, and a semiconductor device 30 that is an embodiment of the semiconductor device of the present invention. The on-board connector 20 and the semiconductor device 30 are fixed on the same surface of the circuit board 10.

  The on-board connector 20 is fixed on the circuit board 10 and coupled to a mating connector (not shown) to transmit signals to and from the mating connector. A plurality of connector terminals (sharing the role of signal transmission) In this example, the connector is an on-board connector in which the arrangement order of the eight connector terminals 21 to 28) is determined in advance. Specifically, the on-board connector 20 is prepared in accordance with the regulations of the industry standard. The on-board connector 20 includes a first high-speed differential signal pair A +, A− in order from the top of FIG. Connector terminal pair 21, 22 for the second, connector terminal pair 23, 24 for the second high-speed differential signal pair B +, B-, and connector terminal pair 25 for the third high-speed differential signal pair C +, C-. , 26 and a fourth high-speed differential signal pair D +, D− connector terminal pair 27, 28.

The semiconductor device 30 is a semiconductor device provided with a plurality of circuit terminals (here, eight circuit terminals 31 to 38) wired between the on-board connector 20. Specifically, the semiconductor device 30 is connected to the connector terminals 21, 22, 23, 24, 25, 26, 27, and 28 from one end of the physical array toward the other end (the top of FIG. 1). and), a +, downward from A-, B +, B-, C +, C-, D +, D- ( referred to in the present invention _{a 1,} a 2, ..., corresponding to _{a n.} here, the n Is assigned to the circuit terminals 31, 32, 33, 34, 35, 36, 37, 38, and A +, A-, B +, B-, C +, C-, D +, D A +, A-, B +, B-, C +, C-, D +, D- (in the order of connection to the connector terminals 21, 22, 23, 24, 25, 26, 27, 28, respectively. Corresponds to B ₁ , B ₂ ,..., B _n in the present invention, where n is 8)). The road terminals 31, 32, 33, 34, 35, 36, 37, 38 are moved from one end to the other end of the physical array (from the bottom to the top in FIG. 1), A +, A−. , B +, B−, D−, D +, C−, C + (B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n). In the order of That is, the circuit terminals 31, 32, 33, 34, 35, 36, 37, and 38 are A + (B ₁ ), A− (B ₂ ), B + (B ₃ ), B− (B ₄ ), D− (B ₈ ), D + (B ₇ ), C− (B ₆ ), C + (B ₅ ) are arranged in this order. In other words, the circuit terminals 31, 32, 33, and 34 are connected to A + (B ₁ ), A− (B ₂ ), and B + (B ₃ ) from the bottom to the top of FIG. 1 as indicated by the arrow X ₁ . , B- (B ₄ ). The circuit terminals 38,37,36,35 are from top to bottom in FIG. 1 as indicated by the arrow _{X 2, C + (B 5} ), C- (B 6), D + (B 7), D - they are arranged in the order of _{(B 8).}

  Here, the connector terminal pairs 21 and 22 of the on-board connector 20 and the circuit terminal pairs 31 and 32 of the semiconductor device 30 bypass the lower part of the on-board connector 20 and are connected by the first high-speed differential signal line pairs 11 and 12. It is connected. Further, the connector terminal pairs 23 and 24 of the on-board connector 20 and the circuit terminal pairs 33 and 34 of the semiconductor device 30 bypass the lower part of the on-board connector 20 and are connected by the second high-speed differential signal line pairs 13 and 14. Has been. On the other hand, the connector terminal pairs 25 and 26 of the on-board connector 20 and the circuit terminal pairs 38 and 37 of the semiconductor device 30 are formed in a portion of the circuit board 10 sandwiched between the on-board connector 20 and the semiconductor device 30. 3 high-speed differential signal line pairs 17 and 18. Further, the connector terminal pairs 27 and 28 of the on-board connector 20 and the circuit terminal pairs 36 and 35 of the semiconductor device 30 are formed in a portion of the circuit board 10 sandwiched between the on-board connector 20 and the semiconductor device 30. 4 high-speed differential signal line pairs 15 and 16.

  FIG. 2 is a diagram showing a configuration of an electronic circuit assembly according to a second embodiment of the present invention, which includes the semiconductor device shown in FIG.

  The electronic circuit assembly 2 shown in FIG. 2 includes a circuit board 40, the on-board connector 20 and the semiconductor device 30 shown in FIG. Here, the on-board connector 20 is fixed on the back surface of the circuit board 40 and the semiconductor device 30 is fixed on the front surface of the circuit board 40.

  The connector terminal pairs 21 and 22 of the on-board connector 20 and the circuit terminal pairs 31 and 32 of the semiconductor device 30 are formed on a portion of the circuit board 40 sandwiched between the on-board connector 20 and the semiconductor device 30. Are connected by a pair of high-speed differential signal lines 41 and 42. In addition, the connector terminal pairs 23 and 24 of the on-board connector 20 and the circuit terminal pairs 33 and 34 of the semiconductor device 30 are formed on a portion of the circuit board 40 sandwiched between the on-board connector 20 and the semiconductor device 30. The second high-speed differential signal line pair 43 and 44 are connected. On the other hand, the connector terminal pairs 25, 26 of the on-board connector 20 and the circuit terminal pairs 38, 37 of the semiconductor device 30 bypass the upper part of the on-board connector 20 and are connected by third high-speed differential signal line pairs 45, 46. Has been. The connector terminal pairs 27 and 28 of the on-board connector 20 and the circuit terminal pairs 36 and 35 of the semiconductor device 30 are connected by the fourth high-speed differential signal line pairs 47 and 48 bypassing the upper part of the on-board connector 20. Has been.

In the semiconductor device 30 of the present embodiment, the circuit terminals 31, 32, 33, 34 are A + (B ₁ ), A− (B ₂ ), B + (B ₃ ), B from the bottom to the top of FIG. -(B ₄ ) are arranged in this order, and the circuit terminals 38, 37, 36, and 35 are C + (B ₅ ), C− (B ₆ ), D + (B ₇ ) from the top to the bottom of FIG. , D- (B ₈ ). Thus, even when the semiconductor device 30 and the on-board connector 20 are mounted on the same surface on the circuit board 10 as shown in FIG. 1, or on the circuit board 40 as shown in FIG. Even when the semiconductor device 30 and the on-board connector 20 are mounted on different surfaces, it is possible to avoid the complicated wiring layout and the need for via holes. Therefore, it is possible to easily perform the wiring layout of the circuit boards 10 and 40 while keeping the deterioration of the area and signal quality of the circuit boards 10 and 40 small.

  In this embodiment, the example of the high-speed differential signal transmitted between the circuit terminal and the connector terminal has been described. However, the present invention is not limited to this, and the present invention can be applied between the circuit terminal and the connector terminal. Any signal may be used if it is transmitted by.

It is a figure which shows the structure of the electronic circuit assembly of 1st Embodiment of this invention provided with one Embodiment of the semiconductor device of this invention. It is a figure which shows the structure of the electronic circuit assembly of 2nd Embodiment of this invention provided with the semiconductor device shown in FIG. It is a figure which shows the structure of the conventional electronic circuit assembly provided with the circuit board, the connector on a board | substrate, and the semiconductor device. It is a figure which shows an electronic circuit assembly when the connector on a board | substrate and the semiconductor device are mounted in the mutually different surface on a circuit board.

Explanation of symbols

1, 2 Electronic circuit assembly 10, 40 Circuit board 11, 12, 13, 14, 15, 16, 17, 18, 41, 42, 43, 44, 45, 46, 47, 48 High-speed differential signal line 20 Board Upper connector 21, 22, 23, 24, 25, 26, 27, 28 Connector terminal 30 Semiconductor device 31, 32, 33, 34, 35, 36, 37, 38 Circuit terminal

Claims (7)

An on-board connector fixed on a circuit board, coupled to a mating connector and transmitting signals to and from the mating connector, wherein the arrangement order of a plurality of connector terminals sharing the role of the signal transmission is predetermined; In a semiconductor device having a plurality of circuit terminals wired between, and fixed on the same substrate as the on-board connector,
Said connector terminal, from one end of the physical arrangement toward the other _end, A _1, A 2, ..., reference numeral of the _{A n,} the circuit _terminals, A _{1, A} 2, ..., each sequentially B _1, B 2 connected to the connector terminals each, labeled a _{n, ...,} when, labeled B _n,
B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n ) Are arranged in this order.   2. The semiconductor device according to claim 1, wherein the n is an even number and the m is n / 2.   2. The semiconductor device according to claim 1, wherein n is an odd number, and m is an integer adjacent to n / 2.   2. The semiconductor device according to claim 1, wherein a signal transmitted between the circuit terminal and the connector terminal is a differential signal, and the m is an even number.   5. The semiconductor device according to claim 4, wherein the n is a multiple of 4 and the m is n / 2.   5. The semiconductor device according to claim 4, wherein the n is a multiple of 4 plus 2, and the m is a multiple of 2 adjacent to n / 2. A circuit board;
An on-board connector fixed on the circuit board and coupled with a mating connector to transmit signals to and from the mating connector, wherein the arrangement order of a plurality of connector terminals sharing the role of signal transmission is predetermined. When,
In an electronic circuit assembly comprising a semiconductor device having a plurality of circuit terminals fixed on the circuit board and wired between the circuit board connectors,
Said connector terminal, from one end of the physical arrangement toward the other _end, A _1, A 2, ..., reference numeral of the _{A n,} the circuit _terminals, A _{1, A} 2, ..., each sequentially B _1, B 2 connected to the connector terminals each, labeled a _{n, ...,} when, labeled B _n,
B ₁ , B ₂ ,..., B _m , B _n , B _n−1 ,..., B _{m + 1} (where m <n The electronic circuit assembly is arranged in the order of

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