JP2008182124A5

JP2008182124A5 -

Info

Publication number: JP2008182124A5
Application number: JP2007015503A
Authority: JP
Filing date: 2007-01-25
Publication date: 2010-01-28
Anticipated expiration: 2027-01-25

Claims

A method for manufacturing a display device including a pixel region provided with a p-channel first transistor having a first semiconductor layer and a driver circuit region provided with a second transistor having a second semiconductor layer Because
Perform the process of forming the insulating layer that will be the base film,
Performing a step of introducing an impurity imparting p-type into a position where the second semiconductor layer of the insulating layer serving as the base film is provided;
Performing a step of forming a semiconductor layer on the insulating layer to be the base film;
Performing a step of crystallizing the semiconductor layer and selectively introducing the impurity into the semiconductor layer;
Performing a step of thinning the semiconductor layer formed in the drive circuit region;
Etching the semiconductor layer to form the first semiconductor layer in the pixel region and forming the second semiconductor layer in the driver circuit region;
A halogen is introduced into an edge portion of the first semiconductor layer and an edge portion of the second semiconductor layer, and plasma treatment is performed to form a first insulating layer on the edge portion of the first semiconductor layer. Performing a step of forming a second insulating layer on an edge portion of the second semiconductor layer,
Performing a step of forming a gate insulating layer covering the first and second semiconductor layers and the first and second insulating layers;
Forming a first gate electrode at a position overlapping with the first semiconductor layer on the gate insulating layer, and forming a second gate electrode at a position overlapping with the second semiconductor layer on the gate insulating layer; And a manufacturing method of a display device.

A method for manufacturing a display device having a pixel region provided with a first transistor having a first semiconductor layer and a drive circuit region provided with a second transistor having a second semiconductor layer,
A step of forming a semiconductor layer,
Performing a step of thinning the semiconductor layer formed in the drive circuit region;
Etching the semiconductor layer to form the first semiconductor layer in the pixel region and forming the second semiconductor layer in the driver circuit region;
Performing a step of forming a gate insulating layer on the first and second semiconductor layers;
Forming a first gate electrode at a position overlapping with the first semiconductor layer on the gate insulating layer, and forming a second gate electrode at a position overlapping with the second semiconductor layer on the gate insulating layer; And a method for manufacturing a display device.

A method for manufacturing a display device having a pixel region provided with a first transistor having a first semiconductor layer and a drive circuit region provided with a second transistor having a second semiconductor layer,
A step of forming a semiconductor layer,
Performing a step of thinning the semiconductor layer formed in the drive circuit region;
Etching the semiconductor layer to form the first semiconductor layer in the pixel region and forming the second semiconductor layer in the driver circuit region;
A halogen is introduced into an edge portion of the first semiconductor layer and an edge portion of the second semiconductor layer, and plasma treatment is performed to form a first insulating layer on the edge portion of the first semiconductor layer. Performing a step of forming a second insulating layer on an edge portion of the second semiconductor layer,
Performing a step of forming a gate insulating layer covering the first and second semiconductor layers and the first and second insulating layers;
Forming a first gate electrode at a position overlapping with the first semiconductor layer on the gate insulating layer, and forming a second gate electrode at a position overlapping with the second semiconductor layer on the gate insulating layer; And a manufacturing method of a display device.

A method for manufacturing a display device including a pixel region provided with a p-channel first transistor having a first semiconductor layer and a driver circuit region provided with a second transistor having a second semiconductor layer Because
Perform the process of forming the insulating layer that will be the base film,
Performing a step of introducing an impurity imparting p-type into a position where the second semiconductor layer of the insulating layer serving as the base film is provided;
Performing a step of forming a semiconductor layer on the insulating layer to be the base film;
Performing a step of crystallizing the semiconductor layer and selectively introducing the impurity into the semiconductor layer;
Performing a step of thinning the semiconductor layer formed in the drive circuit region;
Etching the semiconductor layer to form the first semiconductor layer in the pixel region and forming the second semiconductor layer in the driver circuit region;
Performing a step of forming a gate insulating layer on the first and second semiconductor layers;
Forming a first gate electrode at a position overlapping with the first semiconductor layer on the gate insulating layer, and forming a second gate electrode at a position overlapping with the second semiconductor layer on the gate insulating layer; And a manufacturing method of a display device.

In any one of Claims 1 thru | or 4,
The step of thinning the semiconductor layer is performed by modifying the surface of the semiconductor layer formed in the drive circuit region to form a modified region, and removing the modified region. A method for manufacturing a display device.

A pixel region provided with a first transistor and a drive circuit region provided with a second transistor;
The display device is characterized in that the thickness of the semiconductor layer of the second transistor is smaller than the thickness of the semiconductor layer of the first transistor.