JP2008176007A - Lcd driving microcontroller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an LCD driving microcontroller capable of materializing colorful gradation display even when using an inexpensive LCD panel. <P>SOLUTION: The LCD driving microcontroller includes: a frame clock which determines a display period; a bright gradation clock which has a half period of the frame clock; a timing control circuit of outputting a dark gradation clock which has the same period as the bright gradation clock and has an H term becoming the half period as compared to the H term of the bright gradation clock; and a register which produces a common signal based on the frame clock output from the timing control circuit, successively outputs the common signal and effectively sets gradation function. When the gradation function is effectively set by the register, the microcontroller has a gradation display function which produces a segment signal and outputs the same, based on the bright gradation clock and dark gradation clock in addition to the common signal. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an LCD driving microcontroller for driving an LCD display panel in various ways.

  As a display device in an inexpensive set device such as a portable small toy device or a remote control device, an inexpensive binary display small LCD display panel is mainly used. However, in recent years, various displays are required even when these LCD display panels are used. Similarly, a product having various display functions is demanded for an LCD driving microcontroller for driving the LCD. In order to realize various displays, it is necessary to realize multi-gradation display in which intermediate colors are mixed in addition to display ON and display OFF.

Conventionally, there are pulse width modulation method (PWM), pulse height modulation method (PHM), and frame modulation method (FRC) as gradation display methods for LCD display panels. For monochrome display, the frame modulation method is the most widely used. It has been adopted. Therefore, in order to perform multi-grayscale display with an LCD drive microcontroller, prepare multiple display pages with ON data and OFF data set, and switch them alternately to display them as the average value of the multiple sheets. In this case, an intermediate color between display ON and display OFF is realized, and multi-gradation display is performed (for example, see Patent Document 1).
JP-A-8-115061

  When performing multi-gradation display by the conventional method, it is necessary to prepare a plurality of display pages each set with ON data and OFF data, and it is necessary to control the ratio of switching alternately according to the gradation. Therefore, the software processing in the LCD driving microcontroller is complicated, and there is a problem that it leads to an increase in chip cost and system cost due to an increase in ROM capacity.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an LCD driving microcontroller that can easily realize various gradation display functions without burdening software developers and software resources with a small hardware configuration.

In order to solve the above problems, an LCD driving microcontroller for driving the LCD display panel of the present application is:
A display data storage device for storing data from ROM and RAM as display data and gradation data;
A frame clock that determines a display cycle, a light grayscale clock that is a half cycle of the frame clock, a cycle that is the same as the light grayscale clock, and an H period that is half a period of the H period of the light grayscale clock. A timing control circuit that outputs a dark gradation clock,
Based on the frame clock output from the timing control circuit, generates a common signal, and sequentially outputs the common signal,
A register for enabling the gradation function is provided, and when the gradation function is disabled by the register, a segment signal is generated and output based on the common signal and the display data, or a gradation is generated by the register. When the function is set to be effective, in addition to the common signal, a segment generation unit having a function of generating and outputting a segment signal based on the bright gradation clock, the dark gradation clock, the display data, and the gradation data;
A plurality of terminals for outputting LCD drive signals to the LCD display panel;
The common signal and the segment signal output from the display output control circuit are input to the terminals.

  According to the present invention, it is possible to easily realize a variety of gradation display functions by using a gradation clock that can be adjusted by a register, an inversion control register, and gradation data.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

<First Embodiment>
FIG. 1 shows an LCD driving microcontroller according to Embodiment 1 of the present invention.

  In FIG. 1, 1 is a microcontroller, 2 to 4 are terminals 1 to n for directly driving an LCD display panel, CPU 5, data bus 6, address bus 7, ROM 8, RAM 9, display data bus 10, and display data storage. Device 11, timing control circuit 12, common generation circuit 13, segment generation circuit 14, gradation function valid setting register 15, LCD cycle setting register 16, LCD display data 24, common signals 25, 106 to 110, segment signals 26, 111 ˜115, gradation data 27, base clock 100, frame clock 101, light gradation clock 104, and dark gradation clock 105.

  FIG. 2 is a timing chart showing an example of the operation of the LCD driving microcontroller according to the embodiment of the present invention. 100 is a base clock, 101 is a frame clock, and frame clock 101 is a clock for determining a display cycle. The base clock 100 is divided by the LCD cycle setting register 16. Reference numeral 104 denotes a light grayscale clock having a half period of the frame clock 101. A dark gradation clock 105 has the same cycle as the light gradation clock 104 and is set to output an H period that is half the H period of the light gradation clock 104.

  FIG. 3 is a timing chart showing an example of the operation of the LCD driving microcontroller according to the embodiment of the present invention. Reference numerals 106 to 110 denote common signals, which are COM0 to COMn, respectively. Reference numerals 111 to 115 denote segment signals, which are SEG0 to SEGn, respectively.

  FIG. 4 is a timing chart showing an example of the operation of the LCD driving microcontroller in the embodiment of the present invention.

  The detailed operation will be described below with reference to these drawings.

  The microcontroller 1 has n terminals 2 to 4 connected to the LCD display panel. Usually, the microcontroller 1 is operated by the CPU 5 reading out the program stored in the ROM 8 via the address bus 7 and the data bus 6. Here, the LCD display data is temporarily stored in the display data storage device 11 by an instruction operation by the CPU 5 and then read from the display data storage device 11 to the segment generation circuit 14. The timing control circuit 12 forms the frame clock 101 by appropriately dividing the base clock 100 in accordance with the set value of the LCD cycle setting register 16 in order to set the LCD display cycle. Here, the frame clock 101 is an LCD display cycle. Further, a bright gradation clock 104 that is a half cycle of the frame clock 101 is formed. Further, the dark gradation clock 105 is formed in the same period as the light gradation clock 104 and having a half H period with respect to the H period of the light gradation clock. The timing control circuit 12 outputs the frame clock 101 to the common generation circuit 13 and the segment generation circuit 14. Further, the bright gradation clock 104 and the dark gradation clock 105 are output to the segment generation circuit 14. The segment generation circuit 14 is controlled by a gradation function valid setting register 15 for setting whether or not gradation display is performed. With regard to this, first, the operation in the case where the gradation function valid setting register 15 is set to a value that does not perform gradation display and does not perform gradation display will be described below.

  The common generation circuit 13 forms COM signals 106 to 110 for determining common timing based on the LCD reference clock 101 shown in FIG. Here, the COM signal 106 corresponds to n COM signals, such as COM0, COM signal 107 is COM1, COM signal 108 is COM2, COM signal 109 is COM3, COM signal 110 is COMn, etc. As shown, COM signals are sequentially formed. The LCD display data 24 stored in the display data storage device 11 is segment data corresponding to the common signal, and the segment generation circuit 14 generates the segment shown in FIG. 3 according to the read LCD display data. Signal, SEG0 signal 111, SEG1 signal 112, SEG2 signal 113, SEG3 signal 114, and SEGn signal 115 are formed. In the segment signals 111 to 115 in FIG. 3, when the read LCD display data 24 is “1”, it corresponds to “H” output, and when it is “0”, it corresponds to “L” output. The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. Is done. As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be driven.

  Next, the operation in the case of setting to perform gradation display will be described below. In this case, the gradation function valid setting register 15 is set to a value for gradation display.

  Here, the operation in the case of setting to perform gradation display differs from the operation in the case of setting to not perform gradation display in that the segment signal forming method is different, and the COM0 signal 106, COM1 signal 107, COM2 signal 108, The generation of the common signal of the COM3 signal 109 and the COMn signal 110 is the same as in the case where the gradation display is not performed. The timing control circuit 12 forms a light gradation clock 104 and a dark gradation clock 105 shown in FIG. Here, the LCD display data 24 stored in the display data storage device 11 becomes segment data corresponding to the common signal, and the gradation data 27 becomes gradation data corresponding to the segment signal and is read out. The segment generation circuit 14 forms the segment signal, SEG0 signal 111, SEG1 signal 112, SEG2 signal 113, SEG3 signal 114, and SEGn signal 115 shown in FIG. In the segment signals 111 to 115 in FIG. 4, when the read LCD display data 24 is “1” and the gradation data 27 is “1”, the light gradation is within one frame of the frame clock 101. A signal having the same H period as the H period of the clock 104 is formed. When the read LCD display data 24 is “0” and the gradation data 27 is “1”, the same H period as the H period of the dark gradation clock 105 in one frame of the frame clock 101. Is formed. The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

<Second Embodiment>
The LCD driving microcontroller according to the second embodiment of the present invention will be described below with reference to the drawings. However, the description of the parts described in the first embodiment is omitted.

  As shown in FIG. 5, the LCD driving microcontroller according to the present embodiment is different from the LCD driving microcontroller according to the first embodiment in that the bright level input from the timing control circuit 12 to the segment generation circuit 14. The gray scale clock and dark gray scale clock forming methods are different, and the gray scale period setting register 17 for setting the H period of the bright gray scale clock is controlled with respect to the LCD driving microcontroller of the first embodiment. The configuration is added to the circuit 12.

  In the present embodiment, the timing control circuit 12 forms the frame clock 101 by appropriately dividing the base clock 100 according to the setting value of the LCD cycle setting register 16. Here, the frame clock 101 is an LCD display cycle. Further, the light grayscale clock 104 having the H period varied based on the setting value of the register is formed according to the setting value of the grayscale period setting register 17 for setting the H period of the light grayscale clock. Further, the dark gradation clock 105 is formed in the same period as the light gradation clock 104 and having a half H period with respect to the H period of the light gradation clock.

  Here, in the operation in the case of setting to perform gradation display, when the read LCD display data 24 is “1” and the gradation data 27 is “1” in the segment signals 111 to 115 in FIG. In one frame of the frame clock 101, a signal having the same H period as the H period of the bright gradation clock 104 is formed. When the read LCD display data 24 is “0” and the gradation data 27 is “1”, the same H period as the H period of the dark gradation clock 105 in one frame of the frame clock 101. Is formed.

  The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

  In this way, by setting the register for setting the H period of the light gradation clock to an arbitrary value, the light gradation clock 104 is formed according to the value of the register for setting the H period of the light gradation clock, and the LCD A segment signal corresponding to the display data 24 and the gradation data 27 can be formed, whereby the gradation display can be variably displayed on the LCD display panel.

<Third Embodiment>
Hereinafter, an LCD drive microcontroller according to a third embodiment of the present invention will be described with reference to the drawings. However, the description of the parts described in the first embodiment is omitted.

  As shown in FIG. 7, the LCD driving microcontroller of the present embodiment is different from the LCD driving microcontroller of the first embodiment in the method of forming the segment signal output from the segment generation circuit. In this configuration, an inversion control register 18 for performing inversion control is added to the LCD driving microcontroller of the first embodiment.

  In the present embodiment, the segment signal 26 generated by the segment generation circuit 14 is inverted by the value of the inversion control register 18. In the operation when the inversion control is invalid and the gradation display setting is invalid, the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. 3 are output. During the operation when the inversion control is invalid and the gradation display setting is valid, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. 6 are inverted. Further, in the case of the operation when the inversion control is valid and the setting for gradation display is invalid, the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. 8 are output. Further, in the operation in the case where the inversion control is effective and the gradation display is set, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. H output is performed in the L section of the gradation clock 104 and the dark gradation clock 105, and L output is performed in the H section.

  The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

  As described above, the segment signal inverted by the segment generation circuit 14 can be formed by the register for inversion control setting, so that the gradation display can be easily displayed on the LCD display panel.

<Fourth embodiment>
Hereinafter, an LCD driving microcontroller according to a fourth embodiment of the present invention will be described with reference to the drawings. However, the description of the parts described in the second embodiment is omitted.

  As shown in FIG. 10, the LCD driving microcontroller of this embodiment is different from the LCD driving microcontroller of the second embodiment in the method of forming the segment signal output from the segment generation circuit. In this configuration, an inversion control register 18 for performing inversion control is added to the LCD driving microcontroller of the second embodiment.

  In the present embodiment, the segment signal generated by the segment generation circuit is inverted by the value of the inversion control register. When the inversion control is invalid and the operation is set to perform gradation display, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. 6 are inverted. Further, in the operation in the case where the inversion control is effective and the gradation display is set, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. H output is performed in the L section of the gradation clock and dark gradation clock, and L output is performed in the H section.

  The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

  As described above, the segment signal inverted by the segment generation circuit 14 can be formed by the register for inversion control setting, so that the gradation display can be easily displayed on the LCD display panel.

<Fifth embodiment>
Hereinafter, an LCD driving microcontroller according to a fifth embodiment of the present invention will be described with reference to the drawings. However, the description of the parts described in the second embodiment is omitted.

  As shown in FIG. 11, the LCD driving microcontroller of the present embodiment is different from the LCD driving microcontroller of the second embodiment in the method of forming the segment signal output from the segment generation circuit. In this configuration, a partial inversion control register 19 for performing partial inversion control is added to the LCD driving microcontroller of the second embodiment.

  In the present embodiment, the segment signal generated by the segment generation circuit is inverted by the value of the partial inversion control register. When the inversion control is invalid and the operation is set to perform gradation display, the frame of the common signals 106 to 110 in FIG. 6 and the segment signal 113 corresponding to the value of the partial inversion control register are output. Further, in the operation in the case where the inversion control is effective and the gradation display is set, the segment signal 112 corresponding to the frame of the common signals 106 to 110 in FIG. 12 and the value of the partial inversion control register is output. Therefore, H output is performed in the L section of the bright gradation clock and dark gradation clock, and L output is performed in the H section.

  The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

  In this way, by partially setting the register for inversion control setting, a segment signal partially inverted by the segment generation circuit 14 can be formed, thereby easily having six levels of gradation display. Can be displayed on the LCD display panel.

<Sixth Embodiment>
Hereinafter, an LCD driving microcontroller according to a sixth embodiment of the present invention will be described with reference to the drawings. However, the description of the parts described in the second embodiment is omitted.

  As shown in FIG. 10, the LCD driving microcontroller of this embodiment is different from the LCD driving microcontroller of the second embodiment in the method of forming the segment signal output from the segment generation circuit. In this configuration, an inversion control register 18 for performing inversion control is added to the LCD driving microcontroller of the second embodiment.

  In the present embodiment, the segment signal generated by the segment generation circuit is inverted by the value of the inversion control register. When the inversion control is invalid and the operation is set to perform gradation display, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. 6 are inverted. Further, in the operation in the case where the inversion control is effective and the gradation display is set, the outputs of the segment signals 111 to 115 corresponding to the frames of the common signals 106 to 110 in FIG. L output is performed in the L section of the gradation clock and dark gradation clock, and L output is performed in the H section.

  The common signal 25 formed and output in the common generation circuit 13 and the segment signal 26 formed and output in the segment generation circuit 14 are input to the respective terminals 2 to 4 via the display data bus 10. The As a result, an LCD drive signal can be output from the terminals 2 to 4 to the outside of the microcontroller 1, and an externally connected LCD display panel can be displayed.

  In this way, the segment signal inverted by the segment generation circuit 14 can be formed by the register for inversion control setting, so that the gradation display for invalidating the gradation waveform at the time of inversion control can be displayed on the LCD. Can be displayed on the panel.

<Seventh embodiment>
Hereinafter, a system according to a seventh embodiment of the present invention will be described with reference to the drawings.

  FIG. 14 shows an example of a schematic configuration of a system 53 having a function capable of controlling the display contents of the LCD display panel 51 of the present embodiment.

  In FIG. 14, in the system 53, the LCD display panel 51 is connected to the LCD driving microcontroller 1 of the first, second, third, fourth, or fifth embodiment. The LCD driving microcontroller 1 is connected to the external input device 52 and the external input device 52 is operated, whereby the LCD driving microcontroller 1 is controlled and the display content of the LCD display panel 51 can be controlled. The external input device 52 may be configured by a physical signal such as a key switch, an electrical signal, or a control signal by electromagnetic waves, infrared rays, wireless, or communication.

  The present invention can be used in an LCD driving system for driving an LCD display panel.

1 is a block diagram showing an LCD driving microcontroller in Embodiment 1 of the present invention. Timing chart showing an example of operation in the first embodiment Timing chart showing an example of operation in the first and third embodiments Timing chart showing an example of operation in the first embodiment The block diagram which shows the microcontroller for LCD drive in Embodiment 2 of this invention Timing chart showing an example of operation in the second, third, fourth, fifth and sixth embodiments The block diagram which shows the microcontroller for LCD drive in Embodiment 3 of this invention Timing chart showing an example of operation in the third embodiment Timing chart showing an example of operation in the third and fourth embodiments The block diagram which shows the microcontroller for LCD drive in Embodiment 4, 6 of this invention FIG. 9 is a block diagram showing a microcontroller for driving an LCD according to a fifth embodiment of the present invention. Timing chart showing an example of operation in the fifth embodiment Timing chart showing an example of operation in the sixth embodiment The block diagram which shows the system in Embodiment 7 of this invention

Explanation of symbols

1 Microcontroller 2, 3, 4 Display control terminal 5 CPU
6 Data bus 7 Address bus 8 ROM
9 RAM
DESCRIPTION OF SYMBOLS 10 Display data bus 11 Display data storage device 12 Timing control circuit 13 Common generation circuit 14 Segment generation circuit 15 Gradation function effective setting register 16 LCD period setting register 17 Gradation period setting register 18 Inversion control register 19 Partial inversion control register 24 LCD Display data 25 Common signal 26 Segment signal 27 Gradation data 100 Base clock 101 Frame clock 104 Bright gradation clock 105 Dark gradation clock 106 COM0
107 COM1
108 COM2
109 COM3
110 COMn
111 SEG0
112 SEG1
113 SEG2
114 SEG3
115 SEGn

Claims (7)

An LCD driving microcontroller for driving an LCD display panel,
A display data storage device for storing data from ROM and RAM as display data and gradation data;
A frame clock that determines a display cycle, a light grayscale clock that is a half cycle of the frame clock, a cycle that is the same as the light grayscale clock, and an H period that is half a period of the H period of the light grayscale clock. A timing control circuit that outputs a dark gradation clock,
Based on the frame clock output from the timing control circuit, generates a common signal, and sequentially outputs the common signal,
A register for enabling the gradation function is provided, and when the gradation function is disabled by the register, a segment signal is generated and output based on the common signal and the display data, or a gradation is generated by the register. When the function is set to be effective, in addition to the common signal, a segment generation unit having a function of generating and outputting a segment signal based on the bright gradation clock, the dark gradation clock, the display data, and the gradation data;
A plurality of terminals for outputting LCD drive signals to the LCD display panel;
An LCD driving microcontroller that inputs each common signal and each segment signal output from the display output control circuit to each terminal. The microcontroller for driving an LCD according to claim 1,
A light gray scale clock that outputs a light gray scale clock that has an H period variable based on a setting value of the register, and that has the same period as the light gray scale clock. The timing control circuit is newly provided with a function of outputting a dark gradation clock in which the H period is a half period with respect to the H period.
The LCD driving microcontroller according to claim 1. The microcontroller for driving an LCD according to claim 1,
With respect to the segment signal generated by the display output control circuit, a register for validly setting an inverted output, and a function for inverting and outputting the segment signal according to the valid setting of the register and having the inverted output are newly provided.
The LCD driving microcontroller according to claim 1. The LCD driving microcontroller according to claim 2,
For the segment signal generated based on the light grayscale clock, dark grayscale clock, and frame clock whose H period is varied based on the set value of the register that sets the high grayscale clock H period, the segment 3. The LCD driving microcontroller according to claim 2, further comprising a register that partially sets the inverted output of the signal and a function that partially outputs the segment signal by setting the register to be enabled. The LCD driving microcontroller according to claim 2,
For the segment signal generated based on the light grayscale clock, dark grayscale clock, and frame clock whose H period is varied based on the set value of the register that sets the high grayscale clock H period, the segment 3. The LCD driving microcontroller according to claim 2, further comprising a register for effectively setting a partial inversion output of a signal, and a function for inverting and outputting a part of the segment signal by the setting of the register. The LCD driving microcontroller according to claim 2,
For the segment signal generated based on the light grayscale clock, dark grayscale clock, and frame clock whose H period is varied based on the set value of the register that sets the high grayscale clock H period, the segment A register for enabling the inverted output of the signal, and a segment signal generated by the bright gradation clock and the dark gradation clock by the effective setting of the register are turned off, and the segment signal generated based on the frame clock The microcontroller for driving an LCD according to claim 2, which has a new function of inverting output only. An LCD display panel;
The microcontroller of claim 1 for controlling the LCD display panel;
In a system comprising an external input device for controlling the microcontroller,
A system having a function of controlling the display contents of the LCD display panel by controlling the state of the microcontroller by a control signal input from the external input device.

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