JP2008166694A - Manufacturing method of mirror arrangement for semiconductor lithography, and mirror arrangement for reflection of electromagnetic radiation - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a mirror arrangement for semiconductor lithography, and to provide the mirror arrangement for the reflection of electromagnetic radiation. <P>SOLUTION: Two or more optical layers 5 aimed at forming a mirror region 4 are formed at a front face 3 of a board 2. Before the application of the optical layer 5, the front face 3 of the board 2 is processed at a first work step so that the front face 3 has the dimensional accuracy demanded. In a second work step, at least one electric conductive path 7 is applied on the front face 3 of the board 2 at an exterior of an optical active area A. In order to rectify the variation of dimensional accuracy, caused by application of the electric conductive path 7, the front face 3 of the board 2 is subjected to post-treatment, in at least a region near to the electric conductive path 7 in a third work step, and the optical layer 5 is applied in a fourth work step. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

Detailed Description of the Invention

[Background technology]
The present invention relates to a method for manufacturing a mirror arrangement for semiconductor lithography, in particular EUV lithography, having a substrate, the mirror arrangement being provided with a plurality of optical layers on the front surface for the purpose of forming a mirror region. Equipped with a substrate.

  The invention likewise relates to a mirror arrangement for an EUV projection objective or illumination system for semiconductor lithography for the reflection of electromagnetic radiation according to the preamble of claim 10. The invention likewise relates to an optical system comprising a plurality of optical elements and a microlithographic projection exposure apparatus for producing semiconductor components.

The mirror arrangement includes a mirror region, and the shape of the mirror region specifies the optical characteristics of the mirror. The mirror arrangement can be integrated into the optical system and identifies the beam path in the optical system. The optical system can be objective, such as used in a lithographic method for imaging a mask on a photosensitive layer, in particular during the manufacture of small parts, in particular during the manufacture of semiconductor parts. .
[Background technology]
A method of manufacturing a mirror arrangement, a general mirror arrangement for reflecting electromagnetic radiation, and also an EUV projection objective are known from JP 2006 194 690 A.

  DE 102 14 259 A1 discloses an irradiation system operating at a wavelength in the EUV region, a projection exposure apparatus equipped with this type of irradiation system, and a method for exposing fine structures.

Disadvantages of conventionally known mirror arrangements for reflecting electromagnetic radiation, specifically electromagnetic radiation having a wavelength of less than 260 nm, are mainly in the EUV region due to high energy radiation (photoelectric effect). , Electrons are emitted from the mirror region. The emission of electrons from the mirror region causes a change in the potential of the mirror region relative to the components surrounding the mirror arrangement, thereby damaging both the mirror arrangement and the components surrounding the mirror arrangement, and even the mirror arrangement. Spark flashover can occur that damages the entire integrated optical system or projection exposure apparatus.
[Summary of Invention]
An EUV projection objective for EUV lithography for reflecting electromagnetic radiation for the manufacture of semiconductor components is known in JP 2006 194 690 A with a substrate having a front surface facing the reflected radiation. In this patent publication, a plurality of optical layers (multilayers) are provided on the front surface of a substrate in order to provide a mirror region using a layered structure. A plurality of electrically conductive paths are provided that are attached to the mirror region, in other words, attached to the top surface of the optical layer. The electrically conductive path is preferably formed by a metal conductor path.

  Indispensable for mirror arrangements for EUV projection objectives, as well as mirror arrangements for illumination systems for semiconductor lithography, is the dimensional accuracy of the mirror surface. The dimensional accuracy of the mirror surface is also referred to as the mirror surface fit. The dimensional accuracy of the mirror surface is changed according to JP 2006 194 690 A by applying an electrically conductive path to the mirror surface, in other words, the top surface of the optical layer (multilayer). It can be seen that this is caused, for example, by application of an electrically conductive path and due to stress that changes the dimensional accuracy of the mirror region. The accuracy of the mirror arrangement is adversely affected by changes in dimensional accuracy.

  WO 2006/033442 discloses a mask for a projection exposure apparatus for semiconductor lithography for manufacturing semiconductor components. In this mask, the substrate is provided with an electrically conductive layer. Although the mask is part of the projection exposure apparatus, the mask provides a completely different function than the projection objective or illumination system.

Therefore, the present invention provides a mirror arrangement for semiconductor lithography, and
It is based on the object of providing a method for manufacturing an EUV projection objective for semiconductor lithography for reflecting electromagnetic radiation or a mirror arrangement for an illumination system. Specifically, it is used in EUV microlithography, and avoids the disadvantages of the prior art, specifically, spark flashover and dimensional accuracy (mirror accuracy) caused by mirror arrangement. is there.

This object is achieved according to the invention by using the method according to claim 1 and the mirror arrangement according to claim 10.
Due to the fact that means are provided for electron exchange (supply and / or carry away) in the mirror region, potential differences and hence spark flashover are avoided. Since electrons are emitted by radiation, specifically, radiation in the EUV region, in general, avoidance of flashover is realized by means for supplying electrons to the mirror region. However, the solution according to the invention also makes it possible in principle to remove (excess) electrons from the mirror region.

  Therefore, the potential of the mirror arrangement or the mirror region is kept constant by supplying electrons. Damage to the mirror arrangement or other optical system as a result of spark flashover is reliably avoided with the present invention.

  As the inventors have discovered, electrons can be delivered to the mirror region in such a way that the optical properties are not affected and the surface coating is not contaminated. The solution according to the invention is implemented in a vacuum-compatible and thermally stable manner. The solution according to the invention is carried out in such a way that it is resistant to atomic oxygen and atomic hydrogen and also to both UV and EUV radiation.

  In contrast to the mirror arrangement according to JP 2006 194 690 A, the electrically conductive path is not applied to the mirror area, ie the top surface of the optical layer (multilayer), but rather to the plane below the mirror area. This fact makes it possible to offset the mechanical change in dimensional accuracy caused by the application of the electrically conductive path. In the case of the mirror arrangement according to JP 2006 194 690 A, it was impossible to cancel out the mechanical change, since the dimensional change on the mirror area cannot be canceled out.

  The method according to the invention for producing a mirror arrangement for semiconductor lithography, in particular for EUV lithography, comprises a front surface on which a plurality of optical layers are provided for the purpose of forming a mirror region in a first working step. Is provided on the substrate. The front surface has the dimensional accuracy (so-called specular accuracy or final specular accuracy) required for the mirror region prior to application of the optical layer. In other words, there are mechanical dimensions and surface requirements such as accuracy and surface roughness so that the front surface of the substrate can supply the optical layer (multilayer). In the second working step, at least one electrically conductive path is applied to the front surface of the substrate outside the optically effective area. The electrically conductive path is preferably formed as a metal coating. The metal coating can be applied in various ways. In particular, the deposition of metal coatings or the use of physical or chemical methods, such as physical vapor deposition (PVD) or chemical vapor deposition (CVD), is advantageous.

  After application of the electrically conductive path, in a third working step, the front surface of the substrate is post-processed at least in a region adjacent to the electrically conductive path. In this case, the electrically conductive path itself should not be processed. It is intended that mechanical changes in dimensional accuracy that have been altered by the application of an electrically conductive path are compensated for by processing on the front side of the substrate or by post-processing on the front side of the substrate. The processing on the front surface of the substrate or the post-processing realizes that the mechanical dimensions and surface roughness relating to the front surface of the substrate are again within the required tolerance range. After this post-treatment, an optical layer, for example an optical layer in the form of a MO / SI stack, is applied in a known manner.

  The front surface of the substrate can be post-processed using a well-known method, for example, an IBF method or a super-polishing method. The superpolishing method is preferably performed in a region adjacent to the electrically conductive path on the front side of the substrate. However, the super-polishing method may be performed over the entire front surface of the substrate except the electrically conductive path. The deformation resulting from applying the electrically conductive path can be, for example, a value of 1 to 10 nm.

  For example, using the IBF (ion beam figuring) method described in US 7,077,533 B2, or by using a super-polishing method that can achieve the required dimensional accuracy of 0.2 nm. Thus, a surface roughness of less than 0.2 nm rms can be achieved. By using these methods, the deformation of the front surface of the substrate due to the application of an electrically conductive path can now be corrected by the present invention.

  The substrate is preferably formed from a material having a very low coefficient of thermal expansion (CTE). The coefficient of thermal expansion should be at most 0.1 ppm / K, and specifically, it is preferably at most 0.02 ppm / K. This preferably occurs with "materials that hardly swell". In principle, a material that hardly expands does not change in size in the temperature range of −40 ° C. to + 400 ° C., preferably in the temperature range of 0 ° C. to 50 ° C., in other words, a coefficient of thermal expansion of at most 10 ppb / K. Have The substrate preferably comprises or is formed of ceramic, glass or glass ceramic. Specifically, Zerodur (registered trademark), Zerodur-M (registered trademark), ClearCERAM (registered trademark), or ULE (registered trademark), and other low thermal expansion Commercial products such as glass ceramics are suitable here.

Glass ceramic is a non-porous inorganic material including a crystal layer and a glass layer.
Zerodur® is described, for example, in DE-A-1 902 432. Zerodur-M (registered trademark) is a Zerodur (registered trademark) registered in a composition not containing magnesium oxide in principle, and is described in, for example, US-A-4 851 372. .

  Processing the front side of the substrate to achieve the required dimensional accuracy so that the processed area is provided as an optical layer (multilayer) is a well-known method, preferably beam processing (IBF) or super- This is achieved using a polishing method. Here, a dimensional accuracy of 0.2 nm on the front surface of the substrate can be realized. That is, in the shape of the actually realized surface, the surface has a wavefront accuracy of only 0.2 nm or less from the nominal surface. By using the super-polishing method, the front surface of the substrate can be polished so that the surface roughness is 0.1 to 0.3 nm rms. Later, in order to achieve the expected dimensional accuracy, problems and solutions that occur during processing of the substrate are described in US 7,077,533 B2 and US 6,453,005 B2. Specific preferred methods for surface treatment are also described in these documents. A description of the method, specifically a description of how to derive good HSFR (high spatial frequency roughness) and good MSFR (mid spatial frequency roughness) values, Is given here. In these methods, the optical layer (multilayer) is applied when the front surface of the substrate has the required dimensional accuracy (mirror accuracy), in other words, after the polishing method or the super-polishing method. Before, the inner layer is adapted to be applied to the front side of the substrate. The inner layer can be formed of a material whose surface roughness does not increase significantly after beam processing (IBF) according to US 7,077,533 B2. In US 7,077,533 B2, silicon, quartz glass or metal is specified as the material for the inner layer. In US 6,453,005 B2, silicon oxide is particularly proposed as an inner layer. Therefore, a suitable coating layer is provided with the intention of not compromising other properties of the substrate.

  EP 1 450 182 A2 is intended to make an optical component in a preferred shape after the front surface of the substrate is pre-prepared or pre-polished during the manufacture of optical components, specifically mirrors. First, the front surface is processed using the IBF method. Thereafter, an inner layer made of silicon is applied by ion beam sputtering with a thickness of 500 nm to 2 (m), and the optical components to which the inner layer is applied are sequentially processed into a final shape by the IBF method.

  According to the invention, before or after the first working step in which the front side of the substrate is processed to the required dimensional accuracy, a silicon oxide layer or EP 1 450 182 A2, US 6,453,005 B2, or , US 7,077,533 B2, several other layers known to be provided can be applied as inner layers between the substrate and the optical layer (multilayer) applied in the fourth working step. . For this reason, the inner layer is applied before the second working step according to the invention (application of an electrically conductive path). Regarding the application of the inner layer, in the above-mentioned three patent publications, it is particularly preferable that the IBF method is used for processing the inner layer.

  Regarding the feasibility of IBF post-processing, ULE (registered trademark) is unlikely to have a problem with surface roughness, so a substrate composed of ULE (registered trademark) is made with Zerodur (registered trademark). It is preferable to the substrate to be constructed.

  According to the method of the present invention, it is possible to apply an electrically conductive path, specifically, a metal coating without impairing the optical properties of the mirror region. The accuracy of EUV coating in the optically effective area is not affected by the conductive coating.

  It is advantageous if the means for exchanging electrons in the mirror region comprises at least one electron source for supplying electrons to the mirror region via at least one electrically conductive path. In order to contact the mirror region in a manner that does not cause loss, it is advantageous if the actual contact portion, ie the electron supply portion, is established as far as possible from the optically effective region of the mirror region. In this case, it is advantageous if the radial distance between the at least one electrically conductive path and the optically active area is at least 10 mm. For this purpose, an electrically conductive path can be applied to the substrate or to the uncoated mirror.

  It is advantageous if the contact location, i.e. the location where the electrically conductive path is connected to the electron source via a cable, lead or the like, is located away from the mirror region. In this case, it is advantageous if the electrical resistance between the mirror area and the position of the contact is less than 500 ohms.

Contact with the electrical path can also be formed via a probe element, eg, a probe end.
Due to the electrically conductive path formed in the appropriate length and extending along the outside of the substrate without the mirror region or mirror coating, the contact location is arranged so that the contact location is from the mirror region. It can be realized in a very simple way to leave. The variety of potential contact locations can be attributed to such electrically conductive paths.

  Electrically conductive paths can be formed in a variety of ways, and the various methods are described in general prior art. It is particularly suitable as at least one electrically conductive path to be deposited and formed as a metal conductor path. Suitable materials are, for example, Au, Ag, Pt and Cu. It is equally possible to form the electrically conductive path as a non-metallic conductor path. For this purpose, for example, TiN or doped Si can be used. A further possible configuration of the electrically conductive path consists of forming the electrically conductive path as a metal film, for example a metal film made of gold foil.

  It is also possible to form the release layer with gold, as known in JP 06124476 as a structure-carrying mask.

  Contact connection of a cable or lead to an electrically conductive path can be accomplished in a variety of ways. In this case, it may be advantageous for the leads to be connected to the electrically conductive path using solder. In this case, it may be further advantageous that the contact position is overcoated with a protective epoxy adhesive or provided with such an adhesive. Leads or cables can also be connected to the electrically conductive path by bonding. This connection can also be achieved by adhesive bonding. For this purpose, preferably a conductive adhesive (eg silver conductive adhesive) is used. In yet another method, the connection of the lead or cable to the electrically conductive path is configured using a contact spring.

  Some of the possible connection methods mentioned offer the advantage that by means of these connection methods the contact position is simultaneously protected against scattered light and / or physical / chemical influences. In this case, care must be taken to ensure that no contamination by the connecting means occurs. The connection of the cable or lead to the electrically conductive path is also established through a metal lamina that can protect the contact location. The contact position is further advantageously provided with a strain relief. Solutions such as providing strain relief are well disclosed in the general prior art.

Due to redundancy, it has proven advantageous to use multiple electrically conductive paths.
In an alternative cost-effective alternative, it is possible to contact the probe directly to the mirror region without using an electrically conductive path. As an example, a probe end connected to an electron source via a cable can be used for this purpose. In this configuration, the contact is advantageously formed in a mirror area outside the optically effective area, so-called “overflow”.

  In a further alternative arrangement, means may be provided having at least one electron source suitable for irradiating the mirror area with electrons in a non-contact manner. Since the electron source and the mirror region to be irradiated are attached correspondingly, there is an advantage that non-contact irradiation can be established. However, this solution is disadvantageous in that it is complicated and expensive and, if necessary, causes material removal.

  In addition to the mirror arrangement itself, the present invention provides an optical system. The optical system includes a plurality of optical elements and a projection exposure apparatus for semiconductor lithography for manufacturing a semiconductor component, specifically, EUV lithography. In this case, the at least one optical element is formed as a mirror arrangement according to claim 10.

Furthermore, the present invention provides a lithographic method for manufacturing small parts in an exposure system. The lithographic method includes the following steps.
Arranging a pattern structure to be imaged in the region of the object plane of the imaging optics of the exposure system;

A substrate supporting the photosensitive layer is arranged in the region of the imaging plane of the imaging optical system and the exposure region of the substrate on which the pattern structure is imaged using the exposure system;
The exposure system comprises a plurality of optical elements, at least one of the plurality of optical elements being constituted by a mirror arrangement according to claim 1;

Further advantageous configurations and advantageous advancements of the invention are indicated in the remaining dependent claims.
The basic embodiment is described below with reference to the drawings.
Detailed Description of Embodiments of the Invention
FIG. 1 shows a mirror arrangement 1 for EUV projection objectives or illumination systems for semiconductor lithography for reflecting electromagnetic radiation, in particular electromagnetic radiation having a wavelength in the EUV range for manufacturing semiconductor components. Is shown. 2 to 5 show in cross-section various embodiments of the mirror arrangement 1 that can be seen in the plan view of FIG.

  In the exemplary embodiment, the mirror arrangement 1 includes a substrate (carrier substrate) 2 having a front surface 3 facing the reflected radiation, and a mirror region 4 provided on the front surface of the substrate 2. The substrate 2 can be formed of, for example, a glass material having a low coefficient of thermal expansion, a glass material such as Zerodur (registered trademark) or ULE (registered trademark). Any other suitable substrate can also be used, such as, for example, formed of silicon.

  The front surface 3 of the substrate 2 can be metallized to provide a mirror region 4 that is metallically reflective. However, in the exemplary embodiment, a plurality of optical layers 5 are provided on the front surface 3 in order to provide the mirror region 4 using a layered structure (multilayer).

  As can be seen in FIGS. 1 to 5, means 6 for exchanging electrons in the mirror region 4 are provided. In the exemplary embodiment, this means is formed as an electron source 6 that supplies electrons to the mirror region 4 via an electrically conductive path 7. In the exemplary embodiment, the electrically conductive path 7 is formed as a metal conductor path deposited on the front surface 3 of the substrate 2. According to the embodiment shown in FIGS. 1 to 4, the electrically conductive path 7 runs below the surface 4 a of the mirror region 4. In this case, the electrically conductive path 7 extends along the outer periphery of the substrate 2 to a region where the mirror region 4 of the substrate 2 is not provided. Depending on the length of the electrically conductive path 7, a plurality of contact positions 8 can be contacted to the lead 9 or probe element 10 at the contact position, as shown in FIG. 2. Can come to be. In this case, the lead 9 or the probe element 10 is connected to the electron source 6. The connection between the probe element 10 and the electron source 6 can be achieved via a conventional connection cable 11.

  According to the embodiment shown in FIGS. 2, 3 and 4, the contact position 8 is provided to be arranged far away from the mirror region 4, in other words, the contact connection is made in the mirror region. This is achieved at a distance from 4.

  According to the embodiment shown in FIGS. 1 to 4, an electrically conductive path 7 is provided to run outside the optically effective area of the mirror area 4. In the embodiment, it is mentioned in this case that the electrically conductive path 7 is provided to terminate in an annular region B designed as an “overflow” that is not used as an effective region. . In this case, the radial distance between the electrically conductive path 7 and the optically effective area A is at least 10 mm.

  The embodiment shown in FIG. 2 shows an electrically conductive path 7 that extends to the extent of the back side of the substrate 2. At that time, the contact connection is preferably achieved on the back surface of the substrate 2 or alternatively on the termination side.

  The embodiment shown in FIG. 3 shows the contact connection between the electrically conductive path 7 and the lead 9 on the top surface of the substrate 2. According to the embodiment shown in FIG. 3, it is further provided that the contact location 8 is protected against scattered light and / or physical / chemical influences. For the purpose of protecting the contact position 8, the contact position 8 is covered with a metal lamina 12 (preferably consisting of amber) which also functions as a strain relief. In this case, the metal lamina is soldered (alternatively adhesively bonded) so that the leads 9 are connected simultaneously with the electrically conductive path 7.

  The embodiment shown in FIG. 4 shows a variant in which the probe element is formed as a probe pin 10 that is used instead of a contact connection to the cable 9 of the electrically conductive path 7. ing. It is not necessary in this case to protect the contact position 8 against scattered light and / or physical / chemical influences. Furthermore, strain relief can be avoided. The probe element 10 is adapted to contact the electrically conductive path 7 on the uppermost surface of the substrate 2 but away from the mirror region 4.

  The embodiment shown in FIG. 5 represents another example that is particularly simple and cost effective. In this example, the probe pin 10 is brought into direct contact with the surface 4 a of the mirror region 4. In this case, the contact is made in the area of the annular overflow B, in other words, outside the effective area A of the mirror area 4.

Therefore, electrons emitted by high energy EUV radiation can be gained in a particularly cost effective manner.
FIG. 6 shows a basic example of the EUV projection exposure apparatus 30. The EUV projection exposure apparatus 30 includes an EUV irradiation system 32 for illuminating a region of a target surface 33 where a light source 31 and a structure-carrying mask are arranged. The EUV projection exposure apparatus 30 also includes a projection objective 34 having a housing 34a and a light beam path 35 for imaging a structure carry mask onto a photosensitive substrate 36 for manufacturing semiconductor components. In this case, the EUV projection exposure apparatus 30 has at least one of a plurality of optical elements for influencing the light path 35 and a projection objective optical element 37 (between the target surface 33 and the substrate 36), Or one of the optical elements 38 of the illumination system 32 (before reaching the target surface 33 or the mask), which correspond to the mirror arrangement 1 according to the invention. In the embodiment according to FIG. 6, at least all of the optical elements 37 for refracting the light path 35 are formed as a mirror arrangement 1 according to the solution according to the invention.

  The following is a description of the method according to the invention for producing in particular a preferred mirror arrangement for semiconductor lithography, in particular for EUV lithography. First is the substrate 2. A plurality of optical layers are provided on the front surface 3 of the substrate 2 using a layered structure (multilayer) for the purpose of forming the mirror region 4. In this case, the board | substrate 2 may be equipped with the front surface 3 which has a suitable dimensional accuracy (mirror surface accuracy) in order for the reflective layer, ie, the optical layer 5, to be provided. According to the invention, in this case, the first working step I can provide the front face 3 of the substrate 2 with the required dimensional accuracy. In the second working step II, at least one electrically conductive path 7 is formed on the optical layer 5 on the front surface 3 of the substrate 2 outside the optically effective area A, in other words in the area B according to FIGS. Applied downward. In this case, a plurality of electrically conductive paths 7 are provided according to the invention. In the third working step III, the front surface 3 of the substrate 2 is at least a region adjacent to the electrically conductive path 7 in order to compensate for deformations or changes in dimensional accuracy caused by the application of the electrically conductive path 7. In the post-processing. In this case, after the third work step is performed, in other words after post-processing, the front surface 3 of the substrate 2 is applied with dimensional accuracy after the first work step, in other words, application of an electrically conductive path. As much as possible, it has dimensional accuracy that matches the previous dimensional accuracy. In the fourth step IV, the optical layer 5 is applied using a known method.

  The method according to the invention can provide an electrically conductive path formed as a metal coating (7). In particular, vapor deposition or physical vapor deposition (PVD) or chemical vapor deposition (CVD) are suitable for performing the metallization. In an exemplary embodiment, the metal coating is a deposited gold coating.

  The method according to the invention may additionally provide a substrate formed from Zerodur® or ULE®. The treatment of the front surface 3 of the substrate 2 in the first working step I and / or the third working step III is achieved by using an IBF method or a superpolishing method. In principle, it is also possible to use other known methods to treat the surface of the substrate and to bring the surface into a preferred shape within an acceptable range.

In the exemplary embodiment, the superpolishing method is performed only in the region of the front surface 3 of the substrate 2 adjacent to the electrically conductive path 7. In such a case, it is intended that the electrically conductive path 7 itself is not treated or damaged. The treatment of the front surface 3 in the region of the electrically conductive path 7 is preferably no longer required for dimensional accuracy because of the application of the electrical path 7 or is achieved only on the already deformed front surface 3. .
As can be seen in FIG. 7, which shows an exemplary embodiment of the method according to the invention, the execution of work step I may precede or follow a further work step X. In the latter working step, a silicon oxide layer or metal layer is placed between the substrate 2 or the front surface 3 of the substrate 2 and the optical layer (multilayer) applied in the fourth working step IV, specifically an inner layer (specifically (Not shown). In the exemplary embodiment according to FIG. 7, work step X is performed after execution of the first work step I and before execution of the second work step II. In the exemplary embodiment, in this case, the inner layer is processed using the IBF method.

  Specifically, the solution according to the present invention is suitable for a projection exposure apparatus or a lithographic method for manufacturing a small part in an irradiation system using EUV radiation having a wavelength of 13 nm. However, the invention is not limited and in addition, it goes without saying that the mirror arrangement according to the invention can be used in the case of UV radiation and in the case of all other electromagnetic radiation.

FIG. 2 shows a basic plan view of a mirror arrangement for an EUV projection objective or illumination system for semiconductor lithography that reflects electromagnetic radiation, together with an electron source, the electron source in the mirror region via an electrically conductive path; Supply. FIG. 1 shows a basic cross-sectional view through a part of a mirror arrangement having a substrate, and a mirror region having a layered structure (multilayer) is provided on the front surface of the substrate facing the reflected radiation. The electrically conductive path is provided so that electrons can be supplied to the mirror region via the electrically conductive path. An example corresponding to FIG. 2 is shown using an electrically conductive path of an alternative configuration, the electrically conductive path being connected to the electron source via a lead at the contact location. FIG. 3 shows another example, in which the contact with the electrically conductive path is made using a probe element in the form of a probe pin. FIG. 5 shows an alternative configuration of FIG. 4, in which no electrically conductive path is provided, and the probe element formed as a probe pin and connected to an electron source is contacted at the surface of the mirror region. ing. A perspective view of an EUV projection exposure apparatus is shown using a light source, an irradiation system, and a projection objective. 2 shows a basic example of the working steps of the method according to the invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Mirror arrangement 2 Board | substrate 3 Front surface 4 Mirror area | region 4a Top surface 5 of a mirror area | region Optical layer 6 Electron source, center 7 Electrically conductive path 8 Contact position 9 Lead 10 Probe element 11 Cable 12 Metal lamina 30 EUV projection exposure apparatus 31 32 EUV irradiation system 33 Target surface 34 Projection objective 34a Housing 35 Ray path 36 Substrate A Effective area B Annular area ("overflow")

Claims (23)

A method for manufacturing a mirror arrangement (1) for semiconductor lithography, specifically EUV lithography,
The front surface (3) comprises a substrate (2) provided with a plurality of optical layers (5) for the purpose of forming a mirror region (4),
A method in which the front surface (3) of the substrate (2) has the required dimensional accuracy in a first working step (I) prior to the application of the optical layer (5). Processed by
Thereafter, in a second working step (II), at least one electrically conductive path (7) is applied to the front surface (3) of the substrate (2) outside the optically effective area (A),
Then, in a third working step (III), at least adjacent to the electrically conductive path (7) for correction of changes in dimensional accuracy caused by the application of the electrically conductive path (7) In the area, post-processing is performed,
Thereafter, in the fourth working step (IV), the optical layer (5) is applied.   The method according to claim 1, wherein the electrically conductive path is formed as a metal coating.   3. Method according to claim 2, characterized in that the metal coating (7) is deposited or physical vapor deposition (PVD) or chemical vapor deposition (CVD) is applied.   4. The method according to claim 1, wherein the substrate (2) is made of Zerodur (R) or ULE (R).   5. A method according to claim 1, wherein the front surface (3) of the substrate (2) is processed using an IBF method.   The method according to any of the preceding claims, characterized in that the front surface (3) of the substrate (2) is treated using a superpolishing method.   The superpolishing method may be performed in the region of the front surface (3) of the substrate (2) adjacent to the electrically conductive path (7) or the substrate (2) excluding the electrically conductive path (7). Method according to claim 6, characterized in that it is carried out over the entire front face (3) of.   Before or after the first action step (I), the front surface (3) of the substrate (2) is treated to the required dimensional accuracy, and a silicon oxide layer or metal layer is applied to the substrate (2). And the optical layer (5) applied in the fourth working step (IV).   The method of claim 8, wherein the inner layer is processed using the IBF method. A mirror arrangement for semiconductor lithography for reflecting electromagnetic radiation to manufacture semiconductor components, in particular for EUV projection objectives or illumination systems for EUV lithography,
Comprising at least one substrate having a front surface facing the reflected radiation;
The front surface of the substrate is provided with a plurality of optical layers for providing a mirror region using a layered structure,
Means for exchanging electrons with the mirror region via at least one electrically conductive path;
Mirror arrangement characterized in that the at least one electrically conductive path (7) runs below the surface (4a) of the mirror region (4).   11. Mirror arrangement according to claim 10, characterized in that the at least one electrically conductive path (7) runs outside the optically effective area (A) of the mirror area (4).   12. A mirror arrangement according to claim 10 or 11, characterized in that the at least one electrically conductive path (7) is deposited and formed as a metal conductor path.   12. A mirror arrangement according to claim 10 or 11, characterized in that the at least one electrically conductive path (7) is formed as a non-metallic conductor path.   12. Mirror arrangement according to claim 10 or 11, characterized in that the at least one electrically conductive path (7) is formed as a metal film.   The at least one electrically conductive path (7) reaches a contact position (8), and the electrically conductive path (7) reaches the electron source (6) at the contact position (8). 15. A mirror arrangement according to any one of claims 10 to 14, characterized in that it can be contact-connected to a lead (9) or a probe element (10) connected to).   16. Mirror arrangement according to claim 15, characterized in that the contact position (8) is arranged away from the mirror region (4).   16. The lead is connected to the electrically conductive path (7) using soldering and / or adhesive bonding and / or bonding and / or contact springs. Or the mirror arrangement of Claim 16.   The mirror arrangement according to any one of claims 15 to 17, wherein the contact position is protected against scattered light and / or physical / chemical influences.   19. Mirror arrangement according to claim 18, characterized in that the contact position (8) is covered with a metal lamina.   20. A mirror arrangement according to claim 18 or 19, characterized in that a strain relief is provided at the contact position (8).   The mirror arrangement according to any one of claims 10 to 20, wherein a plurality of electrically conductive paths (7) are formed. An optical system comprising a plurality of optical elements,
Optical system, characterized in that at least one of the optical elements comprises a mirror arrangement (1) according to any of claims 10 to 21. A projection exposure apparatus for semiconductor lithography for manufacturing a semiconductor component, specifically, EUV lithography,
An irradiation system (32);
A mask that can be illuminated by the illumination system (32);
A projection objective (34) for imaging the mask onto a photosensitive wafer;
With
Projection exposure apparatus, characterized in that the illumination system (32) and / or the projection objective comprises at least one mirror arrangement (1) according to any of the claims 10-21.

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