JP2008159622A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a thin-film resistance capable of improving the value of resistance and performing integration, and to provide a manufacturing method of the semiconductor device. <P>SOLUTION: The thin-film resistance 9 is formed along a recess 16 and a projection 17 in the direction of thickness T on the surface of a resin layer 10. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

Packaged as CSP (Chip Size Package) or W-CSP (Wafer Level Chip Size Package) for the purpose of downsizing the semiconductor device and increasing the density when the semiconductor device is mounted on a printed wiring board. Semiconductor devices have been devised. Conventionally, thin film resistors have been used in such semiconductor devices. For example, a forming method is disclosed that has good ohmic characteristics and is not affected at all by Ar etching, residual silicon etching, or the like, and can obtain a stable and accurate thin film resistor (see Patent Document 1). Further, since the Al wiring is interposed in the direct contact portion with the thin film resistor, the thin film resistance is not removed when the Al wiring on the thin film resistor is removed, and a semiconductor device having a highly reliable thin film resistance is disclosed. (See Patent Document 2). Furthermore, a semiconductor structure and a passive element structure that is separate from the semiconductor structure are provided on the base plate, and has versatility by selecting the type of thin film passive element (thin film resistor) of the passive element structure A semiconductor device that can be used is disclosed (see Patent Document 3). The resistance value of these thin film resistors is defined by the material used, the cross-sectional area, and the length.
JP-A-6-291258 JP-A-8-64762 JP 2006-108167 A

However, in the conventional thin film resistor, when trying to improve the resistance value of the thin film resistor, the thickness and material of the thin film resistor are limited, so the area must be increased, and the area of the substrate of the semiconductor device As a result, the ratio of the thin film resistor to the semiconductor becomes large, and it is difficult to achieve high integration of the semiconductor device.
Accordingly, the present invention provides a semiconductor device having a thin film resistor that can be highly integrated while improving the resistance value, and a method for manufacturing the same.

In order to solve the above problems, the present invention provides a semiconductor device in which a thin film resistor is formed on a surface of a resin layer formed on a substrate, wherein the thin film resistor is uneven in a thickness direction of the surface of the resin layer. It is characterized by being formed along.
With this configuration, the thin film resistor can be undulated in the thickness direction. Thereby, the surface area can be increased as compared with a thin film resistor formed on a flat surface. Therefore, the path of the current flowing through the thin film resistor can be extended and the resistance value of the thin film resistor can be improved. At this time, since the thin film resistor is undulated in the thickness direction, the area (plane area) of the thin film resistor projected on the surface of the substrate does not increase. Therefore, according to the present invention, the semiconductor device can be highly integrated while improving the resistance value of the thin film resistor.

Further, the present invention is characterized in that the unevenness on the surface of the resin layer is formed by a rearrangement wiring formed on the surface of the base and covered with the resin layer.
With such a configuration, the unevenness can be formed on the surface of the resin layer by using the unevenness formed by the rearrangement wiring on the surface of the substrate, so that the formation of the unevenness can be facilitated. Therefore, the productivity of the semiconductor device is not reduced. In addition, since the concavo-convex shape on the surface of the resin layer is formed using the rearrangement wiring and the resin layer existing in the normal semiconductor device, the material cost is not increased.

Further, the present invention is characterized in that the unevenness of the surface of the resin layer is formed by a via provided in the resin layer.
With such a configuration, it is possible to form unevenness on the surface of the resin layer by using vias formed in the resin layer, and thus it is possible to easily form unevenness. Therefore, the productivity of the semiconductor device is not reduced. In addition, since the uneven shape on the surface of the resin layer is formed by vias existing in a normal semiconductor device, the material cost is not increased.

In the present invention, a wiring is formed on the resin layer, a base layer is formed between the resin layer and the wiring, and the thin film resistor is formed on the surface of the resin layer. It is formed of the same material as at least a part of the formation.
With this configuration, a thin film resistor can be formed simultaneously with the formation of the underlayer. Accordingly, the formation of the thin film resistor can be facilitated and the productivity of the semiconductor device can be improved. In addition, since the material can be effectively used between at least a part of the thin film resistor and the base layer, the material cost can be reduced.

The present invention also includes a step of forming a rearrangement wiring on the surface of the base, and the surface of the base covers the rearrangement wiring and reflects the unevenness formed by the rearrangement wiring on the surface of the base. Forming a resin layer so that the surface of the layer is uneven; forming a base layer on the surface of the resin layer; and simultaneously forming a thin film resistor along the unevenness; and wiring on the surface of the base layer And a step of forming.
By manufacturing in this way, unevenness can be formed on the surface of the resin layer simultaneously with the step of forming the resin layer on the surface of the substrate. In addition, since the thin film resistor is formed simultaneously with the formation of the base layer, the number of steps can be reduced. Therefore, the productivity of the semiconductor device can be improved, the resistance value of the thin film resistor can be improved, and a semiconductor device having a thin film resistor that can be highly integrated can be manufactured.

The present invention also includes a step of forming a resin layer on the surface of the substrate and patterning, and simultaneously forming a via, and forming a base layer on the surface of the resin layer and simultaneously forming a thin film resistor along the inner surface of the via. And a step of forming a wiring on the surface of the base layer.
By manufacturing in this way, irregularities can be formed on the surface of the resin layer simultaneously with the step of forming vias in the resin layer. In addition, since the thin film resistor is formed simultaneously with the formation of the base layer, the number of steps can be reduced. Therefore, the productivity of the semiconductor device can be improved, the resistance value of the thin film resistor can be improved, and a semiconductor device having a thin film resistor that can be highly integrated can be manufactured.

<First embodiment>
Next, a first embodiment of the present invention will be described based on the drawings. In each drawing used for the following description, the scale of each member is appropriately changed to make each member a recognizable size.
As shown in FIG. 1, a plurality of electrodes 4 and 5 are formed on an active surface 3 of a substrate 2 that is a base of a semiconductor device 1. The substrate 2 is formed of, for example, silicon, and the electrodes 4 and 5 are formed of a conductive material such as, for example, Cu. Further, an integrated circuit (not shown) composed of a plurality of electronic circuits is formed on the active surface 3 of the substrate 2 excluding the region where the electrodes 4 and 5 are formed, and further, for example, an electrically insulating material such as SiN or SiO ₂ An insulating layer 6 made of is formed.

  A rearrangement wiring 7 and an electrode 8 are formed on the surface of the insulating layer 6. The rearrangement wiring 7 and the electrode 8 are made of a conductive material such as Cu, for example. The rearrangement wiring 7 connects, for example, the electrodes 4 and 5 and the integrated circuit to an external connection terminal (not shown) for mounting the substrate 2 on the counterpart substrate. The rearrangement wiring 7 is used for rearranging the narrow pitch of the finely designed electrodes 4, 5, 8 to the wide pitch of the external connection terminals. The rearrangement wiring 7 has a wiring pattern drawn on the surface of the insulating film 6 so as to correspond to a location where a thin film resistor 9 described later is formed. Concavities and convexities are formed on the surface of the insulating film 6 by the formation portion and non-formation portion of the relocation wiring 7. The height H of the rearrangement wiring 7 for forming the unevenness is set to a height H necessary for forming a desired uneven shape in the resin layer 10 to be described later.

  A resin layer 10 is formed on the surface of the insulating layer 6 so as to cover the rearrangement wiring 7 except for the positions where the electrodes 4, 5 and 8 are formed. Vias 13, 14, and 15 are formed in the resin layer at the positions where the electrodes 4, 5, and 8 are formed, and the surfaces of the electrodes 4, 5, and 8 are exposed. The resin layer 10 is made of a photosensitive resin such as photosensitive polyimide, BCB (benzocyclobutene), or phenol novolac resin. The resin layer 10 can function as a stress relaxation layer that relieves stress caused by a difference in thermal expansion coefficient between the counterpart substrate on which the semiconductor device 1 is mounted and the semiconductor device 1.

  FIG. 2 is an enlarged view of a portion A in FIG. As shown in FIG. 2, wavy irregularities are formed in the thickness T direction on the surface of the resin layer 10. The unevenness is formed reflecting the shape of the unevenness formed on the surface of the insulating film 6 by the rearrangement wiring 7. That is, the rearrangement wiring 7 is formed on the surface of the insulating layer 6, and the convex portion 17 in the thickness T direction reflects the height H of the rearrangement wiring 7 on the surface of the resin layer 10 laminated thereon. Is formed. On the other hand, the surface of the resin layer 10 directly laminated on the insulating layer 6 is relatively recessed 16 reflecting the non-formed portion of the rearrangement wiring 7. Here, the height H ′ of the convex portion 17 on the surface of the resin layer 10 is defined by, for example, the height H of the rearrangement wiring 7, the thickness T of the resin layer 10, the viscosity of the resin material of the resin layer 10, and the like. Here, the thickness T of the resin layer 10 is an average thickness from the surface of the insulating layer 6 to the bottom of the recess 16 on the surface of the resin layer 10.

  A thin film resistor 9 is formed on the surface of the resin layer 10 along the corrugated recess 16 and the protrusion 17 in the thickness T direction of the surface of the resin layer 10. As a result, the thin film resistor 9 is undulated in the thickness T direction. The thin film resistor 9 is formed to a thickness of, for example, 1 μm or less from a metal such as TiW (titanium tungsten), Ti (titanium), or W (tungsten). A base layer 11 is formed on the surface of the resin layer 10. The underlayer 11 is formed according to an arbitrary pattern of the wiring 12 formed on the surface.

  The wiring 12 formed on the surface of the base layer 11 is connected to the integrated circuit on the active surface 3 and the electrodes 4, 5, 8, or the external connection terminals on the surface of the resin layer 10. The wiring 12 is made of, for example, Cu, Au, Ag, or the like. The underlayer 11 is a barrier layer (not shown) that prevents the constituent material of the wiring 12 from diffusing into the resin layer 10, and a seed layer (not shown) that serves as an electrode when the wiring 12 is formed by plating. Etc. are constituted. Here, at least one of the layers constituting the base layer 11 is formed of the same material as the thin film resistor 9, for example, a metal such as TiW (titanium tungsten), Ti (titanium), or W (tungsten).

  Next, a method for manufacturing the semiconductor device of the present embodiment will be described. In the present embodiment, a plurality of semiconductor devices 1 are collectively formed on a silicon wafer and then diced into individual pieces. However, in FIGS. 1 and 2, one semiconductor is shown for convenience of illustration. Only the device 1 is displayed.

  First, an integrated circuit composed of a plurality of electronic circuits is formed on the active surface 3 of the substrate 2 of the semiconductor device 1. Then, electrodes 4 and 5 that are electrically connected to the integrated circuit are formed. Further, an insulating layer 6 is formed so as to cover the electrodes 4 and 5. Next, the insulating layer 6 formed on the electrodes 4 and 5 is removed by, for example, photolithography and etching to expose the surfaces of the electrodes 4 and 5.

  Next, the rearrangement wiring 7 and the electrode 8 are formed on the insulating layer 6. The rearrangement wiring 7 and the electrode 8 are formed through processes such as sputtering, photolithography, etching, and electroplating. At this time, the rearrangement wiring 7 is patterned in consideration of the formation position of the thin film resistor 9 formed in a later step. Further, the height H of the rearrangement wiring 7 is a convex portion having a desired height H ′ on the surface of the resin layer 10 in consideration of the thickness T of the resin layer 10 formed in a later step, the viscosity of the material, and the like. It adjusts beforehand so that 17 can be formed.

  Next, a resin layer 10 is formed on the insulating layer 6 on the surface of the active surface 3 of the substrate 2 so as to cover the relocation wiring 7 described above. At this time, the unevenness formed on the insulating layer 6 by the rearrangement wiring 7 is formed on the surface of the resin layer 10. Here, the thickness T of the resin layer 10 and the viscosity of the material are adjusted in advance so as to reflect the height H of the rearrangement wiring 7 and to obtain the convex portion 17 having a desired height H ′ on the surface. . After forming the resin layer 10, vias 13, 14, and 15 are formed by, for example, etching or the like in order to expose the electrodes 4, 5, and 8 covered with the resin layer 10. At the same time, the resin layer 10 is patterned.

  Next, the base layer 11 is formed on the surface of the resin layer 10 and at the same time, the thin film resistor 9 is formed along the irregularities formed by the concave portions 16 and the convex portions 17 on the surface of the resin layer 10. First, a barrier layer is formed on the surface of the resin layer 10 by sputtering or the like. Further, a seed layer is formed on the surface of the barrier layer by sputtering or the like. At this time, the thin film resistor 9 is formed simultaneously with the step of forming at least one of the layers constituting the base layer 11.

  Thereafter, the thin film resistor 9 and the base layer 11 are patterned into desired shapes. For example, a resist is applied to the surface of the thin film resistor 9, the resist is patterned by photolithography, and etching is performed to form the thin film resistor 9 and the base layer 11 in an arbitrary pattern. Furthermore, the wiring 12 and external connection terminals are formed on the base layer 11 by, for example, sputtering, electroplating, or the like.

Next, the operation of the present embodiment will be described.
As shown in FIG. 1, the thin film resistor 9 is formed in a wavy shape along the unevenness in the thickness T direction on the surface of the resin layer 10. Thereby, the surface area of the thin film resistor 9 can be increased without increasing the plane area of the thin film resistor 9 on the substrate 2. That is, even when the width, thickness T, and material of the thin film resistor 9 in the direction perpendicular to the paper surface are fixed, compared with the thin film resistor 9 formed on the surface of the flat resin layer 10, The path of the current flowing through can be greatly extended. Thereby, the resistance value of the thin film resistor 9 can be improved.
Therefore, even if the thickness and material of the thin film resistor 9 are limited, an increase in the flat area of the thin film resistor 9 on the active surface 3 of the substrate 2 can be prevented while improving the resistance value of the thin film resistor 9. The semiconductor device 1 can be highly integrated.

Further, the unevenness of the surface of the resin layer 10 is formed by the rearrangement wiring 7 formed on the surface of the insulating film 6 on the active surface 3 of the substrate 2 and covered with the resin layer 10, and new members and processes are added. Since it is not necessary, irregularities on the surface of the resin layer 10 can be easily formed.
Therefore, the resistance value of the thin film resistor 9 can be improved without reducing the productivity of the semiconductor device 1. In addition, since the concavo-convex shape on the surface of the resin layer 10 can be formed using the rearrangement wiring 7 and the resin layer 10 existing in the normal semiconductor device 1, the resistance of the thin film resistor 9 can be increased without increasing the material cost. The value can be improved.

Further, since the thin film resistor 9 is formed of the same material as at least one layer of the base layer 11 formed on the surface of the resin layer 10, the thin film resistor 9 can be formed simultaneously with the formation of the base layer 11. As a result, it is not necessary to separately provide a process for forming the thin film resistor 9, so that the number of manufacturing processes of the semiconductor device 1 can be reduced.
Therefore, the thin film resistor 9 can be easily formed and the productivity of the semiconductor device 1 can be improved. Further, since the number of materials used for the semiconductor device 1 can be reduced, the manufacturing of the semiconductor device 1 can be facilitated, and the materials can be mutually exchanged by at least a part of the thin film resistor 9 and the base layer 11. Since it can be used effectively, the material cost can be reduced.

Moreover, by manufacturing as mentioned above, an unevenness | corrugation can be formed in the surface of the resin layer 10 simultaneously with the process of forming the resin layer 10 in the surface of the insulating layer 6. FIG. Further, since the thin film resistor 9 is formed simultaneously with the formation of the base layer 11, the number of steps can be reduced.
Therefore, while improving the productivity of the semiconductor device 1, the resistance value of the thin film resistor 9 can be improved, and the semiconductor device 1 including the thin film resistor 9 capable of high integration can be manufactured.

  As described above, according to the present embodiment, it is possible to obtain the semiconductor device 1 including the thin film resistor 9 that can be highly integrated while improving the resistance value.

<Second embodiment>
Next, a second embodiment of the present invention will be described with reference to FIGS.
The semiconductor device 21 of the present embodiment is different from the semiconductor device 1 of the first embodiment shown in FIGS. 1 and 2 in that the surface irregularities of the resin layer 10 are formed by vias 22. . Another difference is that the rearrangement wiring 7 is not formed on the insulating film 6. Others are the same as in the first embodiment, and thus the same parts are denoted by the same reference numerals and description thereof is omitted.

  As shown in FIGS. 3 and 4, the resin layer 10 is provided with a plurality of vias 22 that reach from the surface of the resin layer 10 to the insulating layer 6 on the active surface 3 of the substrate 2. The portions where the vias 22 are not formed become the concave portions 23, and the portions where the vias 22 are formed become the convex portions 24, so that irregularities are formed on the surface of the resin layer 10. Further, the thin film resistor 9 formed on the surface of the resin layer 10 descends from the surface of the resin layer 10 along the side wall of the via 22 and reaches the surface of the insulating film 6. The thin film resistor 9 further rises along another side wall of the via 22 and reaches the surface of the resin layer 10 so as to be undulated in the direction of the thickness T ′ of the resin layer 10.

  Thereby, the surface area of the thin film resistor 9 can be increased and the resistance value of the thin film resistor 9 can be improved without increasing the plane area of the thin film resistor 9 occupying on the substrate 2 as in the first embodiment. Further, the via 22 can be formed in the formation process of the vias 13 and 14 included in the normal manufacturing process of the semiconductor device 1, and the via 22 can be used as the unevenness of the surface of the resin layer 10. Thereby, unevenness | corrugation can be easily formed in the surface of the resin layer 10 without providing a new process.

  Therefore, according to this embodiment, even if the rearrangement wiring 7 is not formed in the lower layer of the resin layer 10, not only the same effect as the first embodiment can be obtained but also a normal semiconductor Since the vias 22 are formed in the process of forming the vias 13, 14, and 15 existing in the apparatus 1 and the uneven shape on the surface of the resin layer 10 is formed, the material cost is not increased. In addition, unlike the first embodiment, when the unevenness on the surface of the resin layer 10 is formed, it is not necessary to reflect the unevenness of the lower layer of the resin layer 10, so the desired height H of the convex portion 24 and the viscosity of the resin layer 10. There is no need to set a relationship such as the thickness T in advance. Therefore, unevenness on the surface of the resin layer 10 can be easily formed, and the resistance value of the thin film resistor 9 can be easily improved.

Next, a method for manufacturing the semiconductor device 21 in the present embodiment will be described.
As shown in FIG. 3, the electrodes 4, 5, 8, the insulating film 6, the integrated circuit, and the like are formed on the active surface 3 of the substrate 2 through the same process as in the first embodiment.
Next, the resin layer 10 is formed on the active surface 3 of the substrate 2 as in the first embodiment. Next, for example, a resist is applied to the surface of the resin layer 10, an arbitrary pattern is formed by photolithography or the like, and etching is performed, thereby simultaneously patterning the resin layer 10 and simultaneously forming a plurality of vias 13, 14, 15, 22. Form. Next, as in the first embodiment, at least one of the layers constituting the underlayer 11 is formed, and at the same time, the thin film resistor 9 is formed in the thickness T ′ direction along the irregularities formed by the vias 22 by sputtering. It is formed in a wavy shape.

  By manufacturing in this way, unevenness can be formed on the surface of the resin layer 10 by forming the vias 22 simultaneously with the step of forming the vias 13 and 14 in the resin layer 10. Further, since the thin film resistor 9 is formed simultaneously with the formation of the base layer 11 as in the first embodiment, the number of steps can be reduced. Therefore, according to the manufacturing method of this embodiment, the productivity of the semiconductor device 21 is improved as in the first embodiment, the resistance value of the thin film resistor 9 is improved, and the thin film resistor 9 can be highly integrated. Can be manufactured.

<Electronic equipment>
Next, an electronic device including the semiconductor devices 1 and 21 described above will be described.
As shown in FIG. 5, the electronic device (mobile phone 300) is one in which the above-described semiconductor devices 1 and 21 are disposed inside the casing. Since the mobile phone 300 having such a configuration includes the semiconductor devices 1 and 21 including the thin film resistor 9 that has high productivity, can improve the resistance value, and can be highly integrated. Productivity is improved and the size and weight are reduced.

  The technical scope of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. The layer configuration is merely an example, and can be changed as appropriate.

  The electronic device is not limited to the above-described mobile phone, and can be applied to various electronic devices. For example, notebook computers, liquid crystal projectors, multimedia-compatible personal computers (PCs) and engineering workstations (EWS), pagers, word processors, televisions, viewfinder type or monitor direct view type video tape recorders, electronic notebooks, electronic desks The present invention can be applied to electronic devices such as a computer, a car navigation device, a POS terminal, and a device having a touch panel.

  In addition, the constituent material of the electrode pad can be appropriately changed according to the electrical characteristics, physical characteristics, and chemical characteristics required for the electrode pad. For example, a first layer made of Ti (titanium) or the like, a second layer made of TiN (titanium nitride) or the like, a third layer made of AlCu (aluminum / copper) or the like, or a fourth layer (cap layer) made of TiN or the like. A laminated structure in which the layers are sequentially laminated may be used.

  Further, in the above-described embodiment, the unevenness on the surface of the resin layer due to the rearrangement wiring and the unevenness on the surface of the resin layer due to the via are separately formed, but these are formed simultaneously on one semiconductor device and follow the respective unevenness. A thin film resistor may be formed. Thereby, irregularities can be formed on the surface of the resin layer without being constrained by the pattern of the rearranged wiring on the active surface, and the resistance value of the thin film resistor can be improved. Further, by forming unevenness by rearrangement wiring and also forming unevenness by vias, the resistance value of the thin film resistor can be further improved as compared with the case where unevenness is formed individually.

It is sectional drawing of the semiconductor device in 1st embodiment of this invention. It is an enlarged view of the A section of FIG. It is sectional drawing of the semiconductor device in 2nd embodiment of this invention. It is an enlarged view of the B section of FIG. It is a perspective view of one embodiment of the electronic device of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device, 2 Substrate (base | substrate), 7 Rearrangement wiring, 9 Thin film resistance, 10 Resin layer, 11 Underlayer, 16 Concave (unevenness), 17 Convex (uneven), 21 Semiconductor device, 22 Via, 23 Recess ( Concavity and convexity, 24 Convex part (concave and convexity), T thickness, T ′ thickness

Claims (6)

In a semiconductor device in which a thin film resistor is formed on the surface of a resin layer formed on a substrate,
The semiconductor device, wherein the thin film resistor is formed along irregularities in the thickness direction of the surface of the resin layer.   2. The semiconductor device according to claim 1, wherein the unevenness of the surface of the resin layer is formed by a rearrangement wiring formed on the surface of the base and covered with the resin layer.   3. The semiconductor device according to claim 1, wherein the unevenness of the surface of the resin layer is formed by a via provided in the resin layer.   A wiring is formed on the resin layer, a base layer is formed between the resin layer and the wiring, and the thin film resistor is at least part of the base layer formed on the surface of the resin layer. 4. The semiconductor device according to claim 1, wherein the semiconductor device is made of the same material. Forming relocation wiring on the surface of the substrate;
Forming a resin layer on the surface of the base so as to cover the rearrangement wiring and reflect the irregularities formed by the rearrangement wiring on the surface of the base;
Forming a base layer on the surface of the resin layer and simultaneously forming a thin film resistor along the irregularities;
Forming a wiring on the surface of the underlayer;
A method for manufacturing a semiconductor device, comprising: Forming a resin layer on the surface of the substrate, patterning and simultaneously forming a via;
Forming a base layer on the surface of the resin layer and simultaneously forming a thin film resistor along the inner surface of the via;
Forming a wiring on the surface of the underlayer;
A method for manufacturing a semiconductor device, comprising:

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