JP2008152179A - Display device drive circuit, display device, electronic equipment, display device driving method, and computer program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that a cost and power consumption are increased while rise and fall properties can be improved when it is a conventional method arranging drivers on both the sides of a data line. <P>SOLUTION: A display device drive circuit for driving an active matrix drive type display device includes: a function for applying intermediate reference voltage in an amplitude range of signal voltage on a data line from both of a common electrode line connected in one end side of the data line and a data line drive circuit connected to the other end side of the data line for a head period only of each horizontal scanning period off-controlling a switch element controlling writing to a corresponding pixel of the signal voltage; and a function for applying the signal voltage on the data line from only the data line drive circuit in a subsequent period of each horizontal scanning period on-controlling the switch element. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The invention described in this specification relates to a driving technique of an active matrix driving type display device. Note that the present invention has aspects as a display device driving circuit, a display device, an electronic apparatus, a display device driving method, and a computer program.

  The trend toward larger screens and higher definition of flat panel display devices is increasing. Along with this, signal delay with respect to the driving frequency of the panel display element and deterioration of the rising / falling characteristics (frequency characteristics) of the driving signal have become problems.

  FIG. 1 shows an example of drive signals of an active matrix drive type display device. FIG. 1 shows an example of a drive signal when the data line is driven from one side. As shown in FIG. 1, writing of the signal voltage Vin (FIG. 1A) to each pixel is performed by a write signal WS (FIG. 1B to FIG. 1) synchronized with the horizontal synchronization signal HS (FIG. 1E). (D)) are executed in sequence with the rise.

  By the way, in this driving method, the waveform of the signal voltage Vin becomes dull as the writing frequency increases (indicated by a broken line in FIG. 1A). For this reason, it is difficult to accurately write the signal voltage Vin to the capacitor in the display element.

Therefore, a method of driving the drive line from both sides has been proposed for the purpose of improving the rise / fall characteristics with respect to the drive frequency.
FIG. 2 shows a screen configuration example of the display device 1. As shown in FIG. 2, two data line drivers 5 are arranged on both upper and lower sides of the display panel 3.

The selection of the pixel 11 to which the signal voltage Vin is to be written is performed by the scanning line driver 7 that outputs the write signal WS.
JP 2005-345910 A

  However, the method of driving the data lines from the both sides by the two data line drivers 5 has a positive aspect that can improve the rising and falling characteristics, but has a negative aspect that increases the manufacturing cost and power consumption. Moreover, there is a negative aspect that the power consumption tends to increase as the drive frequency increases. Accordingly, there is a need for a proposal of a technology that is excellent in balance between improvement of various characteristics and cost.

  In view of this, the inventor, as a display device driving circuit for driving an active matrix driving type display device, (a) a leading period of each horizontal scanning period in which a switch element that controls writing of a signal voltage to a corresponding pixel is off-controlled. In this case, an intermediate reference voltage within the amplitude range of the signal voltage is applied to the data line from both the common electrode line connected to one end of the data line and the data line driving circuit connected to the other end of the data line. We propose an application function and (b) a function of applying a signal voltage to the data line only from the data line driving circuit in the subsequent period of each horizontal scanning period in which the switch element is turned on.

  In the case of the invention proposed by the inventor, the amplitude range of the signal voltage during a period in which the switch element that controls writing of the signal voltage to each pixel is controlled to be off (a period in which the capacitance component in the pixel is not visible from the data line side). The intermediate reference voltage is applied from both sides of the data line. At this time, the data line driving circuit and the common electrode line are used for applying the intermediate reference voltage.

  Further, after the switch element that controls writing of the signal voltage is turned on, it is only necessary to control the voltage applied to the data line from the intermediate reference voltage to the signal voltage, so that the voltage change during writing can be reduced. Since the voltage change is small, the rising characteristic of the signal voltage with respect to the driving frequency can be improved.

  In addition, since the voltage change when writing the signal voltage is small, the power consumption can be reduced if the drive frequency is the same. Even if the drive frequency is increased, it can be controlled within the power consumption of the existing drive method.

Hereinafter, an example of drive control suitable for an active matrix drive type organic EL display device will be described.
In addition, the well-known or well-known technique of the said technical field is applied to the part which is not illustrated or described in particular in this specification.
Moreover, the form example demonstrated below is one form example of invention, Comprising: It is not limited to these.

(A) Form example 1
(A-1) Overall Configuration of Organic EL Display Device FIG. 3 shows the main components of the organic EL display device 21. The organic EL display device 21 includes an organic EL panel 23, a common electrode unit 25, a data line driver 27, a scanning line driver 29, and a timing generator 31 as main components.

(A-2) Configuration of Each Part The organic EL panel 23 is a self-luminous display panel in which the pixels 33 are arranged in a matrix according to the panel resolution. In the case of this embodiment, the organic EL panel 23 is for color display, and the pixels 33 are arranged for each emission color. However, when the pixel 33 is an organic EL element having a structure in which a plurality of light emitting layers are stacked, one pixel 33 corresponds to a plurality of light emitting colors.

FIG. 4 shows a connection relationship between the pixel 33 formed at the intersection of the data line DL and the scanning line WL and the driving circuit.
The pixel 33 includes a switch element T1, a capacitor C, a current drive element T2, and an organic EL element D.

  The switch element T1 is a transistor that controls writing of the signal voltage applied to the data line DL to the capacitor C. The write signal WS is supplied from the scanning line driver 29 to each switch element T1 through the scanning line WL.

  The capacitor C is a storage element that holds the written signal voltage Vin for one frame. By using the capacitor C, even when the signal voltage Vin is written line-sequentially, the same light emission mode as that in the case of writing by the frame sequential scanning method is realized.

  The current drive element T2 is a transistor that supplies a drive current corresponding to the signal voltage Vin held in the capacitor C to the organic EL element D. The drive current value here is determined by the voltage Vgs applied between the gate and source of the current drive element T2.

  The common electrode unit 25 includes a common electrode line CL connected to the data line at one end, and a switch element 251 that controls application of the intermediate voltage Vcom (= Vmax / 2) to the data line DL. The common electrode line CL is supplied with an intermediate voltage Vcom (= Vmax / 2) having a signal amplitude from a voltage source (not shown).

  The switch element 251 is on / off controlled by a selection signal SEL provided from the timing generator 31. The switch element 251 is turned on only during the off period of the switch element T1 (corresponding to the “first period” in the claims), and applies the intermediate voltage Vcom applied to the common electrode line CL to the data line DL. .

  On the other hand, the switch element 251 is turned off during the off period of the switch element T1 (corresponding to the “subsequent period” in the claims) to separate the data line DL from the common signal line CL. Therefore, after the switch element 251 is turned off, the potential of the data line DL is varied by the applied potential (signal voltage Vin) of the data line driver 27.

  The data line driver 27 is a circuit device that drives the data line DL of the organic EL panel 23. FIG. 5 shows an internal configuration example of the data line driver 27. The data line driver 27 has a configuration in which a selection switch unit 279 is added to the output stage of a general circuit portion (shift register unit 271, latch unit 273, D / A conversion unit 275, and latch unit 277).

  The shift register unit 271 sequentially shifts sequentially input gradation values (signal values) in the horizontal direction, and outputs them to the latch unit 273 in units of one scanning line. The latch unit 273 outputs the gradation value (signal value) read out in units of pixels to the D / A conversion unit 275. The signal voltage Vin after D / A conversion is output to the latch unit 277 for each corresponding data line DL.

  The latch unit 277 outputs each signal voltage Vin to a corresponding input terminal of the selection switch unit 279. In the selection switch unit 279, switch elements corresponding to the number of horizontal resolutions corresponding to each data line DL are arranged, and one input terminal of each switch element has the same intermediate voltage Vcom (= Vmax) as the common electrode line CL. / 2) is applied.

  The on / off control of each switch element constituting the selection switch unit 279 is executed according to the signal level of the selection signal SEL (the same as that supplied to the common electrode unit 25). In this embodiment, the selection switch unit 279 connects the input side and the output side of the intermediate voltage Vcom when the selection signal SEL is at the H level, and connects the input side of the signal voltage Vin when the selection signal SEL is at the L level. Connect the output side.

  Therefore, the application time of the intermediate voltage Vcom can be freely varied by adjusting the amplitude width of the selection signal SEL. Note that the adjustment of the signal width of the selection signal SEL can be easily realized by using a pulse width modulator.

  The scanning line driver 29 is a circuit device that provides a write timing of the signal voltage Vin. The scanning line driver 29 controls one scanning line to be selectively writable every time the horizontal synchronization signal HS is input.

  This control signal is the write signal WS. However, the scanning line driver 29 used in this embodiment applies the ON potential to the switch element T1 for a period Tb shorter than the horizontal scanning period T0 (corresponding to the “subsequent period” in the claims).

  The shortening of the ON period is to ensure a period during which the capacitance component (capacitor C and parasitic capacitance) in the pixel is not visible from the data line side when the intermediate voltage Vcom (= Vmax / 2) is written to the data line DL. Note that the off period is arranged at the head position of the horizontal scanning period.

  If the data line DL is driven during this off period, the capacitance component in the pixel cannot be seen, so that the rise / fall characteristics with respect to the drive frequency are improved. As a result, the time until the potential of the data line DL rises to the intermediate voltage Vcom can be shortened.

The power consumption W is C · V ² · f
Since it is calculated by (C: capacitance, V: voltage, f: frequency), the power consumption during the period in which the intermediate voltage Vcom is applied to the data line DL can be relatively small. The capacity C in this period is only the wiring capacity of the data line DL, and the drive voltage V may be the intermediate voltage Vcom, and the capacity C and the drive voltage V can be reduced as compared with the case where the switch element T1 is driven during the ON period. It is.

FIG. 6 shows an internal configuration example of the scanning line driver 29, and FIG. 7 shows an internal signal example.
The scanning line driver 29 includes a shift register 291, a latch 293, a logical product circuit 295, and a buffer circuit 297.
The shift register 291 is composed of register stages having stages equal to the number of vertical resolutions.

A write signal WS (FIG. 7A) is input to the register stage at the head position at the head of each frame. The signal width T0 of the write signal WS is the same as the horizontal scanning period.
The write signal WS is sequentially output to the next stage with a clock (FIG. 7B) synchronized with the horizontal synchronization signal HS (FIG. 7F), and is output to the latch 293 as the write signal WS corresponding to each scanning line DL. Is done. The latch 293 performs timing adjustment of the write signal WS.

The AND circuit 295 includes a write signal WS and a write enable signal WSenable.
The logical product of (FIG. 7C) is calculated. In the case of this embodiment, the write enable signal WSenable is given as an inverted signal of the selection signal SEL. However, as in the case of the selection signal SEL, it may be generated using a pulse width modulator.

  The rising start time of the write enable signal WSenable is set in consideration of the rising time of the intermediate voltage Vcom. It should be noted that the amplitude width Ta corresponding to the off period of the switch element T1 (that is, the period from the start position of the horizontal scanning period to the rising start time of the write enable signal WSenable) and the amplitude width Tb corresponding to the on period of the switch element T1 Is determined so as to satisfy, for example, Ta: Tb = K · CLi: Ctotal.

  CLi in the previous equation is the capacity of the data line portion when driving the i-th scanning line WL. Generally, as the distance from the data line driver 27 increases, the wiring capacitance CLi increases. Ctotal is the total capacity in each pixel.

  Here, the total capacitance Ctotal includes, in addition to the capacitor C, a capacitance parasitic to a wiring, a transistor, or the like in the pixel. If the manufacturing error is ignored, the total capacity Ctotal in the pixel is basically the same. The coefficient K is set so that a minimum time required for writing the signal voltage Vin can be secured.

  FIG. 7D shows the write signal WS (I) used in the I-th scanning line DL, and FIG. 7E shows the write signal WS (I + 1) used in the I + 1-th scanning line DL.

  The timing generator 31 is a processing device that generates various timing signals based on the data signal Din. In addition to the clock signal, a selection signal SEL, a write enable signal WSenable, and the like are also generated.

(A-3) Drive Operation FIG. 8 shows a signal waveform example for explaining the drive operation of the organic EL display device 21.
FIG. 8A shows an example of a driving waveform of the data line DL by the data line driver 27. 8B and 8C show the write signal WS supplied by the scanning line driver 29. FIG. 8B shows a write signal WS applied to the I-th scanning line WL, and FIG. 8C shows a write signal WS applied to the (I + 1) -th scanning line WL. is there.

  FIG. 8D shows a signal waveform of the selection signal SEL. Incidentally, the amplitude width when the selection signal SEL is at the H level is Ta, and the amplitude width when the selection signal SEL is at the L level is Tb. FIG. 8E shows a waveform of the intermediate voltage Vcom. FIG. 8F shows the horizontal synchronization signal HS.

  As shown in FIG. 8, simultaneously with the start of the horizontal scanning period, the selection signal SEL is controlled to the H level. At the same time, the common electrode unit 25 and the data line driver 27 apply the intermediate voltage Vcom from both sides of the data line DL. Further, the scanning line driver 29 applies an L level write signal WS to the scanning lines WL during the synchronization.

  At this time, the capacitance viewed from the data line driver 27 appears to be much smaller than when the switch element T1 is on-controlled. Even when the driving conditions are the strictest (when writing the white level from the black level state), the reaching target voltage during the period when the selection signal SEL is at the H level is the intermediate voltage Vcom, so that the rising characteristics are improved. Also, the power consumption W can be reduced.

  In this embodiment, the intermediate voltage Vcom is applied from both sides of the data line DL. Therefore, the data line DL can be controlled under the same conditions regardless of the distance of the data line driver 27.

  Further, in the case of this organic EL display device 21, the power consumed by the common electrode unit 25 is small compared to the data line driver 27. Therefore, even when the power consumption W of the common electrode unit 25 is taken into consideration, the power consumption W during the period in which the selection signal SEL is at the H level is smaller than that in the existing driving method.

When this setting period expires, the selection signal SEL is switched from the H level to the L level, and the write signal WS is switched from the L level to the H level.
After this timing, the switch element T1 is controlled to be in an ON state, and writing of the signal voltage Vin to the capacitor C in the pixel is started through the switch element T1.

  However, the write potential here is the difference between the signal voltage Vin and the intermediate voltage Vcom. Therefore, the data line DL can be controlled to a target voltage within a very short time when the differential voltage is small, and within a relatively short time even when the signal voltage Vin is at the black level or the white level. FIG. 8A shows this operation as a two-stage transition waveform.

  When the switch element T1 is turned on, the capacitance component in the pixel is added to the drive capacitance of the data line driver 27. However, in this embodiment, the drive voltage is the maximum because the drive is performed from the intermediate voltage Vcom. But it is half of the existing drive system. That is, the power consumption W can be reduced to a quarter of the existing driving method. Further, the time required for transition to the final signal voltage Vin is shortened.

(A-4) Effect of Embodiment As a result, the total time until the signal voltage Vin rises is significantly shortened as compared with the case of driving only with the existing driving method. Therefore, even when the resolution and driving frequency of the organic EL panel 23 are high, it is possible to ensure a sufficient writing time without increasing the number of special wiring patterns and driving circuits.

An improvement in image quality can also be expected by ensuring the writing time.
In addition, the total power consumption including the transition time to the intermediate voltage Vcom is smaller than that of the existing driving method.

  Note that it is conceivable to drive the potential of the data line DL to the final signal voltage Vin by using the period during which the switch element T1 is off. However, when such a driving method is selected, the frequency characteristics are improved. It will lead to deterioration and increased power consumption. Therefore, as described above, a method of applying the signal voltage Vin after applying the intermediate voltage Vcom to the data line DL is adopted.

  In the case of this embodiment, since the maximum drive amplitude of the data line driver 27 may be half of the maximum signal amplitude, it is possible to select a device that gives priority to the slew rate over the accuracy for the D / A converter 275. it can. For this reason, it is also effective in terms of manufacturing cost.

  Further, in the case of this embodiment, even when the total capacity Ctotal in the pixel cannot be ignored with respect to the capacity and resistance of the data line DL, the driving frequency can be simply and at low cost without increasing the write voltage (overdrive). It is possible to follow the increase in speed.

(B) Other Mounting Examples (B-1) Other Pixel Structures In the above-described embodiments, the case where the switch element T1 is configured by an N-channel FET and the current drive element T2 is configured by a P-channel FET has been described.
However, this combination is not necessarily required depending on the manufacturing process.

  For example, both the switch element T1 and the current drive element T2 may be constituted by N-channel FETs. FIG. 9 shows an equivalent circuit of a pixel corresponding to this case. In this case, one electrode of the capacitor C is connected to the gate terminal of the current driver element T2, and the other electrode is connected to the drain terminal.

  Further, for example, the switch element T1 may be configured with a P-channel FET, and the current drive element T2 may be configured with an N-channel FET. Further, for example, both the switch element T1 and the current drive element T2 may be constituted by P-channel FETs.

(B-2) Other Setting Examples of Intermediate Reference Voltage In the above-described embodiment, the case where the intermediate reference voltage within the amplitude range of the signal voltage is set to the intermediate voltage has been described. However, the intermediate reference voltage may be another fixed voltage value as long as the voltage value is within the amplitude range.

  The intermediate reference voltage may be variably controlled according to the input signal. If an optimum potential is set according to the input signal, the time required for transition from the intermediate reference voltage Vcom to the signal voltage Vin can be minimized. Hereinafter, an example of a circuit that generates this type of reference voltage will be described.

FIG. 10 shows the first reference voltage generator 41. The reference voltage generator 41 is a circuit example in the case of generating an intermediate reference voltage Vcom according to the frame average gradation value.
The reference voltage generation unit 41 includes an APL calculation unit 43 and a common electrode voltage generation unit 45.

  The APL calculation unit 43 is a processing device that calculates a frame average gradation value (APL) of the data signal Din. Further, the common electrode voltage generator 45 reads out the voltage value corresponding to the frame average gradation value from the correspondence table shown in FIG. 11, and also supplies the voltage (reference voltage Vcom) corresponding to the read voltage value to a voltage source (not shown). Is a processing device generated using

FIG. 12 shows a second reference voltage generator 51. The reference voltage generator 51 is a circuit example in the case of generating an intermediate reference voltage Vcom based on the maximum frequency division in the frame.
The reference voltage generation unit 51 includes a maximum frequency division detection unit 53 and a common electrode voltage generation unit 55.

  As shown in FIG. 13, the maximum frequency category detection unit 53 is a processing device that detects a frequency distribution of tone values that appear in a frame and obtains a tone category having the highest frequency value. FIG. 13 shows a frequency distribution for 10 gradation sections obtained by dividing the maximum gradation value by 10%. Of course, the number of gradations belonging to one section may be smaller.

  In addition, the common electrode voltage generation unit 55 reads out the voltage value corresponding to the detected maximum frequency classification from the correspondence table shown in FIG. 14, and determines the voltage (intermediate reference voltage Vcom) corresponding to the read voltage value. A processing device generated using the illustrated voltage source.

(B-3) Product example (a) Drive IC
The organic EL panel 23, the data line driver 25, and the scanning line driver 27 constituting the organic EL display device 21 can all be formed on one panel, but the driver and the pixel matrix are separately manufactured and distributed. You can also

  For example, the data line driver 25 and the scanning line driver 27 can be manufactured as independent drive ICs (integrated circuits) and can be distributed independently of the organic EL panel 23.

(B) Display module The organic EL display device 21 in the embodiment described above can also be distributed in the form of a display module which is an intermediate product.

  FIG. 15 shows an appearance example of the display module 61. The display module 61 has a structure in which a facing portion 63 is bonded to the surface of the support substrate 65. The facing portion 63 is made of glass or other transparent member as a base material, and a color filter, a protective film, a light shielding film, and the like are arranged on the surface thereof.

  The display module 61 may be provided with an FPC (flexible printed circuit) 67 and the like for inputting and outputting signals and the like to the support substrate 65 from the outside.

(C) Electronic device The organic EL display device 21 in the embodiment described above is also distributed in a product form mounted on an electronic device.
FIG. 16 shows a conceptual configuration example of the electronic device 71. The electronic device 71 includes the organic EL display device 21 and the system control unit 73 described above. The processing content executed by the system control unit 73 differs depending on the product form of the electronic device 71.

Note that the electronic device 71 is not limited to a device in a specific field as long as it has a function of displaying an image or video generated in the device or input from the outside.
As this type of electronic device 71, for example, a television receiver is assumed. FIG. 17 shows an example of the appearance of the television receiver 81.

  A display screen 87 including a front panel 83, a filter glass 85, and the like is disposed on the front of the housing of the television receiver 81. The portion of the display screen 87 corresponds to the organic EL display device 21 described in the embodiment.

  Further, for example, a digital camera is assumed as this type of electronic device 71. FIG. 18 shows an appearance example of the digital camera 91. FIG. 18A shows an example of the appearance on the front side (subject side), and FIG. 18B shows an example of the appearance on the back side (photographer side).

  The digital camera 91 includes an imaging lens (FIG. 18 shows the state in which the protective cover 93 is closed, and is therefore disposed on the back side of the protective cover 93), a flash light emitting unit 95, a display screen 97, a control switch 99, and a shutter. It consists of buttons 101. Among these, the portion of the display screen 97 corresponds to the organic EL display device 21 described in the embodiment.

For example, a video camera is assumed as this type of electronic device 71. FIG. 19 shows an appearance example of the video camera 111.
The video camera 111 includes an imaging lens 115 that images a subject in front of the main body 113, a shooting start / stop switch 117, and a display screen 119. Among these, the display screen 119 corresponds to the organic EL display device 21 described in the embodiment.

  In addition, as this type of electronic device 71, for example, a portable terminal device is assumed. FIG. 20 shows an appearance example of a mobile phone 121 as a mobile terminal device. A cellular phone 121 illustrated in FIG. 20 is a foldable type, and FIG. 20A illustrates an appearance example in a state where the housing is opened, and FIG. 20B illustrates an appearance example in a state where the housing is folded.

  The mobile phone 121 includes an upper housing 123, a lower housing 125, a connecting portion (in this example, a hinge portion) 127, a display screen 129, an auxiliary display screen 131, a picture light 133, and an imaging lens 135. Among these, the display screen 129 and the auxiliary display screen 131 correspond to the organic EL display device 21 described in the embodiment.

Further, for example, a computer is assumed as this type of electronic device 71. FIG. 21 shows an example of the appearance of the notebook computer 141.
The notebook computer 141 includes a lower casing 143, an upper casing 145, a keyboard 147, and a display screen 149. Among these, the display screen 149 corresponds to the organic EL display device 21 described in the embodiment.

  In addition to these, the electronic device 71 may be an audio playback device, a game machine, an electronic book, an electronic dictionary, or the like.

(B-4) Other Display Device Examples In the description of the embodiments, the case where the display device is the organic EL display device 21 has been described.
However, the data line driver 27 and the scanning line driver 29 can also be applied to other self-luminous display devices. For example, the present invention can be applied to an inorganic EL display device, a display device in which LEDs are arranged, an FED display device, a PDP display device, and the like.

The data line driver 27 and the scanning line driver 29 can also be applied to non-self light emitting display devices such as liquid crystal display devices.
FIG. 22 shows a connection relationship between the pixel 151 formed at the intersection of the data line DL and the scanning line WL and the driver circuit.

  As shown in FIG. 22, the equivalent circuit of the pixel 151 can be expressed as a switch element T1 and a capacitor C1. The capacitor C1 corresponds to the liquid crystal sandwiched between the pixel electrode and the counter electrode. Even when the driving method proposed by the inventor is applied to a liquid crystal display device, a long writing time can be secured stably. Therefore, the image quality can be improved without increasing the cost.

(B-5) Control Device Configuration In the above description, the case where the drive timing of the data line driver 27 and the drive timing of the scanning line driver 29 are controlled by hardware has been described.
However, these control timings may be controlled through software processing.

(B-6) Others Various modifications can be considered for the above-described embodiments within the scope of the invention. Various modifications and applications created or combined based on the description of the present specification are also conceivable.

It is a figure which shows the example of a conventional drive. It is a figure which shows the prior art example of a display device. It is a figure which shows the structural example of a display device. It is a figure which shows the structural example of a pixel. It is a figure which shows the structural example of a data line driver. It is a figure which shows the structural example of a scanning line driver. It is a figure which shows the example of a drive of a scanning line driver. It is a figure which shows the example of a drive of a display device. It is a figure which shows the other structural example of a pixel. It is a figure which shows the example of a form of a reference voltage generation part. It is a figure which shows the example of a table for reference voltage generation. It is a figure which shows the other example of a reference voltage generation part. It is a figure which shows frequency distribution. It is a figure which shows the example of a table for reference voltage generation. It is a figure which shows the structural example of a display module. It is a figure which shows the function structural example of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the example of goods of an electronic device. It is a figure which shows the pixel structure of a liquid crystal display device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 21 Organic EL display apparatus 23 Organic EL panel 25 Common electrode part 27 Data line driver 29 Scan line driver 31 Timing generator 41 Reference voltage generation part 51 Reference voltage generation part 71 Electronic device

Claims (10)

In a display device drive circuit for driving an active matrix drive type display device,
Connected to the common electrode line connected to one end side of the data line and the other end side of the data line only during the first period of each horizontal scanning period in which the switch element that controls the writing of the signal voltage to the corresponding pixel is turned off. An intermediate reference voltage within the amplitude range of the signal voltage is applied to the data line from both of the data line driving circuits
A display device driving circuit, wherein a signal voltage is applied to a data line only from the data line driving circuit in a subsequent period of each horizontal scanning period in which the switch element is controlled to be on. The display device driving circuit according to claim 1,
The display device driving circuit, wherein the intermediate reference voltage is a voltage value corresponding to an intermediate value of an amplitude range of a signal voltage. The display device driving circuit according to claim 1,
The display device driving circuit, wherein the intermediate reference voltage is a voltage value set based on an average gradation value per frame. The display device driving circuit according to claim 1,
The display device driving circuit according to claim 1, wherein the intermediate reference voltage is a voltage value corresponding to a frequency or a frequency section having the highest frequency distribution among the frequency distributions according to gradation values. A display region having an active matrix drive type pixel structure;
A common electrode line connected to one end of the data line;
The first switch for controlling the connection between the data line and the common electrode line, and the first switch period for each horizontal scanning period in which the second switch element for controlling the writing of the signal voltage to the corresponding pixel is turned off. Only, a first switch element that applies an intermediate reference voltage in the signal voltage amplitude range to the data line;
A data line driving circuit connected to the other end of the data line, wherein the horizontal reference voltage is applied to the data line during the head period, and the second switch element is turned on. An active matrix driving type display device comprising: a data line driving circuit for applying a signal voltage from the data line driving circuit to the data line in a subsequent period of the scanning period. The display device according to claim 5, wherein
A display device, wherein each pixel is composed of an electroluminescence element. The display device according to claim 5, wherein
A display device in which each pixel is composed of a liquid crystal. A display region having an active matrix drive type pixel structure;
A common electrode line connected to one end of the data line;
The first switch for controlling the connection between the data line and the common electrode line, and the first switch period for each horizontal scanning period in which the second switch element for controlling the writing of the signal voltage to the corresponding pixel is turned off. Only, a first switch element that applies an intermediate reference voltage in the signal voltage amplitude range to the data line;
A data line driving circuit connected to the other end of the data line, wherein the horizontal reference voltage is applied to the data line during the head period, and the second switch element is turned on. In a subsequent period of the scanning period, a data line driving circuit that applies a signal voltage from the data line driving circuit to the data line;
An electronic device comprising: a signal processing unit. In a display device driving method for driving an active matrix drive type display device,
Connected to the common electrode line connected to one end side of the data line and the other end side of the data line only during the first period of each horizontal scanning period in which the switch element that controls the writing of the signal voltage to the corresponding pixel is turned off. A process of applying an intermediate reference voltage within the amplitude range of the signal voltage to the data line from both of the data line driving circuits.
A display device driving method comprising: applying a signal voltage to a data line only from the data line driving circuit in a period subsequent to each horizontal scanning period in which the switch element is turned on. In a computer that controls the drive timing of an active matrix drive type display device,
Connected to the common electrode line connected to one end side of the data line and the other end side of the data line only during the first period of each horizontal scanning period in which the switch element that controls the writing of the signal voltage to the corresponding pixel is turned off. A process of applying an intermediate reference voltage within the amplitude range of the signal voltage to the data line from both of the data line driving circuits.
And a process of applying a signal voltage to a data line only from the data line driving circuit in a subsequent period of each horizontal scanning period in which the switch element is turned on.

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