JP2008147325A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology capable of obtaining a semiconductor device of high performance, using a simple manufacturing method. <P>SOLUTION: A silicon nitride film 30 and a silicon oxide film 31 are formed sequentially on a semiconductor substrate 1 so as to cover the gate structure 13 of an NMOS transistor 10 and the gate structure 23 of a PMOS transistor 20. On the silicon nitride film 30 and the silicon oxide film 31 in a PMOS region, a silicon nitride film 32 is formed as a protective film which will not allow ultraviolet rays to penetrate. From this the structure obtained, ultraviolet rays 100 are irradiated to the structure. Thus, the silicon nitride film 30 in the NMOS region is irradiated with ultraviolet rays, and the tensile stress of the silicon nitride film 30 is increased. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device including an NMOS transistor and a PMOS transistor.

  In recent semiconductor device manufacturing methods, it has become difficult to achieve high performance by scaling due to the influence of short channel characteristics and an increase in tunnel leakage. Therefore, as one of methods for compensating for this, a technique for improving the performance of the MOS transistor by generating local distortion in the channel region of the MOS transistor has been proposed. Several methods have been proposed to generate local strain, but as one of the representative methods, as described in Non-Patent Documents 1 and 2, it has tensile stress and compressive stress. There is a method using a silicon nitride film. In this method, the carrier mobility of both transistors can be improved by using a silicon nitride film having tensile stress for the NMOS transistor and using a silicon nitride film having compressive stress for the PMOS transistor. The current driving capability of each transistor is improved. In addition, as for the application concerning the technology relating to the MOS transistor, there is an application of “Japanese Patent Application No. 2006-230293”.

S. Pidin et al., “A Novel Strain Enhanced CMOS Architecure Using Selectively Deposited High Tensile And High Compressive Silicon Nitride Films”, IEDM 2004 H.S.Yang et al., “Dual Stress Liner for High Performance sub-45nm Gate Length SOI CMOS Manufacturing”, IEDM2004

  As described above, the direction of the stress required for the silicon nitride film differs between the NMOS transistor and the PMOS transistor to improve the carrier mobility, and the carrier mobility decreases when the opposite stress occurs. Resulting in. For example, when a silicon nitride film having tensile stress is formed on the entire surface of the wafer, the performance of the NMOS transistor is improved, but the performance of the PMOS transistor is deteriorated. In particular, in a PMOS transistor having a channel region whose crystal direction is the <110> direction, the channel mobility is significantly reduced.

  As a means for solving this problem, a technique called “DSL (Dual Stress Liner)” using a silicon nitride film having different stresses between an NMOS transistor and a PMOS transistor has been proposed. Difficulty is a problem. Specifically, in the case of removing the silicon nitride film in the region where the NMOS transistor is formed or the region where the PMOS transistor is formed after forming the silicon nitride film having one of the tensile stress and the compressive stress, There is a problem in that it is difficult to secure a sufficient process margin because a sufficient selection ratio between the silicon nitride film and a base structure such as a semiconductor substrate cannot be ensured.

  Therefore, the present invention has been made in view of the above-described problems, and an object thereof is to provide a technique capable of obtaining a high-performance semiconductor device by a simple manufacturing method.

  In the method of manufacturing a semiconductor device according to one embodiment of the present invention, the first silicon nitride film is formed on the semiconductor substrate so as to cover the gate structures of the NMOS transistor and the PMOS transistor. Next, a silicon oxide film and a second silicon nitride film as a protective film that does not transmit ultraviolet light are sequentially formed on the first silicon nitride film. Then, the second silicon nitride film in the NMOS region is removed. Thereafter, the structure is irradiated with ultraviolet rays from above the obtained structure. As a result, the first silicon nitride film in the NMOS region is irradiated with ultraviolet rays, and the tensile stress of the first silicon nitride film increases.

  According to one embodiment of the present invention, since the protective film that does not transmit ultraviolet rays is formed in the PMOS region, the first silicon nitride film in the PMOS region is not irradiated with ultraviolet rays. Therefore, only the tensile stress of the first silicon nitride film in the NMOS region can be increased. Therefore, the performance of the NMOS transistor can be easily improved while maintaining the performance of the PMOS transistor to some extent. As a result, a high-performance semiconductor device can be obtained with a simple manufacturing method.

Embodiment 1 FIG.
1 to 11 are cross-sectional views showing the method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps. The semiconductor device according to the first embodiment includes an NMOS region in which an NMOS transistor is formed and a PMOS region in which a PMOS transistor is formed. As shown in FIG. 1, first, for example, a p-type semiconductor substrate 1 is prepared. Then, an element isolation insulating film 2 that partitions an active region in the semiconductor substrate 1 in the NMOS region and the PMOS region is formed on the semiconductor substrate 1. The element isolation insulating film 2 is made of, for example, a silicon oxide film.

  Next, a p-type well region 3 is formed in the active region of the semiconductor substrate 1 in the NMOS region, and an n-type well region 4 is formed in the active region of the semiconductor substrate 1 in the PMOS region. Then, an NMOS transistor 10 is formed in the well region 3, and a PMOS transistor 20 is formed in the well region 4.

  The NMOS transistor 10 includes two n-type source / drain regions 11 and a gate structure 13. The two source / drain regions 11 are formed in the upper surface of the well region 3 at a predetermined distance from each other. A silicide 12 is formed at the upper end of each source / drain region 11.

  The gate structure 13 is formed on the upper surface of the well region 3 sandwiched between the two source / drain regions 11 while covering the ends of the two source / drain regions 11. The gate structure 13 includes a gate insulating film 14 formed on the upper surface of the well region 3 sandwiched between two source / drain regions 11, a gate electrode 15 formed on the gate insulating film 14, and a gate insulating film 14. And a sidewall 17 formed on the side surface of the gate electrode 15. A silicide 16 is formed on the upper end of the gate electrode 15.

  On the other hand, the PMOS transistor 20 includes two p-type source / drain regions 21 and a gate structure 23. The two source / drain regions 21 are formed in the upper surface of the well region 4 at a predetermined distance from each other. A silicide 22 is formed at the upper end of each source / drain region 21.

  The gate structure 23 is formed on the upper surface of the well region 4 sandwiched between the two source / drain regions 21 while covering the ends of the two source / drain regions 21. The gate structure 23 includes a gate insulating film 24 formed on the upper surface of the well region 4 sandwiched between the two source / drain regions 21, a gate electrode 25 formed on the gate insulating film 24, and a gate insulating film 24. And a sidewall 27 formed on the side surface of the gate electrode 25. A silicide 26 is formed on the upper end portion of the gate electrode 25.

  The semiconductor substrate 1 is, for example, a silicon substrate, and the silicides 12, 16, 22, and 26 are, for example, nickel silicide and cobalt silicide. The gate insulating films 14 and 24 are, for example, silicon oxide films, and the sidewalls 17 and 27 are, for example, silicon nitride films. The portion of the gate electrode 15 excluding the silicide 16 and the portion of the gate electrode 25 excluding the silicide 26 are each formed of polysilicon, for example.

  Next, as shown in FIG. 2, a silicon nitride film 30 is formed on the semiconductor substrate 1 so as to cover the gate structure 13 of the NMOS transistor 10 and the gate structure 23 of the PMOS transistor 20. The silicon nitride film 30 is a film whose tensile stress increases when irradiated with ultraviolet rays in a later step, and can be formed using, for example, a plasma CVD method.

In the silicon nitride film 30, the tensile stress is 0.5 GPa or less, and the bond hydrogen concentration, that is, the concentration of hydrogen bonded to silicon or nitrogen is set to at least 2.0 × 10 ²² atoms / cc. Is preferred. The bound hydrogen concentration in the film can be quantitatively measured using, for example, FT-IR analysis (Fourier Transform Infrared Spectrosopy). Such a silicon nitride film 30 is formed using, for example, a plasma CVD method using a silane compound and nitrogen (N ₂ ) or a nitrogen compound as raw materials and a processing temperature of 200 ° C. or more and 300 ° C. or less. Can do. For example, SiH ₄ is used as the silane compound, and N ₂ 0 or NH ₃ is used as the nitrogen compound. By irradiating the silicon nitride film 30 having a tensile stress of 0.5 GPa or less and a bond hydrogen concentration of at least 2.0 × 10 ²² atoms / cc with ultraviolet rays, the tensile strength of the silicon nitride film 30 is increased. The stress is improved to 1.7 GPa or more. The following can be considered as this reason.

  When the silicon nitride film 30 is irradiated with ultraviolet rays, the energy is absorbed by the silicon nitride film 30 and the silicon nitride film 30 promotes a crosslinking reaction (cross-linking). Therefore, in the silicon nitride film 30, various bonds (bond between silicon and nitrogen, bond between silicon and hydrogen, bond between nitrogen and hydrogen) are once broken, and various new bonds are generated, resulting in rearrangement of the amorphous structure. As a result, it is considered that the composition ratio of the silicon nitride film 30 locally approaches the stoichiometric composition ratio and the tensile stress of the silicon nitride film 30 is improved to 1.7 GPa or more. Further, the size of defects such as macrovoids in the film is reduced, rearrangement of the amorphous structure occurs, and the film composition ratio locally approaches the stoichiometric composition ratio, so that the mechanical strength of the silicon nitride film 30 is increased. It seems to improve. In order to dramatically improve the tensile stress of the silicon nitride film 30, the tensile stress of the silicon nitride film 30 and the value of the bond hydrogen concentration in the initial state are important, and the tensile stress of the silicon nitride film 30 in the initial state is important. If it is high or the bond hydrogen concentration is low, the tensile stress of the silicon nitride film 30 will not be improved to 1.7 GPa or more even when irradiated with ultraviolet rays.

  Next, as shown in FIG. 3, a silicon oxide film 31 such as NSG is formed on the silicon nitride film 30. Then, a protective film that does not transmit ultraviolet rays is formed on the silicon oxide film 31. In the first embodiment, a silicon nitride film 32 that does not transmit ultraviolet rays is used as the protective film. That is, the silicon oxide film 31 and the silicon nitride film 32 are sequentially formed on the silicon nitride film 30. Such a silicon nitride film 32 can be formed using, for example, a plasma CVD method.

  Next, as shown in FIG. 4, a photoresist 33 is formed on the entire surface of the silicon nitride film 32. Then, as shown in FIG. 5, the photoresist 33 in the NMOS region is removed using photolithography. As a result, the silicon nitride film 32 in the NMOS region is exposed.

  Next, as shown in FIG. 6, the exposed silicon nitride film 32 in the NMOS region is removed by etching using the photoresist 33 as a mask. In the first embodiment, the silicon nitride film 32 is not directly formed on the silicon nitride film 30, but the silicon nitride film 30 is interposed via the silicon oxide film 31 having a sufficiently high selectivity with the silicon nitride film 32. Since the silicon nitride film 32 is formed thereon, etching with respect to the silicon nitride film 32 can be stopped at the silicon oxide film 31. Therefore, the silicon nitride film 30 can be prevented from being etched when the silicon nitride film 32 is etched. Thereafter, as shown in FIG. 7, the remaining portion of the photoresist 33 is removed.

  Next, as shown in FIG. 8, the structure 100 is irradiated with ultraviolet rays 100 from above. Since the silicon nitride film 32 that does not transmit ultraviolet light is provided in the PMOS region, the silicon nitride film 30 in the PMOS region is not irradiated with ultraviolet light. On the other hand, although the silicon oxide film 31 is provided in the NMOS region, the silicon oxide film 31 transmits ultraviolet rays, so that the silicon nitride film 30 in the NMOS region is irradiated with ultraviolet rays. Thereafter, as shown in FIG. 9, the silicon nitride film 32 and the silicon oxide film 31 in the PMOS region are sequentially removed by etching.

  Thus, by forming a protective film against ultraviolet rays in the PMOS region, only the silicon nitride film 32 in the NMOS region can be irradiated with ultraviolet rays. As a result, the tensile stress of the silicon nitride film 32 in the NMOS region can be increased without increasing the tensile stress of the silicon nitride film 32 in the PMOS region.

  Next, as shown in FIG. 10, an interlayer insulating film 34 made of, for example, a silicon oxide film is formed on the entire surface of the silicon nitride film 30. Then, a photoresist (not shown) having a predetermined opening pattern is formed on the interlayer insulating film 34, and the interlayer insulating film 34 is etched from the upper surface using the photoresist as a mask. At this time, since the silicon nitride film 30 functions as a stopper film for stopping etching, the silicon nitride film 30 is partially exposed. Thereafter, the exposed silicon nitride film 30 is removed by etching. Thus, as shown in FIG. 11, in the NMOS region, contact holes 35 reaching the silicide 12 of each source / drain region 11 from the upper surface of the interlayer insulating film 34 are formed in the interlayer insulating film 34, and in the PMOS region A contact hole 36 reaching the silicide 22 of each source / drain region 21 from the upper surface of the interlayer insulating film 34 is formed in the interlayer insulating film 34.

  Thereafter, contact plugs 37 and 38 filling the contact holes 35 and 36 are formed, and wirings 39 and 40 are formed on the interlayer insulating film 34 in contact with the contact plugs 37 and 38, respectively.

  As described above, in the method of manufacturing the semiconductor device according to the first embodiment, the protective region (silicon nitride film 32 in the first embodiment) that does not transmit ultraviolet light is formed in the PMOS region. The silicon nitride film 30 is not irradiated with ultraviolet rays. Therefore, only the tensile stress of the silicon nitride film 30 in the NMOS region can be increased. Therefore, the performance of the NMOS transistor 10 can be easily improved while maintaining the performance of the PMOS transistor 20 to some extent. As a result, a high-performance semiconductor device can be obtained with a simple manufacturing method.

Embodiment 2. FIG.
12 to 14 are cross-sectional views showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps. In the first embodiment described above, the silicon nitride film 32 is used as a protective film against ultraviolet rays. In the second embodiment, a photoresist is used instead.

  First, the structure shown in FIG. 2 is manufactured using the same manufacturing method as in the first embodiment. Then, as shown in FIG. 12, a photoresist 50 is formed on the entire surface of the silicon nitride film 30. Since photoresist generally does not transmit ultraviolet rays, this photoresist 50 is used as a protective film against ultraviolet rays.

  Next, as shown in FIG. 13, the photo resist 50 is used to remove the photoresist 50 in the NMOS region. As a result, the silicon nitride film 30 in the NMOS region is exposed. And as FIG. 14 shows, the ultraviolet-ray 100 is irradiated with respect to the said structure from the upper direction of the structure of FIG. Since the photoresist 50 which does not transmit ultraviolet rays is provided in the PMOS region, the silicon nitride film 30 in the PMOS region is not irradiated with ultraviolet rays. On the other hand, since the silicon nitride film 30 in the NMOS region is exposed, the silicon nitride film 30 is irradiated with ultraviolet rays. Thereafter, the remaining portion of the photoresist 50 is removed. Thereafter, in the same manner as in the first embodiment, an interlayer insulating film 34, contact holes 35 and 36, contact plugs 37 and 38, and wirings 39 and 40 are sequentially formed.

  As described above, also in the manufacturing method of the semiconductor device according to the second embodiment, the protective region that does not transmit ultraviolet light (the photoresist 50 in the second embodiment) is formed in the PMOS region. The silicon nitride film 30 is not irradiated with ultraviolet rays. Therefore, only the tensile stress of the silicon nitride film 30 in the NMOS region can be increased. Therefore, the performance of the NMOS transistor 10 can be easily improved while maintaining the performance of the PMOS transistor 20 to some extent. As a result, a high-performance semiconductor device can be obtained with a simple manufacturing method.

  In the first embodiment, since the silicon nitride film 32 is used as a protective film against ultraviolet rays, it is necessary to form a photoresist 33 separately from the protective film in order to remove the protective film in the NMOS region. was there. However, in the second embodiment, since the photoresist 50 is used as the protective film, a photoresist different from the protective film is unnecessary, and the manufacturing process necessary for removing the protective film in the NMOS region is not necessary. It can be simplified. As a result, a high-performance semiconductor device can be realized with a simpler manufacturing method.

Embodiment 3 FIG.
15 to 20 are cross-sectional views showing the method of manufacturing a semiconductor device according to the third embodiment of the present invention in the order of steps. In the first and second embodiments described above, the silicon nitride film 30 in the PMOS region is left without being removed. However, in the present third embodiment, the silicon nitride film 30 is removed and a new compressive stress is provided. A silicon nitride film is formed in the PMOS region to realize a high-performance PMOS transistor 20. Hereinafter, a method for manufacturing a semiconductor device according to the third embodiment will be described based on the method for manufacturing a semiconductor device according to the first embodiment.

  First, the structure shown in FIG. 7 is manufactured using the same manufacturing method as in the first embodiment. Then, as in the first embodiment, the structure is irradiated with ultraviolet rays 100 from above the structure of FIG. Thereby, the silicon nitride film 30 in the PMOS region is not irradiated with ultraviolet rays, and the silicon nitride film 30 in the NMOS region is irradiated with ultraviolet rays. Thereafter, the silicon nitride film 32 in the PMOS region is removed by etching.

  Next, as shown in FIG. 15, a photoresist 60 is formed on the silicon oxide film 31 in the NMOS region. Then, as shown in FIG. 16, using the photoresist 60 as a mask, the silicon oxide film 31 and the silicon nitride film 30 in the PMOS region are sequentially removed by etching. Thereafter, the photoresist 60 is removed.

  Next, as shown in FIG. 17, a silicon nitride film 61 having a compressive stress is formed on the entire surface. Then, as shown in FIG. 18, a photoresist 62 is formed on the silicon nitride film 61 in the PMOS region.

  Next, using the photoresist 62 as a mask, the silicon nitride film 61 and the silicon oxide film 31 in the NMOS region are sequentially removed by etching. Thereafter, the photoresist 62 is removed. Thereby, as shown in FIG. 19, a silicon nitride film 61 having compressive stress is formed on the upper surface of the semiconductor substrate 1 in the PMOS region so as to cover the gate structure 23 of the PMOS transistor 20. Note that the silicon nitride film 61 and the silicon oxide film 31 in the NMOS region are not completely removed, but remain in the vicinity of the boundary with the PMOS region in the NMOS region.

  Thereafter, as shown in FIG. 20, an interlayer insulating film 34 is formed on the silicon nitride films 30 and 61 in the same manner as in the first embodiment, and contact holes 35 and 36, contact plugs 37 and 38, and wiring 39, 40 are formed in order.

  As described above, in the method of manufacturing a semiconductor device according to the third embodiment, as in the first embodiment, the protective film that does not transmit ultraviolet light is formed in the PMOS region. 30 is not irradiated with ultraviolet rays. Therefore, only the tensile stress of the silicon nitride film 30 in the NMOS region can be increased, and the high-performance NMOS transistor 10 can be realized.

  In addition, since the silicon nitride film not irradiated with ultraviolet rays has a low density and a high etching rate, the selectivity between the silicon nitride film 30 in the PMOS region and the underlying structure such as the semiconductor substrate 1 can be increased. it can. Therefore, it becomes easy to remove the silicon nitride film 30 in the PMOS region. Therefore, the performance of the PMOS transistor 20 can be easily improved by forming the silicon nitride film 61 having compressive stress in the PMOS region. As a result, a high-performance semiconductor device can be obtained with a simple manufacturing method.

  In the semiconductor device manufacturing method according to the second embodiment described above, the silicon nitride film 30 in the PMOS region is removed, and a silicon nitride film having a compressive stress is newly formed in the PMOS region, so that a high-performance PMOS is provided. The transistor 20 can be realized. Specifically, first, the structure shown in FIG. 13 is manufactured using the same manufacturing method as in the second embodiment. Then, similarly to the second embodiment, the structure 100 is irradiated with ultraviolet rays 100 from above. Thereby, the silicon nitride film 30 in the PMOS region is not irradiated with ultraviolet rays, and the silicon nitride film 30 in the NMOS region is irradiated with ultraviolet rays. Thereafter, the photoresist 50 in the PMOS region is removed.

  Next, as shown in FIG. 21, the above-described silicon oxide film 31 is formed on the entire surface of the silicon nitride film 30, and a photoresist 60 is formed on the silicon oxide film 31 in the NMOS region. Thereafter, as shown in FIGS. 16 and 17, the silicon oxide film 31 and the silicon nitride film 30 in the PMOS region are sequentially removed to form a silicon nitride film 61 having compressive stress on the entire surface. Then, as shown in FIGS. 18 and 19, the silicon nitride film 61, the silicon oxide film 31, and the photoresist 62 in the NMOS region are removed. Thereafter, as shown in FIG. 20 described above, the interlayer insulating film 34, the contact holes 35 and 36, the contact plugs 37 and 38, and the wirings 39 and 40 are sequentially formed.

  Thus, even when the photoresist 50 is used as a protective film against the ultraviolet ray 100, the performance of the PMOS transistor 20 can be easily improved, and a high-performance semiconductor device can be obtained by a simple manufacturing method. it can.

It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 1 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 2 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 2 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 2 of this invention in order of a process. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention in process order. It is sectional drawing which shows the modification of the manufacturing method of the semiconductor device which concerns on Embodiment 3 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 10 NMOS transistor, 20 PMOS transistor, 13, 23 Gate structure, 30, 32, 61 Silicon nitride film, 33, 50 Photoresist, 34 Interlayer insulating film, 100 Ultraviolet rays.

Claims (5)

A method for manufacturing a semiconductor device comprising an NMOS region in which an NMOS transistor is formed and a PMOS region in which a PMOS transistor is formed,
(A) preparing a semiconductor substrate;
(B) forming a gate structure of the NMOS transistor on the upper surface of the semiconductor substrate in the NMOS region;
(C) forming a gate structure of the PMOS transistor on the upper surface of the semiconductor substrate in the PMOS region;
(D) forming a silicon nitride film on the semiconductor substrate so as to cover the gate structures of the NMOS transistor and the PMOS transistor;
(E) forming a protective film that does not transmit ultraviolet light on the silicon nitride film in the PMOS region;
(F) irradiating the structure with ultraviolet light from above the structure obtained after the step (e);
(G) a step of removing the protective film after the step (f),
In the step (f), the ultraviolet light is irradiated to the silicon nitride film in the NMOS region, and the tensile stress of the silicon nitride film in the NMOS region is increased. A method of manufacturing a semiconductor device according to claim 1,
The step (e)
(E-1) forming a second silicon nitride film as the protective film on the entire surface on the structure obtained after the step (d);
(E-2) forming a photoresist on the entire surface of the second silicon nitride film;
(E-3) removing the photoresist in the NMOS region;
(E-4) After the step (e-3), removing the second silicon nitride film in the NMOS region exposed from the photoresist;
(E-5) A method for manufacturing a semiconductor device, comprising: removing a remaining portion of the photoresist. A method of manufacturing a semiconductor device according to claim 1,
The step (e)
(E-1) forming a photoresist as the protective film on the entire surface on the structure obtained after the step (d);
(E-2) A method for manufacturing a semiconductor device, comprising: removing the photoresist in the NMOS region. A method of manufacturing a semiconductor device according to claim 1,
(H) A method for manufacturing a semiconductor device, further comprising a step of forming an interlayer insulating film on the silicon nitride film after the step (g). A method of manufacturing a semiconductor device according to claim 1,
(H) after the step (g), removing the silicon nitride film in the PMOS region;
(I) after the step (h), forming a second silicon nitride film having compressive stress on the upper surface of the semiconductor substrate in the PMOS region so as to cover the gate structure of the PMOS transistor;
(J) A method of manufacturing a semiconductor device, further comprising: forming an interlayer insulating film on the silicon nitride film and the second silicon nitride film.

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