JP2008141475A - Amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To broaden a band, to reduce noise and to suppress an increase in chip area as much as possible in circuit integration. <P>SOLUTION: A gate grounding amplifier is constituted by cascade connection of first and second field effect transistors 4, 5 between an input terminal 1 and an output terminal 2, the transistors 4, 5 having gates connected to the ground via a bypass capacitor 6, an RC serial circuit 10 constituted by serial connection of a resistor 8 and a capacitor 9 is provided by being connected between the input terminal 1 and the output terminal 2, and thus the amplifier is provided which has high input impedance, is easily matched, has wide band and generates low noise. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an amplifier using a field effect transistor, and more particularly, to an amplifier that improves noise figure, widens bandwidth, and the like.

2. Description of the Related Art Conventionally, as an amplifier aiming at wide band, for example, as disclosed in Patent Document 1, a configuration in which current mirror circuits are cascaded in two stages is known.
The configuration disclosed in Patent Document 1 can also be applied to a field effect transistor, and FIG. 4 shows such a configuration example. Hereinafter, a field effect transistor is used with reference to FIG. The circuit that has been used will be described.
This amplifier has a field-effect transistor having a two-stage grounded gate configuration. That is, the first current mirror circuit 21 composed of the first and second field effect transistors 15 and 17 whose gates are grounded to each other, and the third and fourth field effects whose gates are also grounded to each other. The second current mirror circuit 2 constituted by the transistors 16 and 18 is connected in cascade.

The source of the first field effect transistor 15 is connected to the input terminal 1A and grounded via the resistor 19, while the drain of the third field effect transistor 16 is connected to the output terminal 2A. In addition to being connected, a predetermined reference voltage is applied via the resistor 20.
The drain of the fourth field effect transistor 18 is connected to the current supply terminal 3A so that current is supplied from the outside.

By the way, when the field effect transistor is used with the gate grounded, since the influence characteristic on the operation due to the frequency is generally small, it is suitable for widening the amplifier. In the conventional amplifier shown in FIG. 4, the current change in the input-side resistor 19 is taken out as a voltage change generated across the output-side resistor 20, so that capacitive coupling is required. However, there is an advantage that the frequency characteristics are improved. Furthermore, since two current mirror circuits having the same configuration are connected in cascade, the bias is stable, and gain can be improved without increasing current consumption.
Japanese Patent No. 2796076 (page 6-14, FIGS. 1 to 23)

However, since the amplifier shown in FIG. 4 uses a field effect transistor, there is a problem that the input impedance is lowered. As a countermeasure, for example, a method can be considered in which the gate width of the field effect transistor is narrowed and the input impedance is increased to achieve matching.
However, when the field effect transistor is used with the gate grounded, the input load reflection coefficient Γopt and the input reflection coefficient are far away from each other on the Smith diagram. Since it is away from the center, the noise figure deteriorates.

In addition, since the above-described amplifier has a high output impedance, when matching is performed using a matching circuit including a capacitance and an inductor, the frequency characteristics are deteriorated, resulting in a problem that the band becomes narrow. For this reason, for example, when matching is performed using a resistor having no frequency characteristic, the reduction of the band due to the deterioration of the frequency characteristic can be prevented, but the noise figure is deteriorated.
Furthermore, in the configuration shown in FIG. 4, a capacitor that sufficiently grounds the gate in an AC manner is required. However, since a capacitor is required in each of the two current mirror circuits, the amplifier is integrated. There is a problem of increasing the chip area.

The present invention has been made in view of the above circumstances, and provides a wide-band, low-noise and inexpensive amplifier.
Another object of the present invention is to provide an amplifier capable of suppressing the increase in chip area as much as possible when realizing an integrated circuit while realizing a wide band and low noise.

In order to achieve the above object of the present invention, an amplifier according to the present invention comprises:
An amplifier comprising two or more gate-grounded field effect transistors connected in cascade,
The gate of the field effect transistor is grounded through a shared bypass capacitor,
An RC series circuit in which a resistor and a capacitor are connected in series is connected between the input and output of the amplifier.
In such a configuration, the RC series circuit is preferably connected between the source and drain of the field effect transistor forming the output stage.

According to the present invention, by using a field effect transistor having a small drain-source voltage in the previous stage, it is possible to increase the input impedance as compared with the prior art, and therefore, the gate width of the field effect transistor can be reduced, The matching can be achieved without using a conventional technique that causes deterioration of the noise figure such as connecting a resistor, and an amplifier that can easily achieve a wide band can be provided.
In addition, since the gates of a plurality of cascade-connected field effect transistors are connected to the ground via one common bypass capacitor, the chip area can be easily reduced, and a cheaper amplifier can be provided. .
Furthermore, in particular, by providing the RC series circuit only between the source and drain of the final stage field effect transistor, the influence on the input stage can be reduced, and the noise figure can be further improved.

Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 3.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, a first configuration example of the amplifier according to the embodiment of the present invention will be described with reference to FIG.
The amplifier according to the embodiment of the present invention includes first and second field effect transistors 4 and 5, an RC series circuit 10, a choke inductor 7, and a shared bypass capacitor 6 as main components. It has become.

First, in the first and second field effect transistors 4 and 5, the drain of the first field effect transistor 4 and the source of the second field effect transistor 5 are connected to each other, while the first field effect transistor 4 Are connected to the input terminal 1 and to the ground via the choke inductor 7.
The drain of the second field effect transistor 2 is connected to the output terminal 2.

Further, an RC series circuit 10 is connected between the source of the first field effect transistor 4 and the drain of the second field effect transistor 5.
The RC series circuit 10 includes a resistor 8 and a capacitor 9, one end of the resistor 8 being the source of the first field effect transistor 4, and one end of the capacitor 9 being the second field effect transistor 5. The other end of the resistor 8 and the other end of the capacitor 9 are connected to each other. That is, in other words, the RC series circuit 10 is connected between the input terminal 1 and the output terminal 2.

  The gates of the first and second field effect transistors 4 and 5 are both connected to the reference voltage terminal 3 and connected to the ground via the shared bypass capacitor 6. The effect transistors 4 and 5 operate as a grounded-gate amplifier.

Next, the operation in such a configuration will be described. First, as a premise, a predetermined power supply voltage is applied to the output terminal 2, while the first and second field effect transistors 4 are applied to the reference voltage terminal 3. , 5 is applied with a predetermined gate voltage suitable for the operation.
By applying the power supply voltage to the output terminal 2, the power supply voltage is supplied to the drain of the second field effect transistor 5, while the source of the first field effect transistor 4 is connected to the ground by the choke inductor 7. Therefore, an operating current flows through the first and second field effect transistors 4 and 5.

Since the first and second field effect transistors 4 and 5 are connected in cascade, the same current flows. Therefore, the gate-source voltages of the first and second field effect transistors 4 and 5 are poles. A close value.
Accordingly, since the gates of the first and second field effect transistors 4 and 5 are at the same potential, the drain-source voltage of the first field effect transistor 4 becomes very small.
As a result, the first field effect transistor 4 has a low gain and a high impedance as viewed from the source side.

In contrast, since the drain-source voltage of the second field effect transistor 5 is sufficiently large, the gain is higher than that of the first field effect transistor 4 and the input impedance is lowered.
Thus, by using the first field effect transistor 4 having a small drain-source voltage in the previous stage, the input impedance of the amplifier becomes higher than that of the conventional gate-grounded field effect transistor, and matching is easy. Become.

  On the other hand, since the first field effect transistor 4 has almost no gain, it is difficult to obtain an amplification operation. However, the gain of the entire amplifier can be obtained by connecting the second field effect transistor 5 to the subsequent stage. It has become a thing.

  The input impedance of the amplifier can be adjusted to a desired size by appropriately selecting the gate width of the first and second field effect transistors 4 and 5, but the amplifier in the embodiment of the present invention Since the input impedance is higher than that of the conventional circuit, the noise figure can be improved by making the gate width relatively wide.

  In general, when a field effect transistor is used with the gate grounded, the output impedance becomes very high, so a matching circuit is required between the external circuit and the frequency characteristics tend to deteriorate. However, in the amplifier according to the embodiment of the present invention, the input and output of the first and second field effect transistors 4 and 5 are AC-coupled by the RC series circuit 10, thereby reducing the output impedance and matching. This makes it easy to make the entire amplifier further broadband.

FIG. 3 shows a characteristic line showing an example of a change in frequency of the output reflection coefficient in the amplifier according to the embodiment of the present invention together with a change example of the conventional circuit. In the figure, the horizontal axis indicates the frequency, and the vertical axis indicates the output reflection coefficient (S22).
In FIG. 3, the solid characteristic line indicates the frequency change of the output reflection coefficient in the configuration example shown in FIG. 1, and the dotted characteristic line indicates the conventional circuit, that is, the RC series as shown in FIG. The frequency change of the output reflection coefficient in an amplifier having a configuration without the circuit 10 is shown.

  In the figure, the vicinity where the characteristic line shows a peak is the desired operating frequency range of the amplifier. However, the amplifier according to the embodiment of the present invention has an output reflection coefficient in the vicinity of the conventional circuit (the characteristic of the dotted line). (Refer to the characteristic line of the solid line), and it can be confirmed that the output impedance has been reliably reduced.

Next, a second configuration example will be described with reference to FIG.
The same components as those in the configuration example shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof is omitted, and different points will be mainly described below.
In the second configuration example, the position where the RC series circuit 10 is provided is different from the configuration example shown in FIG. 1, and the configuration of the other parts is the same as the configuration example shown in FIG. Is.

Specifically, the configuration of the RC series circuit 10 itself is the same as that of the configuration example shown in FIG. 1 except that it is connected between the source and drain of the second field effect transistor 5. The source and drain are coupled in an alternating manner.
That is, one end of the resistor 8 and one end of the capacitor 9 are connected to each other, the other end of the resistor 8 is connected to the source of the second field effect transistor 5, and the other end of the capacitor 9 is connected to the second electric field. The drains of the effect transistors 5 are respectively connected.

In such a configuration as well, as described in the configuration example of FIG. 1, the RC series circuit 10 reduces the output impedance, facilitates matching, and enables widening of the entire amplifier.
The RC series circuit 10 generates noise, but its influence, particularly the influence on the input terminal 1, is smaller in the second configuration example than in the configuration example shown in FIG. In this respect, the second configuration example can obtain a good noise figure.

  In the embodiment of the present invention described above, an example of an amplifier configured by cascading two field effect transistors has been shown, but it is needless to say that the present invention is not limited to such a configuration. An amplifier may be configured by cascading three or more field effect transistors. For example, in the case of cascading three field effect transistors, the RC series circuit 10 is configured as shown in the configuration example of FIG. The connection may be made between the input terminal 1 and the output terminal 2 or between the source and drain of the final stage field effect transistor.

FIG. 3 is a circuit diagram illustrating a first configuration example of an amplifier according to the embodiment of the present invention. It is a circuit diagram which shows the 2nd structural example of the amplifier in embodiment of this invention. It is a characteristic diagram which shows the example of the frequency change of the output reflection coefficient in the amplifier of embodiment of this invention with the example of a change of a conventional circuit. It is a circuit diagram which shows the circuit structural example of a conventional circuit.

Explanation of symbols

4 ... 1st field effect transistor 5 ... 2nd field effect transistor 6 ... Shared bypass capacitor 10 ... RC series circuit

Claims (2)

An amplifier comprising two or more gate-grounded field effect transistors connected in cascade,
The gate of the field effect transistor is grounded through a shared bypass capacitor,
An amplifier characterized in that an RC series circuit in which a resistor and a capacitor are connected in series is connected between the input and output of the amplifier.   2. The amplifier according to claim 1, wherein the RC series circuit is connected between a source and a drain of a field effect transistor constituting an output stage.

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