JP2008141035A - Method of manufacturing semiconductor device and adhesive for use in its method - Google Patents

Method of manufacturing semiconductor device and adhesive for use in its method Download PDF

Info

Publication number
JP2008141035A
JP2008141035A JP2006326672A JP2006326672A JP2008141035A JP 2008141035 A JP2008141035 A JP 2008141035A JP 2006326672 A JP2006326672 A JP 2006326672A JP 2006326672 A JP2006326672 A JP 2006326672A JP 2008141035 A JP2008141035 A JP 2008141035A
Authority
JP
Japan
Prior art keywords
epoxy resin
radical polymerization
wiring board
circuit wiring
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006326672A
Other languages
Japanese (ja)
Other versions
JP4899095B2 (en
Inventor
Masashi Nakagawa
誠志 中川
Nobuhiro Imaizumi
延弘 今泉
Takeshi Ishizuka
剛 石塚
Hitoaki Date
仁昭 伊達
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2006326672A priority Critical patent/JP4899095B2/en
Publication of JP2008141035A publication Critical patent/JP2008141035A/en
Application granted granted Critical
Publication of JP4899095B2 publication Critical patent/JP4899095B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29394Base material with a principal constituent of the material being a liquid not provided for in groups H01L2224/293 - H01L2224/29391
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29399Coating material
    • H01L2224/2949Coating material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81193Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83053Bonding environment
    • H01L2224/83095Temperature settings
    • H01L2224/83099Ambient temperature
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83193Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device in which the excellent bonding of a semiconductor chip and a circuit wiring board can be obtained by promoting the curing reaction of an epoxy resin at an ordinary temperature (without allowing the epoxy resin to be heated) when the semiconductor chip is mounted to the circuit wiring board by flip-chip bonding, and an adhesive for use in the method. <P>SOLUTION: The method of manufacturing a semiconductor device comprises a first application step of applying a first composition containing epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer which can be radically polymerized to the electrode forming surface of a circuit wiring board, a second step of applying a second composition containing a radical polymerization starting agent to the electrode forming surface of a semiconductor chip, a contact step of allowing the electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board to face each other and allowing the first composition applied and the second composition applied to be in contact with each other, and the epoxy resin curing step of curing the epoxy resin. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法及び該方法に用いられる接着剤に関する。   The present invention relates to a method of manufacturing a semiconductor device in which an electrode of a semiconductor chip and an electrode of a circuit wiring board are electrically connected via bumps, and an adhesive is provided between the semiconductor chip and the circuit wiring board, and the method The present invention relates to an adhesive used in the above.

近年、コンピュータ等の電子機器の高速化、小型化に伴い、プリント配線板やセラミック基板への電子部品(半導体チップ)の高密度実装の要求が高まっており、斯かる要求を満たす方式としてベアチップ実装方式が注目されている。このベアチップ実装方式においては、半導体チップと回路配線基板との電気的接続をワイヤーボンディングにより達成するフェイスアップ実装に代わり、半導体チップと回路配線基板との電気的接続を半導体チップと回路配線基板における電極との間にバンプを介在させることにより達成するフェイスダウン実装、即ちフリップチップボンディングが採用される傾向にある。このようなフリップチップボンディングにおいては、高密度化のための微細化(小型化及び多ピン化)、半導体チップと回路配線基板との熱膨張率の相違、及び熱応力の発生等を考慮して、常温で接合されることが要求されている。   In recent years, with the speeding up and downsizing of electronic devices such as computers, there is an increasing demand for high-density mounting of electronic components (semiconductor chips) on printed wiring boards and ceramic substrates. Bare chip mounting is a method that meets these requirements. The method is drawing attention. In this bare chip mounting method, instead of face-up mounting in which the electrical connection between the semiconductor chip and the circuit wiring board is achieved by wire bonding, the electrical connection between the semiconductor chip and the circuit wiring board is performed on the electrodes on the semiconductor chip and the circuit wiring board. There is a tendency to employ face-down mounting, that is, flip-chip bonding, which is achieved by interposing bumps therebetween. In such flip chip bonding, considering miniaturization for miniaturization (miniaturization and multi-pin), difference in thermal expansion coefficient between semiconductor chip and circuit wiring board, generation of thermal stress, etc. It is required to be bonded at room temperature.

常温で接合する方法として、常温硬化が可能な硬化剤をカプセル膜で覆ってマイクロカプセル化し(図3)、このマイクロカプセル化された硬化剤に荷重を加えて圧力によりマイクロカプセルを破壊して、マイクロカプセルのコア材である硬化剤を接着剤中に分散させ、接着剤を硬化させる感光法がある。   As a method of joining at room temperature, a curing agent capable of curing at room temperature is covered with a capsule film to form a microcapsule (FIG. 3), a load is applied to the microencapsulated curing agent, and the microcapsule is destroyed by pressure, There is a photosensitive method in which a curing agent that is a core material of a microcapsule is dispersed in an adhesive and the adhesive is cured.

しかしながら、フリップチップボンディングにおいて、半導体チップにおけるバンプと回路配線基板における電極との間に介在するマイクロカプセルは破壊されやすいものの、半導体チップにおけるバンプと回路配線基板における電極との間に介在していないマイクロカプセルには十分な圧力が加わらずに、マイクロカプセルの破壊が十分に起こっていなかった(図4A及び図4B)。これにより、接着剤の硬化が十分でなく、半導体チップと回路配線基板との接合強度が十分に得られない、接着剤の硬化時間が長くなる、アフターキュアとして更なる加熱が必要となる等の問題がある(特許文献1参照)。   However, in flip chip bonding, the microcapsules interposed between the bumps on the semiconductor chip and the electrodes on the circuit wiring board are easily destroyed, but the microcapsules are not interposed between the bumps on the semiconductor chip and the electrodes on the circuit wiring board. Sufficient pressure was not applied to the capsule, and the microcapsule was not sufficiently broken (FIGS. 4A and 4B). Due to this, the curing of the adhesive is not sufficient, the bonding strength between the semiconductor chip and the circuit wiring board cannot be sufficiently obtained, the curing time of the adhesive becomes long, further heating as an after cure is required, etc. There is a problem (see Patent Document 1).

特開平11−29748号公報JP-A-11-29748

本発明は、従来における問題を解決し、以下の目的を達成することを課題とする。即ち、本発明は、半導体チップをフリップチップボンディングにより回路配線基板に実装する際、常温で(加熱されることなく)エポキシ系樹脂の硬化反応を促進させて半導体チップと回路配線基板との良好な接合を実現することができる半導体装置の製造方法及び該方法に用いられる接着剤を提供することを目的とする。   An object of the present invention is to solve the conventional problems and achieve the following objects. That is, according to the present invention, when the semiconductor chip is mounted on the circuit wiring board by flip chip bonding, the curing reaction of the epoxy resin is promoted at room temperature (without being heated), and the semiconductor chip and the circuit wiring board are improved. It is an object of the present invention to provide a method for manufacturing a semiconductor device capable of realizing bonding and an adhesive used in the method.

前記課題を解決するための手段としては、以下の通りである。即ち、
本発明の半導体装置の製造方法は、半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法において、前記回路配線基板(前記半導体チップ)の電極形成面に、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物を塗布する第1の塗布工程と、前記半導体チップ(前記回路配線基板)の電極形成面に、ラジカル重合開始剤を含む第2の組成物を塗布する第2の塗布工程と、前記半導体チップの電極形成面と前記回路配線基板の電極形成面とを対向させ、前記塗布された第1の組成物と前記塗布された第2の組成物とを接触させる接触工程と、前記エポキシ系樹脂を硬化させるエポキシ系樹脂硬化工程とを含むことを特徴とする。
該半導体装置の製造方法では、前記第1の塗布工程において、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物が回路配線基板(半導体チップ)の電極形成面に塗布され、前記第2の塗布工程において、ラジカル重合開始剤を含む第2の組成物が半導体チップ(回路配線基板)の電極形成面に塗布され、前記接触工程において、前記半導体チップの電極形成面と前記回路配線基板の電極形成面とが対向され、前記塗布された第1の組成物と前記塗布された第2の組成物とが接触される。その結果、ラジカル重合反応を開始させ、該ラジカル重合反応において発生する反応熱により残存するマイクロカプセルのカプセル膜を溶解させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。また、該ラジカル重合反応の反応熱によりエポキシポリマー分子等を活性化させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。
本発明の接着剤は、半導体チップと回路配線基板とを接着する接着剤において、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなり、前記ラジカル重合が可能なモノマーのラジカル重合反応において発生する反応熱によって前記カプセル膜が溶解可能であることを特徴とする。
該接着剤においては、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなるので、ラジカル重合が可能なモノマーとラジカル重合開始剤との接触によってラジカル重合反応を開始させ、該ラジカル重合反応において発生する反応熱により残存するマイクロカプセルのカプセル膜を溶解させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。また、該ラジカル重合反応の反応熱によりエポキシポリマー分子等を活性化させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。
なお、本発明の前記半導体装置の製造方法により製造された半導体装置は、前記半導体チップと前記回路配線基板との接着強度に優れ、高品質かつ高性能である。
Means for solving the problems are as follows. That is,
According to a method of manufacturing a semiconductor device of the present invention, an electrode of a semiconductor chip and an electrode of a circuit wiring board are electrically connected via bumps, and an adhesive is provided between the semiconductor chip and the circuit wiring board. In the manufacturing method, the electrode composition surface of the circuit wiring board (the semiconductor chip) includes an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization. A second coating step of coating a second composition containing a radical polymerization initiator on the electrode forming surface of the semiconductor chip (the circuit wiring board); and A contact step in which an electrode forming surface and an electrode forming surface of the circuit wiring board are opposed to each other, and the applied first composition and the applied second composition are brought into contact with each other; and the epoxy resin Characterized in that it comprises an epoxy resin curing step of curing.
In the method for manufacturing a semiconductor device, in the first application step, the first composition containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization is used as a circuit wiring board. (Semiconductor chip) is applied to the electrode formation surface, and in the second application step, a second composition containing a radical polymerization initiator is applied to the electrode formation surface of the semiconductor chip (circuit wiring board), and the contact step The electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board are opposed to each other, and the applied first composition and the applied second composition are brought into contact with each other. As a result, the radical polymerization reaction is initiated, the remaining microcapsule capsule film is dissolved by the reaction heat generated in the radical polymerization reaction, and the curing reaction of the epoxy resin can be promoted without heating. Moreover, the epoxy polymer molecule | numerator etc. can be activated with the reaction heat of this radical polymerization reaction, and the hardening reaction of an epoxy resin can be accelerated | stimulated without heating.
The adhesive of the present invention is a first composition comprising an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization in an adhesive that bonds a semiconductor chip and a circuit wiring board. And a second composition containing a radical polymerization initiator, and the capsule membrane can be dissolved by reaction heat generated in the radical polymerization reaction of the monomer capable of radical polymerization. It is characterized by that.
In the adhesive, a first composition containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization; and a second composition containing a radical polymerization initiator; The capsule film of the microcapsule that is left by the reaction heat generated in the radical polymerization reaction is initiated by contacting the radical polymerization initiator with the monomer capable of radical polymerization and the radical polymerization initiator. The curing reaction of the epoxy resin can be accelerated without heating. Moreover, the epoxy polymer molecule | numerator etc. can be activated with the reaction heat of this radical polymerization reaction, and the hardening reaction of an epoxy resin can be accelerated | stimulated without heating.
The semiconductor device manufactured by the method for manufacturing a semiconductor device of the present invention is excellent in adhesive strength between the semiconductor chip and the circuit wiring board, and has high quality and high performance.

本発明によると、従来における問題を解決することができ、半導体チップをフリップチップボンディングにより回路配線基板に実装する際、常温で(加熱されることなく)エポキシ系樹脂の硬化反応を促進させて半導体チップと回路配線基板との良好な接合を実現することができる半導体装置の製造方法及び該方法に用いられる接着剤を提供することができる。   According to the present invention, conventional problems can be solved, and when a semiconductor chip is mounted on a circuit wiring board by flip chip bonding, the curing reaction of the epoxy resin is promoted at room temperature (without being heated). It is possible to provide a method for manufacturing a semiconductor device capable of realizing good bonding between a chip and a circuit wiring board, and an adhesive used in the method.

(接着剤)
本発明の接着剤は、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤(マイクロカプセル化されたエポキシ系樹脂硬化剤)、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなり、更に必要に応じて適宜選択した、その他の成分とを含んでなる。
(adhesive)
The adhesive of the present invention includes an epoxy resin, an epoxy resin curing agent (microencapsulated epoxy resin curing agent) covered with a capsule film, and a first composition containing a monomer capable of radical polymerization; It comprises a two-component adhesive with a second composition containing a radical polymerization initiator, and further comprises other components appropriately selected as necessary.

−第1の組成物−
前記第1の組成物は、図1に示すように、エポキシ系樹脂(エポキシ主剤)1と、カプセル膜で覆われたエポキシ系樹脂硬化剤2と、ラジカル重合が可能なモノマー3とを少なくとも含んでなる。
-First composition-
As shown in FIG. 1, the first composition includes at least an epoxy resin (epoxy main agent) 1, an epoxy resin curing agent 2 covered with a capsule film, and a monomer 3 capable of radical polymerization. It becomes.

−−エポキシ系樹脂−−
前記エポキシ系樹脂1としては、エポキシ系接着剤に使用されるものであれば、特に制限はなく、目的に応じて適宜選択することができ、例えば、ビスフェノールA型、ビスフェノールF型、ナフタレン型等のエポキシ系樹脂が好適に挙げられる。ここで、エポキシ系樹脂とは、比較的低分子量のエポキシ系樹脂を意味し、硬化させることにより架橋して高分子量になるものをいう。
--- Epoxy resin-
The epoxy resin 1 is not particularly limited as long as it is used for an epoxy adhesive, and can be appropriately selected according to the purpose. Examples thereof include bisphenol A type, bisphenol F type, and naphthalene type. The epoxy resin is preferably mentioned. Here, the epoxy resin means an epoxy resin having a relatively low molecular weight, and means a resin having a high molecular weight by being cross-linked by curing.

−−カプセル膜で覆われたエポキシ系樹脂硬化剤−−
前記カプセル膜で覆われたエポキシ系樹脂硬化剤2としては、コア材としてのエポキシ系樹脂硬化剤と、エポキシ系樹脂硬化剤を覆うカプセル膜とを含むものであれば、特に制限はなく、目的に応じて適宜選択することができる。エポキシ系樹脂硬化剤としては、エポキシ系接着剤に使用されるものをいずれも使用することができ、例えば、フタル酸、ヘキサヒドロフタル酸、テトラヒドロフタル酸、メチルテトラヒドロフタル酸、メチルナジック酸、マレイン酸、トリメリット酸、ピロメリット酸等の酸、イミダゾール、ジシアンジアミド等が挙げられる。なお、上記の酸としては、一又は二無水物を使用することが好ましい。これらのエポキシ系樹脂硬化剤は、単独で又は二以上のものを組み合わせて使用してもよい。カプセル膜は、コア材としてのエポキシ系樹脂硬化剤を分散媒中に乳化分散させることにより形成されるものであり、例えば、メタクリル樹脂等の熱可塑性樹脂からなる。
カプセル膜で覆われたエポキシ系樹脂硬化剤2のエポキシ系樹脂1に対する使用割合としては、エポキシ系樹脂1及びエポキシ系樹脂硬化剤の種類に応じて適宜決められる。エポキシ系樹脂1としてビスフェノールF型エポキシ樹脂を用い、エポキシ系樹脂硬化剤としてイミダゾールを用いた場合、エポキシ系樹脂1の100重量部に対して、カプセル膜で覆われたエポキシ系樹脂硬化剤(マイクロカプセル化されたエポキシ系樹脂硬化剤)2が50〜80重量部程度含まれていることが好ましい。
--Epoxy resin curing agent covered with capsule film--
The epoxy resin curing agent 2 covered with the capsule film is not particularly limited as long as it includes an epoxy resin curing agent as a core material and a capsule film covering the epoxy resin curing agent. It can be selected as appropriate according to the conditions. As the epoxy resin curing agent, any of those used for epoxy adhesives can be used. For example, phthalic acid, hexahydrophthalic acid, tetrahydrophthalic acid, methyltetrahydrophthalic acid, methylnadic acid, maleic Examples thereof include acids such as acid, trimellitic acid and pyromellitic acid, imidazole and dicyandiamide. In addition, as said acid, it is preferable to use a mono- or dianhydride. These epoxy resin curing agents may be used alone or in combination of two or more. The capsule film is formed by emulsifying and dispersing an epoxy resin curing agent as a core material in a dispersion medium, and is made of, for example, a thermoplastic resin such as a methacrylic resin.
The usage ratio of the epoxy resin curing agent 2 covered with the capsule film to the epoxy resin 1 is appropriately determined according to the types of the epoxy resin 1 and the epoxy resin curing agent. When bisphenol F type epoxy resin is used as the epoxy resin 1 and imidazole is used as the epoxy resin curing agent, 100 parts by weight of the epoxy resin 1 is coated with an epoxy resin curing agent (micro About 50 to 80 parts by weight of the encapsulated epoxy resin curing agent 2) is preferably included.

−ラジカル重合が可能なモノマー−
前記ラジカル重合が可能なモノマー3としては、ラジカル重合が可能であれば、特に制限はなく、目的に応じて適宜選択することができ、例えば、ω−カルボキシ−ポリカプロラクトンモノ(メタ)アクリレート、(メタ)アクリル酸、(メタ)アクリル酸アルキルエステル、(メタ)アクリル酸ヒドロキシアルキルエステル、(メタ)アクリル酸ヒドロキシアルキルエステル、(メタ)アクリル酸フェノキシアルキルエステル、(メタ)アクリル酸シクロアルキルエステル、(メタ)アクリル酸テトラヒドロフルフリルエステル、エチレングリコールのジ(メタ)アクリレート、エポキシ(メタ)アクリレート、ウレタン(メタ)アクリレート、ポリエステル(メタ)アクリレート、ビスフェノールAのアルキレンオキシド付加物の(メタ)アクリレート、シアネート化合物等が挙げられる。上記の例示において、アルキルとしては、メチル、エチル、プロピル、ブチル、ペンチル、ヘキシル等が挙げられ、シクロアルキルとしては、シクロプロピル、シクロブチル、シクロペンチル、シクロヘキシル等が挙げられる。これらの(メタ)アクリルモノマーは、単独で又は二以上のものを組み合わせて使用してもよい。なお、本明細書では、(メタ)アクリルは、アクリル及びメタクリルの両方を示し、(メタ)アクリレートは、アクリレート及びメタクリレートの両方を示す用語として使用している。前記ラジカル重合が可能なモノマー3としては、特に、常温で(加熱されることなく)ラジカル重合が可能であり、該ラジカル重合反応の反応熱が大きいもの(例えば、ウレタンアクリレート、エポキシアクリレート)が好ましい。
ラジカル重合が可能なモノマー3のエポキシ系樹脂1に対する使用割合は、エポキシ系樹脂1及びラジカル重合が可能なモノマー3の種類に応じて適宜決められる。エポキシ系樹脂1としてビスフェノールF型エポキシ樹脂を用い、ラジカル重合が可能なモノマー3としてウレタンアクリレートを用いた場合、エポキシ系樹脂1の100重量部に対して、ラジカル重合が可能なモノマー3が100重量部程度含まれていることが好ましい。
-Monomers capable of radical polymerization-
The monomer 3 capable of radical polymerization is not particularly limited as long as radical polymerization is possible, and can be appropriately selected according to the purpose. For example, ω-carboxy-polycaprolactone mono (meth) acrylate, ( (Meth) acrylic acid, (meth) acrylic acid alkyl ester, (meth) acrylic acid hydroxyalkyl ester, (meth) acrylic acid hydroxyalkyl ester, (meth) acrylic acid phenoxyalkyl ester, (meth) acrylic acid cycloalkyl ester, ( (Meth) acrylic acid tetrahydrofurfuryl ester, ethylene glycol di (meth) acrylate, epoxy (meth) acrylate, urethane (meth) acrylate, polyester (meth) acrylate, bisphenol A alkylene oxide adduct (meta) Acrylate, cyanate compounds, and the like. In the above examples, examples of alkyl include methyl, ethyl, propyl, butyl, pentyl, hexyl and the like, and examples of cycloalkyl include cyclopropyl, cyclobutyl, cyclopentyl, cyclohexyl and the like. These (meth) acrylic monomers may be used alone or in combination of two or more. In this specification, (meth) acryl indicates both acrylic and methacrylic, and (meth) acrylate is used as a term indicating both acrylate and methacrylate. The monomer 3 capable of radical polymerization is particularly preferably one that can be radically polymerized at room temperature (without being heated) and has a large reaction heat of the radical polymerization reaction (for example, urethane acrylate, epoxy acrylate). .
The proportion of the monomer 3 capable of radical polymerization to the epoxy resin 1 is appropriately determined according to the type of the epoxy resin 1 and the monomer 3 capable of radical polymerization. When bisphenol F-type epoxy resin is used as the epoxy resin 1 and urethane acrylate is used as the monomer 3 capable of radical polymerization, the monomer 3 capable of radical polymerization is 100 weights with respect to 100 parts by weight of the epoxy resin 1. It is preferable that about part is contained.

−第2の組成物−
前記第2の組成物は、ラジカル重合開始剤を少なくとも含んでなる。
−−ラジカル重合開始剤−−
前記ラジカル重合開始剤としては、ラジカル重合を開始するものであれば、特に制限はなく、目的に応じて適宜選択することができる。例えば、低温分解型のt−ヘキシルペルオキシ−2−エチルヘキサノアート(t−Hexyl peroxy−2−ethylhexanoate)及びt−ブチルペルオキシ−2−エチルヘキサノアート(t−Butyl peroxy−2−ethylhexanoate)や、中温分解型の2,3−ジメチル−2,3−ジフェニルブタン(2,3−Dimethyl−2,3−diphenylbutane)等が挙げられる。
-Second composition-
The second composition comprises at least a radical polymerization initiator.
--Radical polymerization initiator--
The radical polymerization initiator is not particularly limited as long as it initiates radical polymerization, and can be appropriately selected according to the purpose. For example, low-temperature decomposition type t-hexyl peroxy-2-ethylhexanoate and t-butyl peroxy-2-ethylhexanoate, 2,3-dimethyl-2,3-diphenylbutane (2,3-dimethyl-2,3-diphenylbutane), etc.

−その他の成分−
前記その他の成分としては、充填剤としての無機フィラ4(例えば、アルミナ、窒化アルミニウム)、剥離強度や耐衝撃性を高めるためのエラストマーや(メタ)アクリル樹脂、接着剤の表面硬化性を高めるためのパラフィンワックス、安定性を高めるための酸化防止剤、可塑剤、接着強度の向上のためのカップリング剤5(例えば、シランカップリング剤)、着色剤等の添加剤等が挙げられる。更に、必要に応じて、塩化メチレン、四塩化炭素、メチルエチルケトン、メチルイソブチルケトン、アセトン、ベンゼン、トルエン、キシレン、酢酸エチル、酢酸ブチル、n−ヘキサン、シクロヘキサン等の有機溶剤を加えてもよい。また、前記その他の成分は第1の組成物及び第2の組成物のいずれに含まれていてもよく、第1の組成物及び第2の組成物の両方に含まれていてもよい。
-Other ingredients-
In order to improve the surface curability of the inorganic filler 4 (for example, alumina, aluminum nitride) as a filler, an elastomer or (meth) acrylic resin for improving peel strength and impact resistance, and an adhesive as the other components. Paraffin wax, an antioxidant for enhancing stability, a plasticizer, a coupling agent 5 (for example, a silane coupling agent) for improving adhesive strength, an additive such as a coloring agent, and the like. Furthermore, an organic solvent such as methylene chloride, carbon tetrachloride, methyl ethyl ketone, methyl isobutyl ketone, acetone, benzene, toluene, xylene, ethyl acetate, butyl acetate, n-hexane, and cyclohexane may be added as necessary. Moreover, the said other component may be contained in any of the 1st composition and the 2nd composition, and may be contained in both the 1st composition and the 2nd composition.

本発明の接着剤は、エポキシ系樹脂1、カプセル膜で覆われたエポキシ系樹脂硬化剤2、及びラジカル重合が可能なモノマー3を含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなり、半導体チップをフリップチップボンディングにより回路配線基板に実装する際、常温で(加熱されることなく)エポキシ系樹脂の硬化反応を促進させて半導体チップと回路配線基板との良好な接合を実現することができる。そのため、本発明の接着剤は、本発明の半導体装置の製造方法などに、特に好適に使用することができる。   The adhesive of the present invention includes a first composition containing an epoxy resin 1, an epoxy resin curing agent 2 covered with a capsule film, and a monomer 3 capable of radical polymerization, and a second composition containing a radical polymerization initiator. A two-part adhesive with a composition of the above, and when a semiconductor chip is mounted on a circuit wiring board by flip chip bonding, the curing reaction of the epoxy resin is promoted at room temperature (without being heated). And the circuit wiring board can be satisfactorily bonded. Therefore, the adhesive of the present invention can be particularly suitably used for the method for manufacturing a semiconductor device of the present invention.

(半導体装置の製造方法)
本発明の半導体装置の製造方法は、第1の塗布工程と、第2の塗布工程と、接触工程と、エポキシ系樹脂硬化工程とを少なくとも含み、更に必要に応じて適宜選択した、その他の工程を含む。
なお、接着剤の詳細については、本発明の接着剤において上述した通りである。
(Method for manufacturing semiconductor device)
The method for manufacturing a semiconductor device of the present invention includes at least a first coating step, a second coating step, a contact step, and an epoxy resin curing step, and further selected as appropriate according to need. including.
In addition, about the detail of an adhesive agent, it is as having mentioned above in the adhesive agent of this invention.

<第1の塗布工程>
前記第1の塗布工程は、図2Aに示すように、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物10を回路配線基板11における電極12周辺(回路配線基板11の電極形成面)に塗布する工程である。
該塗布の方法としては、特に制限はなく、目的に応じて公知の塗布方法の中から適宜選択することができる。前記塗布の際の厚みとしては、特に制限はなく、目的に応じて適宜選択することができる。
<First coating process>
In the first application step, as shown in FIG. 2A, a circuit wiring board is formed by using a first composition 10 containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization. 11 is applied to the periphery of the electrode 12 (the electrode forming surface of the circuit wiring board 11).
There is no restriction | limiting in particular as this application | coating method, According to the objective, it can select suitably from well-known application | coating methods. There is no restriction | limiting in particular as thickness at the time of the said application | coating, According to the objective, it can select suitably.

<第2の塗布工程>
前記第2の塗布工程は、図2Aに示すように、ラジカル重合開始剤を含む第2の組成物13を半導体チップ14におけるバンプ15周辺(半導体チップ14の電極形成面)に塗布する工程である。
該塗布の方法としては、特に制限はなく、目的に応じて公知の塗布方法の中から適宜選択することができる。前記塗布の際の厚みとしては、特に制限はなく、目的に応じて適宜選択することができる。
<Second application process>
As shown in FIG. 2A, the second application step is a step of applying the second composition 13 containing a radical polymerization initiator to the periphery of the bump 15 (the electrode forming surface of the semiconductor chip 14) in the semiconductor chip 14. .
There is no restriction | limiting in particular as this application | coating method, According to the objective, it can select suitably from well-known application | coating methods. There is no restriction | limiting in particular as thickness at the time of the said application | coating, According to the objective, it can select suitably.

<接触工程>
前記接触工程は、半導体チップ14の電極形成面と回路配線基板11の電極形成面とを対向させ、前記第1の組成物10と前記第2の組成物13とを接触させる工程である。具体的には、図2Aに示すようにボンディング装置(不図示)により半導体チップ14を吸着して回路配線基板11方向(図2Aの矢印方向)に移動させて半導体チップ14におけるバンプ15と回路配線基板11における電極12とが接するように(半導体チップ14の電極と回路配線基板11の電極12とがバンプ15を介して電気的に接続されるように)フェイスダウンの状態で位置合わせを行い、回路配線基板11と半導体チップ14とを接合する工程であり、この工程により図2Bのような半導体装置が作製される。
該接触の方法としては、特に制限はなく、目的に応じて適宜選択することができる。
<エポキシ系樹脂硬化工程>
前記エポキシ系樹脂硬化工程は、前記エポキシ系樹脂を硬化させる工程である。
<Contact process>
The contact process is a process in which the electrode formation surface of the semiconductor chip 14 and the electrode formation surface of the circuit wiring board 11 are opposed to bring the first composition 10 and the second composition 13 into contact with each other. Specifically, as shown in FIG. 2A, the semiconductor chip 14 is attracted by a bonding apparatus (not shown) and moved in the direction of the circuit wiring board 11 (arrow direction in FIG. 2A), and the bumps 15 and the circuit wiring in the semiconductor chip 14 are moved. Alignment is performed in a face-down state so that the electrode 12 on the substrate 11 is in contact (so that the electrode of the semiconductor chip 14 and the electrode 12 of the circuit wiring substrate 11 are electrically connected via the bump 15). This is a step of bonding the circuit wiring board 11 and the semiconductor chip 14, and the semiconductor device as shown in FIG. 2B is manufactured by this step.
There is no restriction | limiting in particular as this contact method, According to the objective, it can select suitably.
<Epoxy resin curing process>
The epoxy resin curing step is a step of curing the epoxy resin.

<その他の工程>
第1の塗布工程、第2の塗布工程、接触工程、及びエポキシ系樹脂硬化工程以外のその他の工程が、必要に応じて実施されてもよい。
なお、本実施の形態では、第1の組成物10を回路配線基板11における電極12周辺(回路配線基板11の電極形成面)に塗布し、第2の組成物13を半導体チップ14におけるバンプ15周辺(半導体チップ14の電極形成面)に塗布することとしたが、これに限定されるものではなく、第1の組成物10を半導体チップ14におけるバンプ15周辺(半導体チップ14の電極形成面)に塗布し、第2の組成物13を回路配線基板11における電極12周辺(回路配線基板11の電極形成面)に塗布してもよい。
<Other processes>
Other processes other than the first application process, the second application process, the contact process, and the epoxy resin curing process may be performed as necessary.
In the present embodiment, the first composition 10 is applied to the periphery of the electrode 12 in the circuit wiring board 11 (the electrode formation surface of the circuit wiring board 11), and the second composition 13 is applied to the bump 15 in the semiconductor chip 14. Although it applied to the periphery (electrode formation surface of the semiconductor chip 14), it is not limited to this, The 1st composition 10 is the periphery of the bump 15 in the semiconductor chip 14 (electrode formation surface of the semiconductor chip 14). The second composition 13 may be applied to the periphery of the electrode 12 in the circuit wiring board 11 (the electrode formation surface of the circuit wiring board 11).

本発明の半導体装置の製造方法では、第1の塗布工程において、第1の組成物10が回路配線基板11における電極12周辺(回路配線基板11の電極形成面)に塗布され、第2の塗布工程において、第2の組成物13が半導体チップ14におけるバンプ15周辺(半導体チップ14の電極形成面)に塗布され、接触工程において、半導体チップ14の電極形成面と回路配線基板11の電極形成面とが対向され、第1の組成物10と第2の組成物13とが接触されることにより、ラジカル重合反応を開始させ、該ラジカル重合反応において発生する反応熱により残存するマイクロカプセルのカプセル膜を溶解させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。また、該ラジカル重合反応の反応熱によりエポキシポリマー分子等を活性化させ、加熱することなくエポキシ系樹脂の硬化反応を促進することができる。
本発明の半導体装置の製造方法によると、例えば、フラッシュメモリ、DRAM、FRAM、等を初めとする各種半導体装置を効率的に製造することができる。
In the method for manufacturing a semiconductor device of the present invention, in the first application step, the first composition 10 is applied to the periphery of the electrodes 12 (the electrode formation surface of the circuit wiring board 11) in the circuit wiring board 11, and the second application is performed. In the process, the second composition 13 is applied to the periphery of the bump 15 (the electrode formation surface of the semiconductor chip 14) in the semiconductor chip 14, and in the contact process, the electrode formation surface of the semiconductor chip 14 and the electrode formation surface of the circuit wiring board 11 Are opposed to each other, and the first composition 10 and the second composition 13 are brought into contact with each other to start a radical polymerization reaction, and the capsule film of the microcapsule remaining by the reaction heat generated in the radical polymerization reaction The curing reaction of the epoxy resin can be accelerated without heating. Moreover, the epoxy polymer molecule | numerator etc. can be activated with the reaction heat of this radical polymerization reaction, and the hardening reaction of an epoxy resin can be accelerated | stimulated without heating.
According to the semiconductor device manufacturing method of the present invention, for example, various semiconductor devices including flash memory, DRAM, FRAM, and the like can be efficiently manufactured.

以下、本発明の実施例について説明するが、本発明はこれらの実施例に何ら限定されるものではない。   Examples of the present invention will be described below, but the present invention is not limited to these examples.

(実施例1)
−第1の組成物の調製−
下記組成を有する第1の組成物を調製した。
エポキシ系樹脂(エポキシ主剤):室温で液状タイプのビスフェノールF型エポキシ樹脂(商品名:EXA830LVP、大日本インキ化学工業株式会社製)・・・100重量部
マイクロカプセル型のエポキシ系樹脂硬化剤:コア材としての液状のイミダゾールをカプセル膜としてのメタクリル樹脂(熱可塑性樹脂)で被覆してなるマイクロカプセル型の硬化剤・・・50重量部
ラジカル重合が可能なモノマー:ウレタンアクリレート(商品名:ロックタイト326、ヘンケルジャパン株式会社製)・・・100重量部
カップリング剤:シランカップリング剤(商品名:KBM403、信越化学工業株式会社製)・・・2重量部
無機フィラー:アルミナ粉末(商品名:AO802、株式会社アドマテックス製)
なお、カプセル膜としてのメタクリル樹脂は、分散媒中にエポキシ系樹脂硬化剤を乳化分散させることにより形成させた。
(Example 1)
-Preparation of the first composition-
A first composition having the following composition was prepared.
Epoxy resin (epoxy main agent): Liquid type bisphenol F type epoxy resin (trade name: EXA830LVP, manufactured by Dainippon Ink & Chemicals, Inc.) ... 100 parts by weight Microcapsule type epoxy resin curing agent: Core Microcapsule-type curing agent obtained by coating liquid imidazole as material with methacrylic resin (thermoplastic resin) as capsule membrane: 50 parts by weight Monomer capable of radical polymerization: urethane acrylate (trade name: Loctite 326 100 parts by weight Coupling agent: Silane coupling agent (trade name: KBM403, manufactured by Shin-Etsu Chemical Co., Ltd.) ... 2 parts by weight Inorganic filler: Alumina powder (trade name: AO802) , Made by Admatechs Co., Ltd.)
The methacrylic resin as the capsule film was formed by emulsifying and dispersing an epoxy resin curing agent in a dispersion medium.

−第2の組成物の調製−
下記組成を有する第2の組成物を調製した。
ラジカル重合開始剤:低温分解型のt−ヘキシルペルオキシ−2−エチルヘキサノアート
-Preparation of the second composition-
A second composition having the following composition was prepared.
Radical polymerization initiator: low-temperature decomposition type t-hexylperoxy-2-ethylhexanoate

−半導体チップの準備−
半導体チップとして、電極径70μm、電極ピッチ120μmの電極(金バンプ)を120個備える、縦8.5mm、横8.5mm、厚さ0.06mmのLSIチップを準備した。
-Preparation of semiconductor chip-
As a semiconductor chip, an LSI chip having a length of 8.5 mm, a width of 8.5 mm, and a thickness of 0.06 mm, including 120 electrodes (gold bumps) having an electrode diameter of 70 μm and an electrode pitch of 120 μm, was prepared.

−回路配線基板の準備−
回路配線基板として、電極径70μm、電極ピッチ120μmの電極を2,700個備える、縦40mm、横40mm、厚さ0.35mmのトリアジン系樹脂(商品名:BTレジン、三菱瓦斯化学株式会社製)からなる回路配線基板を準備した。
-Preparation of circuit wiring board-
As a circuit wiring board, there are 2,700 electrodes having an electrode diameter of 70 μm and an electrode pitch of 120 μm, a triazine resin having a length of 40 mm, a width of 40 mm, and a thickness of 0.35 mm (trade name: BT resin, manufactured by Mitsubishi Gas Chemical Co., Ltd.) A circuit wiring board comprising:

−半導体装置の作製−
上述したように調製した第1の組成物を、準備した回路配線基板における電極周辺(回路配線基板の電極形成面)に塗布し、第2の組成物(ラジカル重合開始剤)を、準備した半導体チップにおける電極(金バンプ)周辺(半導体チップの電極形成面)に塗布し、ボンディング装置(不図示)により半導体チップを吸着して回路配線基板方向に移動させて半導体チップにおける電極(金バンプ)と回路配線基板における電極とが接するようにフェイスダウンの状態で位置合わせを行い、荷重6kg、接合時間6秒間、ボンディング装置におけるボンディングヘッドの温度30℃の条件で半導体チップと回路配線基板とを接合して、図2Bのような半導体装置を作製した。
-Fabrication of semiconductor devices-
A semiconductor prepared by applying the first composition prepared as described above to the periphery of an electrode in the prepared circuit wiring board (electrode formation surface of the circuit wiring board), and preparing the second composition (radical polymerization initiator). It is applied to the periphery of the electrode (gold bump) on the chip (electrode forming surface of the semiconductor chip), and the semiconductor chip is adsorbed by a bonding device (not shown) and moved in the direction of the circuit wiring board. Positioning is performed face down so that the electrodes on the circuit wiring board are in contact, and the semiconductor chip and the circuit wiring board are bonded under the conditions of a load of 6 kg, a bonding time of 6 seconds, and a bonding head temperature of 30 ° C. in the bonding apparatus. Thus, a semiconductor device as shown in FIG. 2B was manufactured.

−初期導通試験−
得られた半導体装置について、接合直後に電気的接合を確認するために、半導体チップにおける電極(金バンプ)と回路配線基板における電極との間にDC5ボルトの電圧を、85℃、湿度85%の環境下で、500時間印加した後、導通部の抵抗を測定することにより行った。測定の結果、導通部の抵抗の上昇が10%以下であれば良品とし、10%を超えていれば不良であるとした。その結果を表1に示す。なお、初期導通試験結果を表す分数は、分子が不良サンプル数を示し、分母が全サンプル数(試験数)を示す。
-Initial continuity test-
For the obtained semiconductor device, in order to confirm electrical bonding immediately after bonding, a voltage of DC 5 volts is applied between the electrode (gold bump) in the semiconductor chip and the electrode in the circuit wiring board at 85 ° C. and humidity 85%. After applying for 500 hours under the environment, the resistance of the conducting part was measured. As a result of the measurement, a non-defective product was obtained if the increase in the resistance of the conductive portion was 10% or less, and it was considered defective if it exceeded 10%. The results are shown in Table 1. In the fraction representing the initial continuity test result, the numerator indicates the number of defective samples, and the denominator indicates the total number of samples (number of tests).

−熱サイクル試験−
得られた半導体装置について、−55℃〜125℃の範囲で温度サイクル試験を行った後に、上記初期導通試験と同じ条件で電圧を印加した後、導通部の抵抗を測定することにより行った。測定の結果、導通部の抵抗の上昇が10%以下であれば良品とし、10%を超えていれば不良であるとした。その結果を表1に示す。なお、温度サイクル試験は、−55℃の30分間冷却、室温での10分間放置、及び125℃での30分間加熱を1サイクルとし、このサイクルを100回、300回、500回繰り返して行った。なお、熱サイクル試験結果を表す分数は、分子が不良サンプル数を示し、分母が全サンプル数(試験数)を示す。
-Thermal cycle test-
The obtained semiconductor device was subjected to a temperature cycle test in a range of −55 ° C. to 125 ° C., and then a voltage was applied under the same conditions as in the initial continuity test, and then the resistance of the conductive portion was measured. As a result of the measurement, a non-defective product was obtained if the increase in the resistance of the conductive portion was 10% or less, and it was considered defective if it exceeded 10%. The results are shown in Table 1. The temperature cycle test was performed by repeating the cycle 100 times, 300 times, and 500 times, with cooling at −55 ° C. for 30 minutes, standing at room temperature for 10 minutes, and heating at 125 ° C. for 30 minutes as one cycle. . In the fraction representing the thermal cycle test result, the numerator indicates the number of defective samples, and the denominator indicates the total number of samples (number of tests).

(実施例2)
ラジカル重合開始剤として、低温分解型のt−ヘキシルペルオキシ−2−エチルヘキサノアートの代わりに低温分解型のt−ブチルペルオキシ−2−エチルヘキサノアートを用いたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 2)
Example 1 except that low-temperature decomposition type t-butylperoxy-2-ethylhexanoate was used instead of low-temperature decomposition type t-hexylperoxy-2-ethylhexanoate as a radical polymerization initiator. Similarly, a semiconductor device was manufactured.

前記で得られた実施例2の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 2 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例3)
ラジカル重合開始剤として、低温分解型のt−ヘキシルペルオキシ−2−エチルヘキサノアートの代わりに中温分解型の2,3−ジメチル−2,3−ジフェニルブタンを用いたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 3)
Example 1 except that mesophilic decomposition type 2,3-dimethyl-2,3-diphenylbutane was used as a radical polymerization initiator instead of low temperature decomposition type t-hexylperoxy-2-ethylhexanoate. In the same manner, a semiconductor device was manufactured.

前記で得られた実施例3の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 3 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例4)
マイクロカプセル型のエポキシ系樹脂硬化剤の添加量を、エポキシ主剤100重量部に対して50重量部とする代わりにエポキシ主剤100重量部に対して40重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
Example 4
Example 1 except that the addition amount of the microcapsule-type epoxy resin curing agent was 40 parts by weight with respect to 100 parts by weight of the epoxy base instead of 50 parts by weight with respect to 100 parts by weight of the epoxy base. Similarly, a semiconductor device was manufactured.

前記で得られた実施例4の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 4 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例5)
マイクロカプセル型のエポキシ系樹脂硬化剤の添加量を、エポキシ主剤100重量部に対して50重量部とする代わりにエポキシ主剤100重量部に対して80重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 5)
Example 1 except that the addition amount of the microcapsule-type epoxy resin curing agent was 80 parts by weight with respect to 100 parts by weight of the epoxy base instead of 50 parts by weight with respect to 100 parts by weight of the epoxy base. Similarly, a semiconductor device was manufactured.

前記で得られた実施例5の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 5 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例6)
マイクロカプセル型のエポキシ系樹脂硬化剤の添加量を、エポキシ主剤100重量部に対して50重量部とする代わりにエポキシ主剤100重量部に対して100重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 6)
Example 1 except that the addition amount of the microcapsule type epoxy resin curing agent was 100 parts by weight with respect to 100 parts by weight of the epoxy base material instead of 50 parts by weight with respect to 100 parts by weight of the epoxy base material. Similarly, a semiconductor device was manufactured.

前記で得られた実施例6の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 6 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例7)
ラジカル重合が可能なモノマーとして、ウレタンアクリレートの代わりにエポキシアクリレートを用いたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 7)
A semiconductor device was fabricated in the same manner as in Example 1 except that epoxy acrylate was used instead of urethane acrylate as a monomer capable of radical polymerization.

前記で得られた実施例7の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 7 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例8)
ラジカル重合が可能なモノマーとして、ウレタンアクリレートの代わりに脂肪族アクリレートを用いたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 8)
A semiconductor device was fabricated in the same manner as in Example 1 except that aliphatic acrylate was used instead of urethane acrylate as a monomer capable of radical polymerization.

前記で得られた実施例8の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 8 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例9)
ラジカル重合が可能なモノマーとしてのウレタンアクリレートの添加量を、エポキシ主剤100重量部に対して100重量部とする代わりにエポキシ主剤100重量部に対して50重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
Example 9
Example 1 except that the addition amount of urethane acrylate as a monomer capable of radical polymerization was 50 parts by weight with respect to 100 parts by weight of the epoxy base material instead of 100 parts by weight with respect to 100 parts by weight of the epoxy base material In the same manner, a semiconductor device was manufactured.

前記で得られた実施例9の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 9 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例10)
ラジカル重合が可能なモノマーとしてのウレタンアクリレートの添加量を、エポキシ主剤100重量部に対して100重量部とする代わりにエポキシ主剤100重量部に対して70重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 10)
Example 1 except that the addition amount of urethane acrylate as a monomer capable of radical polymerization was set to 70 parts by weight with respect to 100 parts by weight of the epoxy base instead of 100 parts by weight with respect to 100 parts by weight of the epoxy base. In the same manner, a semiconductor device was manufactured.

前記で得られた実施例10の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 10 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(実施例11)
ラジカル重合が可能なモノマーとしてのウレタンアクリレートの添加量を、エポキシ主剤100重量部に対して100重量部とする代わりにエポキシ主剤100重量部に対して150重量部としたこと以外は、実施例1と同様にして半導体装置を作製した。
(Example 11)
Example 1 except that the addition amount of urethane acrylate as a monomer capable of radical polymerization was set to 150 parts by weight with respect to 100 parts by weight of the epoxy base instead of 100 parts by weight with respect to 100 parts by weight of the epoxy base. In the same manner, a semiconductor device was manufactured.

前記で得られた実施例11の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Example 11 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

(比較例1)
第1の組成物がラジカル重合が可能なモノマーを含んでいないと共に、第2の組成物がラジカル重合開始剤を含んでいないこと以外は、実施例1と同様にして半導体装置を作製した。
(Comparative Example 1)
A semiconductor device was fabricated in the same manner as in Example 1 except that the first composition did not contain a monomer capable of radical polymerization and the second composition did not contain a radical polymerization initiator.

前記で得られた比較例1の半導体装置について、実施例1と同様にして初期導通試験及び熱サイクル試験を行った。その結果を表1に示す。   The semiconductor device of Comparative Example 1 obtained above was subjected to an initial continuity test and a thermal cycle test in the same manner as in Example 1. The results are shown in Table 1.

表1において、実施例1〜11と比較例1とを比較することにより、接着剤が、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなると、初期導通試験及び熱サイクル試験の結果が良好であることが分かった。   In Table 1, by comparing Examples 1 to 11 with Comparative Example 1, the adhesive contains an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization. It was found that the results of the initial continuity test and the thermal cycle test were good when composed of a two-component adhesive of the composition 1 and the second composition containing a radical polymerization initiator.

表1において、実施例1〜3を比較することにより、ラジカル重合開始剤として、低温分解型のt−ヘキシルペルオキシ−2−エチルヘキサノアート又はt−ブチルペルオキシ−2−エチルヘキサノアートを用いると、初期導通試験及び熱サイクル試験の結果が特に良好であることが分かった。   In Table 1, by comparing Examples 1 to 3, low-temperature decomposition type t-hexylperoxy-2-ethylhexanoate or t-butylperoxy-2-ethylhexanoate is used as a radical polymerization initiator. The results of the initial continuity test and the thermal cycle test were found to be particularly good.

表1において、実施例1及び4〜6を比較することにより、エポキシ系樹脂硬化剤の添加量をエポキシ主剤100重量部に対して50〜80重量部とすると、初期導通試験及び熱サイクル試験の結果が特に良好であることが分かった。   In Table 1, when Examples 1 and 4 to 6 are compared, and the addition amount of the epoxy resin curing agent is 50 to 80 parts by weight with respect to 100 parts by weight of the epoxy base agent, the initial conduction test and the thermal cycle test are performed. The results have been found to be particularly good.

表1において、実施例1、7、及び8を比較することにより、ラジカル重合が可能なモノマーとしてウレタンアクリレート又はエポキシアクリレートを用いると、初期導通試験及び熱サイクル試験の結果が特に良好であることが分かった。   In Table 1, by comparing Examples 1, 7, and 8, when urethane acrylate or epoxy acrylate is used as a monomer capable of radical polymerization, the results of the initial continuity test and thermal cycle test are particularly good. I understood.

表1において、実施例1及び9〜11を比較することにより、ラジカル重合が可能なモノマーの添加量をエポキシ主剤100重量部に対して100重量部とすると、初期導通試験及び熱サイクル試験の結果が特に良好であることが分かった。   In Table 1, by comparing Examples 1 and 9 to 11, when the amount of the monomer capable of radical polymerization is 100 parts by weight with respect to 100 parts by weight of the epoxy base agent, the results of the initial conduction test and the thermal cycle test Was found to be particularly good.

ここで、本発明の好ましい態様を付記すると、以下の通りである。
(付記1) 半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法において、
前記回路配線基板の電極形成面に、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物を塗布する第1の塗布工程と、
前記半導体チップの電極形成面に、ラジカル重合開始剤を含む第2の組成物を塗布する第2の塗布工程と、
前記半導体チップの電極形成面と前記回路配線基板の電極形成面とを対向させ、前記塗布された第1の組成物と前記塗布された第2の組成物とを接触させる接触工程と、
前記エポキシ系樹脂を硬化させるエポキシ系樹脂硬化工程とを含むことを特徴とする半導体装置の製造方法。
(付記2) 半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法において、
前記半導体チップの電極形成面に、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物を塗布する第1の塗布工程と、
前記回路配線基板の電極形成面に、ラジカル重合開始剤を含む第2の組成物を塗布する第2の塗布工程と、
前記半導体チップの電極形成面と前記回路配線基板の電極形成面とを対向させ、前記塗布された第1の組成物と前記塗布された第2の組成物とを接触させる接触工程と、
前記エポキシ系樹脂を硬化させるエポキシ系樹脂硬化工程とを含むことを特徴とする半導体装置の製造方法。
(付記3) エポキシ系樹脂硬化工程において、ラジカル重合が可能なモノマーのラジカル重合反応において発生する反応熱によりカプセル膜が溶解してエポキシ系樹脂が硬化される付記1から2のいずれかに記載の半導体装置の製造方法。
(付記4) ラジカル重合が可能なモノマーが、ウレタンアクリレート及びエポキシアクリレートのいずれかを少なくとも含む付記1から3のいずれかに記載の半導体装置の製造方法。
(付記5) ラジカル重合が可能なモノマーの添加量が、エポキシ系樹脂に対して略等量の重量部である付記1から4のいずれかに記載の半導体装置の製造方法。
(付記6) ラジカル重合開始剤が、t−ヘキシルペルオキシ−2−エチルヘキサノアート及びt−ブチルペルオキシ−2−エチルヘキサノアートのいずれかを少なくとも含む付記1から5のいずれかに記載の半導体装置の製造方法。
(付記7) エポキシ系樹脂硬化剤が、イミダゾールである付記1から6のいずれかに記載の半導体装置の製造方法。
(付記8) カプセル膜で覆われたエポキシ系樹脂硬化剤の添加量が、エポキシ系樹脂100重量部に対して、50〜80重量部である付記1から7のいずれかに記載の半導体装置の製造方法。
(付記9) 半導体チップと回路配線基板とを接着する接着剤において、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなり、前記ラジカル重合が可能なモノマーのラジカル重合反応において発生する反応熱によって前記カプセル膜が溶解可能であることを特徴とする接着剤。
Here, it will be as follows if the preferable aspect of this invention is appended.
(Additional remark 1) In the manufacturing method of the semiconductor device which the electrode of a semiconductor chip and the electrode of a circuit wiring board are electrically connected via a bump, and have an adhesive between the semiconductor chip and the circuit wiring board,
A first application step of applying an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a first composition containing a monomer capable of radical polymerization to the electrode forming surface of the circuit wiring board;
A second application step of applying a second composition containing a radical polymerization initiator to the electrode forming surface of the semiconductor chip;
A contact step in which the electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board face each other, and the applied first composition and the applied second composition are brought into contact with each other;
A method for manufacturing a semiconductor device, comprising: an epoxy resin curing step for curing the epoxy resin.
(Additional remark 2) In the manufacturing method of the semiconductor device which the electrode of a semiconductor chip and the electrode of a circuit wiring board are electrically connected via a bump, and have an adhesive agent between the semiconductor chip and the circuit wiring board,
A first coating step of coating a first composition containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization on the electrode forming surface of the semiconductor chip;
A second application step of applying a second composition containing a radical polymerization initiator to the electrode forming surface of the circuit wiring board;
A contact step in which the electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board face each other, and the applied first composition and the applied second composition are brought into contact with each other;
A method for manufacturing a semiconductor device, comprising: an epoxy resin curing step for curing the epoxy resin.
(Supplementary note 3) In the epoxy resin curing step, the capsule resin is dissolved by the reaction heat generated in the radical polymerization reaction of the monomer capable of radical polymerization, whereby the epoxy resin is cured. A method for manufacturing a semiconductor device.
(Additional remark 4) The manufacturing method of the semiconductor device in any one of Additional remark 1 to 3 in which the monomer in which radical polymerization is possible contains at least one of urethane acrylate and epoxy acrylate.
(Additional remark 5) The manufacturing method of the semiconductor device in any one of Additional remark 1 to 4 whose addition amount of the monomer in which radical polymerization is possible is a substantially equivalent weight part with respect to an epoxy resin.
(Supplementary note 6) The semiconductor according to any one of supplementary notes 1 to 5, wherein the radical polymerization initiator includes at least one of t-hexylperoxy-2-ethylhexanoate and t-butylperoxy-2-ethylhexanoate. Device manufacturing method.
(Additional remark 7) The manufacturing method of the semiconductor device in any one of Additional remark 1 to 6 whose epoxy resin hardening | curing agent is imidazole.
(Additional remark 8) The addition amount of the epoxy resin hardening | curing agent covered with the capsule film | membrane is 50-80 weight part with respect to 100 weight part of epoxy resin, The semiconductor device in any one of Additional remark 1 to 7 Production method.
(Additional remark 9) In the adhesive agent which adhere | attaches a semiconductor chip and a circuit wiring board, the 1st composition containing the epoxy resin, the epoxy resin hardening | curing agent covered with the capsule film | membrane, and the monomer which can be radically polymerized, It consists of a two-component adhesive with a second composition containing a radical polymerization initiator, and the capsule membrane can be dissolved by reaction heat generated in the radical polymerization reaction of the monomer capable of radical polymerization. Adhesive.

本発明の半導体装置の製造方法は、半導体チップをフリップチップボンディングにより回路配線基板に実装する際、常温で(加熱されることなく)エポキシ系樹脂の硬化反応を促進させて半導体チップと回路配線基板との良好な接合を実現することができる。このため、フラッシュメモリ、DRAM、FRAM、等を初めとする各種半導体装置の製造に好適に使用することができる。
本発明の接着剤は、フラッシュメモリ、DRAM、FRAM、等を初めとする各種半導体装置の製造に好適に用いることができる。
The semiconductor device manufacturing method of the present invention promotes the curing reaction of the epoxy resin at room temperature (without being heated) when the semiconductor chip is mounted on the circuit wiring board by flip-chip bonding, and the semiconductor chip and the circuit wiring board. Can be realized. Therefore, it can be suitably used for manufacturing various semiconductor devices including flash memory, DRAM, FRAM and the like.
The adhesive of the present invention can be suitably used for the production of various semiconductor devices including flash memory, DRAM, FRAM and the like.

図1は、本発明の接着剤における第1の組成物を示す概略説明図である。FIG. 1 is a schematic explanatory view showing a first composition in the adhesive of the present invention. 図2Aは、本発明の半導体装置の製造方法を示す概略説明図である。FIG. 2A is a schematic explanatory view showing a method for manufacturing a semiconductor device of the present invention. 図2Bは、本発明の半導体装置を示す概略説明図である。FIG. 2B is a schematic explanatory view showing a semiconductor device of the present invention. 図3は、カプセル膜で覆われたエポキシ系樹脂硬化剤を示す断面図である。FIG. 3 is a cross-sectional view showing an epoxy resin curing agent covered with a capsule film. 図4Aは、従来の半導体装置の製造方法を示す概略説明図である。FIG. 4A is a schematic explanatory diagram illustrating a conventional method for manufacturing a semiconductor device. 図4Bは、従来の半導体装置を示す概略説明図である。FIG. 4B is a schematic explanatory view showing a conventional semiconductor device.

符号の説明Explanation of symbols

1 エポキシ系樹脂(エポキシ主剤)
2 カプセル膜で覆われたエポキシ系樹脂硬化剤(マイクロカプセル化されたエポキシ系樹脂硬化剤)
3 ラジカル重合が可能なモノマー
4 無機フィラ
5 カップリング剤
10 第1の組成物
11 回路配線基板
12 電極
13 第2の組成物
14 半導体チップ
15 バンプ
1 Epoxy resin (epoxy main agent)
2 Epoxy resin curing agent covered with capsule film (microencapsulated epoxy resin curing agent)
3 Monomer capable of radical polymerization 4 Inorganic filler 5 Coupling agent 10 First composition 11 Circuit wiring board 12 Electrode 13 Second composition 14 Semiconductor chip 15 Bump

Claims (7)

半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法において、
前記回路配線基板の電極形成面に、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物を塗布する第1の塗布工程と、
前記半導体チップの電極形成面に、ラジカル重合開始剤を含む第2の組成物を塗布する第2の塗布工程と、
前記半導体チップの電極形成面と前記回路配線基板の電極形成面とを対向させ、前記塗布された第1の組成物と前記塗布された第2の組成物とを接触させる接触工程と、
前記エポキシ系樹脂を硬化させるエポキシ系樹脂硬化工程とを含むことを特徴とする半導体装置の製造方法。
In the method of manufacturing a semiconductor device, wherein the electrode of the semiconductor chip and the electrode of the circuit wiring board are electrically connected via bumps, and an adhesive is provided between the semiconductor chip and the circuit wiring board.
A first application step of applying an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a first composition containing a monomer capable of radical polymerization to the electrode forming surface of the circuit wiring board;
A second application step of applying a second composition containing a radical polymerization initiator to the electrode forming surface of the semiconductor chip;
A contact step in which the electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board face each other, and the applied first composition and the applied second composition are brought into contact with each other;
A method for manufacturing a semiconductor device, comprising: an epoxy resin curing step for curing the epoxy resin.
半導体チップの電極と回路配線基板の電極とがバンプを介して電気的に接続され、前記半導体チップと前記回路配線基板との間に接着剤を有する半導体装置の製造方法において、
前記半導体チップの電極形成面に、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物を塗布する第1の塗布工程と、
前記回路配線基板の電極形成面に、ラジカル重合開始剤を含む第2の組成物を塗布する第2の塗布工程と、
前記半導体チップの電極形成面と前記回路配線基板の電極形成面とを対向させ、前記塗布された第1の組成物と前記塗布された第2の組成物とを接触させる接触工程と、
前記エポキシ系樹脂を硬化させるエポキシ系樹脂硬化工程とを含むことを特徴とする半導体装置の製造方法。
In the method of manufacturing a semiconductor device, wherein the electrode of the semiconductor chip and the electrode of the circuit wiring board are electrically connected via bumps, and an adhesive is provided between the semiconductor chip and the circuit wiring board.
A first coating step of coating a first composition containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization on the electrode forming surface of the semiconductor chip;
A second application step of applying a second composition containing a radical polymerization initiator to the electrode forming surface of the circuit wiring board;
A contact step in which the electrode forming surface of the semiconductor chip and the electrode forming surface of the circuit wiring board face each other, and the applied first composition and the applied second composition are brought into contact with each other;
A method for manufacturing a semiconductor device, comprising: an epoxy resin curing step for curing the epoxy resin.
エポキシ系樹脂硬化工程において、ラジカル重合が可能なモノマーのラジカル重合反応において発生する反応熱によりカプセル膜が溶解してエポキシ系樹脂が硬化される請求項1から2のいずれかに記載の半導体装置の製造方法。   3. The semiconductor device according to claim 1, wherein in the epoxy resin curing step, the capsule film is dissolved by the reaction heat generated in the radical polymerization reaction of the monomer capable of radical polymerization, and the epoxy resin is cured. Production method. ラジカル重合が可能なモノマーが、ウレタンアクリレート及びエポキシアクリレートのいずれかを少なくとも含む請求項1から3のいずれかに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein the monomer capable of radical polymerization contains at least one of urethane acrylate and epoxy acrylate. ラジカル重合開始剤が、t−ヘキシルペルオキシ−2−エチルヘキサノアート及びt−ブチルペルオキシ−2−エチルヘキサノアートのいずれかを少なくとも含む請求項1から4のいずれかに記載の半導体装置の製造方法。   The manufacturing of the semiconductor device according to claim 1, wherein the radical polymerization initiator includes at least one of t-hexylperoxy-2-ethylhexanoate and t-butylperoxy-2-ethylhexanoate. Method. エポキシ系樹脂硬化剤が、イミダゾールである請求項1から5のいずれかに記載の半導体装置の製造方法。   The method for manufacturing a semiconductor device according to claim 1, wherein the epoxy resin curing agent is imidazole. 半導体チップと回路配線基板とを接着する接着剤において、エポキシ系樹脂、カプセル膜で覆われたエポキシ系樹脂硬化剤、及びラジカル重合が可能なモノマーを含む第1の組成物と、ラジカル重合開始剤を含む第2の組成物との二液型の接着剤からなり、前記ラジカル重合が可能なモノマーのラジカル重合反応において発生する反応熱によって前記カプセル膜が溶解可能であることを特徴とする接着剤。   A first composition containing an epoxy resin, an epoxy resin curing agent covered with a capsule film, and a monomer capable of radical polymerization, and a radical polymerization initiator in an adhesive for bonding a semiconductor chip and a circuit wiring board An adhesive comprising: a two-component adhesive with a second composition comprising: the capsule film being soluble by reaction heat generated in a radical polymerization reaction of a monomer capable of radical polymerization .
JP2006326672A 2006-12-04 2006-12-04 Manufacturing method of semiconductor device and adhesive used in the method Expired - Fee Related JP4899095B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006326672A JP4899095B2 (en) 2006-12-04 2006-12-04 Manufacturing method of semiconductor device and adhesive used in the method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006326672A JP4899095B2 (en) 2006-12-04 2006-12-04 Manufacturing method of semiconductor device and adhesive used in the method

Publications (2)

Publication Number Publication Date
JP2008141035A true JP2008141035A (en) 2008-06-19
JP4899095B2 JP4899095B2 (en) 2012-03-21

Family

ID=39602185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006326672A Expired - Fee Related JP4899095B2 (en) 2006-12-04 2006-12-04 Manufacturing method of semiconductor device and adhesive used in the method

Country Status (1)

Country Link
JP (1) JP4899095B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2919261A1 (en) * 2014-03-11 2015-09-16 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method for hybridisation by gluing of two microelectronic elements
WO2019066946A1 (en) * 2017-09-29 2019-04-04 Intel Corporation Microelectronic package adhesives

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1129748A (en) * 1997-05-12 1999-02-02 Fujitsu Ltd Adhesive, adhesion, and mounted substrate board assembly
JPH11343465A (en) * 1998-06-01 1999-12-14 Fujitsu Ltd Adhesive, adhering method and assembly of packaging board
JP2002363255A (en) * 2001-06-06 2002-12-18 Sony Chem Corp Latent curing agent, method for producing latent curing agent and adhesive
JP2003253238A (en) * 2002-02-28 2003-09-10 Fujitsu Ltd Adhesive and method for joining electronic component using the same
JP2005197032A (en) * 2004-01-05 2005-07-21 Asahi Kasei Electronics Co Ltd Anisotropic conductive film

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1129748A (en) * 1997-05-12 1999-02-02 Fujitsu Ltd Adhesive, adhesion, and mounted substrate board assembly
JPH11343465A (en) * 1998-06-01 1999-12-14 Fujitsu Ltd Adhesive, adhering method and assembly of packaging board
JP2002363255A (en) * 2001-06-06 2002-12-18 Sony Chem Corp Latent curing agent, method for producing latent curing agent and adhesive
JP2003253238A (en) * 2002-02-28 2003-09-10 Fujitsu Ltd Adhesive and method for joining electronic component using the same
JP2005197032A (en) * 2004-01-05 2005-07-21 Asahi Kasei Electronics Co Ltd Anisotropic conductive film

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2919261A1 (en) * 2014-03-11 2015-09-16 Commissariat A L'energie Atomique Et Aux Energies Alternatives Method for hybridisation by gluing of two microelectronic elements
FR3018628A1 (en) * 2014-03-11 2015-09-18 Commissariat Energie Atomique METHOD FOR BONDING HYBRIDIZATION OF TWO MICROELECTRONIC ELEMENTS
WO2019066946A1 (en) * 2017-09-29 2019-04-04 Intel Corporation Microelectronic package adhesives

Also Published As

Publication number Publication date
JP4899095B2 (en) 2012-03-21

Similar Documents

Publication Publication Date Title
JPH1129748A (en) Adhesive, adhesion, and mounted substrate board assembly
JP6398619B2 (en) Pre-supplied underfill material, electronic component device, and method of manufacturing electronic component device
JP2020109173A (en) Adhesive composition and connection body
JPWO2019163861A1 (en) Manufacturing method of sealing resin composition, laminated sheet, cured product, semiconductor device and semiconductor device
JP5560544B2 (en) Adhesive composition, film adhesive, circuit connecting adhesive, connector, and semiconductor device
JP5844588B2 (en) Circuit connection material, connection method using the same, and connection structure
JPH11343465A (en) Adhesive, adhering method and assembly of packaging board
JP6593628B2 (en) Pre-supplied underfill material, cured product thereof, electronic component device using the same, and manufacturing method thereof
TWI282353B (en) Connection material and connection structure body
JP2010111846A (en) Adhesive composition, adhesive for connecting circuit and connected circuit body
JP2006128567A (en) Method of connecting semiconductor package to printed wiring board
JP4899095B2 (en) Manufacturing method of semiconductor device and adhesive used in the method
JP2005054140A (en) Adhesive composition, adhesive composition for connecting circuit, connected body and semiconductor device
JP2006096873A (en) Resin composition, method for assembling semiconductor device using the same, and the semiconductor device
JP2009256619A (en) Adhesive composition, adhesive for circuit connection, connected product, and semiconductor device
TWI781158B (en) Adhesive composition and structure
JP7276105B2 (en) Sheet-shaped resin composition for underfill, and semiconductor device using the same
JP2017117864A (en) First-supply type underfill material and cured product thereof, and electronic component device and manufacturing method thereof
JP2017014453A (en) Prior supply type underfill material, cured article thereof, electronic part device using the same and manufacturing method therefor
JP6631238B2 (en) Pre-supply type underfill material, cured product of pre-supply type underfill material, electronic component device, and method of manufacturing electronic component device
JP2017114962A (en) Prior-supply type underfill material, cured product of the same, electronic component device, and method for producing the same
JP6844685B2 (en) Pre-supplied underfill material and its cured product, electronic component equipment and its manufacturing method
CN108350341B (en) Adhesive composition and structure
JP6844680B2 (en) Manufacturing method of pre-supplied underfill material, cured product of pre-supplied underfill material, electronic component equipment and electronic component equipment
JP2013067726A (en) Adhesive composition for electronic material

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090810

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110819

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110823

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110914

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111004

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20111109

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20111129

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20111212

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150113

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees