JP7276105B2 - Sheet-shaped resin composition for underfill, and semiconductor device using the same - Google Patents

Sheet-shaped resin composition for underfill, and semiconductor device using the same Download PDF

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JP7276105B2
JP7276105B2 JP2019221871A JP2019221871A JP7276105B2 JP 7276105 B2 JP7276105 B2 JP 7276105B2 JP 2019221871 A JP2019221871 A JP 2019221871A JP 2019221871 A JP2019221871 A JP 2019221871A JP 7276105 B2 JP7276105 B2 JP 7276105B2
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resin
resin composition
sheet
semiconductor
semiconductor device
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JP2021093412A (en
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悠太 小林
昭弘 前田
和行 松村
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Toray Industries Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13075Plural core members
    • H01L2224/1308Plural core members being stacked
    • H01L2224/13082Two-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body

Description

本発明は、半導体チップを回路基板に電気的に接合もしくは接着する際や、半導体チップ同士を接合もしくは積層する際に用いられる樹脂組成物、その硬化物を含む半導体装置およびそれを用いた半導体装置の製造方法に関する。 The present invention relates to a resin composition used when electrically bonding or adhering a semiconductor chip to a circuit board or when bonding or laminating semiconductor chips together, a semiconductor device containing a cured product thereof, and a semiconductor device using the resin composition. related to the manufacturing method of

近年、半導体装置の高機能化や高性能化の目的で、半導体チップを基板上に3次元の積層構造や狭ギャップの配列構造のように高密度で実装する方法が用いられている。特にこのような高密度の実装では、複雑な工程におけるタクト短縮や工程安定化の観点からシート状の先貼りアンダーフィルを用いるフリップチップ実装が積極的に用いられる。 2. Description of the Related Art In recent years, in order to improve the functionality and performance of semiconductor devices, a method of mounting semiconductor chips on a substrate at a high density, such as a three-dimensional stacked structure or a narrow-gap array structure, has been used. In particular, in such high-density mounting, flip-chip mounting using a sheet-like pre-bonded underfill is actively used from the viewpoint of shortening the takt time in a complicated process and stabilizing the process.

シート状の先貼りアンダーフィルを用いるフリップチップ実装は、バンプと呼ばれる突起電極を有する半導体チップが複数形成されたウエハにアンダーフィル材を積層した後、ダイシングにより個別の半導体チップを取り出して熱圧着する方法が、タクトの観点から特に好ましく用いられる。位置合わせを行うためのアライメントマークは半導体チップの表面に形成されており、アンダーフィル材を透過して認識させる必要があるため、透明性を有する組成物が提案されている。(例えば特許文献1参照)
また、フリップチップ実装においては、熱圧着により、アンダーフィル材を流動させて基板の凹凸部へ充填する工程と、半導体チップ上に形成されたバンプと基板のパッド電極とをハンダを用いて接合する工程を連続して行う。これらの工程では、熱圧着により半導体チップは基板との間に介在するアンダーフィル材を半導体チップ外部に流出させながら基板に接近する。
Flip-chip mounting using a sheet-like pre-applied underfill involves stacking an underfill material on a wafer on which a plurality of semiconductor chips with protruding electrodes called bumps are formed, and then taking out individual semiconductor chips by dicing and bonding them by thermocompression. The method is particularly preferably used from the tact point of view. Alignment marks for alignment are formed on the surface of the semiconductor chip and must be recognized through the underfill material, so a transparent composition has been proposed. (See Patent Document 1, for example)
Further, in flip chip mounting, a step of filling the irregularities of the substrate by flowing an underfill material by thermocompression bonding, and bonding the bumps formed on the semiconductor chip and the pad electrodes of the substrate using solder. The steps are performed consecutively. In these steps, the semiconductor chip approaches the substrate by thermocompression while causing the underfill material interposed between the semiconductor chip and the substrate to flow out of the semiconductor chip.

国際公開第2016/093114号パンフレットInternational Publication No. 2016/093114 Pamphlet

半導体装置内の良好な電気的接合を得るためには、半導体チップが基板に対して一定の高さまで接近した際に距離を安定させてアンダーフィル材の流動を制御する設計が必要であるが、前記のような組成物を用いる場合でも、最新の狭ピッチ設計の半導体装置においては、アンダーフィル材の流動過多により流出したハンダにより電極間が短絡してしまう欠陥を生じる課題があった。 In order to obtain a good electrical connection in the semiconductor device, it is necessary to design the semiconductor chip to stabilize the distance when it approaches the substrate to a certain height and to control the flow of the underfill material. Even when such a composition is used, in the latest semiconductor devices designed with a narrow pitch, there has been a problem of short-circuiting between electrodes caused by solder flowing out due to excessive flow of the underfill material.

かかる状況に鑑み、本発明は、フリップチップ実装において熱圧着時に発生するハンダ流出を抑制し、半導体装置の安定した電気的接続を得ることが可能な樹脂組成物及びそれを用いた半導体装置を提供することを目的とする。 In view of such circumstances, the present invention provides a resin composition capable of suppressing solder outflow that occurs during thermocompression bonding in flip chip mounting and obtaining stable electrical connection of the semiconductor device, and a semiconductor device using the same. intended to

すなわち本発明は、基板と電気的に接続された半導体素子との間を充填するための熱硬化性のシート状樹脂組成物であって、250℃における飽和反力が0.20MPa以上であるシート状樹脂組成物である。 That is, the present invention provides a thermosetting sheet-shaped resin composition for filling between a substrate and a semiconductor element electrically connected thereto, the sheet having a saturated reaction force at 250° C. of 0.20 MPa or more. It is a shaped resin composition.

本発明によれば、フリップチップ実装において熱圧着時に発生するハンダ流出を抑制し、半導体装置の安定した電気的接続を得ることが可能な樹脂組成物及びそれを用いた半導体装置を得ることができる。 INDUSTRIAL APPLICABILITY According to the present invention, it is possible to obtain a resin composition capable of suppressing outflow of solder that occurs during thermocompression bonding in flip-chip mounting and to obtain stable electrical connection of a semiconductor device, and a semiconductor device using the same. .

本発明の樹脂組成物を用いて半導体製造装置を製造する方法の模式図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a schematic diagram of the method of manufacturing a semiconductor manufacturing apparatus using the resin composition of this invention. 半導体製造装置を製造する際に発生する不良の模式図である。It is a schematic diagram of a defect that occurs when manufacturing a semiconductor manufacturing apparatus. 飽和反力を測定する際に用いる積層体の模式図である。It is a schematic diagram of the laminated body used when measuring a saturated reaction force. 図3に示す積層体の押圧によって得られる荷重の一例を示す模式図である。4 is a schematic diagram showing an example of a load obtained by pressing the laminate shown in FIG. 3. FIG. 図4に示す荷重の測定値から飽和反力を求めるために使用するフィッティング関数を示す模式図である。FIG. 5 is a schematic diagram showing a fitting function used to obtain a saturated reaction force from the load measurement values shown in FIG. 4;

本発明の樹脂組成物は、基板と電気的に接続された半導体素子との間を充填するための熱硬化性のシート状樹脂組成物であって、250℃における飽和反力が0.20MPa以上であるシート状樹脂組成物である。 The resin composition of the present invention is a thermosetting sheet-shaped resin composition for filling between a substrate and a semiconductor element electrically connected thereto, and has a saturated reaction force at 250° C. of 0.20 MPa or more. It is a sheet-shaped resin composition.

本発明の好適な実施形態について以下に説明する。
本発明の樹脂組成物は、熱可塑性樹脂、熱硬化性樹脂、無機充填材を含む。熱可塑性樹脂は高分子化合物を用いることにより、フィルム状にする際の製膜性に優れる。高分子化合物とは、一般的に重量平均分子量で5,000以上500,000以下のものを言う。
Preferred embodiments of the invention are described below.
The resin composition of the present invention contains a thermoplastic resin, a thermosetting resin, and an inorganic filler. By using a polymer compound, the thermoplastic resin is excellent in film formability when it is formed into a film. A polymer compound generally means a compound having a weight average molecular weight of 5,000 or more and 500,000 or less.

熱可塑性樹脂としては、アクリル樹脂、フェノキシ樹脂、ポリエステル樹脂、ポリウレタン樹脂、ポリイミド樹脂、シロキサン変性ポリイミド樹脂、ポリベンゾオキサゾール樹脂、ポリアミド樹脂、ポリカーボネート樹脂、ポリブタジエン等が挙げられるが、これらに限定されない。これらを2種以上組み合わせてもよい。これらのうち、シランカップリング剤等の表面処理剤を用いて表面を疎水化処理された無機粒子の分散性が良好で、フィルムにした際の膜の透明性が高く、アライメントマークの認識が容易になる点から、フェノキシ樹脂が好ましい。また、実装後の信頼性に優れることから、ポリイミド樹脂が好ましい。 Examples of thermoplastic resins include, but are not limited to, acrylic resins, phenoxy resins, polyester resins, polyurethane resins, polyimide resins, siloxane-modified polyimide resins, polybenzoxazole resins, polyamide resins, polycarbonate resins, and polybutadiene. You may combine 2 or more types of these. Among these, inorganic particles whose surfaces have been hydrophobized using a surface treatment agent such as a silane coupling agent have good dispersibility, and the transparency of the film when made into a film is high, making alignment marks easy to recognize. Phenoxy resin is preferable because it becomes Moreover, polyimide resin is preferable because it is excellent in reliability after mounting.

熱可塑性樹脂の重量平均分子量の下限としては10,000以上であることが好ましい。また重量平均分子量の上限30,000以下であることが好ましい。 The lower limit of the weight average molecular weight of the thermoplastic resin is preferably 10,000 or more. Moreover, it is preferable that the upper limit of the weight average molecular weight is 30,000 or less.

熱可塑性樹脂が2種以上含まれる場合、そのうちのいずれも重量平均分子量が上記範囲であることが好ましい。重量平均分子量が10,000以上であれば、樹脂組成物の溶融粘度が低下し過ぎることによる流動過多を抑制できるだけでなく、硬化膜の機械強度が向上することでサーマルサイクル試験でのクラック発生等が抑制され、信頼性の高い半導体装置を得ることができる。一方、重量平均分子量が60,000以下であると、樹脂組成物の流動性が高くなり、半導体装置内の空隙への充填性が向上する。なお、本発明における高分子化合物の重量平均分子量は、ゲルパーミエーションクロマトグラフィー法(GPC法)によって測定し、ポリスチレン換算で算出する。 When two or more kinds of thermoplastic resins are contained, it is preferable that the weight average molecular weight of each of them is within the above range. When the weight-average molecular weight is 10,000 or more, not only can excessive flow due to excessively low melt viscosity of the resin composition be suppressed, but also the mechanical strength of the cured film is improved, resulting in the occurrence of cracks in a thermal cycle test. can be suppressed, and a highly reliable semiconductor device can be obtained. On the other hand, when the weight-average molecular weight is 60,000 or less, the fluidity of the resin composition is increased, and the fillability of voids in the semiconductor device is improved. In addition, the weight average molecular weight of the polymer compound in the present invention is measured by a gel permeation chromatography method (GPC method) and calculated in terms of polystyrene.

本発明の樹脂組成物に含まれる熱硬化性樹脂は、エポキシ化合物が好ましく、エポキシ化合物は一般に収縮を伴わない開環反応によって硬化するため、樹脂組成物の硬化時の収縮を低減することが可能となる。また重量平均分子量が100以上3,000以下であることにより、エポキシ化合物の反応性が高く、結果として硬化速度が速くなり、実装後のボイドを抑制することが可能となる。前記エポキシ化合物としては、エポキシ基を2個以上有するものや、エポキシ当量が100~500であるものが好ましい。エポキシ当量を100以上とすることで、硬化した樹脂組成物の靭性を高くすることができる。エポキシ当量を500以下とすることで、硬化した樹脂組成物の架橋密度が高くなり、耐熱性を向上することができる。なお、本発明におけるエポキシ化合物の重量平均分子量は、前記高分子化合物の重量平均分子量と同様に、ゲルパーミエーションクロマトグラフィー法(GPC法)によって測定し、ポリスチレン換算で算出する。 The thermosetting resin contained in the resin composition of the present invention is preferably an epoxy compound. Epoxy compounds generally cure by a ring-opening reaction that does not involve shrinkage, so shrinkage during curing of the resin composition can be reduced. becomes. Further, when the weight average molecular weight is 100 or more and 3,000 or less, the reactivity of the epoxy compound is high, and as a result, the curing speed is increased, and voids after mounting can be suppressed. As the epoxy compound, those having two or more epoxy groups and those having an epoxy equivalent of 100 to 500 are preferable. By setting the epoxy equivalent to 100 or more, the toughness of the cured resin composition can be increased. By setting the epoxy equivalent to 500 or less, the crosslink density of the cured resin composition is increased, and the heat resistance can be improved. The weight average molecular weight of the epoxy compound in the present invention is measured by gel permeation chromatography (GPC method) and calculated in terms of polystyrene in the same manner as the weight average molecular weight of the polymer compound.

また、本発明のエポキシ化合物は、液状エポキシ化合物と固形状エポキシ化合物の両方を含有していることが好ましい。液状エポキシ化合物を含有することで、樹脂組成物をフィルム状にした際に膜のクラックを抑制できる。固形状エポキシ化合物を含有することで、実装後のボイドの発生を抑制することができる。 Moreover, the epoxy compound of the present invention preferably contains both a liquid epoxy compound and a solid epoxy compound. By containing the liquid epoxy compound, cracks in the film can be suppressed when the resin composition is made into a film. By containing a solid epoxy compound, it is possible to suppress the generation of voids after mounting.

ここで液状エポキシ化合物とは、25℃、1.013×10N/mで150Pa・s以下の粘度を示すものであり、固形エポキシ化合物とは25℃で150Pa・sを越える粘度を示すものである。液状エポキシ化合物としては、例えばjER(登録商標)YL980、jER(登録商標)YL983U、jER(登録商標)152、jER(登録商標)630、jER(登録商標)YX8000(以上商品名、三菱化学(株)製)、EPICLON(登録商標)HP-4032(以上商品名、DIC(株)製)などが挙げられるが、これらに限定されない。これらを2種以上組み合わせてもよい。また、固形エポキシ化合物としては、jER(登録商標)1002、jER(登録商標)1001、jER(登録商標)YX4000H、jER(登録商標)4004P、jER(登録商標)5050、jER(登録商標)154、jER(登録商標)157S70、jER(登録商標)180S70、jER(登録商標)1032H60(以上商品名、三菱化学(株)製)、TEPIC(登録商標)S(以上商品名、日産化学工業(株)製)、エポトート(登録商標)YH-434L(商品名、新日鐵化学(株)製)、EPPN502H、NC3000(以上商品名、日本化薬(株)製)、EPICLON(登録商標)N695、EPICLON(登録商標)N865、EPICLON(登録商標)HP-7200、EPICLON(登録商標)HP-4700(以上商品名、DIC(株)製)などが挙げられるが、これらに限定されない。これらを2種以上組み合わせてもよい。 Here, the liquid epoxy compound indicates a viscosity of 150 Pa·s or less at 25°C and 1.013 × 10 5 N/m 2 , and the solid epoxy compound indicates a viscosity exceeding 150 Pa·s at 25°C. It is a thing. Liquid epoxy compounds include, for example, jER (registered trademark) YL980, jER (registered trademark) YL983U, jER (registered trademark) 152, jER (registered trademark) 630, jER (registered trademark) YX8000 (trade names, Mitsubishi Chemical Corporation ), EPICLON (registered trademark) HP-4032 (trade name, manufactured by DIC Corporation), and the like, but are not limited thereto. You may combine 2 or more types of these. In addition, as solid epoxy compounds, jER (registered trademark) 1002, jER (registered trademark) 1001, jER (registered trademark) YX4000H, jER (registered trademark) 4004P, jER (registered trademark) 5050, jER (registered trademark) 154, jER (registered trademark) 157S70, jER (registered trademark) 180S70, jER (registered trademark) 1032H60 (trade names, manufactured by Mitsubishi Chemical Corporation), TEPIC (registered trademark) S (trade names, Nissan Chemical Industries, Ltd.) ), Epotoot (registered trademark) YH-434L (trade name, manufactured by Nippon Steel Chemical Co., Ltd.), EPPN502H, NC3000 (trade name, manufactured by Nippon Kayaku Co., Ltd.), EPICLON (registered trademark) N695, EPICLON (Registered Trademark) N865, EPICLON (Registered Trademark) HP-7200, EPICLON (Registered Trademark) HP-4700 (these are trade names, manufactured by DIC Corporation), etc., but are not limited thereto. You may combine 2 or more types of these.

本発明の樹脂組成物は無機充填材を含有する。樹脂組成物への分散性を高める観点からシランカップリング剤等の表面処理剤を用いて表面を疎水化処理された無機粒子を用いることが好ましく、かつ平均粒子径が30~200nmであれば無機充填材による樹脂組成物中での可視光の散乱を抑制し透明性が確保され、アライメントマークの認識が可能になる。平均粒子径が30~200nmである無機粒子としては、フェニルシランカップリング剤により表面処理された無機粒子、例えばSciqas0.15μmフェニルシラン処理、Sciqas0.1μmフェニルシラン処理、Sciqas0.05μmフェニルシラン処理(以上商品名、堺化学工業(株)製)、YA050C(商品名、(株)アドマテックス製)、MEK-EC6150P(商品名、日産化学工業(株)製)を挙げることができる。 The resin composition of the present invention contains an inorganic filler. From the viewpoint of increasing the dispersibility in the resin composition, it is preferable to use inorganic particles whose surfaces have been hydrophobized using a surface treatment agent such as a silane coupling agent, and if the average particle diameter is 30 to 200 nm, inorganic Visible light scattering in the resin composition due to the filler is suppressed, transparency is ensured, and alignment marks can be recognized. The inorganic particles having an average particle diameter of 30 to 200 nm include inorganic particles surface-treated with a phenylsilane coupling agent, such as Sciqas 0.15 μm phenylsilane treatment, Sciqas 0.1 μm phenylsilane treatment, Sciqas 0.05 μm phenylsilane treatment (above (trade name, manufactured by Sakai Chemical Industry Co., Ltd.), YA050C (trade name, manufactured by Admatechs Co., Ltd.), and MEK-EC6150P (trade name, manufactured by Nissan Chemical Industries, Ltd.).

なお、無機粒子の平均粒子径とは、無機粒子が単独で存在した場合の粒子径を示し、観察された粒子径の平均の値をいう。形状が球状の場合はその直径を表し、楕円状および扁平状の場合は形状の最大長さを表す。さらにロッド状または繊維状の場合は長手方向の最大長さを表す。樹脂組成物中の無機粒子の平均粒子径を測定する方法としては、SEM(走査型電子顕微鏡)により直接粒子を観察し、100個の粒子の粒子径の平均を計算する方法により測定することができる。 The average particle size of the inorganic particles indicates the particle size when the inorganic particles are present alone, and means the average value of the observed particle sizes. If the shape is spherical, it represents its diameter, and if it is elliptical or flat, it represents the maximum length of the shape. Furthermore, in the case of a rod-like or fibrous shape, it represents the maximum length in the longitudinal direction. As a method for measuring the average particle size of the inorganic particles in the resin composition, the particles are directly observed with a SEM (scanning electron microscope), and the average particle size of 100 particles is calculated. can.

平均粒子径が30~200nmである無機粒子に用いられる無機粒子としては、例えば、タルク、焼成クレー、未焼成クレー、マイカ、ガラス等のケイ酸塩、酸化チタン、アルミナ、シリカ等の酸化物、炭酸カルシウム、炭酸マグネシウム等の炭酸塩、水酸化アルミニウム、水酸化マグネシウム、水酸化カルシウム等の水酸化物、硫酸バリウム、硫酸カルシウム、亜硫酸カルシウム等の硫酸塩または亜硫酸塩、ホウ酸亜鉛、メタホウ酸バリウム、ホウ酸アルミニウム、ホウ酸カルシウム、ホウ酸ナトリウム等のホウ酸塩、窒化アルミニウム、窒化ホウ素、窒化ケイ素等の窒化物等を挙げることができる。これらの無機粒子は複数種含有してもよいが、信頼性およびコストの点から、シリカまたは酸化チタンが好ましい。 Examples of inorganic particles used for inorganic particles having an average particle size of 30 to 200 nm include talc, calcined clay, uncalcined clay, mica, silicates such as glass, oxides such as titanium oxide, alumina, and silica, Carbonates such as calcium carbonate and magnesium carbonate, hydroxides such as aluminum hydroxide, magnesium hydroxide and calcium hydroxide, sulfates or sulfites such as barium sulfate, calcium sulfate, calcium sulfite, zinc borate, barium metaborate , borates such as aluminum borate, calcium borate and sodium borate, and nitrides such as aluminum nitride, boron nitride and silicon nitride. A plurality of these inorganic particles may be contained, but silica or titanium oxide is preferred from the viewpoint of reliability and cost.

無機粒子の含有量は、溶剤を除いた樹脂組成物の有機物全量に対して45質量部以上であることが好ましく、50質量部以上であることがより好ましい。45質量部以上であれば、樹脂組成物の溶融粘度が低下し過ぎることによる流動過多を抑制できるだけでなく、樹脂組成物とした際に実装後のボイドの発生を抑制することができ、さらには硬化物とした際の線膨張係数が低下し、半導体装置の接続信頼性を高めることができる。また、無機粒子同士の凝集が抑制され、樹脂組成物の流動性が良く、実装後の接合部のハンダの濡れ性が向上する点から、70質量%以下であることが好ましく、65質量部以下であることがより好ましい。 The content of the inorganic particles is preferably 45 parts by mass or more, more preferably 50 parts by mass or more, relative to the total amount of organic matter in the resin composition excluding the solvent. If it is 45 parts by mass or more, it is possible not only to suppress excessive flow due to excessive decrease in the melt viscosity of the resin composition, but also to suppress the generation of voids after mounting when the resin composition is formed. The coefficient of linear expansion when cured is lowered, and the connection reliability of the semiconductor device can be improved. In addition, the amount is preferably 70% by mass or less, and 65 parts by mass or less, because aggregation of inorganic particles is suppressed, the fluidity of the resin composition is good, and the wettability of the solder at the joint after mounting is improved. is more preferable.

本発明の樹脂組成物は、硬化促進剤を含有することが好ましい。硬化促進剤が、樹脂組成物に溶解せずに存在することで、エポキシ化合物の硬化反応が遅くなり、室温下での保存性が向上する点から、硬化促進剤粒子が好ましい。また、硬化促進剤粒子としてイミダゾール系硬化促進剤粒子を用いると、エポキシ樹脂の硬化速度が速く、実装後のボイドを抑制することが可能となるため好ましい。このような硬化促進剤粒子としては、キュアゾール(登録商標)2PZCNS、キュアゾール(登録商標)2PZCNS-PW、キュアゾール(登録商標)C11Z-CNS、キュアゾール(登録商標)2MZ-A、キュアゾール(登録商標)C11-A、キュアゾール(登録商標)2E4MZ-A、キュアゾール(登録商標)2MZA-PW、キュアゾール(登録商標)2MAOK-PW、キュアゾール(登録商標)2PHZ-PW(以上商品名、四国化成工業(株)製)などが好ましく用いられる。 The resin composition of the present invention preferably contains a curing accelerator. Curing accelerator particles are preferred because the presence of the curing accelerator in the resin composition without dissolving slows the curing reaction of the epoxy compound and improves storage stability at room temperature. Further, it is preferable to use imidazole-based curing accelerator particles as the curing accelerator particles, because the curing speed of the epoxy resin is high, and voids after mounting can be suppressed. Examples of such curing accelerator particles include Curezol (registered trademark) 2PZCNS, Curezol (registered trademark) 2PZCNS-PW, Curezol (registered trademark) C11Z-CNS, Curezol (registered trademark) 2MZ-A, and Curezol (registered trademark) C11. -A, Curezol (registered trademark) 2E4MZ-A, Curezol (registered trademark) 2MZA-PW, Curezol (registered trademark) 2MAOK-PW, Curezol (registered trademark) 2PHZ-PW (the above trade names, manufactured by Shikoku Kasei Kogyo Co., Ltd.) ) and the like are preferably used.

硬化促進剤粒子の平均粒子径の下限としては0.1μm以上であることが好ましく、0.15μm以上であることがより好ましい。また平均粒子径の上限としては2μm以下であることが好ましく、1μm以下であることがより好ましい。ここで平均粒子径とは硬化促進剤粒子が単独で存在した場合の平均粒子径を示すものをいう。硬化促進剤粒子の形状が球状の場合はその直径を表し、楕円状および扁平状の場合は形状の最大長さを表す。さらに形状がロッド状または繊維状の場合は長手方向の最大長さを表す。平均粒子径を測定する方法としては、SEM(走査型電子顕微鏡)により直接粒子を観察し、100個の粒子の粒子径の平均を計算する方法により測定することができる。平均粒子径が2μm以下であると、硬化促進剤の比表面積が大きくなり、エポキシ化合物の硬化反応が進行し易く、実装中により効果的に溶融した樹脂組成物の流動を制御できる。 The lower limit of the average particle size of the curing accelerator particles is preferably 0.1 μm or more, more preferably 0.15 μm or more. The upper limit of the average particle size is preferably 2 μm or less, more preferably 1 μm or less. Here, the average particle size means the average particle size when the hardening accelerator particles exist alone. When the shape of the curing accelerator particles is spherical, it represents the diameter, and when it is oval or flat, it represents the maximum length of the shape. Furthermore, when the shape is rod-like or fibrous, it represents the maximum length in the longitudinal direction. As a method for measuring the average particle size, particles can be directly observed with a SEM (scanning electron microscope), and the average particle size of 100 particles can be calculated. When the average particle size is 2 μm or less, the specific surface area of the curing accelerator increases, the curing reaction of the epoxy compound proceeds easily, and the flow of the molten resin composition can be controlled more effectively during mounting.

本発明の樹脂組成物は金属表面の酸化物を除去しハンダの濡れ性を向上する化合物としてフラックス化合物を含んでいることが好ましい。フラックス化合物としては、カルボキシル基を2個以上含有している酸変性ロジンが好ましい。このため酸変性ロジンはエポキシ化合物と反応し、密度の高い網目構造を形成し、耐熱性を向上することができる。酸変性ロジンとしては、パインクリスタル(登録商標)KE-604、パインクリスタル(登録商標)KR-120、マルキード(登録商標)No.33(以上商品名、荒川化学工業(株)製)が挙げられる。なお、酸変性ロジンは、その化合物の嵩高い構造と酸変性により生成した嵩高い環構造を有しており、これがカルボキシル基へのエポキシの反応を立体的に阻害し、樹脂組成物の室温下での保存性が向上する。一方でハンダ融点付近の200℃から250℃の温度では、酸変性ロジンの分子運動性が高まり、ハンダ表面や接合金属表面の酸化皮膜を除去し接合部のハンダの濡れ性が向上する。 The resin composition of the present invention preferably contains a flux compound as a compound that removes oxides from the metal surface and improves solder wettability. As the flux compound, an acid-modified rosin containing two or more carboxyl groups is preferred. Therefore, the acid-modified rosin reacts with the epoxy compound to form a network structure with high density and improve heat resistance. Examples of acid-modified rosins include Pine Crystal (registered trademark) KE-604, Pine Crystal (registered trademark) KR-120, Marquid (registered trademark) No. 33 (all trade names, manufactured by Arakawa Chemical Industries, Ltd.). The acid-modified rosin has a bulky structure of the compound and a bulky ring structure generated by the acid modification, which sterically inhibits the reaction of the epoxy to the carboxyl group, and the resin composition is kept at room temperature. Improves storability in On the other hand, at a temperature of 200° C. to 250° C. near the melting point of the solder, the molecular mobility of the acid-modified rosin increases, removing the oxide film on the solder surface and the joint metal surface, thereby improving the wettability of the solder at the joint.

本発明の樹脂組成物は、さらにイオン補足剤、界面活性剤、シランカップリング剤、有機染料、無機顔料などを含有しても良い。 The resin composition of the present invention may further contain ion scavengers, surfactants, silane coupling agents, organic dyes, inorganic pigments and the like.

本発明の樹脂組成物は、溶媒を用いて前記樹脂組成物を溶解したワニス状溶液を剥離性基材上に塗布および脱溶媒してフィルムにして用いる。 The resin composition of the present invention is used in the form of a film by applying a varnish-like solution in which the resin composition is dissolved using a solvent onto a peelable substrate and removing the solvent.

溶媒としては、ケトン系溶剤のアセトン、メチルエチルケトン、メチルイソブチルケトン、シクロペンタノン、シクロヘキサノン;エーテル系溶剤の1,4-ジオキサン、テトラヒドロフラン、ジグライム;グリコールエーテル系溶剤のメチルセロソルブ、エチルセロソルブ、プロピレングリコールモノメチルエーテル、プロピレングリコールモノエチルエーテル、プロピレングリコールモノブチルエーテル、ジエチレングリコールメチルエチルエーテル;その他ベンジルアルコール、N-メチルピロリドン、γ-ブチロラクトン、酢酸エチル、N,N-ジメチルホルムアミドなどを単独あるいは2種以上混合して使用することができるが、これらに限られない。 Examples of solvents include ketone solvents such as acetone, methyl ethyl ketone, methyl isobutyl ketone, cyclopentanone and cyclohexanone; ether solvents such as 1,4-dioxane, tetrahydrofuran and diglyme; glycol ether solvents such as methyl cellosolve, ethyl cellosolve and propylene glycol monomethyl. Ether, propylene glycol monoethyl ether, propylene glycol monobutyl ether, diethylene glycol methyl ethyl ether; benzyl alcohol, N-methylpyrrolidone, γ-butyrolactone, ethyl acetate, N,N-dimethylformamide, etc. alone or in combination of two or more. can be used, but are not limited to:

剥離性基材としては、ポリプロピレンフィルム、ポリエチレンテレフタレートフィルム、ポリエチレンナフタレートフィルム、ポリエステルフィルム、ポリ塩化ビニルフィルム、ポリカーボネートフィルム、ポリイミドフィルム、ポリテトラフルオロエチレンフィルム等のフッ素樹脂フィルム、ポリフェニレンサルファイドフィルム、ポリプロピレンフィルム、ポリエチレンフィルム等が挙げられるが、これらに限られない。また、剥離性基材はシリコーン系離型剤、長鎖アルキル系離型剤、フッ素系離型剤、脂肪族アミド系離型剤等により離型処理が施されていてもよい。剥離性基材の厚みは、特に限定されないが、通常5~75μmのものが好ましい。また、樹脂組成物の離型性基材を有する面とは反対側の面にさらに別の剥離性基材をラミネートして、剥離性基材で上下を挟まれたシート状樹脂組成物にすることが好ましい。別の剥離性基材の材質および厚みとしては、先に説明したものと同様のものを用いることができる。両方の剥離性基材が同一のものであっても構わない。 Peelable substrates include fluororesin films such as polypropylene film, polyethylene terephthalate film, polyethylene naphthalate film, polyester film, polyvinyl chloride film, polycarbonate film, polyimide film, and polytetrafluoroethylene film, polyphenylene sulfide film, and polypropylene film. , polyethylene film, etc., but not limited to these. In addition, the release substrate may be subjected to release treatment with a silicone-based release agent, a long-chain alkyl-based release agent, a fluorine-based release agent, an aliphatic amide-based release agent, or the like. The thickness of the peelable base material is not particularly limited, but usually 5 to 75 μm is preferable. Further, another release substrate is laminated on the surface of the resin composition opposite to the surface having the release substrate to form a sheet-shaped resin composition sandwiched between the release substrates. is preferred. As the material and thickness of the other release substrate, the same materials as those described above can be used. Both release substrates may be the same.

また、溶媒を用いて樹脂組成物を溶解したワニス状溶液は、半導体ウエハや回路基板などに塗布および脱溶媒してシート状態を得ることもできる。 Also, a varnish-like solution obtained by dissolving a resin composition using a solvent can be applied to a semiconductor wafer, a circuit board, or the like, and the solvent can be removed to obtain a sheet state.

本発明の樹脂組成物は、半導体装置に用いられる半導体素子、回路基板、金属配線材料等の回路部材同士の接着または固定や半導体素子の封止のための半導体用樹脂組成物として好適に使用することができる。 The resin composition of the present invention is suitably used as a semiconductor resin composition for bonding or fixing circuit members such as semiconductor elements used in semiconductor devices, circuit boards, and metal wiring materials, and for encapsulating semiconductor elements. be able to.

本発明の半導体装置は、上記樹脂組成物の硬化物または上記樹脂組成物フィルムの硬化物を含む。本発明でいう半導体装置とは、半導体素子の特性を利用することで機能しうる装置全般を指す。半導体素子を基板に接続したものや、半導体素子同士または基板同士を接続したもの、電気光学装置、半導体回路基板および電子機器は全て半導体装置に含まれる。 The semiconductor device of the present invention includes a cured product of the above resin composition or a cured product of the above resin composition film. The term "semiconductor device" as used in the present invention refers to all devices that can function by utilizing the characteristics of semiconductor elements. Semiconductor devices include semiconductor devices connected to substrates, semiconductor devices connected to each other or substrates connected to each other, electro-optical devices, semiconductor circuit boards, and electronic devices.

本発明の半導体装置の製造方法は、第一の回路部材と第二の回路部材の間に上記樹脂組成物または上記樹脂組成物フィルムを介在させ、加熱加圧により前記第一の回路部材と前記第二の回路部材を電気的に接続することを特徴とする。 In the method for manufacturing a semiconductor device of the present invention, the resin composition or the resin composition film is interposed between a first circuit member and a second circuit member, and the first circuit member and the resin composition film are heated and pressurized. It is characterized by electrically connecting the second circuit member.

本発明の樹脂組成物を用いた半導体装置の製造方法の一例は以下の通りである。まず、第一の接続端子を有する第一の回路部材と、第二の接続端子を有する第二の回路部材とを準備する。ここで、回路部材とは、半導体チップ、抵抗体チップ、コンデンサチップ等のチップ部品、TSV(スルーシリコンビア)電極を有する半導体チップやシリコンインターポーザー、ガラスエポキシ回路基板、フィルム回路基板等の基板等が挙げられる。また、接続端子としては、めっきバンプやスタッドバンプなどのバンプ電極や、パッド電極などが挙げられる。また、第一の回路部材および/または第二の回路部材に貫通電極が形成され部材の片面および/または両面に接続端子が形成されていてもよい。 An example of a method for manufacturing a semiconductor device using the resin composition of the present invention is as follows. First, a first circuit member having first connection terminals and a second circuit member having second connection terminals are prepared. Here, the circuit members include chip parts such as semiconductor chips, resistor chips, and capacitor chips, substrates such as semiconductor chips and silicon interposers having TSV (through silicon via) electrodes, glass epoxy circuit boards, and film circuit boards. is mentioned. Further, the connection terminals include bump electrodes such as plated bumps and stud bumps, and pad electrodes. Further, through electrodes may be formed on the first circuit member and/or the second circuit member, and connection terminals may be formed on one side and/or both sides of the member.

第一の回路部材と第二の回路部材とを、第一の接続端子と第二の接続端子が対向するように配置する。次に、前記対向配置した第一の接続端子と第二の接続端子の間に本発明の樹脂組成物を介在させる。そして、第一の回路部材と第二の回路部材とを加熱加圧して、前記対向配置した第一の接続端子と第二の接続端子を電気的に接続させる。この工程によって、第一の回路部材と第二の回路部材とが、しっかりと電気的に接続されるとともに、樹脂組成物が硬化して、第一の回路部材と第二の回路部材とが物理的に固定される。 The first circuit member and the second circuit member are arranged so that the first connection terminal and the second connection terminal face each other. Next, the resin composition of the present invention is interposed between the first connecting terminal and the second connecting terminal arranged opposite to each other. Then, the first circuit member and the second circuit member are heated and pressurized to electrically connect the first connecting terminal and the second connecting terminal arranged opposite to each other. By this step, the first circuit member and the second circuit member are firmly electrically connected, and the resin composition is cured to physically connect the first circuit member and the second circuit member. fixed.

ここで、樹脂組成物は、先にいずれかの回路部材の接続端子側の面のみに付与してもよいし、第一および第二の回路部材の接続端子側の両方の面に付与してもよい。 Here, the resin composition may first be applied only to the connection terminal side surface of one of the circuit members, or may be applied to both the connection terminal side surfaces of the first and second circuit members. good too.

より詳細な実施態様の例として、第一の回路部材としてバンプを有する半導体チップを、第二の回路部材として配線パターンを有する回路基板または半導体チップとを用い、両者を本発明の樹脂組成物フィルムを介して接続し、第一の回路部材と第二の回路部材との間の空隙を樹脂組成物で封止して半導体装置を作製する方法について説明する。 As an example of a more detailed embodiment, a semiconductor chip having bumps is used as the first circuit member, and a circuit board or semiconductor chip having a wiring pattern is used as the second circuit member, and the resin composition film of the present invention is used for both. A method for manufacturing a semiconductor device by connecting the first circuit member and the second circuit member with a resin composition will be described.

まず、樹脂組成物フィルムを、回路基板または半導体チップに貼り付ける。このとき、樹脂組成物フィルムは、所定の大きさに切り出した後で、配線パターンが形成された回路基板の配線パターン面または半導体チップのバンプ形成面に貼り付けてもよい。また、半導体ウエハのバンプ形成面にシート状樹脂組成物を貼り付けた後、半導体ウエハをダイシングして個片化することによって、シート状樹脂組成物が貼り付いた半導体チップを作製してもよい。前記シート状樹脂組成物の厚さは充填する空間の体積に基づいて任意に設定できるが、成膜の安定性の観点で10μm以上、フリップチップ実装で作製される半導体装置に求められるパッケージ高さの観点から60μm以下が特に好ましい
次に、半導体チップを、半導体チップ上のバンプと、回路基板の対応する配線パターンとが対向するように配置し、ボンディング装置を用いて、両者を加熱加圧する。加熱加圧条件は、電気的接続が良好に得られる範囲であれば特に限定されるものではないが、樹脂組成物の硬化を行うためには、温度100℃以上、圧力0.10MPa以上、時間0.1秒以上の加熱加圧が必要であるが、好ましい温度は120℃以上300℃以下、より好ましくは150℃以上260℃以下、好ましい荷重は0.10MPa以上4.00MPa以下、より好ましくは0.20MPa以上2.00MPa以下、好ましい圧着時間は1秒以上60秒以下、より好ましくは、2秒以上20秒以下でのボンディング条件で行う。また、ボンディング時に、仮圧着として、温度50℃以上、荷重0.10MPa以上、時間0.1秒以上の加熱加圧により、半導体チップ上のバンプと回路基板上の配線パターンとを接触させた後、上記の条件でボンディングを行ってもよい。
First, a resin composition film is attached to a circuit board or a semiconductor chip. At this time, the resin composition film may be cut into a predetermined size and then attached to the wiring pattern surface of the circuit board on which the wiring pattern is formed or the bump forming surface of the semiconductor chip. Alternatively, semiconductor chips to which the sheet-like resin composition is attached may be produced by attaching the sheet-like resin composition to the bump-formed surface of the semiconductor wafer and then dicing the semiconductor wafer into individual pieces. . The thickness of the sheet-shaped resin composition can be arbitrarily set based on the volume of the space to be filled, but from the viewpoint of film formation stability, the package height required for a semiconductor device manufactured by flip chip mounting is 10 μm or more. Next, the semiconductor chip is placed so that the bumps on the semiconductor chip and the corresponding wiring patterns on the circuit board face each other, and the two are heated and pressurized using a bonding apparatus. The heating and pressurizing conditions are not particularly limited as long as good electrical connection can be obtained. Heating and pressurizing for 0.1 second or more is necessary, and the preferred temperature is 120° C. or higher and 300° C. or lower, more preferably 150° C. or higher and 260° C. or lower, and the preferred load is 0.10 MPa or higher and 4.00 MPa or lower, more preferably. The bonding is performed under bonding conditions of 0.20 MPa or more and 2.00 MPa or less, preferably 1 second or more and 60 seconds or less, more preferably 2 seconds or more and 20 seconds or less. Further, during bonding, the bumps on the semiconductor chip and the wiring pattern on the circuit board are brought into contact with each other by heating and pressurizing at a temperature of 50° C. or more, a load of 0.10 MPa or more, and a time of 0.1 seconds or more as temporary pressure bonding. , bonding may be performed under the above conditions.

本発明の樹脂組成物は、この他にも、ダイアタッチフィルム、ダイシングダイアタッチフィルム、リードフレーム固定テープ、放熱板、補強板、シールド材の樹脂組成物、ソルダーレジスト等を作製するための接着性樹脂材料として使用することができる。 The resin composition of the present invention also has adhesion properties for producing die attach films, dicing die attach films, lead frame fixing tapes, radiator plates, reinforcing plates, resin compositions for shielding materials, solder resists, and the like. It can be used as a resin material.

本発明の回路部材接続用樹脂組成物を用いて半導体チップと回路基板を接続する際、二段階の加熱加圧工程を行うことによって良好な接続を得ることができる。第一の加熱加圧工程では、加熱により樹脂の溶融粘度を十分に低下させ、半導体チップ上のバンプと回路基板上の配線パターンとを接触させることが求められるが、温度が高温すぎる場合は熱硬化性樹脂の硬化が進行によりバンプと電極間の樹脂の排除ができなくなる。従って第一の加熱加圧工程の加熱温度は80℃~200℃であることが好ましく、80℃から160℃であることが更に好ましい。第一の加熱加圧工程の圧力は、半導体チップの回路へのダメージを軽減するため、半導体チップ面積に対して0.10~1.00MPaであることが好ましく、0.10~0.50MPa程度が良好に作業できるためより好ましい。
加熱時間はボイドを十分に排除しつつ、熱硬化性樹脂が硬化しすぎないため、0.1~10秒であることが好ましい。最も好ましい加熱加圧条件は150℃、1.0秒、0.50MPaである。
When connecting a semiconductor chip and a circuit board using the resin composition for circuit member connection of the present invention, good connection can be obtained by performing a two-step heating and pressurizing process. In the first heating and pressurizing step, it is required to sufficiently lower the melt viscosity of the resin by heating so that the bumps on the semiconductor chip and the wiring pattern on the circuit board are brought into contact. As the curing of the curable resin progresses, it becomes impossible to remove the resin between the bumps and the electrodes. Therefore, the heating temperature in the first heating/pressurizing step is preferably 80°C to 200°C, more preferably 80°C to 160°C. The pressure in the first heating and pressurizing step is preferably 0.10 to 1.00 MPa with respect to the semiconductor chip area in order to reduce damage to the circuit of the semiconductor chip, and is about 0.10 to 0.50 MPa. is more preferable because it can work well.
A heating time of 0.1 to 10 seconds is preferred in order to sufficiently eliminate voids while not over-curing the thermosetting resin. The most preferable heating and pressing conditions are 150° C., 1.0 seconds, and 0.50 MPa.

第二の加熱加圧工程ははんだを溶融し、バンプと電極間を金属結合するための条件であり、はんだ溶融温度以上の温度が必要であり、一般的に230~260℃の温度が必要である。加圧条件は第一の加熱加圧工程と同様、半導体回路の保護のため0.20~4.00MPaが好ましく、0.20~2.00MPa程度が良好に作業できるためより好ましい。加熱時間は加圧解放後にスプリングバックで半導体チップが押し戻されて、スプリングバック起因のボイドが発生しない程度まで樹脂の凝集力を高める必要があり、2~10秒であることが好ましい。最も好ましい加熱加圧条件は250℃、10秒、1.50MPaである。 The second heating and pressurizing step is a condition for melting the solder and forming a metallic bond between the bump and the electrode, and requires a temperature higher than the melting temperature of the solder, generally 230 to 260°C. be. As in the first heating and pressurizing step, the pressure conditions are preferably 0.20 to 4.00 MPa for the protection of the semiconductor circuit, and more preferably about 0.20 to 2.00 MPa for good workability. The heating time is preferably 2 to 10 seconds because it is necessary to increase the cohesive force of the resin to such an extent that the semiconductor chip is pushed back by springback after the pressure is released and voids due to springback do not occur. The most preferable heating and pressing conditions are 250° C., 10 seconds, and 1.50 MPa.

以下に、本発明を実施例に基づいて具体的に説明するが、本発明はこれに限定されるものではない。 EXAMPLES The present invention will be specifically described below based on Examples, but the present invention is not limited to these.

<高分子化合物の重量平均分子量>
高分子化合物をテトラヒドロフランに溶解して濃度0.1重量%の溶液を調整して、測定サンプルとした。下に示す構成のGPC装置Waters e2695(Waters(株)製)を用いて、ポリスチレン換算の重量平均分子量を算出した。GPC測定条件は、移動相をテトラヒドロフランとし、流量を1.0mL/分とした。また、カラムはカラムオーブンを用いて30℃に加温した。
検出器:Waters2998PDA
システムコントローラー:Waters2690
カラム:TSKgel GguardcolimnHXL-L
カラム:TSKgel G4000HXL
カラム:TSKgel G1000HXL
<飽和反力の評価>
1.2mm厚のガラス板上に、表1に示される組成に従って調合され、得られた厚さ30μmの樹脂シートをラミネートし、ボンディング装置(東レエンジニアリング(株)製FC3000WS)のステージにセットする。次に7mm□にダイシングされた150μm厚のベアシリコンチップを80℃のボンダーヘッドに吸着させ、シリコンチップ全体が前記樹脂シート上を覆うように位置を合わせて熱圧着した。圧着条件は接触前の降下速度0.3mm/秒、コンタクト温度180℃、接触後の第一の加圧工程では10N、温度180℃、1.0秒押下した。次いで第二の加圧工程では80℃/秒で昇温して250℃まで加熱し、250℃に達した1.0秒後、ボンダーヘッドをZ位置制御により0.3秒間で10μm押下した。この時、ヘッドで検知される反力による荷重の値は、10μmの押下完了直後にピークを取り、その後樹脂の流動による応力緩和に伴い一定値もしくは最小値をとる。10μmの押下完了直後の2.0秒以内の一定値もしくは最小値を飽和反力とした。
<Weight Average Molecular Weight of Polymer Compound>
A polymer compound was dissolved in tetrahydrofuran to prepare a solution having a concentration of 0.1% by weight, which was used as a measurement sample. A GPC apparatus Waters e2695 (manufactured by Waters Co., Ltd.) having the configuration shown below was used to calculate the weight average molecular weight in terms of polystyrene. GPC measurement conditions were a mobile phase of tetrahydrofuran and a flow rate of 1.0 mL/min. The column was also heated to 30°C using a column oven.
Detector: Waters 2998 PDA
System controller: Waters2690
Column: TSKgel GguardcolimnH XL -L
Column: TSKgel G4000H XL
Column: TSKgel G1000H XL
<Evaluation of saturated reaction force>
A resin sheet having a thickness of 30 μm prepared according to the composition shown in Table 1 was laminated on a glass plate having a thickness of 1.2 mm, and set on the stage of a bonding apparatus (FC3000WS manufactured by Toray Engineering Co., Ltd.). Next, a 150 μm-thick bare silicon chip diced to 7 mm square was adsorbed to a bonder head at 80° C., and was aligned and thermocompression bonded so that the entire silicon chip covered the resin sheet. Crimping conditions were 0.3 mm/sec descending speed before contact, 180° C. contact temperature, and 10 N, 180° C. temperature, and 1.0 sec pressure in the first pressure step after contact. Then, in the second pressurizing step, the temperature was raised at 80° C./second to 250° C., and 1.0 second after reaching 250° C., the bonder head was pressed down by 10 μm for 0.3 seconds by Z position control. At this time, the value of the load due to the reaction force detected by the head reaches a peak immediately after the depression of 10 μm is completed, and then takes a constant value or a minimum value as the stress relaxes due to the flow of the resin. A constant value or a minimum value within 2.0 seconds immediately after the completion of pressing of 10 μm was taken as the saturated reaction force.

<流動時定数の評価>
飽和反力の評価同様の資材及び構成を用いて熱圧着条件のみを変更して熱圧着した。圧着条件は接触前の降下速度0.3mm/秒、コンタクト温度180℃、接触後の第一の加圧工程では10N、温度180℃、1.0秒押下した。次いで第二の加圧工程では180℃を1.0秒保持後、ボンダーヘッドをZ位置制御により0.3秒間で10μm押下した。この時、ヘッドで検知される反力による荷重の値は、10μmの押下完了直後にピークを取り、その後樹脂の流動による応力緩和に伴い一定値もしくは最小値をとる。荷重ピーク値をフィッティング範囲の開始点として、2.0秒以内で、一定値もしくは最小値に至った点を終点とするフィッティング範囲を定義し、このフィッティング範囲を関数Ae-(t-T)/τ+B(A、Bはそれぞれ任意の係数、定数、tは時間、Tは時間方向のシフトを与える任意の定数)を用いてフィッティングさせたときのτを流動時定数とした。なお、荷重の変化が1秒間に2%未満となった時点で一定値に至ったと判断した。フィッティングの手順としては、荷重がピークとなった時刻が(t-T)=0となるように設定し、この時の関数Ae-(t-T)/τ+Bの値がピーク値と同一となるようA,Bを設定する。前記フィッティング範囲において、関数Ae-(t-T)/τ+Bとヘッドで検知される反力による荷重の値との差の積分値が最小となるτを流動時定数とする。 <実装性評価用半導体装置の作製>
樹脂組成物の実装性の評価は、以下のようにして行った。各実施例および比較例で作製した樹脂フィルムから保護フィルムを剥離した後、該接着剤組成物フィルムを、ラミネート装置((株)ニッコーマテリアルズ、CVP-300T)を用いて、銅ピラーバンプ付きTEGチップ((株)ウォルツ製、WALTS-TEG CC80-0101JY)の銅ピラーバンプ形成面に貼り合せた。そして、基材フィルムを剥離し、接着剤組成物付きの評価用半導体チップを作製した。その後、フリップチップボンディング装置(東レエンジニアリング(株)製、FC-3000WS)を用いて、被着体となる基板((株)ウォルツ製、WALTS-KIT CC80-0102JY[MAP]_ModelI(Cu+OSP仕様))にフリップチップボンディングを行った。フリップチップボンディングの条件は、80℃に加熱されたステージ上に基板を置き、温度140℃、荷重25N、時間1秒の条件で仮圧着した後、温度250℃、圧力100N、時間10秒にして本圧着を行った。
<Evaluation of flow time constant>
Thermocompression bonding was performed by changing only the thermocompression bonding conditions using the same material and structure as in the evaluation of the saturated reaction force. Crimping conditions were 0.3 mm/sec descending speed before contact, 180° C. contact temperature, and 10 N, 180° C. temperature, and 1.0 sec pressure in the first pressure step after contact. Next, in the second pressurizing step, after holding the temperature at 180° C. for 1.0 second, the bonder head was pressed down by 10 μm for 0.3 seconds by Z position control. At this time, the value of the load due to the reaction force detected by the head reaches a peak immediately after the depression of 10 μm is completed, and then takes a constant value or a minimum value as the stress relaxes due to the flow of the resin. With the load peak value as the starting point of the fitting range, within 2.0 seconds, define the fitting range with the point reaching a constant value or the minimum value as the end point, this fitting range function Ae-(tT) / τ when fitted using τ+B (A and B are arbitrary coefficients and constants, t is time, and T is an arbitrary constant that gives a shift in the time direction) was taken as the flow time constant. In addition, it was judged that a constant value was reached when the load change was less than 2% per second. As a fitting procedure, the time when the load peaks is set to be (tT) = 0, and the value of the function Ae-(tT) / τ + B at this time is the same as the peak value Set A and B as follows. In the fitting range, the flow time constant is τ that minimizes the integrated value of the difference between the function Ae-(tT)/τ+B and the value of the load due to the reaction force detected by the head. <Fabrication of semiconductor device for mountability evaluation>
Evaluation of mountability of the resin composition was performed as follows. After peeling off the protective film from the resin film prepared in each example and comparative example, the adhesive composition film was laminated using a laminator (Nikko Materials Co., Ltd., CVP-300T) to a TEG chip with copper pillar bumps. (manufactured by Waltz Co., Ltd., WALTS-TEG CC80-0101JY). Then, the substrate film was peeled off, and a semiconductor chip for evaluation with the adhesive composition was produced. After that, using a flip chip bonding device (FC-3000WS, manufactured by Toray Engineering Co., Ltd.), a substrate to be an adherend (WALTS Co., Ltd., WALTS-KIT CC80-0102JY[MAP]_ModelI (Cu + OSP specification)) was flip-chip bonded. The conditions for flip-chip bonding are as follows: place the substrate on a stage heated to 80° C.; temporarily press-bond under the conditions of temperature of 140° C., load of 25 N, and time of 1 second; Final crimping was performed.

<はんだフローの評価>
実装性評価用半導体装置の作製の手順に従い得られた半導体装置をX線非破壊検査装置(松定プレシジョン(株)、μnRAY7600)を用いて、はんだフローの観察を行った。はんだフローの評価は、流出したはんだの距離が10μm以下である場合を◎とし、20μm以上を×、その間を○とした。流出したはんだの距離はそのはんだが形成されたバンプから最も離れているはんだの端部とバンプの中心との距離である。
<Evaluation of solder flow>
A semiconductor device obtained according to the procedure for manufacturing a semiconductor device for evaluating mountability was observed for solder flow using an X-ray non-destructive inspection device (μnRAY7600, Matsusada Precision Co., Ltd.). Solder flow was evaluated as ⊚ when the distance of the flowed solder was 10 μm or less, x when 20 μm or more, and ◯ between the distances. The spilled solder distance is the distance between the edge of the solder furthest from the bump on which it is formed and the center of the bump.

<ボイドの評価>
実装性評価用半導体装置の作製の手順に従い得られた半導体装置を超音波映像装置((株)日立パワーソリューションズ製、FS300III)を用いて、ボイドの観察を行った。ボイドの評価は、チップ面積に占めるボイドの割合を測定し、2%以下である場合を◎とし、5%以上を×、その間を○とした
<樹脂組成物の構成成分>
各実施例および比較例で用いたポリイミドは以下のとおり合成した。
<Void evaluation>
Voids were observed in the semiconductor device obtained according to the procedure for manufacturing a semiconductor device for evaluation of mountability using an ultrasonic imaging device (FS300III, manufactured by Hitachi Power Solutions Co., Ltd.). Evaluation of voids was carried out by measuring the percentage of voids in the chip area, and rating 2% or less as ⊚, 5% or more as ×, and the rest as ○.
The polyimide used in each example and comparative example was synthesized as follows.

ポリイミド合成例1
乾燥窒素気流下、1,3-ビス(3-アミノフェノキシ)ベンゼン 4.82g(0.0165モル)、3,3’-ジアミノ-4,4’-ジヒドロキシジフェニルスルホン 3.08g(0.011モル)、1,3-ビス(3-アミノプロピル)テトラメチルジシロキサン 4.97g(0.02モル)、および、末端封止剤としてアニリン0.47g(0.005モル)をNMP130gに溶解した。ここに2,2-ビス{4-(3,4-ジカルボキシフェノキシ)フェニル}プロパン二無水物 26.02g(0.05モル)をNMP20gとともに加えて、25℃で1時間反応させ、次いで50℃で4時間撹拌した。その後、180℃で5時間撹拌した。撹拌終了後、溶液を水3Lに投入し、ろ過して沈殿を回収し、水で3回洗浄した後、真空乾燥機を用いて150℃20時間乾燥した。得られたポリマー固体の赤外吸収スペクトルを測定したところ、1780cm-1付近、1377cm-1付近にポリイミドに起因するイミド構造の吸収ピークが検出された。また、得られたポリイミドの重量平均分子量は18000であった。
Polyimide synthesis example 1
4.82 g (0.0165 mol) of 1,3-bis(3-aminophenoxy)benzene and 3.08 g (0.011 mol) of 3,3'-diamino-4,4'-dihydroxydiphenylsulfone were placed under a stream of dry nitrogen. ), 4.97 g (0.02 mol) of 1,3-bis(3-aminopropyl)tetramethyldisiloxane, and 0.47 g (0.005 mol) of aniline as a terminal blocking agent were dissolved in 130 g of NMP. To this, 26.02 g (0.05 mol) of 2,2-bis{4-(3,4-dicarboxyphenoxy)phenyl}propane dianhydride was added together with 20 g of NMP, reacted at 25° C. for 1 hour, and then C. for 4 hours. After that, the mixture was stirred at 180° C. for 5 hours. After stirring, the solution was poured into 3 L of water, filtered to collect the precipitate, washed with water three times, and dried at 150° C. for 20 hours using a vacuum dryer. When the infrared absorption spectrum of the obtained polymer solid was measured, absorption peaks of an imide structure due to polyimide were detected near 1780 cm −1 and 1377 cm −1 . Moreover, the weight average molecular weight of the obtained polyimide was 18,000.

ポリイミド合成例2
洗浄後の乾燥条件を80℃20時間とした以外はポリイミド合成例1と同様に合成を行った。得られたポリイミドの重量平均分子量は9000であった。
Polyimide synthesis example 2
Synthesis was carried out in the same manner as in Polyimide Synthesis Example 1, except that the drying conditions after washing were set to 80° C. for 20 hours. The weight average molecular weight of the resulting polyimide was 9,000.

その他に、各実施例および比較例で用いた構成成分は、以下のとおりである。
jER1256(商品名、フェノキシ樹脂、重量平均分子量50000、三菱化学(株)製)
jER4110P(商品名、フェノキシ樹脂、重量平均分子量30000、三菱化学(株)製)
jER4007P(商品名、フェノキシ樹脂、重量平均分子量20000、三菱化学(株)製)
jERYL-980(商品名、液状エポキシ化合物、重量平均分子量370、三菱化学(株)製)
jER1032H60(商品名、固形状エポキシ化合物、重量平均分子量525、三菱化学(株)製)
KR-120(商品名、酸変性ロジン100%、荒川化学工業(株)製)
Sciqas0.15μmフェニルシラン処理(商品名、シリカ、平均粒子径150nm、フェニルシランカップリング表面処理、堺化学工業(株)製)
2MAOK-PW(商品名、イミダゾール系硬化促進剤粒子、四国化成工業(株)製)
実施例1~4および比較例1~5
(1)樹脂組成物フィルムの作製方法
表1に示される成分を表1に記載の組成比で混合して、樹脂組成物ワニスを作製した。有機溶剤として、シクロヘキサノンを使用し、溶媒以外の添加物を固形分として、固形分濃度が53%である樹脂組成物ワニスとした。作製した樹脂組成物ワニスを、スリットダイコーター(塗工機)を用いて、剥離性基材である厚さ38μmのポリエチレンテレフタレートフィルムの表面処理面に塗布し、100℃で10分間乾燥を行った。これにより得られた乾燥後の厚みが30μmのシート状樹脂組成物上にダイシングテープ(G-64H、ポリオレフィン基材、リンテック(株)製)の粘着面を貼り合わせ、基材フィルムと保護フィルムに挟まれた構造の樹脂組成物フィルムを得た。この際、ダイシングテープが基材フィルム、ポリエチレンテレフタレートフィルムが保護フィルムとして機能する。得られた樹脂組成物フィルムを用いて、前記のようにはんだフローの評価、ボイドの評価を実施した。結果を表1に示す。
In addition, the components used in each example and comparative example are as follows.
jER1256 (trade name, phenoxy resin, weight average molecular weight 50000, manufactured by Mitsubishi Chemical Corporation)
jER4110P (trade name, phenoxy resin, weight average molecular weight 30000, manufactured by Mitsubishi Chemical Corporation)
jER4007P (trade name, phenoxy resin, weight average molecular weight 20000, manufactured by Mitsubishi Chemical Corporation)
jERYL-980 (trade name, liquid epoxy compound, weight average molecular weight 370, manufactured by Mitsubishi Chemical Corporation)
jER1032H60 (trade name, solid epoxy compound, weight average molecular weight 525, manufactured by Mitsubishi Chemical Corporation)
KR-120 (trade name, acid-denatured rosin 100%, manufactured by Arakawa Chemical Industries, Ltd.)
Sciqas 0.15 μm phenylsilane treatment (trade name, silica, average particle size 150 nm, phenylsilane coupling surface treatment, manufactured by Sakai Chemical Industry Co., Ltd.)
2MAOK-PW (trade name, imidazole curing accelerator particles, manufactured by Shikoku Kasei Kogyo Co., Ltd.)
Examples 1-4 and Comparative Examples 1-5
(1) Method for Producing Resin Composition Film The components shown in Table 1 were mixed at the composition ratio shown in Table 1 to produce a resin composition varnish. Cyclohexanone was used as an organic solvent, and a resin composition varnish having a solid content concentration of 53% was prepared by taking additives other than the solvent as solid content. The prepared resin composition varnish was applied to the surface-treated surface of a polyethylene terephthalate film having a thickness of 38 μm, which is a peelable substrate, using a slit die coater (coating machine), and dried at 100° C. for 10 minutes. . The adhesive surface of a dicing tape (G-64H, polyolefin base, manufactured by Lintec Corporation) is attached to the sheet-shaped resin composition having a thickness of 30 μm after drying, and the base film and the protective film are attached. A resin composition film having a sandwiched structure was obtained. At this time, the dicing tape functions as a base film, and the polyethylene terephthalate film functions as a protective film. Using the obtained resin composition film, evaluation of solder flow and evaluation of voids were carried out as described above. Table 1 shows the results.

Figure 0007276105000001
Figure 0007276105000001

本発明の樹脂組成物は、パソコン、携帯端末に使用される電子部品もしくは放熱板とプリント基板もしくはフレキシブル基板との接着、および基板同士の接着に用いられる樹脂組成物として利用できる。さらにIC、LSI等半導体チップをフレキシブル基板、ガラスエポキシ基板、ガラス基板、セラミックス基板などの回路基板に接着あるいは直接電気的接合する際に用いられる半導体用樹脂組成物として好適に利用可能である。 INDUSTRIAL APPLICABILITY The resin composition of the present invention can be used as a resin composition for adhesion between electronic parts or heat sinks used in personal computers and portable terminals and printed boards or flexible boards, and for adhesion between boards. Furthermore, it can be suitably used as a semiconductor resin composition for bonding or directly electrically connecting semiconductor chips such as ICs and LSIs to circuit substrates such as flexible substrates, glass epoxy substrates, glass substrates and ceramics substrates.

1 半導体チップ
2 バンプ
3a はんだ
3b はんだフローによりショートしたはんだ
4 アンダーフィルシート
5 基板
6 パッド
7 ヒートツール
8 ステージ
9 ボンダーヘッド
10 ボイド
11 ボンダーヘッドで検出される荷重
12 フィッティング関数
1 Semiconductor chip 2 Bump 3a Solder 3b Solder shorted by solder flow 4 Underfill sheet 5 Substrate 6 Pad 7 Heat tool 8 Stage 9 Bonder head 10 Void 11 Load detected at bonder head 12 Fitting function

Claims (2)

基板と電気的に接続された半導体素子との間を充填するためのアンダーフィル用のシート状樹脂組成物であって、
250℃における飽和反力が0.20MPa以上であり、
熱硬化性樹脂、熱可塑性樹脂および無機充填材を含有し、樹脂組成物全体を100重量部としたとき、該無機充填材の含有量が45重量部以上であり、
前記熱可塑性樹脂が複数の樹脂成分からなり、いずれの成分も重量平均分子量が10000以上かつ、60000以下であり、
前記複数の樹脂成分が、少なくともポリイミド樹脂を有し、さらにアクリル樹脂、フェノキシ樹脂、ポリエステル樹脂、ポリウレタン樹脂、シロキサン変性ポリイミド樹脂、ポリベンゾオキサゾール樹脂、ポリアミド樹脂、ポリカーボネート樹脂、ポリブタジエンからなる群より選ばれる少なくとも1つを有し、
前記熱硬化性樹脂が、エポキシ化合物である、シート状樹脂組成物。
A sheet-shaped resin composition for underfill for filling between a substrate and a semiconductor element electrically connected,
Saturation reaction force at 250 ° C. is 0.20 MPa or more,
It contains a thermosetting resin, a thermoplastic resin and an inorganic filler, and the content of the inorganic filler is 45 parts by weight or more when the entire resin composition is 100 parts by weight,
The thermoplastic resin is composed of a plurality of resin components, and each component has a weight average molecular weight of 10000 or more and 60000 or less,
The plurality of resin components has at least a polyimide resin, and is selected from the group consisting of an acrylic resin, a phenoxy resin, a polyester resin, a polyurethane resin, a siloxane-modified polyimide resin, a polybenzoxazole resin, a polyamide resin, a polycarbonate resin, and a polybutadiene. having at least one
The sheet-shaped resin composition , wherein the thermosetting resin is an epoxy compound.
基板と電気的に接続された半導体素子とを備える半導体装置の製造方法であって、
請求項に記載のシート状樹脂組成物を用いて、該基板と該半導体素子の間を充填するための工程を含む半導体装置の製造方法。
A method of manufacturing a semiconductor device comprising a semiconductor element electrically connected to a substrate, comprising:
A method of manufacturing a semiconductor device, comprising a step of filling a space between the substrate and the semiconductor element using the sheet-shaped resin composition according to claim 1 .
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JP2014107320A (en) 2012-11-26 2014-06-09 Toray Ind Inc Semiconductor device manufacturing method
WO2015107990A1 (en) 2014-01-15 2015-07-23 東レ株式会社 Adhesive composition and adhesive film having same, substrate provided with adhesive composition, and semiconductor device and method for manufacturing same
WO2017090439A1 (en) 2015-11-24 2017-06-01 リンテック株式会社 Resin sheet for connecting circuit members
WO2017195304A1 (en) 2016-05-11 2017-11-16 日立化成株式会社 Liquid resin composition for encapsulation and electronic component/device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014107320A (en) 2012-11-26 2014-06-09 Toray Ind Inc Semiconductor device manufacturing method
WO2015107990A1 (en) 2014-01-15 2015-07-23 東レ株式会社 Adhesive composition and adhesive film having same, substrate provided with adhesive composition, and semiconductor device and method for manufacturing same
WO2017090439A1 (en) 2015-11-24 2017-06-01 リンテック株式会社 Resin sheet for connecting circuit members
WO2017195304A1 (en) 2016-05-11 2017-11-16 日立化成株式会社 Liquid resin composition for encapsulation and electronic component/device

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