JP2008124340A - Thin film transistor, and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce stress of a substrate due to a metal film for source/drain electrode in order to improve production yield of an element. <P>SOLUTION: A thin film transistor is provided with the substrate, a semiconductor layer which is positioned on the substrate and has a source/drain region and a channel region, a gate insulating film positioned on the substrate including the semiconductor layer, a gate electrode positioned on the gate insulating film so that it corresponds to a channel region of the semiconductor layer, an interlayer insulating film which is positioned on the substrate including the gate electrode and has a contact hole connected to the source/drain region of the semiconductor layer and a source/drain electrode connected to the source/drain region through the contact hole. The source/drain electrode has a first metal film, a second metal film and a metal oxide film installed between them. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a thin film transistor and a method of manufacturing the same, and more particularly, to reduce the stress of a substrate due to a metal film for a source / drain electrode, which occurs when a thin film transistor of an organic light emitting display is manufactured, and to manufacture a device. The present invention relates to a thin film transistor and a method for manufacturing the same.

A general organic electroluminescent element includes an anode, an organic light emitting layer located on the anode, and a cathode located on the organic light emitting layer. In the organic electroluminescent device, when a voltage is applied between the anode and the cathode, holes are injected from the anode into the organic light emitting layer, and electrons are injected from the cathode into the organic light emitting layer. Injected. The holes and electrons injected into the organic light emitting layer are recombined in the organic light emitting layer to generate excitons, and light is emitted while these excitons transition from the excited state to the ground state. It will be released.

  In general, the organic light emitting display is divided into a passive matrix method and an active matrix method according to a method of driving N × M pixels arranged in a matrix.

  In the active matrix method, a pixel electrode defining a light emitting region and a unit pixel driving circuit for applying a current or voltage to the pixel electrode are located in the unit pixel region. The unit pixel driving circuit includes at least one thin film transistor, and thus can display a stable luminance by supplying a constant current regardless of the number of pixels of the organic light emitting display device. It has the advantages of low power consumption and advantageous for high resolution and large display applications.

  FIG. 1 is a cross-sectional view illustrating a thin film transistor of an organic light emitting display and a manufacturing method thereof according to the related art.

  Referring to FIG. 1, after forming a buffer layer 11 on a substrate 10, a semiconductor layer 12 is formed on the buffer layer 11.

  A gate insulating film 13 is stacked on the semiconductor layer 12, and a gate electrode 15 is formed on the gate insulating film 13 so as to correspond to a predetermined region of the semiconductor layer 12.

  Next, impurity ions are implanted into the semiconductor layer 12 using the gate electrode 15 as a mask to form source / drain regions 12a and 12b. At the same time, a channel region 12c interposed between the source / drain regions 12a and 12b is formed. Define.

  Next, an interlayer insulating film 16 is formed over the entire top of the substrate including the gate electrode 15, and contact holes 17 are formed in the interlayer insulating film 16 to expose the source / drain regions 12a and 12b by etching. Form.

  Next, a source / drain electrode metal film is laminated on the interlayer insulating film 16 and patterned to form source / drain electrodes 18a, 18b that are in contact with the source / drain regions 12a, 12b. Then, the manufacture of the thin film transistor is completed.

  2A and 2B are cross-sectional views schematically showing a conventional metal film for source / drain electrodes.

  Referring to FIG. 2A, the source / drain electrodes are formed of a metal such as molybdenum (Mo), tungsten (W), molybdenum / tungsten (MoW), or titanium (Ti). It is characterized by being laminated by sputtering at a high temperature and crystallized in a columnar form with a certain direction during lamination.

  Therefore, after stacking the source / drain metal film using a metal such as molybdenum, as shown in FIG. 2B, the substrate is stressed by the change in the direction of the metal film and the coefficient of thermal expansion due to the temperature drop. In response, the substrate bends.

Such a phenomenon frequently occurs as the thickness of the substrate gradually decreases, and further, when a photoresist is applied on the metal film in order to pattern the metal film, the substrate may be damaged. There is a problem.
Korean Patent No. 0507343 Korean Patent Application Publication No. 2002-90215

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to reduce the stress on the substrate due to the metal film for the source / drain electrodes and improve the manufacturing yield of the device. An object of the present invention is to provide a thin film transistor and a method for manufacturing the same.

  In order to achieve the above object, a thin film transistor according to one embodiment of the present invention is provided on a substrate, a semiconductor layer located on the substrate, having a source / drain region and a channel region, and a substrate including the semiconductor layer. Corresponding to the channel region of the semiconductor layer, the gate electrode positioned on the gate insulating film, the substrate including the gate electrode, and the source / drain region of the semiconductor layer An interlayer insulating film having a contact hole to be connected; and a source / drain electrode connected to a source / drain region through the contact hole, wherein the source / drain electrode includes a first metal film and a second metal. It has a film and a metal oxide film interposed between them.

  According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: providing a substrate; forming a semiconductor layer having a source / drain region and a channel region on the substrate; and the semiconductor layer. Forming a gate insulating film on the substrate; forming a gate electrode on the gate insulating film so as to correspond to a channel region of the semiconductor layer; and forming the semiconductor layer on the substrate including the gate electrode. Forming an interlayer insulating film having a contact hole connected to the source / drain region, forming a first metal film to be connected to the source / drain region through the contact hole, and Forming a metal oxide film on one metal film; forming a second metal film on the metal oxide film; and the first metal film, the metal oxide film, and the second metal film. Etched, characterized in that it comprises the steps of forming a source / drain electrode.

  The present invention can reduce the stress on the substrate due to the metal film for the source / drain electrodes. Therefore, the present invention can improve the reliability of the thin film transistor itself and improve the manufacturing yield of the organic light emitting display device.

(Example)
Hereinafter, a method of manufacturing a thin film transistor according to the present invention will be described with reference to the accompanying drawings.

  FIG. 3 is a cross-sectional view illustrating a thin film transistor of an organic light emitting display according to the present invention and a method of manufacturing the same.

As shown in FIG. 3, the buffer layer 110 is formed on the substrate 100. The buffer layer 110 is formed to protect a thin film transistor to be formed in a subsequent process from impurities flowing out of the substrate 100. The silicon oxide film (SiO ₂ ), the silicon nitride film (SiNx) Formed selectively using laminated bilayers.

  Next, a semiconductor layer 120 is formed on the buffer layer 110. The semiconductor layer 120 is formed by forming an amorphous silicon layer on the buffer layer 110, and then performing ELA (Excimer Laser Annealing), SLS (Sequential Lateral Solidification), MIC (Metal Induced Crystallization), or MILC (Metal Induced Lateral Crystallization). It is preferable to form a polycrystalline silicon layer that is crystallized using a method and patterned.

Next, a gate insulating layer 130 is formed over the entire top of the substrate including the semiconductor layer 120. The gate insulating layer 130 may be formed of a silicon oxide film, a silicon nitride film, or a double layer thereof. By forming the gate insulating film 130 with a silicon oxide film, a silicon nitride film, or a double layer thereof having excellent interface characteristics with the semiconductor layer 120, the withstand voltage of the gate insulating film 130 can be improved. Mobile charge
Thus, the electrical characteristics of the thin film transistor can be improved.

  A gate electrode 150 corresponding to a predetermined region of the semiconductor layer 120 is formed on the gate insulating layer 130. The gate electrode 150 may be formed using any one of molybdenum / tungsten (MoW), molybdenum (Mo), tungsten (W), and aluminum (Al).

  Next, impurity ions are implanted into the semiconductor layer 120 using the gate electrode 150 as a mask to form source / drain regions 120a and 120b. At the same time, a channel region 120c interposed between the source / drain regions 120a and 120b is formed. Define.

  The impurity ions may be n-type impurities or p-type impurities. The n-type impurity can be selected from the group consisting of phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi). The p-type impurity can be selected from the group consisting of boron (B), aluminum (Al), potassium (Ga), and indium (In).

  An interlayer insulating layer 160 is formed over the entire substrate including the gate electrode 150. The interlayer insulating film 160 may be formed of a silicon oxide film, a silicon nitride film, or a double layer thereof. The interlayer insulating layer 160 is laminated by performing a method such as PECVD or LPCVD.

  Next, contact holes 170 exposing the source / drain regions 120a and 120b are formed in the interlayer insulating film 160 by etching.

Next, a first metal film 180 a is stacked on the interlayer insulating film 160 including the contact hole 170. The first metal film 180a can be formed using a metal material such as molybdenum (Mo), tungsten (W), molybdenum-tungsten (MoW), or titanium (Ti).

  Here, the first metal layer 180a is preferably formed by sputtering, and is stacked with a thickness of about 2500 mm, which is about half of the total thickness of the source / drain electrodes.

  Next, after forming the first metal film 180a, a metal oxide film 180b is formed on the first metal film 180a.

  FIG. 4A is a cross-sectional view schematically showing a source / drain electrode metal film 180 formed according to the present invention.

As shown in FIG. 4A, a metal oxide film 180b is formed on the first metal film 180a crystallized in a columnar form. When the second metal film 180c is formed after the metal oxide film 180b is formed as described above, the crystal direction of the second metal film 180c and the crystal direction of the first metal film 180a do not match. As shown in FIG. 4B, stress due to crystallinity of the source / drain electrode metal film 180 is reduced, and bending of the substrate can be reduced.

  Here, the thickness of the metal oxide layer 180b is preferably 1 to 4% of the total thickness of the first and second metal layers, that is, the source / drain electrode metal layer 180.

  Accordingly, when the source / drain electrode metal film 180 is formed to a thickness of about 5000 mm, the thickness of the metal oxide film is preferably 50 to 200 mm. As described above, in order to prevent the crystal direction of the first metal film 180a from being aligned with the crystal direction of the second metal film 180c, the thickness of the metal oxide film is about 1%, which is 50 mm or more. There must be. In addition, in the electrical conduction between the first metal film 180a and the second metal film 180c, the metal oxide film 180b moves charges due to a tunneling phenomenon. That is, it preferably has a thickness of 200 mm or less.

  The first metal film 180a and the metal oxide film 180b are preferably formed in situ using sputtering. This may be realized by sputtering the metal material in a vacuum atmosphere to form the first metal film 180a, and then sputtering the metal material in an oxygen atmosphere to form the metal oxide film 180b.

  In contrast, the metal oxide film 180b may be formed by a cleaning process using pure water after the first metal film 180a is formed.

  Next, a second metal film 180c is formed on the metal oxide film 180b. At this time, the second metal layer 180c may be formed using a metal material such as molybdenum (Mo), tungsten (W), molybdenum-tungsten (MoW), or titanium (Ti). It is formed with a thickness of about 2500 mm, which is about half of the total thickness of 180.

  Here, the second metal film 180c is preferably formed by sputtering, and is preferably formed in situ after the formation of the metal oxide film 180b.

Next, a photoresist is applied on the source / drain electrode metal film 180, and after exposure and phenomenon, the source / drain electrode metal film 180 is patterned using the photoresist. A source / drain electrode (not shown) is formed in contact with the source / drain regions 120a and 120b exposed in 170.

  By performing the above-described steps, a thin film transistor including the semiconductor layer 120, the gate electrode 150, and the source / drain electrodes (not shown) is completed.

Hereinafter, the present invention will be illustrated by taking the following experimental example as an example, but the protection scope of the present invention is not limited to the following experimental example.

<Experimental example>
After forming a semiconductor layer, a gate insulating film and a gate electrode on the substrate, an interlayer insulating film was stacked. Next, contact holes connected to the source / drain regions of the semiconductor layer are formed in the interlayer insulating film, and then the first metal is formed on the entire surface of the substrate including the contact holes using molybdenum tungsten (MoW). A film was formed with a thickness of about 2500 mm. Next, a metal oxide film having a thickness of about 50 mm is formed on the first metal film through a cleaning process, and then molybdenum tungsten (MoW) is further used on the metal oxide film to form a second metal film of about 2500 mm. The thickness was formed.

<Comparative example>
After forming a semiconductor layer, a gate insulating film and a gate electrode on the substrate, an interlayer insulating film was stacked. Next, a contact hole connected to the source / drain region of the semiconductor layer is formed in the interlayer insulating film, and then a surface of the substrate including the contact hole is formed on the entire surface of the substrate using molybdenum tungsten (MoW) to a thickness of about 5000 mm. A metal film for source / drain electrodes was formed.

FIG. 5 is a schematic diagram for numerically explaining the degree of bending of the substrate due to the stress caused by the metal film for the source / drain electrode. The degree of stress of the substrate is the pressure per unit area (dyne / cm ² ). , Radius (R) and height (H).

  Tables 1 and 2 are obtained by measuring the stress of the substrates formed by the experimental example and the comparative example, respectively.

  As can be seen from Table 1 and Table 2, in the experimental example in which the metal oxide film is formed after the first metal film is formed and then the second metal film is formed, the pressure applied to the substrate per unit area is approximately It turns out that it reduced to 1/2.

  Further, as the degree of bending of the substrate decreases, the radius (R) of the experimental example increases by about 10 m from the radius (R) of the comparative example, and the height (H) of the experimental example is the height (H) of the comparative example. ), The stress on the substrate was greatly reduced when the source / drain metal film was formed according to the present invention.

  The present invention described above can be variously replaced, modified, and changed without departing from the technical idea of the present invention as long as it has ordinary knowledge in the technical field to which the present invention belongs. . Therefore, the technical scope of the present invention is not limited to the above-described embodiments and attached drawings.

  The present invention can be used for manufacturing a thin film transistor of an organic light emitting display device.

It is sectional drawing for demonstrating the manufacturing method of the thin-film transistor in the conventional organic electroluminescent display apparatus. It is sectional drawing which shows the conventional metal film for source / drain electrodes typically. It is sectional drawing which shows the conventional metal film for source / drain electrodes typically. FIG. 6 is a cross-sectional view for explaining a method of manufacturing a thin film transistor in an organic light emitting display according to the present invention. It is sectional drawing which shows typically the metal film for source / drain electrodes which concerns on this invention. It is sectional drawing which shows typically the metal film for source / drain electrodes which concerns on this invention. It is the schematic for demonstrating numerically the extent to which the board | substrate bent according to the stress by a metal film.

Explanation of symbols

100 substrate 110 buffer layer 120 semiconductor layer 130 gate insulating film 150 gate electrode 160 interlayer insulating film 170 contact hole 180 source / drain electrode 180a first metal film 180b metal oxide film 180c second metal film

Claims (9)

A substrate,
A semiconductor layer located on the substrate and having source / drain regions and a channel region;
A gate insulating film located on the substrate including the semiconductor layer;
A gate electrode positioned on the gate insulating film so as to correspond to the channel region of the semiconductor layer;
An interlayer insulating film located on the substrate including the gate electrode and having a contact hole connected to the source / drain region of the semiconductor layer;
A source / drain electrode connected to the source / drain region through the contact hole,
The thin film transistor according to claim 1, wherein the source / drain electrode includes a first metal film, a second metal film, and a metal oxide film interposed therebetween.   The first metal film or the second metal film may be formed of any one selected from the group consisting of molybdenum (Mo), tungsten (W), molybdenum-tungsten (MoW), and titanium (Ti). The thin film transistor according to claim 1.   2. The thin film transistor according to claim 1, wherein the thickness of the metal oxide film is 1 to 4% of the total thickness of the first and second metal films.   The thin film transistor according to claim 1, wherein the metal oxide film has a thickness of 50 to 200 mm. Preparing a substrate;
Forming a semiconductor layer having source / drain regions and a channel region on the substrate;
Forming a gate insulating film on the substrate including the semiconductor layer;
Forming a gate electrode on the gate insulating film so as to correspond to the channel region of the semiconductor layer;
Forming an interlayer insulating film having a contact hole connected to a source / drain region of the semiconductor layer on a substrate including the gate electrode;
Forming a first metal layer to be connected to the source / drain region through the contact hole;
Forming a metal oxide film on the first metal film;
Forming a second metal film on the metal oxide film;
Etching the first metal film, the metal oxide film, and the second metal film to form source / drain electrodes.   6. The method of manufacturing a thin film transistor according to claim 5, wherein the step of forming the metal oxide film is performed by cleaning the substrate on which the first metal film is formed with pure water.   6. The method of manufacturing a thin film transistor according to claim 5, wherein the step of forming the metal oxide film is performed using sputtering in an oxygen atmosphere.   The method of claim 5, wherein the forming of the first metal film, the metal oxide film, and the second metal film is performed in situ using sputtering. The step of forming the first metal film or the second metal film uses any one selected from the group consisting of molybdenum (Mo), tungsten (W), molybdenum-tungsten (MoW), and titanium (Ti). The method of manufacturing a thin film transistor according to claim 5, wherein sputtering is performed.

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