JP2008111925A - Liquid crystal display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display apparatus capable of maintaining color reproducibility even when temperature changes. <P>SOLUTION: The liquid crystal display apparatus constitutes one field of a video signal of a plurality of sub-fields and displays the video signal. The liquid crystal display apparatus is equipped with: a data creation part 2 for creating sub-field image signal data for each one field; a buffer part 4; an element temperature sensor part 14; a sub-field table storage part 8 for storing a sequence table of the sub-fields; a clock frequency storage part 16 for storing a correspondence between an element temperature and a clock signal frequency; and a clock signal control part 18 for outputting a clock signal of the corresponding frequency based on the detected temperature and the storage contents of the clock frequency storage part, and a sequencer part 6 creates a sub-field sequence signal based on the data of the buffer part, the storage contents of the sub-field table storage part, and the clock signal from the clock signal control part. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device used for a flat panel display, a projection display, and the like, and in particular, can maintain high color reproducibility even when the voltage-transmittance characteristic of the liquid crystal changes due to a temperature change or the like. The present invention relates to a liquid crystal display device.

  Conventionally, a method of driving an active matrix type liquid crystal display device generally controls a driving voltage using an analog signal (for example, Patent Document 1). In this type of liquid crystal display device, a liquid crystal is sealed between an active matrix substrate and a counter substrate to form a large number of pixels, a signal is written to each pixel, and a capacitor (signal auxiliary capacitor) attached to each pixel. ) To drive the liquid crystal.

  In this method, the voltage applied to the liquid crystal is constant in time and expresses gradation by changing according to the signal level, so it is easy to achieve gradation, but noise is added to the signal level. In addition to the drawbacks of being easy to be affected by pseudo signals, the DC component is also easily applied to the liquid crystal, resulting in problems with the remaining image and panel life.

  In order to solve this problem, for example, Patent Documents 2 and 3 propose a method of digitally driving a liquid crystal with a pulse. In this digital driving method, one field is divided into a plurality of subfields, and different subfields are associated with each bit of grayscale data indicating the grayscale of the pixel. Only in the period corresponding to the weight of, the ON state (or OFF state) is set according to the value of the bit. More specifically, the subfield method as described above prepares a predetermined number of subfields with different relative ratios of driving (light emission) times in one field period of the video signal, and corresponds to the gradation of the video signal to be displayed. Thus, subfields are appropriately selected and light-emitting display is performed, and halftone display is performed using the visual integration effect of the viewer.

  Here, an example of a conventional liquid crystal display device adopting a digital driving method will be described with reference to FIG. In FIG. 11, a barrel video signal input as a digital signal is converted into subfield video signal data by a data creation unit 2 including, for example, a CLUT circuit, and this data is temporarily stored in the buffer unit 4. The buffer unit 4 includes a shift register 4A for storing predetermined pixels as one block, and a frame buffer 4B for storing data of the shift register 4A for each frame.

  The data output from the buffer unit 4 is generated by the sequencer unit 6 with reference to the data in the subfield table storage unit 8 which stores the subfield sequence table in advance. At this time, the sequencer unit 6 generates the subfield sequence signal based on a clock signal having a fixed frequency. Then, the generated subfield sequence signal is applied to the liquid crystal display element 10 in which a plurality of pixels Px are arranged in a matrix, and an image is displayed.

  In this driving method, in one field, an on (or off) period of a pixel indicates the gradation of the pixel. The gradation display is performed by modulating the pulse width according to the value of each bit of the gradation data and controlling the effective value of the voltage applied to the liquid crystal. At this time, in each subfield, only the on (or off) of the pixel is instructed. Therefore, the signal instructing the on (or off) includes bit data that can take only two values. A processing circuit becomes unnecessary. Therefore, a D / A conversion circuit and a capacitor (signal auxiliary capacitor) attached to each pixel are not necessary, and display unevenness due to non-uniformity such as circuit characteristics and various wiring resistances can be suppressed. It becomes possible.

  However, the above-mentioned digital driving method technique is superior in that it adopts the concept of subfields. However, since voltage application to the liquid crystal is performed a plurality of times during one field, the temperature characteristics of the liquid crystal due to temperature changes or the like. In this case, it is not considered that the VT characteristic is changed and the gamma characteristic is changed in the case where the color change occurs, and the color reproducibility is deteriorated.

  In the case of a system in which the drive voltage is controlled by an analog signal, Japanese Patent Application Laid-Open No. 2004-133561 discloses a technique for changing the drive condition in response to a change in liquid crystal characteristics accompanying a temperature change. In the technology disclosed here, a smectic liquid crystal element with a high response speed is used, and the voltage-transmittance characteristics change depending on the temperature. Therefore, in order to obtain a good display at each temperature, It is shown that the input signal must be changed (gamma correction) according to the liquid crystal characteristics. As a gamma correction method, a method of converting an 8-bit digital signal into an 8-bit digital signal again, a method of matching the conversion characteristics of the D / A converter with the voltage-transmittance characteristics of the liquid crystal, and an 8-bit digital signal A method for converting a digital signal into a 10-bit digital signal has been proposed.

JP-A-11-174410 Japanese Patent Laid-Open No. 2001-166749 JP 2004-69788 A JP 2001-290174 A

  The technique disclosed in Patent Document 4 is excellent in that accurate gamma correction is performed by a digital gamma correction circuit in which digitally input data operates digitally. However, when the liquid crystal display element is finally driven, it is performed using analog signals that have been D / A converted. Therefore, analog signals such as noise are added to the signals optimized by the digital gamma correction circuit in the previous stage. There are specific problems. In addition, there is a problem that a digital gamma correction circuit is required and it is quite difficult to set the switching timing appropriately.

  The present invention has been devised to pay attention to the above problems and to effectively solve them. An object of the present invention is to provide a liquid crystal display device capable of maintaining high color reproducibility even when the response characteristic (voltage-transmittance characteristic) of a liquid crystal changes due to a temperature change or the like.

  According to the first aspect of the present invention, when a digitized video signal is displayed on a liquid crystal display element in which a plurality of pixels are arranged in a matrix, one field of the video signal depends on the frequency of the clock signal. The liquid crystal display device is configured to include a plurality of subfields having different driving periods and to display one field of video with a plurality of gradations by selectively turning on or off the subfields. A data generation unit that generates subfield image signal data for each field from the video signal, a buffer unit that temporarily stores the subfield image signal data, and a temperature sensor that detects the temperature of the liquid crystal display element And a sub-field for storing a sequence table that defines a control procedure for selectively turning on or off the sub-field. A table frequency storage unit, a clock frequency storage unit for preliminarily storing a correspondence state between the temperature of the liquid crystal display element and a frequency to be set for the clock signal in order to maintain a predetermined display image quality, and the temperature sensor unit. And a clock signal control unit that outputs a clock signal having a corresponding frequency based on the detected temperature and the stored contents of the clock frequency storage unit.

  According to the liquid crystal display device of the present invention, even if the voltage-transmittance characteristics of the liquid crystal change depending on the temperature or the like, it is possible to perform a good display while maintaining high color reproducibility.

Hereinafter, an embodiment of a liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.
<First embodiment>
1 is a block diagram showing a first embodiment of a liquid crystal display device according to the present invention, FIG. 2 is a diagram showing an example of a drive gradation table, FIG. 3 is a diagram showing a subfield sequence table, and FIG. 4 is a clock. It is a figure which shows an example of the table showing the relationship between the clock frequency memorize | stored in a frequency memory | storage part, and the temperature of a liquid crystal display element. The same components as those of the conventional apparatus shown in FIG.

  As shown in FIG. 1, the liquid crystal display device 12 includes a data creation unit 2 that creates subfield video signal data from a video signal, and a buffer unit 4 that temporarily stores the created subfield video signal data. A subfield table storage unit 8 that stores a sequence table that defines a control procedure for selectively turning on or off the subfield, a liquid crystal display element 10 that finally displays an image, and a temperature of the liquid crystal display element 10 A temperature sensor unit 14 for detecting the temperature, a clock frequency storage unit 16 for storing in advance a correspondence state (relationship) between the temperature of the liquid crystal display element 10 and the frequency at which the clock signal is to be set, and a clock signal having a variable frequency And a clock signal control unit 18 for outputting. The sequencer unit 6 receives a signal from the buffer unit 4 and outputs a subfield sequence signal.

  Here, a case where one field is driven by a subfield pulse composed of 16 SF1 to SF16 will be described as an example. Specifically, the data creation unit 2 is composed of a CLUT (Color Lookup Table) circuit. For example, an 8-bit video signal is driven by a CLUT circuit which is a conversion table of 256 (8 bits) × 16 bits. Is converted into a 24-bit drive pulse signal representing ON / OFF of the signal. In this CLUT circuit, the input video signal needs to be set in advance to have a desired display tone (generally a gamma 2.2 power curve) by measurement, for example, as shown in FIG. Is selected from 703 drive gradation levels in the drive gradation table. In FIG. 2, a part is omitted. In this drive gradation table, for example, 704 drive gradation levels from 0 to 703 are defined, and one field is divided into, for example, 16 subfields SF and represented as SF1 to SF16. .

  The drive period (drive weighting: corresponding to the light emission period) of each subfield is weighted differently for each subfield (some subfields may have the same drive period). This driving period is relatively fixed between the subfields as shown in FIG. 2 and FIG. 3 described later, but the absolute value is proportional to the frequency of the clock signal (clock frequency), for example. fluctuate. In other words, the pulse width of each subfield varies in proportion to the clock frequency, for example.

  The converted drive pulse signal is converted by the shift register (16 × 32) 4A of the buffer unit 4 into one block for 32 pixels, and each of the 24 frame buffers (all display pixels × 1 bit) 4B has 32 pixels. It is written for each data. The frame buffer 4B is a double buffer, and a read buffer and a write buffer are switched for each display field.

The sequencer unit 6 generates a subfield sequence signal based on the drive pulse signal from the buffer unit 4 while referring to a subfield table (described later) stored in the subfield table storage unit 8, and It outputs to the liquid crystal display element 10. At this time, the length of the drive period of each subfield is determined by the frequency of the clock signal variably supplied from the clock signal control unit 18, that is, the clock frequency F. .

  The subfield table storage unit 8 stores a subfield sequence table as shown in FIG. In this sequence table, the number of subfields transferred to the liquid crystal display element 10 in the order of subfield drive and the number of clocks representing the drive time (corresponding to drive weighting in FIG. 2) are stored. As described above, the driving period is relatively fixed between the subfields, but the absolute value varies in proportion to, for example, the frequency of the clock signal (clock frequency).

  The liquid crystal display element 10 that receives the subfield sequence signal from the sequencer unit 6 has a large number of pixels Px in which liquid crystal is sealed arranged in a matrix, and the subfield sequence signal is received for each pixel. By applying it, an image can be displayed.

  On the other hand, the clock frequency storage unit 16 stores in advance the frequency at which the clock signal is to be set, that is, the relationship between the clock frequency and the temperature of the liquid crystal display element 10 as described above. This relationship is a table as shown in FIG. 4, for example, and the clock frequency of the reference clock frequency fs corresponds to the reference operating temperature To. The reference operating temperature To is, for example, 35 ° C., and the reference clock frequency fs is, for example, 200 MHz. When the temperature of the liquid crystal display element 10 decreases to −10 ° C. and −20 ° C. below the reference operating temperature To, the clock frequency seems to decrease to 0.98 times and 0.96 times the reference clock frequency fs. Conversely, when the temperature rises to + 10 ° C. and + 20 ° C., the clock frequency increases 1.02 times and 1.04 times the reference clock frequency fs.

  Note that the relationship shown in FIG. 4 is merely an example, and the temperature difference may be defined more finely. If there is no temperature difference corresponding to the table, the clock frequencies before and after the temperature difference may be defined. Can be obtained by apportioning. Further, the present invention is not limited to such a table, and a relational expression including the temperature difference and the reference clock frequency fs may be stored, and the clock frequency F may be obtained from this relational expression.

  As described later, the relationship between the temperature difference and the clock frequency does not depend on the temperature of the liquid crystal display element 10, and the relationship between the gradation level and the output gradation level (output light) is linear (after gamma correction). ). Further, the clock signal control unit 18 obtains a corresponding clock frequency F based on the stored contents of the clock frequency storage unit 16 and the detected temperature of the liquid crystal display element 10 supplied from the temperature sensor unit 14, and this clock frequency The F clock signal is output to the sequencer unit 6. Then, the sequencer unit 6 sets the length of the drive period of each subfield according to the clock frequency F as described above, and outputs the subfield sequence signal toward the liquid crystal display element 10. It has become.

Next, the operation of the liquid crystal display device 12 configured as described above will be described.
As described above, the video signal formed of a digital signal is converted into a drive pulse signal by the data creation unit 2, and this signal is input to the sequencer unit 6 via the buffer unit 4. The sequencer unit 6 refers to the subfield sequence signal while referring to the subfield table stored in the subfield table storage unit 8 and the clock signal supplied from the clock signal control unit 18 based on the drive pulse signal. Is generated and output to the liquid crystal display element 10 to display an image.

  Here, the relationship between the gradation level to be displayed on the liquid crystal display element 10 and the output light will be described. FIG. 5 is a graph showing the relationship between the input gradation level and the output gradation level (output light) after gamma correction of the voltage-transmittance characteristics of the liquid crystal at the reference operating temperature (To). Here, since the CLUT circuit is set in advance so that the display gradation is gamma 2.2, it is displayed as a straight line by normalizing it to the power of 0.45. This also applies to FIGS. 6 and 7 described below.

  FIG. 6 is a graph showing the relationship between the input gradation level after gamma correction and the output gradation level (light output) when the clock frequency and the element temperature change, and FIG. 6A shows the relationship between the clock frequency and the reference clock. FIG. 6B shows the characteristics when the operating temperature is higher than the frequency fs by “α” (the operating temperature is To), and FIG. 6B shows the characteristics when the operating temperature is higher than the reference operating temperature To by “β”. ing.

  As shown in FIG. 5, when the liquid crystal display element 10 is at the reference operating temperature To and operates at the clock frequency F at the reference frequency fs, the relationship between the gradation level and the output light is a straight line of the characteristic A. The color reproducibility is maintained in an optimum state.

  However, as shown in FIG. 6A, when the clock frequency is increased by “α” from fs while the operating temperature is maintained at To, as shown in the characteristic B1, it swells downward, particularly at the gradation level. The depression near the central portion becomes large, resulting in a downwardly convex arc-shaped characteristic. Note that when the clock frequency is lowered from fs, the characteristic B1 swells upward and becomes an upward convex arcuate characteristic.

  On the other hand, as shown in FIG. 6B, when the operating temperature is increased by “β” from To in a state where the clock frequency is maintained at fs, the response of the liquid crystal is increased as shown in the characteristic B2. It swells upward, and the rise in the vicinity of the central portion of the gradation level is increased, resulting in an upwardly convex arc shape characteristic. Note that when the operating temperature is lowered from To, the characteristic B2 swells in the opposite direction and becomes a convex arcuate characteristic.

  Therefore, by combining the characteristics B1 and B2, it is possible to make the characteristics linear as shown in FIG. That is, FIG. 7 shows a state when the characteristics are compensated by setting the clock frequency F higher than the reference frequency fs when the operating temperature is higher than the reference operating temperature To. In other words, when the element temperature becomes higher than the reference operating temperature To, compensation is made so that the clock frequency F is gradually increased from the reference clock frequency fs according to the temperature difference, and conversely, the element temperature is the reference temperature. It can be seen that when the operating temperature To decreases, the clock frequency F should be compensated so as to gradually decrease from the reference clock frequency fs according to the temperature difference. The table of the clock frequency F shown in FIG. 4 is defined as such.

In this way, even if a temperature change or the like occurs and the voltage-rate or rate characteristic of the liquid crystal changes, the clock frequency is changed correspondingly and the pulse width of each subfield is changed to cancel it. As a result, color reproducibility can be maintained high.
Here, the state of the subfield sequence when the clock frequency is compensated will be described with reference to FIG. FIG. 8A shows the state of the subfield sequence when the operating temperature is the reference operating temperature To, and FIG. 8B shows the state of the subfield sequence when the operating temperature is + 20 ° C. higher than the reference operating temperature To. Show. In the case of FIG. 8A, the clock frequency is Fs (reference frequency), and in the case of FIG. 8B, the clock frequency is “fs × 1.04” (see FIG. 4). The pulse width (driving time) of each of the subfields SF1 to SF12 is “1.04 times” in absolute value.

<Second embodiment>
Next, a second embodiment of the liquid crystal display device of the present invention will be described. FIG. 9 is a block diagram showing a second embodiment of the liquid crystal display device of the present invention. The same components as those of the apparatus shown in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.

  The above-described change in color reproducibility with respect to the temperature of the liquid crystal display element 10 also occurs when the field frequency is switched. For example, the field frequency is 60 Hz because Japan and the United States are based on the NTSC system, while the field frequency is 50 Hz because Europe is based on the PAL system. Thus, even when the field frequency is switched, the above-described problem of color reproducibility occurs. In order to solve this problem, the present applicant disclosed in the previous application (Japanese Patent Application No. 2005-189386) a method of multiplying the clock frequency by “50/60”. When used, the same color reproducibility as described above occurs.

  Therefore, in the second embodiment, as shown in FIG. 9, a field separator 20 is provided for receiving a part of the video signal and separating the field frequency, and the separated field frequency component is supplied to the clock signal controller 18. It comes to input. In this case, the clock frequency storage unit 16 stores, for example, a table shown in FIG. 10 instead of the table shown in FIG. FIG. 10 is a diagram showing an example of a table showing the relationship among the clock frequency, the liquid crystal display temperature, and the field frequency stored in the clock frequency storage unit.

  Here, a table for the field frequency of 60 Hz (same as shown in FIG. 4) and a table for the case of 50 Hz are prepared, and the clock frequency is selected from the corresponding table according to the input field frequency. Will be. For example, when the field frequency is 50 Hz and the element temperature is + 20 ° C., the clock frequency is “fs × 5/6 × 1.06”.

  Also in this case, high color reproducibility can be maintained even if the element temperature changes as in the first embodiment. Note that the relationship shown in FIG. 10 is merely an example, and the temperature difference may be defined more finely, and if there is no temperature difference corresponding to the table, the clock frequency before and after the temperature difference. Can be obtained by apportioning. Further, the present invention is not limited to such a table, and a relational expression including the temperature difference and the reference clock frequency fs may be stored, and the clock frequency F may be obtained from this relational expression.

  In the tables shown in FIGS. 4 and 10, when the clock frequency is obtained, the clock frequency may be obtained by multiplying the reference clock frequency fs by a predetermined numerical value, and the calculation process is not particularly limited.

1 is a block configuration diagram showing a first embodiment of a liquid crystal display device according to the present invention. It is a figure which shows an example of a drive gradation table. It is a figure which shows an example of the sequence table of a subfield. It is a figure which shows an example of the table showing the relationship between the clock frequency memorize | stored in a clock frequency memory | storage part, and the temperature of a liquid crystal display element. It is a graph which shows the relationship between the input gradation level and the output gradation level (output light) after carrying out gamma correction of the voltage-transmittance characteristic of the liquid crystal at the reference operating temperature (To). It is a graph which shows the relationship between the input gradation level after gamma correction when a clock frequency and element temperature change, and an output gradation level (light output). It is a graph which shows the state when the clock frequency F is set higher than the reference frequency fs and the characteristics are compensated when the operating temperature is higher than the reference operating temperature To. It is a figure which shows the state of a subfield sequence when clock frequency compensation is performed. It is a block block diagram which shows 2nd Example of the liquid crystal display device of this invention. It is a figure which shows an example of the table which shows the relationship between the clock frequency memorize | stored in a clock frequency memory | storage part, liquid crystal display temperature, and a field frequency. It is a figure which shows an example of the conventional liquid crystal display device which employ | adopted the digital drive method.

Explanation of symbols

DESCRIPTION OF SYMBOLS 2 ... Data preparation part, 4 ... Buffer part, 4A ... Shift register, 4B ... Frame buffer, 6 ... Sequencer part, 8 ... Subfield table memory | storage part, 10 ... Liquid crystal display element, 12 ... Liquid crystal display device, 14 ... Temperature sensor 16, clock frequency storage unit 18, clock signal control unit 20, field separation unit, Px pixel.

Claims (1)

When a digitized video signal is applied to and displayed on a liquid crystal display element in which a plurality of pixels are arranged in a matrix, one field of the video signal varies depending on the frequency of the clock signal. A liquid crystal display device comprising a plurality of subfields and configured to display an image of one field with a plurality of gradations by selectively turning on or off the subfields,
A data creation unit for creating subfield image signal data for each field from the video signal;
A buffer unit for temporarily storing the subfield image signal data;
A temperature sensor unit for detecting a temperature of the liquid crystal display element;
A subfield table storage unit that stores a sequence table that defines a control procedure for selectively turning on or off the subfield;
A clock frequency storage unit for preliminarily storing a correspondence state between the temperature of the liquid crystal display element and the frequency to be set for the clock signal in order to maintain a predetermined display image quality;
A clock signal control unit that outputs a clock signal of a corresponding frequency based on the detected temperature from the temperature sensor unit and the stored contents of the clock frequency storage unit;
A liquid crystal display device comprising:

Images