JP2008103768A - Semiconductor module and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multi-stage semiconductor module capable of suppressing generation of warpage, while improving moisture-proof stability, and to provide its manufacturing method. <P>SOLUTION: The semiconductor module 1 is constituted by alternately laminating resin substrates and sheet members 5; the resin substrate has a first embedded conductor 7, and a semiconductor chip 2 mounted on the upper surface thereof; and the sheet member 5 has an opening 10 for storing a semiconductor chip 2, and a second embedded conductor 9 electrically connected to the first embedded conductor 7. Furthermore, the semiconductor module 1 has a plurality of the resin substrates and the sheet members 5, and the first resin substrate 4, disposed at the lowest stage of all the resin substrates, is thicker than the other second substrates 3. The sheet members 5 have adhesive members that cover the upper and side faces of the semiconductor chip 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a multistage semiconductor module configured in a three-dimensional manner by alternately laminating resin substrates on which semiconductor chips are mounted and sheet members, and a manufacturing method thereof.

  In response to the demand for miniaturization and higher functionality of various electronic devices such as mobile phones and digital cameras, a multi-stage semiconductor module in which a plurality of electronic components, particularly semiconductor chips, are integrated and integrated has been proposed. .

  Conventionally, a method for manufacturing such a stacked semiconductor module simply and inexpensively has been proposed.

  A conventional semiconductor module has a printed circuit board on which a predetermined wiring circuit is formed, a semiconductor chip mounted on the printed circuit board, and an opening that can accommodate the semiconductor chip, and can be connected to the wiring circuit on the printed circuit board. The interlayer member having conductive bumps is laminated as a unit. The conventional semiconductor module includes a step of attaching a protective film to both surfaces of an insulating base material serving as an interlayer member, a step of forming a through hole at a predetermined position of the insulating base material, and a conductive paste in the through hole. The step of forming conductive bumps by filling the substrate, the step of peeling off the protective film, the step of forming an opening capable of accommodating a semiconductor chip in the insulating base material, and the insulating base material and the printed board are alternately performed. And a step of laminating and adhering to the substrate (for example, see Patent Document 1).

  According to this method, a through hole is formed at a predetermined position of an insulating base material having a protective film pasted on both sides, and after filling the through hole with a conductive paste, the protective film is peeled off to insulate. Conductive bumps protruding on both sides of the conductive substrate can be formed. In this method, since the conductive paste is filled in the through hole penetrating the insulating base material, a gap is generated in the hole during filling as compared with the case of the via hole in which one opening is closed. This can be avoided and the connection reliability can be improved. Moreover, since it is not necessary to perform electrolytic plating which requires time and labor, a semiconductor module can be manufactured easily and inexpensively.

Furthermore, with the miniaturization of electronic devices such as IC cards and mobile phones, in order to achieve higher density and thinner semiconductor modules, circuit boards on which semiconductor chips are mounted and interlayer members are alternately stacked. In addition, a stacked semiconductor module manufactured by heat pressing has also been proposed (see, for example, Patent Document 2). Specifically, a circuit board on which a semiconductor chip is mounted in advance and an interlayer member having an opening capable of accommodating the semiconductor chip are alternately stacked via an adhesive layer, and the stacked body is heated and pressed. . Thereby, the semiconductor chip can be embedded in the opening of the interlayer member, and electrical connection between the semiconductor chips can be established via the conductor posts formed on the interlayer member. According to this method, the distance between the semiconductor chips can be shortened, and the problems caused by the wiring resistance and inductance can be reduced. As a result, electrical signals can be transmitted without delay, and the wiring board can be increased in density, functionality, and thickness.
JP 2002-64179 A JP 2003-218273 A

  In recent years, a technique for polishing and thinning a semiconductor chip and a technique for mounting the thin semiconductor chip on a substrate with a high yield have been developed, and the number of stacked layers in a multi-layer structure tends to further increase. Further, for example, in a semiconductor memory, the chip area has increased with an increase in memory capacity. When a semiconductor chip having a large area is laminated in multiple stages to form a module, warping of the module becomes a problem. Further, the warpage of the module tends to increase as the printed circuit board becomes thinner. Therefore, in order to laminate the printed circuit board on which the semiconductor chip is mounted and the interlayer member in multiple stages, it is important to suppress the occurrence of warpage.

  On the other hand, in recent years, semiconductor chips and semiconductor modules are often mounted by a BGA (Ball Grid Array) system or the like in order to realize a small and thin electronic device. In such a mounting method, the heights of solder balls and bump electrodes formed for connection to the mother board cannot be made very large. Therefore, when there is a warp at room temperature or when a warp occurs due to heating during bonding, the semiconductor module cannot be mounted on the motherboard. Alternatively, mounting defects may partially occur due to warpage. That is, the semiconductor module has a problem that even if it has a good electrical characteristic, it becomes a defective product on the mounting surface. In addition, in a module mainly composed of a memory, for example, a mixed mounting of a DRAM and a SRAM, a mixed mounting of a DRAM and a flash memory, and mounting of a control semiconductor chip for controlling them are also required. Therefore, it is also desired to suppress warping when semiconductor chips having different thicknesses and characteristics are stacked.

  Furthermore, in the case of a module, although there is a strong demand for downsizing and thinning for the purpose of use, a moisture resistance reliability level equivalent to that of other semiconductor devices is required. However, due to the structure in which circuit boards on which semiconductor chips are mounted are stacked, it is difficult to ensure moisture resistance reliability that can withstand harsh conditions as compared to ordinary semiconductor devices.

  For these problems, in the conventional method described above, only a configuration for laminating substrates on which semiconductor chips having the same shape are stacked and a method for the same are shown, but the warpage of the semiconductor module when stacked is suppressed. Nothing is indicated about improving the moisture resistance reliability of the semiconductor module.

  An object of the present invention is to provide a semiconductor module having a multi-stage structure in which generation of warpage is suppressed while improving moisture resistance reliability and a method for manufacturing the same.

  In order to solve the above problems, a multistage semiconductor module according to the present invention includes a first resin base material and a first embedded conductor penetrating the first resin base material, and a semiconductor chip on the upper surface. A resin substrate on which is mounted, a second resin base material in which an opening for housing the semiconductor chip is formed, and the second resin base material penetrating through and electrically connected to the first embedded conductor A multistage semiconductor module in which sheet members having the second embedded conductors are alternately stacked, further comprising an adhesive member covering the upper surface and side surfaces of the semiconductor chip, and the resin substrate and the There are a plurality of sheet members, and the resin substrate disposed at the lowest level among the resin substrates is thicker than the other resin substrates. Note that the upper surface and the side surface of the semiconductor chip may be covered with an adhesive member, or may be a low stress member that is softened at a lower temperature than the adhesive member and has lower rigidity than the adhesive member.

  According to the multistage semiconductor module of the present invention, since the lowermost resin substrate is thicker than the other resin boards, the occurrence of warpage of the entire multistage semiconductor module can be suppressed. In addition, since the exposed part of the semiconductor chip is covered with an adhesive member or a resin material with a low softening point and low hardness, moisture, moisture, and corrosive gases that cause corrosion of the wiring material used for the semiconductor chip and resin substrate can be prevented. , Failure due to disconnection can be prevented.

  Note that it is preferable to increase the thickness of the portion of the adhesive member located above the opening because the semiconductor chip can be covered more reliably and the number of members can be reduced. Further, the multistage semiconductor module of the present invention can have various variations such as increasing the diameters of some of the first embedded members and the second embedded members and attaching a rigid plate. Moreover, when installing a semiconductor chip with the back surface facing the resin substrate, the semiconductor chip may be resin-sealed.

  According to the first method of manufacturing a multistage semiconductor module of the present invention, a semiconductor chip is mounted on an upper surface, a first resin substrate having a first embedded conductor, a semiconductor chip is mounted on the upper surface, and the first embedded A second resin substrate having a conductor and thicker than the first resin substrate; a resin base material in which an opening having a larger planar size than the semiconductor chip is formed; and at least one of an upper surface and a lower surface of the resin base material And a step (a) of preparing an adhesive member disposed in the sheet member and a sheet member having a second embedded conductor penetrating the resin base material, and setting the second resin substrate as the lowest step, A step (b) of alternately stacking the sheet member and the first resin substrate on the second resin substrate so that a semiconductor chip is disposed; and the first layer stacked in the step (b). Resin substrate The second resin substrate and the sheet member are heated and pressed from the lowermost stage and the uppermost stage to bond the first resin substrate, the second resin substrate, and the sheet member, and the first embedding is performed. A step (c) of connecting a conductor and the second embedded conductor and flowing the adhesive member to cover the semiconductor chip.

  According to the manufacturing method of the present invention, heating and pressurization are performed in a state where the adhesive member is disposed on at least one of the upper surface and the lower surface of the second resin base material in the step (b), compared with the conventional manufacturing method. The exposed portion of the semiconductor chip can be covered without increasing the number of steps. For this reason, according to the manufacturing method of the present invention, it is possible to provide a multistage semiconductor module that is resistant to intrusion of moisture and the like.

  According to a second method of manufacturing a multistage semiconductor module of the present invention, a semiconductor chip is mounted on an upper surface, a first resin substrate having a first embedded conductor, and a semiconductor chip is mounted on an upper surface, and the first embedded A second resin substrate having a conductor and thicker than the first resin substrate; a resin base material in which an opening having a larger planar size than the semiconductor chip is formed; And a sheet member having a second embedded conductor penetrating the resin base material, an adhesive layer disposed in a region surrounding the opening, and a lower softening point than the adhesive layer, A step (a) of preparing a low-stress member having a plane size made of a resin having a low rigidity and smaller than the opening, and the semiconductor chip is disposed in the opening with the second resin substrate at the bottom. Ru (B) arranging the sheet member and the first resin substrate alternately on the second resin substrate and disposing the low-stress member on the semiconductor chip; and (b) The first resin substrate, the second resin substrate, and the sheet member that are stacked in the above are heated and pressed from the lowermost and uppermost stages, and the low-stress member is flowed to lower the semiconductor chip. The step (c) of covering with a stress member, and the step (c) of the first resin substrate, the second resin substrate and the sheet member laminated in the step (b) from the lowermost stage and the uppermost stage. By applying pressure while heating to a higher temperature, the first resin substrate and the second resin substrate are bonded to the sheet member, and the first embedded conductor and the second embedded conductor are bonded to each other. Connect Degree and a (d).

  According to this method, since the upper surface and the side surface of the semiconductor chip can be covered in the step (c) before the respective members are integrated in the step (d), the semiconductor chip can be covered more reliably.

In the multistage semiconductor module of the present invention, the thickness of the lowermost resin board located on the side connected to the external board among the plurality of laminated resin boards is thicker than the thickness of the other resin boards. Generation of warpage of the entire semiconductor module is suppressed. For this reason, even when the number of terminals is increased, it can be mounted on the motherboard with high reliability, and a great effect can be achieved in increasing the functionality and cost of the electronic device. Furthermore, since the exposed portion of the semiconductor chip is covered with an adhesive member or the like, intrusion of moisture, corrosive gas, or the like is prevented, and failure is less likely to occur compared to conventional semiconductor modules.

(First embodiment)
−Structure of semiconductor module−
FIG. 1 is a schematic perspective view showing the overall configuration of the multistage semiconductor module according to the first embodiment of the present invention, and FIG. 2 shows the multistage configuration of this embodiment along the line II-II shown in FIG. It is sectional drawing when a semiconductor module is cut | disconnected. FIG. 3A is a schematic plan view of a resin substrate used in the multistage semiconductor module of the present embodiment as viewed from the upper surface side, and FIG. 3B is a IIIb-IIIb line shown in FIG. It is sectional drawing when the resin substrate of this embodiment is cut | disconnected along line, (c) is a schematic plan view at the time of seeing the resin substrate of this embodiment from the lower surface side. 4A and 4B are a plan view showing the adhesive member among the sheet members used in the multistage semiconductor module of the present embodiment, and a cross section showing the adhesive member when cut along the IVb-IVb line. FIG. 4C and 4D are a plan view showing an example of the adhesive member of the present embodiment and a cross-sectional view showing the first adhesive member when cut along the IVd-IVd line. 5A and 5B are a plan view showing a second resin base material in the sheet member of the present embodiment, respectively, and the second resin base cut along the Vb-Vb line shown in FIG. It is sectional drawing which shows a material. In these figures, the thickness, length, etc. of each figure differ from the actual shape from the viewpoint of drawing. Also, the number and shape of the embedded conductors and external connection terminals for external connection are different from actual shapes, and are easy to show. In the present specification, the “upper surface” and “lower surface” of each member are referred to based on the vertical direction of FIGS.

  As shown in FIGS. 1 and 2, the semiconductor module 1 of the present embodiment is formed by alternately laminating first resin substrates 3 and sheet members 5 each having a semiconductor chip 2 mounted on the upper surface. Further, in the semiconductor module 1, the thickness of the resin substrate (second resin substrate 4) used in the lowermost layer is made thicker than other resin substrates, and solder balls serving as external connection terminals are formed on the lower surface of the second resin substrate 4. 17 is provided. The semiconductor module 1 has a structure in which the first resin substrate 3, the second resin substrate 4 and the sheet member 5 are laminated and integrated by heating and pressing. In the example of the present embodiment, a plurality of first resin substrates 3 are laminated together with the sheet member 5 in the semiconductor module 1. Further, in the semiconductor module 1 of the present embodiment, the first adhesive member 151 and the second adhesive member in which the upper surface (the rear surface, that is, the surface facing the main surface) and the side surface of the semiconductor chip 2 are part of the sheet member 5. 152.

  The structure of the semiconductor module of this embodiment will be described in more detail.

  As shown in FIGS. 3A to 3C, each of the first resin substrates 3 includes a first resin base material (first resin core) 8 and, for example, an upper surface of the first resin base material 8. A plurality of semiconductor element connection terminals 11 that are formed in the central region and are connected to the semiconductor chip 2, and are provided in the peripheral portion of the first resin base material 8, and a plurality of second terminals penetrating the first resin base material 8. One embedded conductor 7, a plurality of connection lands 13 provided on both sides of the first resin base 8 and provided at both ends of the first embedded conductor 7, a predetermined semiconductor element connection terminal 11, A plurality of wirings 12 for connecting the connection lands 13 and the first embedded conductors 7 are provided.

  Here, as the material of the first embedded conductor 7, a conductive resin material or a plated conductor is used. The first resin base material (first resin core) 8 can be a base material made of a thermosetting resin and a reinforcing material. The thermosetting resin may be at least one selected from an epoxy resin, a polyimide resin, a polyphenylene ether resin, a phenol resin, a fluororesin, and an isocyanate resin. As the reinforcing material, woven fabrics and nonwoven fabrics made of glass fibers, and woven fabrics and nonwoven fabrics of aramid fibers that are organic fibers can be used.

  The second resin substrate 4 has the same structure as that of the first resin substrate 3 as a whole, and includes the first resin base material 8, the semiconductor element connection terminal 11, the first embedded conductor 7, and the connection land. The solder balls 17 are formed on the lower surface of the substrate at predetermined intervals on the connection lands 13 which are thicker than the first resin substrate 3 and are external connection terminals for connection to the mother board. . The semiconductor module 1 is joined to the mother board using the solder balls 17.

  The semiconductor chip 2 is connected to the semiconductor element connection terminals 11 of the first resin substrate 3 and the second resin substrate 4 by electrode bumps 28 provided on the main surface, and the periphery thereof is sealed by a sealing resin 24. Protected. The sealing resin 24 functions to protect the main surface (the lower surface in FIG. 1) of the semiconductor chip 2 from the external environment and absorb thermal strain and the like. In the present specification, the “main surface of a semiconductor chip” means a circuit formation surface on which a semiconductor device or the like is formed.

  Next, as shown in FIGS. 4A to 4D and FIGS. 5A and 5B, each sheet member 5 includes a second resin base material (second resin core) 16, The first adhesive member 151 formed on the upper surface of the second resin base material 16, the second adhesive member 152 formed on the lower surface of the second resin base material 16, and the first resin substrate 3. A second embedded conductor 9 made of a conductive resin material is provided at a position coincident with the first embedded conductor 7, and the semiconductor chip 2 is accommodated in the central region of the second resin base material 16. A possible opening 10 is formed. Therefore, the planar size of the opening 10 is larger than the planar size of the semiconductor chip 2. Note that the shapes of the first adhesive member 151 and the second adhesive member 152 may both be a sheet having a uniform thickness as shown in FIGS. Further, as shown in FIGS. 4C and 4D, the first adhesive member 151 has a shape in which the central portion is thicker than the other portions, and the second adhesive member 152 has a uniform thickness. Good. As a result, when the sheet member 5 is laminated together with the resin substrate and pressed and heated, the side surface and the upper surface (surface opposed to the main surface) of the semiconductor chip 2 can be more reliably covered. Here, since the first adhesive member 151 is greatly deformed along the semiconductor chip 2 during the heating and pressurizing processes, the first adhesive member 151 is preferably in the form of a sheet having a uniform thickness. However, the shapes of the first adhesive member 151 and the second adhesive member 152 are not limited to this. A portion of the first adhesive member 151 that does not overlap with the opening 10 when seen in a plan view bonds the second resin base material 16 and the first resin base material 8 together. The portion of the second adhesive member 152 that does not overlap with the opening 10 in plan view is the second resin base material 16 and the first resin base material 8 constituting the second resin substrate 4 or the second resin base material 4. The resin base material 16 and the first resin base material 8 constituting the first resin substrate 3 are connected.

  In the semiconductor module 1, portions of the first adhesive member 151 and the second adhesive member 152 that overlap with the opening 10 when seen in a plan view are fused together, and the side surface of the semiconductor chip 2 and It is characterized by covering the upper surface (the surface facing the main surface).

  Each of the semiconductor chips 2 mounted on the upper surfaces of the first resin substrate 3 and the second resin substrate 4 is disposed in the opening 10 of the second resin base material 16 in the semiconductor module 1. Yes. In the opening 10, the gap between the semiconductor chip 2 and the second resin base 16 and the gap between the semiconductor chip 2 and the first resin substrate 3 positioned above the gap are separated from the first adhesive member 151 and the above-described first adhesive member 151. The second adhesive member 152 is buried. As will be described in detail later, such a structure is produced by heating and pressing in a state where the first resin substrate 3 and the second resin substrate 4 and the sheet member 5 are laminated. Specifically, the first adhesive member 151 and the second adhesive member 152 fluidized by heating fill the opening 10.

  As the first adhesive member 151 and the second adhesive member 152, a prepreg-like base material in which an epoxy resin is impregnated with a reinforcing material made of glass woven fabric or aramid nonwoven fabric may be used, or it may be melted by pressing and heating. A softening thermoplastic resin can also be used. Examples of the thermoplastic resin include organic films, and examples thereof include wholly aromatic polyesters, fluorine resins, polyphenylene oxide resins, syndiotactic polystyrene resins, polyimide resins, polyamide resins, aramid resins, and polyphenylene sulfide resins.

  Further, as shown in FIG. 5, the second embedded conductor 9 penetrates the second resin base material 16 and both ends thereof protrude from the upper surface and the lower surface of the second resin base material 16 by a predetermined height. It has a different shape. A protruding portion of the second embedded conductor 9 from the second resin base material 16 is shown as a protruding portion 310 in the drawing.

  Further, the second embedded conductor 9 is in a semi-cured state before lamination, and is compressed and cured by the pressure and heating after lamination, and the first resin substrate 3 and the second resin substrate 4 Electrical connection is established with one buried conductor 7 mainly by mechanical contact.

  In the semiconductor module 1 of the present embodiment, the vias provided in the first resin substrate 3 and the second resin substrate 4 are embedded conductors 7, but the first resin substrate 3 and the second resin substrate are provided. 4 may be a general build-up board. In that case, since the vias of the build-up substrate are formed in a concave shape by plating, the reliability in obtaining electrical connection due to the effect of fitting the protrusions 310 of the second embedded conductor 9 of the sheet member 5 on each other. This improves the positioning.

  The second resin base material 16 constituting the sheet member 5 may use the same material as the first resin substrate 3 and the second resin substrate 4 such as a glass epoxy resin or an aramid epoxy resin. The first resin substrate 3 and the second resin substrate 4 may be made of different materials such as glass epoxy resin, and the sheet member 5 may be made of aramid epoxy resin, for example. The planar outer dimensions are the same as those of the sheet member 5, the first resin substrate 3, and the second resin substrate 4. Furthermore, the first adhesive member 151 made of prepreg epoxy, aramid epoxy resin, or the like is used for laminating and bonding the second resin base material 16 of the sheet member 5 and the first resin substrate 3 or the second resin substrate 4; The second adhesive member 152 may be used. The planar external dimensions are the same as those of the resin substrate.

  Moreover, an example of the shape of the principal part of each structural member is shown below about the semiconductor module 1 of the multistage structure of this embodiment.

  The shape of the entire semiconductor module is, for example, a rectangular parallelepiped, and the thickness of the semiconductor chip is preferably 30 μm or more and 150 μm or less. The thickness of the first resin substrate 3 is appropriately designed in the range of 60 μm to 200 μm, the diameter of the first embedded conductor 7 is 50 μm to 500 μm, and the pitch is in the range of 100 μm to 750 μm.

  The thickness of the second resin substrate 4 is in the range of 100 μm or more and 300 μm or less, and is at least thicker than the first resin substrate 3. The diameter and pitch of the first buried conductor 7 are the same as those of the first resin substrate 3.

  The thickness of the second resin base material 16 that is a constituent member of the sheet member 5 is 45 μm or more and 200 μm or less, and is at least thicker than the semiconductor chip 2. Furthermore, an adhesive layer having a thickness of 10 μm or more and 100 μm or less is provided on both surfaces of the second resin substrate 16. The diameter and pitch of the second embedded conductor 9 are the same as those of the first resin substrate 3.

  Further, the first adhesive member 151 and the second adhesive member 152 constituting the sheet member 5 are prepreg-like resins such as glass epoxy resin and aramid epoxy resin, and have a thickness of 15 μm or more and 150 μm or less.

  By designing based on these ranges, the multi-stage semiconductor module 1 of the present embodiment can be realized.

-Action and effect of semiconductor module-
According to the structure of the semiconductor module 1 having the multi-stage configuration of the present embodiment described above, the second resin substrate 4 disposed in the lowermost layer is formed thicker than the first resin substrate 3, so that the module is configured in a multi-stage configuration. Even when it is, warping can be made very small. In addition, in the semiconductor module 1 of the present embodiment, the first adhesive member 151 and the second adhesive member 152 cover the side surface and the upper surface of the semiconductor chip 2, thereby causing corrosion of the wiring material in the opening 10. Moisture, moisture, corrosive gas, and the like are less likely to enter, and failure due to wire breakage can be prevented. That is, the semiconductor module 1 of the present embodiment can have higher moisture resistance than the conventional semiconductor module. As a result, defects are less likely to occur in mounting on the mother board using the solder balls 17, and even when the number of terminals increases, a low-cost and highly reliable semiconductor module can be realized.

  Moreover, about the 1st resin substrate 3 and the 2nd resin substrate 4, after mounting the semiconductor chip 2, a required electrical test and a burn-in test can be performed, and only a good product can be used for manufacture of a semiconductor module. When the resin substrate and the sheet member 5 are laminated, the second embedded conductor 9 of the second resin base material 16 constituting the sheet member 5 is compressed and cured by pressurization and heating, so that the second embedded conductor 9 And the first buried conductor 7 and the lower resistance of the second buried conductor 9 can be realized at the same time.

  Furthermore, when the thickness of the highly rigid second resin base material 16 constituting the sheet member 5 is thicker than that of the semiconductor chip 2, the load applied to the semiconductor chip 2 during manufacturing can be reduced. It is possible to prevent a defect from occurring at the connection portion between the semiconductor chip 2 and the resin substrate.

  The semiconductor device formed on the semiconductor chip 2 is not particularly limited. For example, a semiconductor memory device is formed on the semiconductor chip 2 mounted on the first resin substrate 3, and the second resin substrate 4 is formed on the semiconductor chip 2. The mounted semiconductor chip 2 may be formed with a control semiconductor device that controls the semiconductor memory device.

-Semiconductor module manufacturing method-
Hereinafter, the manufacturing method of the semiconductor module of this embodiment is demonstrated using figures.

  First, a method for obtaining a semiconductor chip 2 having a predetermined shape will be described.

  6A to 6C are cross-sectional views illustrating an example of a method for manufacturing a semiconductor chip mounted on the semiconductor module 1 of the present embodiment.

  As shown in FIG. 6 (a), electrolytic plating or SBB (stud bump bonding) is performed on the bonding pads on the main surface of the plurality of semiconductor chips 2 on the semiconductor wafer 30 that has undergone the circuit processing process necessary for the semiconductor chips. Electrode bumps 28 are formed by the method.

  Next, as shown in FIG. 6B, the separation zone disposed between the plurality of semiconductor chips 2 in the semiconductor wafer 30 is cut halfway from the main surface side by dicing or laser.

  Next, as shown in FIG. 6C, the back surface of the semiconductor wafer 30 is removed by chemical etching, back surface grinding, plasma etching, or a method using a combination thereof, so that the thickness of the semiconductor wafer is about 30 μm to 150 μm. The semiconductor chip 2 can be singulated.

  Next, an example of a method for producing the first resin substrate 3 and the second resin substrate 4 for mounting the semiconductor chip 2 will be described with reference to FIG. Hereinafter, the first resin substrate 3 will be described as an example. Here, a case will be described in which a glass epoxy resin is used as the first resin base material 8 that is a constituent member of the first resin substrate 3 and a copper foil 19 is used as the wiring 12 and the connection land 13. 7A to 7D are cross-sectional views showing a method for producing a resin substrate used in the semiconductor module of this embodiment.

  As shown in FIG. 7A, a double-sided copper-clad substrate 18 having a copper foil 19 formed on both sides of the first resin base 8 is prepared. This double-sided copper-clad substrate 18 has a total thickness of about 100 μm by appropriately bonding a copper foil 19 of 9 μm, 12 μm, 24 μm, or 35 μm to both surfaces of a first resin base 8 having a thickness of 70 μm. It has become.

  Next, as shown in FIG. 7B, a through-hole 70 is formed in a predetermined position of the double-sided copper-clad substrate 18 through a laser. Here, the through hole 70 may be formed by a drill.

  Subsequently, as shown in FIG. 7C, the photosensitive film 20 is attached to both surfaces of the double-sided copper-clad substrate 18, and the semiconductor element connection terminals 11 and the connection terminals are connected to one surface of the first resin base material 8. The land 13 and the wiring 12 that connects the semiconductor element connection terminal 11 and the connection land 13 are formed. A connection land 13 is formed on the other surface. This pattern formation is performed by photolithography and etching techniques using the photosensitive film 20. Thereafter, the photosensitive film 20 is peeled off from both sides of the double-sided copper-clad substrate 18 (not shown).

  Then, as shown in FIG.7 (d), the through-hole 70 is filled with an electrically conductive paste, for example. If this conductive paste is cured by heating, the first resin substrate 3 having the first embedded conductors 7 can be obtained. In addition, you may produce the 1st resin substrate 3 and the 2nd resin substrate 4 not only by said manufacturing method but using the manufacturing method and material of the double-sided wiring board currently produced normally.

  Next, a method for producing the second resin base material 16 constituting the sheet member 5 will be described with reference to FIG. 8A to 8F are cross-sectional views showing a method for producing a sheet member used in the semiconductor module of this embodiment.

  First, as shown in FIG. 8A, a second resin base material 16 having a thickness larger than that of the semiconductor chip 2 is prepared. For example, a glass cloth epoxy resin is used as the second resin base material 16. For example, when the thickness of the semiconductor chip 2 is 75 μm, the thickness of the second resin base material 16 is about 100 μm.

  Next, as shown in FIG. 8B, a heat-resistant protective film 205 having a thickness of about 15 μm is formed on each of the upper and lower surfaces of the second resin base material 16 from polyimide or PET resin.

  Next, as shown in FIG. 8C, a through-hole 90 is formed with a laser at a predetermined position of the second resin base material 16. Similarly, an opening 10 having a size capable of accommodating the semiconductor chip 2 is formed in the central region of the second resin base material 16 using a laser. Thereafter, the heat-resistant protective film 205 is peeled off from the upper surface and the lower surface of the second resin base material 16. FIG. 8C shows the process up to forming the through hole 90 and the opening 10.

  Subsequently, as shown in FIG. 8D, after the masking film 21 provided with holes at positions corresponding to the through holes 90 formed in the second resin base material 16 is pasted on both surfaces, for example, by screen printing. The through hole 90 is filled with a conductive paste. The masking film 21 is for forming the protrusion 310 of the second embedded conductor 9.

  Next, as shown in FIG. 8 (e), the conductive paste filled in the through holes 90 and the holes of the masking film 21 is heated while being pressed, thereby bringing the conductive paste into a semi-cured state, and Increase the packing density of the conductive paste. As a result, the conductive paste is electrically reduced in resistance.

  Next, as shown in FIG. 8F, when the masking film 21 is peeled off, the second resin base material 16 constituting the sheet member 5 is produced. Since the second embedded conductor 9 filled with the conductive paste is still in a semi-cured state, it has a characteristic of being cured at the same time as being compressed by pressing and heating.

  Next, a method for producing the first adhesive member 151 for the sheet member 5 shown in FIGS. 4A and 4B will be described (not shown).

  First, a predetermined amount of a liquid resin, which is a main material of a thermosetting resin such as a glass epoxy resin or an aramid epoxy resin, and materials such as a curing agent, a curing accelerator, an inorganic filler, and a coupling agent are blended. Next, the blended mixture is maintained at a temperature of 40 ° C. or higher and 120 ° C. or lower and sufficiently stirred. Next, as an example, a uniform gap of 20 μm is set in advance, and the mixture of materials is injected into a roller maintained at a temperature of 40 ° C. or higher and 120 ° C. or lower. By doing so, the mixture passes through the roller and becomes a thin plate of cured resin having a thickness of 20 μm. Next, the obtained resin thin plate is separated into pieces of the size of the first resin substrate 3, the second resin substrate 4, or the second resin base material 16 by a press, a laser, or a cutting machine. In addition, as for the thin board | plate of the resin hardened | cured as needed, the vertical and horizontal dimension is good also as an integer multiple of a piece. In addition, an inorganic filler may not be added to the mixture of materials depending on the use. In this way, the first adhesive member 151 is manufactured.

  On the other hand, a method for producing the second adhesive member 152 for the sheet member 5 shown in FIGS. 4C and 4D is as follows.

  First, the gap of the roller through which the mixture mixed with the material passes is set to a uniform gap of 40 μm, and the mixture is injected into the roller at a temperature lower than the roller temperature. Thus, a thin plate of semi-cured resin is obtained. Then, by pressing with a molding die capable of forming a convex region smaller than the opening in the region corresponding to the opening 10 of the second resin base material 16, the center shown in FIGS. 4 (c) and 4 (d) A second adhesive member 152 having a portion formed thicker than the other portions is manufactured. The mold temperature is maintained at a temperature of 40 ° C. or higher and 120 ° C. or lower.

  With the above method, the first adhesive member 151 and the second adhesive member 152 used for the sheet member 5 can be manufactured. In addition, at the time of lamination | stacking of a resin substrate, you may affix an adhesive member with uniform thickness on both surfaces of the 2nd resin base material 16, and the thickness of a center part is on both surfaces of the 2nd resin base material 16 from another part. A thick adhesive member may be attached.

  Next, a process for mounting the semiconductor chip 2 on the first resin substrate 3 and the second resin substrate 4 will be described.

  For mounting the semiconductor chip 2, the electrode bumps 28 of the semiconductor chip 2 and the semiconductor element connection terminals 11 of the first resin substrate 3 and the second resin substrate 4 are joined using, for example, solder or conductive resin. Although not shown here, the back surface of the semiconductor chip 2 may be opposed to the resin substrate, and the semiconductor chip 2 and the semiconductor element connection terminal 11 may be connected by wire bonding. Furthermore, the sealing resin 24 is applied to the semiconductor chip 2 and cured to fill the gap portion after joining. Thereby, the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted are produced. Thereafter, if an electrical inspection and a burn-in test are performed, a semiconductor element having the same reliability as that of a normal packaged semiconductor element can be obtained.

  Next, a process of stacking and integrating the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted using the sheet member 5 will be described with reference to FIG. FIG. 9 is an exploded view of the semiconductor module according to the first embodiment shown in FIG. In the figure, the first resin substrate 3 is divided into a first-stage first resin substrate 31, a second-stage first resin substrate 32, and a third-stage first resin substrate 33 for easy explanation. I ’ll call it apart. Similarly, for the second resin base material 16 constituting the sheet member 5, the first-stage second resin base material 51, the second-stage second resin base material 52, and the third-stage second resin base material. This is distinguished from the material 53. Further, similarly for the first adhesive member 151 and the second adhesive member 152, the first-stage first adhesive member 251, the second-stage first adhesive member 252, the third-stage first adhesive member 253, The first-stage second adhesive member 351, the second-stage second adhesive member 352, and the third-stage second adhesive member 353 are distinguished from each other.

  As shown in FIG. 9, the second resin substrate 4 is arranged at the lowermost stage, and the first-stage second adhesive member 351 and the first-stage second resin base material 51 are sequentially arranged on the second resin board 4. The first-stage first adhesive member 251 and the first-stage first resin substrate 31 are arranged, and thereafter the second-stage second adhesive member 352, the second-stage second resin base material 52, and the second-stage second resin base material 52 First-stage adhesive member 252, second-stage first resin substrate 32, third-stage second adhesive member 353, third-stage second resin base material 53, third-stage first adhesive member 253, and A third-stage first resin substrate 33 is arranged.

  At this time, the semiconductor chip 2 mounted on each of the first resin substrate 3 and the second resin substrate 4 is arranged so as to be positioned on the upper surface of each. And each 1st resin substrate 3 and 2nd resin substrate 4 are arrange | positioned so that the semiconductor chip 2 may be accommodated in the opening part 10 of the 2nd resin base material 16 which comprises each sheet | seat member 5. To do. Further, the connecting lands 13 of the first resin substrate 3 and the second resin substrate 4 are accurately connected to the protrusions 310 of the second embedded conductor 9 of the second resin base material 16 constituting the sheet member 5. Align to.

  Next, after each component member is arranged as described above and brought into close contact with each other, the laminate is heated and pressurized in the atmosphere.

  As a result, the adhesive members provided from the first stage to the third stage soften, and the second resin substrate 4 and the first stage first resin substrate 31 to the third stage first resin substrate 33 are softened. The resin substrate adheres. Furthermore, the first embedded member 151 is softened by being placed on the upper surface and the lower surface of the second resin base material 16 with the second embedded conductor 9 having both end portions formed as protrusions 310 by pressurization and heating. It penetrates through the second adhesive member 152. Therefore, the second buried conductor 9 is provided on each of the second resin substrate 4, the first-stage first resin substrate 31, the second-stage first resin substrate 32, and the third-stage first resin substrate 33. Electrical contact is made by mechanical contact with the provided connection lands 13.

  At the same time, the first adhesive member 151 and the second adhesive member 152 flow and the side surface and the upper surface of the semiconductor chip 2 disposed in the opening 10 of the second resin base material 16 (opposite the main surface). The first adhesive member 151 and the second adhesive member 152 fill the opening 10. That is, by applying pressure and heating, the first adhesive member 151 and the second adhesive member 152 are softened, and the semi-cured conductive paste is compressed and densely filled in the through hole, and for connection. Good contact with the lands 13 occurs and a low resistance connection is achieved. If the laminated body is cooled and taken out after pressurizing and heating for a predetermined time, a multi-stage semiconductor module in which the semiconductor chip 2 is covered and integrated with both adhesive members is obtained.

  In the multi-stage configuration, each of the first-stage second resin base 51, the second-stage second resin base 52, and the third-stage second resin base 53 is preliminarily formed on both surfaces. First-stage first adhesive member 251, first-stage second adhesive member 351, second-stage first adhesive member 252, second-stage second adhesive member 352, third-stage first adhesive member 253, The third-stage second adhesive member 353 may be affixed except for the protrusion 310 of the second embedded conductor 9. Moreover, you may use the resin base material which affixed the adhesive member only on one side (not shown).

  Thereafter, when the solder balls 17 are joined to the lands on the lower surface of the second resin substrate 4, the multi-stage semiconductor module 1 that can be mounted on the mother board is obtained. According to the manufacturing method of the semiconductor module 1 of the present embodiment described above, since the second resin substrate is thickened, warpage is less likely to occur when the multi-stage semiconductor module 1 is mounted and mounted on the motherboard. At the same time, since the semiconductor chip 2 is covered with the first adhesive member 151 and the second adhesive member 152, mounting with good moisture resistance and mechanical environment reliability is possible. Here, an example is shown in which three first resin substrates 3 are stacked per module, but a larger number may be stacked.

  Next, the manner in which the first adhesive member 151 and the second adhesive member 152 cover the side surfaces and the upper surface of the semiconductor chip 2 in the above-described integration process of the laminated body by heating and pressurization will be described in more detail.

  FIG. 10 is a cross-sectional view showing a state in which the first adhesive member 151 and the second adhesive member 152 cover the side surface and the upper surface of the semiconductor chip 2 in the manufacturing process of the semiconductor module of the present embodiment.

  First, as shown in FIG. 10 (a), the second resin substrate 4 on which the semiconductor chip 2 is mounted, the first-stage second adhesive member 351, in order from the lowest level while aligning the vertical and horizontal positions of each component. The first-stage second resin base material 51, the first-stage first adhesive member 251, and the first-stage first resin substrate 31 on which the semiconductor chip 2 is mounted are laminated in this order.

  Next, as shown in FIG. 10B, the surface (lower surface) opposite to the surface on which the semiconductor chip 2 of the second resin substrate 4 is mounted and the mounting of the semiconductor chip 2 on the first-stage first resin substrate 31. Heating is performed while applying pressure to the surface. In this step, pressure is applied to a position where the constituent members come into contact with each other.

  Next, as shown in FIG. 10C, the first-stage second adhesive member 351 softened by heating covers the upper surface (the surface facing the main surface) and the side surface of the semiconductor chip 2, and the first-stage second The opening portion 10 of the resin base material 51 begins to be filled and a part of the protrusion 310 of the second embedded conductor 9 of the first-stage second resin base material 51 is partly connected to the first-stage first adhesive members 251 and 1. It enters into both adhesive members of the second adhesive member 351 at the stage.

  Subsequently, as shown in FIG. 10 (d), the first-stage first adhesive member 251 and the first-stage second adhesive member 351 completely cover the semiconductor chip 2, and the first-stage second resin substrate. The projections 310 at both ends of the second embedded conductor 9 provided on the first-stage resin substrate 3a are filled with the first-stage first adhesive member 251 and the first-stage first adhesive member 251 after the opening portion 10 of the material 51 is filled. Both adhesive members 351 of the second adhesive member 351 are pierced and mechanically contacted with the connection lands 13 provided on the first-stage first resin substrate 31 and the second resin substrate 4. Thereby, the electrical connection between the connection lands 13 and the second buried conductor 9 is performed. At the same time, the first-stage first resin substrate 31 and the second resin substrate 4 are laminated and bonded through the first-stage second resin base material 51 to obtain a multi-stage semiconductor module. According to the manufacturing method of the semiconductor module 1 of the present embodiment described above, since the second resin substrate is thickened, warping is less likely to occur even when the semiconductor module 1 has a multistage configuration or is mounted on a motherboard. At the same time, since the semiconductor chip 2 is covered with the first adhesive member 151 and the second adhesive member 152, mounting with good moisture resistance and mechanical environment reliability is possible.

  In order to fill the opening 10 with the first adhesive member 151 and the second adhesive member 152, it is sufficient to pressurize and heat in the air. However, in order to completely embed the semiconductor chip 2 without a gap, a vacuum is used. The pressurization and heating may be carried out, and it is also effective to provide a vent hole in the resin substrate in advance.

  4C and 4D, when the adhesive member having a thick central portion is used, the opening 10 is filled more reliably than when an adhesive member having a uniform thickness is used. Can do.

(Second Embodiment)
Hereinafter, a multistage semiconductor module 100 according to a second embodiment of the present invention will be described with reference to FIGS.

−Structure of semiconductor module−
FIG. 11 is a schematic perspective view showing the overall configuration of the multi-stage semiconductor module 100 of the present embodiment. FIG. 12 is a sectional view of the multi-stage semiconductor module of the present embodiment taken along the line XII-XII shown in FIG. It is sectional drawing when doing. In these figures, the thickness, length, etc. of each figure differ from the actual shape from the viewpoint of drawing. Also, the number and shape of the embedded conductors and external connection terminals for external connection are different from actual shapes, and are easy to show. The same applies to the subsequent drawings. 11 and 12, the same members as those in the first embodiment are denoted by the same reference numerals as those in FIGS.

  The multi-stage semiconductor module 100 of the present embodiment is different from the multi-stage semiconductor module 100 of the first embodiment in that an adhesive layer (second adhesive member) previously bonded to the lower surface of the sheet member 5 in the resin substrate laminating process. ) 15 is provided.

  As shown in FIGS. 11 and 12, the semiconductor module 100 of the present embodiment is formed by alternately laminating the first resin substrate 3 and the sheet member 5 on which the semiconductor chip 2 is mounted on the upper surface. . Furthermore, in the semiconductor module 100, the thickness of the resin substrate (second resin substrate 4) used in the lowermost layer is made thicker than other resin substrates, and solder balls serving as external connection terminals on the lower surface of the second resin substrate 4 17 is provided. The semiconductor module 100 has a structure in which the first resin substrate 3, the second resin substrate 4, and the sheet member 5 are laminated and integrated by heating and pressing. In the example of this embodiment, a plurality of first resin substrates 3 are laminated together with the sheet member 5 in the semiconductor module 100. In the semiconductor module 100 of the present embodiment, the upper surface (back surface, ie, the surface facing the main surface) and side surfaces of the semiconductor chip 2 are covered with the first adhesive member 151 that is a part of the sheet member 5. The difference from the semiconductor module of the first embodiment is that the second adhesive member does not cover the semiconductor chip 2.

  The structure of the semiconductor module of this embodiment will be described in further detail.

  Since the structures of the first resin substrate 3 and the second resin substrate 4 used in the semiconductor module 100 of the present embodiment are the same as those of the first embodiment, they are omitted here.

  Next, the sheet member 5 includes a second resin base material 16 in which an opening 10 capable of accommodating the semiconductor chip 2 is formed in the central region, and the first resin substrate 3 in the second resin base material 16. A second embedded conductor 9 made of a conductive resin material embedded in a position corresponding to the first embedded conductor 7 provided in the substrate, and an opening 10 capable of accommodating the semiconductor chip 2 in the center region. The adhesive layer 15 provided on the lower surface of the second resin base material 16 and the upper surface of the second resin base material 16 are disposed on the upper surface and the side surfaces of the semiconductor chip 2. And a first adhesive member 151 to be filled.

  The first adhesive member 151 and the adhesive layer 15 are both made of a material that is softened by heating and produces adhesiveness, and may be made of the same material.

  The second embedded conductor 9 has protrusions 310 having both ends protruding from the surfaces of the second resin base material 16, the first adhesive member 151, and the adhesive layer 15 at a predetermined height. Further, the second embedded conductor 9 is in a semi-cured state before lamination, and is compressed and cured by the pressure and heating after lamination, and the first resin substrate 3 and the second resin substrate 4 An electrical connection is made mainly by mechanical contact with one embedded conductor 7. A top view of the second resin base material 16 constituting the sheet member 5 is the same as FIG. In the semiconductor module 100, the first adhesive member 151 that bonds the lower surface (the surface facing the mounting surface) of the first resin substrate 3 and the upper surface of the sheet member 5 is the first adhesive member of the first embodiment. This is the same as the adhesive member 151, and the description is omitted here. The first adhesive member 151 may have a uniform thickness, or may have a thickness only at the center.

  The semiconductor module 100 of this embodiment has the above configuration. In addition, as the 1st resin base material 8 which comprises the 1st resin substrate 3 and the 2nd resin substrate 4, and the 2nd resin base material 16 which comprises the sheet | seat member 5, glass epoxy resin or aramid epoxy resin However, the first resin substrate 3 and the second resin substrate 4 use, for example, a glass epoxy resin, and the sheet member 5 uses, for example, an aramid epoxy resin. Different materials may be used. Both planar external dimensions are the same. Further, the first adhesive member 151 and the adhesive layer 15 provided on the sheet member 5 may be made of a prepreg-like glass epoxy resin, an aramid epoxy resin, or the like. The planar external dimensions are the same as those of the resin substrate.

  Further, before the resin substrate and the sheet member 5 are laminated, the adhesive layer of the first-stage second resin base 51, the second-stage second resin base 52, and the third-stage second resin base 53 The first-stage first adhesive member 251, the second-stage first adhesive member 252, and the third-stage first adhesive member 253 are respectively projected on the second embedded conductor 9 on the surface (upper surface) not provided with 15. It may be affixed except for the portion 310 (not shown, see FIG. 9 for symbols).

  In addition, an adhesive member may be disposed on the lower surface of each second resin base material 16 and an adhesive layer 15 attached to the upper surface before the lamination step may be provided (not shown).

  The semiconductor module 100 of this embodiment described above exhibits substantially the same effect as the semiconductor module 1 according to the first embodiment. That is, according to the semiconductor module of the present embodiment, the second resin substrate 4 disposed in the lowermost layer is formed thicker than the first resin substrate 3, so that even when the module has a multi-stage configuration, warpage is caused. Can be very small. In addition, in the semiconductor module of the present embodiment, the first adhesive member 151 and the adhesive layer 15 cover the side surface and the upper surface of the semiconductor chip 2, so moisture, moisture, and corrosion that corrodes the wiring material in the opening 10. This makes it difficult for gasses to enter and prevents failures due to disconnection of wiring. That is, the semiconductor module 100 of the present embodiment has higher moisture resistance and improved reliability than the conventional semiconductor module. Therefore, it is difficult for defects to occur in mounting on the mother board using the solder balls 17, and a low-cost and highly reliable semiconductor module can be realized.

  Furthermore, when the thickness of the highly rigid second resin base material 16 constituting the sheet member 5 is thicker than that of the semiconductor chip 2, the load applied to the semiconductor chip 2 during manufacturing can be reduced. It is possible to prevent a defect from occurring at the connection portion between the semiconductor chip 2 and the resin substrate.

-Semiconductor module manufacturing method-
Hereinafter, the steps of laminating and integrating the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted and the sheet member 5 disposed between the resin substrates will be described with reference to FIGS. 13 and 14. It explains using.

  FIGS. 13A to 13G are cross-sectional views showing a method for manufacturing a sheet member used in the semiconductor module of this embodiment, and FIG. 14 shows the semiconductor module of this embodiment shown in FIGS. 11 and 12. It is the figure shown disassembled.

  First, as shown to Fig.13 (a), the glass cloth epoxy resin board | substrate etc. whose thickness is thicker than the semiconductor chip 2 are prepared as the 2nd resin base material 16 of the sheet | seat member 5 of this embodiment. For example, when the thickness of the semiconductor chip 2 is 75 μm, it is desirable that the thickness of the second resin base material 16 is about 100 μm.

  Next, as shown in FIG. 13B, a prepreg adhesive layer (adhesive layer 15) made of glass epoxy resin or aramid epoxy resin is formed on one surface of the second resin base material 16. The thickness of the adhesive layer 15 is 20 μm or more.

  Subsequently, as shown in FIG. 13C, a heat-resistant protective film 205 made of polyimide or PET resin is formed on both surfaces of the second resin base material 16.

  Next, as shown in FIG. 13 (d), through holes 90 are formed by laser at predetermined positions of the second resin base material 16, the adhesive layer 15, and the heat resistant protective film 205. At the same time, the opening 10 having a size capable of accommodating the semiconductor chip 2 is formed in the central region of the second resin base material 16. Thereafter, the heat-resistant protective film 205 is peeled off from the second resin base material 16 and the adhesive layer 15.

  Next, as shown in FIG. 13 (e), a masking film in which holes are provided at positions corresponding to the through holes 90 in a plan view on the upper surface of the second resin base material 16 and the lower surface of the adhesive layer 15. 21 is pasted. This hole is for forming the projection 310 of the second embedded conductor 9. Thereafter, the through-hole 90 is filled with a conductive paste by, for example, screen printing. At this time, a masking film 21 thinner than that formed on the opposite surface is formed on the surface on which the adhesive layer 15 is formed. Thereby, the height of the protrusion 310 on the upper surface side of the second resin base material 16 of the second embedded conductor 9 and the height of the protrusion 310 on the lower surface side of the second resin base material 16 can be made the same. However, the heights of the protrusions 310 are not necessarily the same on both sides of the second resin base material 16 and may be different from each other.

  Next, as shown in FIG. 13 (f), the conductive paste filled in the holes of the through holes 90 and the masking film 21 is heated while being pressurized, thereby increasing the filling density of the conductive paste and increasing the conductive paste. The conductive paste is electrically reduced in resistance and made into a semi-cured state.

  Next, as shown in FIG. 13G, when the masking film 21 is peeled off from the second resin base material 16, the second resin base material 16 having the adhesive layer 15 on one surface of the sheet member 5 can be produced. Since the second embedded conductor 9 is still in a semi-cured state at the end of this step, it has a characteristic of being cured at the same time as being compressed by pressing and heating.

  Note that the method for mounting the semiconductor chip 2 on each resin substrate, the method for connecting the solder balls 17 to the second resin substrate 4 and the like are the same as those in the first embodiment, and thus are omitted here.

  By configuring the sheet member 5 as described above, in addition to the advantages obtained with the semiconductor module according to the first embodiment, the number of components can be reduced, and the manufacturing cost can be reduced.

  Next, the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted, the second resin base material 16 having the adhesive layer 15 on one side, and the first adhesive member 151 are configured. The process of laminating and integrating the sheet member 5 to be integrated will be described with reference to FIG. In FIG. 14, for ease of explanation, three first resin substrates 3 are divided into a first-stage first resin substrate 31, a second-stage first resin substrate 32, and a third-stage first resin substrate 33. I will distinguish it. Similarly for the second resin base material 16 constituting the sheet member 5, the first-stage second resin base material 51, the second-stage second resin base material 52, and the third-stage second resin base material 53. I will distinguish it. Similarly, the first adhesive member 151 is distinguished from the first-stage first adhesive member 251, the second-stage first adhesive member 252, and the third-stage first adhesive member 253.

  As shown in FIG. 14, the second resin substrate 4 is arranged at the lowest level, and the first level second resin base material 51, the first level first adhesive member 251, the first level first adhesive 1 The resin substrates 31 are arranged in order, and then the second-stage second resin base material 52, the second-stage first adhesive member 252, the second-stage first resin substrate 32, and the third-stage second resin alternately. The base material 53, the third-stage first adhesive member 253, and the third-stage first resin substrate 33 are sequentially arranged.

  At this time, each of the semiconductor chips 2 mounted on the plurality of first resin substrates 3 and the semiconductor chip 2 mounted on the second resin substrate 4 are arranged so as to overlap each other in plan view. To do. And each 1st resin substrate 3 and 2nd resin substrate 4 are arrange | positioned so that the semiconductor chip 2 may be accommodated in the opening part 10 of the 2nd resin base material 16. FIG. Further, the connection lands 13 of the first resin substrate 3 and the second resin substrate 4 are accurately connected to the protrusions 310 of the second embedded conductor 9 provided on the sheet member 5. Perform alignment.

  After laminating the resin substrate and the sheet member 5 in such an arrangement and bringing the members into close contact with each other, heating and pressurization are performed on the laminate in the atmosphere. As a result, the first adhesive members 151 provided from the first stage to the third stage and the adhesive layer 15 provided on one surface of each second resin base material 16 are softened, and the second resin substrate 4 and The resin substrates from the first-stage first resin substrate 31 to the third-stage first resin substrate 33 are bonded. Further, the second resin substrate 4 is connected to each connection land 13 from the first-stage first resin substrate 31 to the third-stage first resin substrate 33. At this time, the protruding portion 310 of the second embedded conductor 9 is disposed on one side of the second resin base material 16 and penetrates the softened first adhesive member 151 to mechanically connect with the first embedded conductor 7. To make an electrical connection. At the same time, the first adhesive member 151 flows and is injected into the opening 10 of the second resin base material 16 to cover the upper surface and side surfaces of the semiconductor chip 2 disposed in the opening 10. The opening 10 is filled with the first adhesive member 151.

  That is, by applying pressure and heating, the first adhesive member 151 is softened, and the semi-cured conductive paste is compressed and densely filled in the through holes. Further, good contact with the connection land 13 occurs, and a low resistance connection is formed. If the semiconductor module is cooled and taken out after pressurizing and heating for a predetermined time, a semiconductor module having a multistage structure in which the semiconductor chip 2 is covered and integrated with the first adhesive member 151 is obtained.

  According to the manufacturing method of the semiconductor module 100 of the present embodiment described above, since the second resin substrate 4 is thickened, warpage occurs even when the multi-stage semiconductor module 1 is mounted and mounted on the motherboard. While becoming difficult, since the semiconductor chip 2 is covered with the first adhesive member 151, the moisture resistance and the mechanical environment reliability can be improved as compared with the conventional semiconductor module.

(Third embodiment)
A multi-stage semiconductor module 110 according to a third embodiment of the present invention will be described below with reference to FIGS.

  FIG. 15 is a schematic perspective view showing the entire configuration of the semiconductor module according to the third embodiment. FIG. 16 is a diagram when the semiconductor module of this embodiment is cut along the XVI-XVI line shown in FIG. It is sectional drawing. The same members as those of the semiconductor module according to the first embodiment and the second embodiment are denoted by the same reference numerals as those in FIGS. 1, 2, 11, and 12, and detailed description thereof is omitted.

−Structure of semiconductor module−
As shown in FIGS. 15 and 16, the semiconductor module 110 of the present embodiment includes a sheet member 5 in which a second resin substrate 4 on which the semiconductor chip 2 is mounted and an opening 10 that accommodates the semiconductor chip 2 is formed. And the first resin substrate 3 on which the semiconductor chip 2 is mounted are alternately laminated a plurality of times, and a laminated body disposed on the second resin substrate 4 is provided. The second resin substrate 4 arranged at the lowest stage among the resin substrates is thicker than the first resin substrate 3. Also, solder balls 17 serving as external connection terminals for connection to a mother board (not shown) are provided on the lower surface of the second resin substrate 4. The second resin substrate 4 and the first resin substrate 3 are bonded and integrated by an adhesive layer 15 that is a part of the sheet member 5.

  The feature of the semiconductor module 110 of this embodiment is that the upper surface (back surface) and side surfaces of each semiconductor chip 2 disposed in the opening 10 are covered with a low stress resin 320 that is softened at a lower temperature than the adhesive layer 15. The opening 10 is filled with the low-stress resin 320.

  The structure of the semiconductor module of this embodiment will be described in further detail.

  The structure of the first resin substrate 3 and the second resin substrate 4 used in the semiconductor module 110 of this embodiment is the same as that of the first embodiment, and is omitted here.

  Next, the sheet member 5 includes a second resin base material 16 in which an opening 10 capable of accommodating the semiconductor chip 2 is formed in the central region, and the first resin substrate 3 in the second resin base material 16. A second embedded conductor 9 made of a conductive resin material embedded in a position corresponding to the first embedded conductor 7 provided in the substrate, and an opening 10 capable of accommodating the semiconductor chip 2 in the center region. 2 and the adhesive layer 15 provided on the upper surface and the lower surface of the resin base material 16.

  Further, as described above, the upper surface and side surfaces of the semiconductor chip 2 except the semiconductor chip 2 disposed at the uppermost stage are covered with the low stress resin 320. The low-stress resin 320 is made of a material that softens at a lower temperature than the adhesive layer 15 and has a lower rigidity than the adhesive layer 15 at room temperature. As a material of the low stress resin 320, for example, an epoxy resin, a butadiene resin, or a resin obtained by modifying these resins with another low-temperature softening type low stress resin is used. The low stress resin 320 is disposed on the sheet member 5 in the laminating process. In the sheet member 5 before lamination, the thickness of the low stress resin 320 is preferably thinner than the thickness of the second resin base material 16.

  In addition, the second embedded conductor 9 of the sheet member 5 has protrusions 310 protruding from the second resin base material 16 and the adhesive layer 15 at both ends, and is semi-cured before the lamination process at the time of manufacture. It is in a state. The second embedded conductor 9 is mechanically brought into contact with the first embedded conductor 7 by being heated and pressurized in the manufacturing process, and a semiconductor element or the like provided on the first embedded conductor 7 and the semiconductor chip 2. And electrically connected. In addition, the 2nd resin base material 16 which comprises the sheet | seat member 5 of this embodiment is the same as the 2nd resin base material of 1st Embodiment shown to Fig.5 (a).

  With the above configuration, in the semiconductor module 110 of the present embodiment, the stress applied to the semiconductor chip 2 mounted on the resin substrate can be reduced, so that disconnection and connection failure in the semiconductor chip 2 occur, and the semiconductor chip Occurrence of poor connection between 2 and the resin substrate can be prevented.

  In addition, the 1st resin base material 8 which comprises the 1st resin substrate 3 and the 2nd resin substrate 4, and the 2nd resin base material 16 which comprises the sheet | seat member 5 are glass epoxy resin, an aramid epoxy resin, etc. You may be comprised from the mutually same material. In addition, for example, the material of the first resin substrate 3 and the second resin substrate 4 may be glass epoxy resin, and the material of the sheet member 5 may be aramid epoxy resin. . The planar outer dimensions of each resin substrate and the sheet member 5 are the same. Further, an adhesive layer 15 made of a prepreg-like glass epoxy resin or an aramid epoxy resin is used for adhesion between the second resin base material 16 of the sheet member 5 and the first resin substrate 3 or the second resin substrate 4. Also good.

-Semiconductor module manufacturing method-
Hereinafter, the steps of laminating and integrating the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted and the sheet member 5 disposed between the resin substrates will be described with reference to FIGS. 17 and 18. It explains using.

  17 (a) to 17 (g) are cross-sectional views showing a method for manufacturing a sheet member used in the semiconductor module of this embodiment, and FIG. 18 shows the semiconductor module of this embodiment shown in FIGS. It is the figure shown disassembled.

  First, as shown to Fig.17 (a), the glass cloth epoxy resin board | substrate etc. whose thickness is thicker than the semiconductor chip 2 are prepared as the 2nd resin base material 16 used for the sheet | seat member 5 of this embodiment. For example, when the thickness of the semiconductor chip 2 is 75 μm, it is desirable that the thickness of the second resin base material 16 is about 100 μm.

  Next, as shown in FIG. 17B, a prepreg adhesive layer (adhesive layer 15) made using glass epoxy resin or aramid epoxy resin is formed on both surfaces of the second resin base material 16. The thickness of the adhesive layer 15 is 20 μm or more.

  Next, as shown in FIG. 17C, a heat resistant protective film 205 made of polyimide or PET resin is formed on both surfaces of the second resin base material 16.

  Next, as shown in FIG. 17D, through holes 90 are formed by laser at predetermined positions of the second resin base material 16, the adhesive layer 15, and the heat-resistant protective film 205. At the same time, the opening 10 having a size capable of accommodating the semiconductor chip 2 is formed in the central region of the second resin substrate 16. Thereafter, the heat resistant protective film 205 is peeled off from the adhesive layer 15.

  Next, as shown in FIG. 17E, a hole is formed on the adhesive layer 15 formed on both surfaces of the second resin base material 16 at a position overlapping the through-hole 90 in plan view. A masking film 21 is attached. This hole is for forming the projection 310 of the second embedded conductor 9. Thereafter, the through-hole 90 is filled with a conductive paste by, for example, screen printing.

  Next, as shown in FIG. 17 (f), the conductive paste filled in the through holes 90 and the holes of the masking film 21 is heated while being pressurized, so that the packing density is increased and the conductive paste is electrically charged. Thus, the resistance is lowered and the semi-cured state is obtained.

  Finally, as shown in FIG. 17G, when the masking film 21 is peeled off from the second resin base material 16, the second resin base material 16 having the adhesive layers 15 on both surfaces of the sheet member 5 can be produced. Since the second embedded conductor 9 is still in a semi-cured state at the end of this step, it has a characteristic of being cured at the same time as being compressed by pressing and heating.

  Note that the method for mounting the semiconductor chip 2 on each resin substrate, the method for connecting the solder balls 17 to the second resin substrate 4 and the like are the same as those in the first embodiment, and thus are omitted here.

  By setting the sheet member 5 to the above configuration, a semiconductor module can be formed without using an adhesive member as shown in FIGS. In this case, by separately providing an adhesive member whose shape is close to the shape of the semiconductor chip 2, the adhesive member can be easily created as compared with the semiconductor module of the first embodiment. Therefore, in addition to the advantages obtained with the semiconductor module of the first embodiment, the manufacture of the adhesive member is facilitated, and the manufacturing cost of the semiconductor module can be reduced.

  Next, the first resin substrate 3 and the second resin substrate 4 on which the semiconductor chip 2 is mounted, the second resin base material 16 having the adhesive layer 15 on both surfaces, and the low stress resin 320 are configured. The process of laminating and integrating the sheet member 5 will be described with reference to FIG. In FIG. 18, for ease of explanation, three first resin substrates 3 are divided into a first-stage first resin substrate 31, a second-stage first resin substrate 32, and a third-stage first resin substrate 33. I will distinguish them from each other. The low-stress resin 320 provided in three places is also distinguished from the first-stage low-stress resin 41, the second-stage low-stress resin 42, and the third-stage low-stress resin 43, respectively. Similarly for the second resin base material 16 used for the sheet member 5, the first-stage second resin base material 51, the second-stage second resin base material 52, and the third-stage second resin base material 53. I will distinguish them.

  As shown in FIG. 18, the second resin substrate 4 is arranged at the lowermost stage, and the first-stage second resin base material 51, the first-stage low-stress resin 41, and the first-stage first resin board are arranged thereon. 31 are arranged in order, and then the second-stage second resin base material 52, the second-stage low-stress resin 42, the second-stage first resin substrate 32, the third-stage second resin base material 53, alternately, A third-stage low-stress resin 43 and a third-stage first resin substrate 33 are arranged.

  At this time, each of the semiconductor chips 2 mounted on the plurality of first resin substrates 3 and the semiconductor chip 2 mounted on the second resin substrate 4 are arranged so as to overlap each other in plan view. To do. And each 1st resin substrate 3 and 2nd resin substrate 4 are arrange | positioned so that the semiconductor chip 2 may be accommodated in the opening part 10 of the 2nd resin base material 16. FIG.

  Next, a sheet made of a material having a planar size smaller than the opening 10, softened at a lower temperature than the adhesive layer 15, and lower in rigidity than the adhesive layer 15 on the semiconductor chip 2 accommodated in the opening 10. A low-stress resin 320 is placed.

  Then, the first resin substrate 3, the sheet member 5, and the low stress resin 320 in the next stage are sequentially arranged. Further, the connection lands 13 of the first resin substrate 3 and the second resin substrate 4 are accurately connected to the protrusions 310 of the second embedded conductor 9 embedded in the second resin base material 16. Align so that

  After laminating the resin substrate and the sheet member 5 in such an arrangement and bringing the members into close contact with each other, heating and pressurization are performed on the laminate in the atmosphere. As a result, the low-stress resin 320 provided in the first to third stages is first softened, and then the adhesive layer 15 in contact with both surfaces of each resin base material is softened. Thus, the second resin substrate 4 and the first-stage first resin substrate 31 to the third-stage first resin substrate 33 are bonded to the adjacent second resin base material. Furthermore, the second resin substrate 4, the connection land 13 from the first-stage first resin substrate 31 to the third-stage first resin substrate 33, and the protrusion 310 of the second embedded conductor 9 are mechanically connected. An electrical connection is made in contact with. At the same time, the low stress resin 320 flows to cover the upper surface and side surfaces of the semiconductor chip 2 disposed in the opening 10, and the opening 10 is filled with the low stress resin 320.

  That is, by applying pressure and heating, the adhesive layer 15 is softened, and the semi-cured conductive paste is compressed and densely filled into the through holes. Further, good contact with the connection land 13 occurs, and a low-resistance connection is achieved. If the semiconductor module is cooled and taken out after pressing and heating for a predetermined time, the semiconductor chip 2 is covered with the low-stress resin 320, and a plurality of resin substrate stacks on which the semiconductor chips are mounted are integrated. A semiconductor module is obtained.

(Fourth embodiment)
A multi-stage semiconductor module according to the fourth embodiment of the present invention will be described below with reference to FIG. FIG. 19 is a cross-sectional view showing the overall configuration of a semiconductor module according to the fourth embodiment.

  As shown in the figure, the semiconductor module 125 of this embodiment includes semiconductor chips 2a and 2d mounted on a first resin substrate 3 arranged at the uppermost stage and a second resin substrate 4 arranged at the lowermost stage. However, it is characterized by being thicker than the semiconductor chips 2b and 2c mounted on the other first resin substrate 3. Accordingly, in the semiconductor module 125 of the present embodiment, the sheet member 5a on the lower side of the sheet member 5 is also thickened. Since the other points are the same as those of the semiconductor modules 1, 100, and 110 according to the first to third embodiments, the description thereof is omitted.

  When the semiconductor module 125 is configured as described above, the rigidity of the semiconductor chips 2a and 2d is increased, so that warpage can be suppressed when the module is formed. In addition, since the upper and lower semiconductor chips 2a and 2d, on which pressure is easily applied during pressurization and heating, are made thicker, a multi-stage configuration that is resistant to cracks and high moisture resistance even when pressure is applied to the semiconductor element. The semiconductor module 125 can be realized.

(Fifth embodiment)
A multi-stage semiconductor module 130 according to a fifth embodiment of the present invention will be described with reference to FIG. FIG. 20 is a cross-sectional view illustrating a configuration of a semiconductor module 130 according to the fifth embodiment.

  As shown in FIG. 20, the semiconductor module 130 of the present embodiment is further different from the semiconductor modules 1, 100, 110 of the first embodiment to the third embodiment in the first resin at the top of the module. A feature is that a rigid plate 22 having the same planar size as the substrate 3 is bonded.

  That is, the semiconductor module 130 of this embodiment is attached to the semiconductor module of the first to third embodiments on the first resin substrate 3 provided on the uppermost stage among the resin substrates, and is planarly viewed. A resin base material 23 having the same outer shape as the first resin substrate 3 as viewed, and affixed on the resin base material 23, having the same outer shape as the first resin substrate 3, and having a thermal conductivity of the first resin A rigid plate 22 larger than the base material 8 and the second resin base material 16 is further provided.

  As a method of adhering the resin base material 23 and the rigid plate 22, in the step of laminating the resin substrate and the sheet member 5, the resin base material 23 and the rigid plate 22 are laminated together with other members, and pressure and heating are performed. Can be integrated simultaneously with other members. Or after producing the 1st-3rd semiconductor module, you may affix the resin base material 23 and the rigid board 22. FIG.

  The rigid plate 22 may be made of a metal having high rigidity and high thermal conductivity such as copper, iron, aluminum, or 42 alloy, or a ceramic material such as zirconia, a plastic containing metal powder, or the like. It may be configured.

  Furthermore, for example, the warp generated in the semiconductor module 1 according to the first embodiment can be measured, and the material and thickness of the rigid plate 22 can be selected so as to cancel the warp. Alternatively, when a semiconductor module is manufactured under a certain condition, if it is known in advance that warpage occurs in a fixed direction, the rigid plate 22 designed so that the warpage can be canceled when pressing and heating is provided at the uppermost stage. You may pressurize and heat together after arranging. In order to cancel the warpage, a material and a thickness having different thermal expansion coefficients may be obtained by calculation according to the warp direction. As a result, a semiconductor module with minimal warpage can be produced, and the occurrence of poor connection between the mother board and the solder ball 17 can be suppressed.

  Thus, in the semiconductor module 130 of this embodiment, the warpage of the entire module is suppressed, and the rigid plate 22 is provided so that heat is uniformly applied to the sheet member and the resin substrate during heating. Can do.

  The semiconductor chips 2 in the semiconductor module 130 may all have the same thickness, but the semiconductor chip 2 mounted on the second resin substrate 4 is replaced by the semiconductor chip 2 mounted on the first resin substrate 3. Can also be thickened. In this case, since the upper part of the module is reinforced by the rigid plate 22 and the lower part of the module is also reinforced by the thick semiconductor chip 2, the warpage of the semiconductor module can be further effectively reduced.

  FIG. 21 is a cross-sectional view showing a modification of the multi-stage semiconductor module 130 according to the present embodiment.

  The semiconductor module 140 of this modification is formed on the first resin substrate 3 on which the semiconductor chip 2 arranged at the uppermost stage of the semiconductor modules 1, 100, 110 from the first embodiment to the third embodiment is mounted. Instead, a feature is that a rigid plate 22 bonded to the sheet member 5 is provided. In this case, the rigid plate 22 is provided so that at least the surface layer portion has insulating properties. Also in this configuration, a material having a characteristic of canceling the warp can be selected and used as the rigid plate 22.

(Sixth embodiment)
A multi-stage semiconductor module 170 according to a sixth embodiment of the present invention will be described with reference to FIG. FIG. 22 is a cross-sectional view showing a configuration of a semiconductor module according to the sixth embodiment.

  In the semiconductor module 170 of the present embodiment, the diameter of the first embedded conductors 7a of the first resin substrates 3a and 3b arranged at the center stage is the first resin substrate 3c arranged at the uppermost stage among the resin substrates. The diameter is larger than the diameter of the first embedded conductor 7b provided on the second resin substrate 4, respectively.

  Further, the diameter of the second embedded conductor 9a of the central-stage sheet member 5c is also the sheet member 5b disposed on the second resin substrate 4 disposed on the lowermost stage (among the resin substrates). The diameter is larger than the diameter of the second embedded conductor 9b provided on the sheet member 5d disposed under the disposed first resin substrate 3c.

  When each member is stacked and heated and pressed, pressure is not easily applied to the sheet member 5 and the first resin substrate 3 near the center stage, and the first embedded member 7 and the second embedded member 9 cannot be sufficiently compressed. There was a case. According to the semiconductor module of the present embodiment, the first resin substrates 3 and the sheet members 5 are alternately laminated, the second resin substrate 4 is disposed at the bottom, and these members are heated and pressurized. When integrated, the electric resistance of the entire embedded conductor including the central stage can be made uniform. For this reason, even if the pressurization and heating to the middle part of the semiconductor module become insufficient compared to the upper and lower sides of the semiconductor module, the resistance of the embedded conductor provided in the middle part can be lowered. it can. Moreover, since the upper surface and the side surface of the semiconductor chip 2 are covered with an adhesive layer or an adhesive member as in the semiconductor modules of the previous embodiments, the semiconductor module 170 of the present embodiment realizes high moisture resistance. Can do.

(Seventh embodiment)
A multistage semiconductor module according to a seventh embodiment of the present invention will be described with reference to FIGS.

  FIGS. 23A and 23B are views showing the upper surface and the lower surface of the first resin substrate used in the semiconductor module according to the seventh embodiment. Here, the upper surface of the first resin substrate 300 is a surface on which the semiconductor chip 2 is mounted.

  As shown in FIG. 23, the semiconductor module of the present embodiment concentrates on the central region of the first resin substrate 300 and the second resin substrate (not shown) where the semiconductor chip 200 is mounted. The connection terminal 116 is provided.

  With this arrangement, the wiring 120 that connects the semiconductor element connection terminal 116 and the connection land 131 is also different from the wiring formed in the semiconductor module 1 of the first embodiment. That is, as shown in FIGS. 23A and 23B, in the semiconductor module of this embodiment, the wiring 120 is formed on both sides of the upper surface and the lower surface of the resin substrate, so that the semiconductor element connection terminals 116 are fine pitched. However, the wiring 120 is formed at a relatively coarse pitch.

  24A and 24B are plan views of the semiconductor chip 200 mounted on the first resin substrate of the present embodiment, and along the line XXIVb-XXIVb of the first resin substrate shown in FIG. It is sectional drawing of a semiconductor chip. As shown in the figure, electrode bumps 280 are intensively arranged at the center of the semiconductor chip 200, and auxiliary protrusions 330 having the same height are provided at both ends in the longitudinal direction.

  FIG. 25 is a cross-sectional view showing a state where the semiconductor chip 200 of this embodiment is mounted on the first resin substrate 300. As shown in the figure, when the semiconductor chip 200 is mounted, the semiconductor chip 200 is disposed on the first resin substrate 300, and the electrode bumps 280 and the semiconductor element connection terminals 116 are connected by solder or conductive adhesive. Join. Since there is the auxiliary protrusion 330 of the semiconductor chip 200 when this alignment is performed, the semiconductor chip 200 does not tilt and can be bonded while maintaining a good parallelism with the first resin substrate 300. Further, by providing the auxiliary protrusion 330, it is possible to prevent the occurrence of cracks or the like even when a load is applied to the semiconductor chip 200.

  After mounting, the gap between the first resin substrate 300 and the semiconductor chip 200 is filled with a liquid resin 240 containing an inorganic filler and sealed. If the through hole 250 is formed in the vicinity of the semiconductor element connection terminal 116 of the first resin substrate 300 in advance, the liquid resin 240 can be easily injected from the back surface side after mounting. In addition, if the dummy electrode 140 is provided in the position corresponding to the auxiliary protrusion 330 of the semiconductor chip 200, the parallelism between the semiconductor chip 200 and the first resin substrate 300 can be better maintained. Further, sealing with the liquid resin 240 is not always necessary and can be omitted. Alternatively, the peripheral portion including the auxiliary protrusion 330 may be sealed with a liquid resin 240 and further using a flexible resin material. If a material having flexibility is used, stress due to a difference in linear expansion coefficient can be absorbed.

  The first resin substrate 300 has a semiconductor element connection terminal 116, a connection land 131, a wiring 120, a dummy electrode 140, and a first embedded conductor 7 on a first resin base material 80. The first resin substrate 300 or a second resin substrate (not shown) produced in the same manner as the first resin substrate 300 and sheet members having a shape corresponding to this arrangement are alternately laminated. When integrated by heating and pressing, the semiconductor module of this embodiment is completed (not shown).

  The multi-stage semiconductor module according to the present embodiment manufactured in this way has a small area of the junction between the semiconductor chip 200, the first resin substrate 300, and the second resin substrate (not shown) and is concentrated. Therefore, it is possible to effectively suppress the warpage of the bimetal structure caused by the difference in linear expansion coefficient between the semiconductor chip 200 and the first resin substrate 300 (or the second resin substrate).

(Eighth embodiment)
A multi-stage semiconductor module according to an eighth embodiment of the present invention will be described with reference to FIG. FIG. 26 is a plan view of the first resin substrate 400 used in the semiconductor module of this embodiment.

  As shown in the figure, in the semiconductor module of the present embodiment, the diameter of the first embedded conductor 132 connected to the electrode bump provided on the semiconductor chip is formed larger than that of the other first embedded conductor 7. It is a feature. Here, the electrode bumps are set in advance, for example, input / output terminals, power supply terminals, ground terminals, analog terminals, etc. that require high-speed operation of the semiconductor chip (for example, exchange of digital signals of 100 MHz or higher). It is. These terminals need to form a stabilized line with reduced resistance and reduced impedance. On the other hand, since it is necessary to arrange the electrode bumps and the wiring connected thereto with high density, it is necessary to make the wiring and via diameters as small as possible for the other terminals in accordance with the signal characteristics. Here, the diameter of the first embedded conductor (not shown) constituting the transmission line connected to the input / output terminal, the power supply, the ground terminal, the analog terminal, etc., which requires high-speed operation of the semiconductor chip, and the periphery thereof The diameter of the connecting land 131 to be connected is increased.

  Although not shown, the diameter of the second embedded conductor of the sheet member corresponding to this is also increased. If the first resin substrate 400, the second resin substrate 4 and the sheet member 5 having such a configuration are stacked in the same manner as in the manufacturing method of the first embodiment, and pressed and heated, this embodiment A multistage semiconductor module (not shown) is obtained.

  According to the semiconductor module of the present embodiment, among the signals processed through the input / output terminals of the semiconductor chip, a transmission line for transmitting / receiving a high-speed operation signal or a transmission line for transmitting / receiving an analog signal is required. Since the diameters of the first embedded conductor and the second embedded conductor constituting part of the transmission line are increased, it is possible to stably transmit and receive electrical signals. In particular, in laminated structures, the hole diameter and conductor diameter for embedding may be different for each of the laminated resin substrates and sheet members, the bonding at the embedded conductor portion may be incomplete, and the connection resistance may vary due to warping. and so on. For this reason, there is a possibility that signal reflection occurs due to impedance variation or mismatch between the respective layers, resulting in characteristic fluctuations. However, according to the semiconductor module of this embodiment, such a problem can be prevented. Furthermore, since the resistance component of the transmission line can be reduced, heat generation inside the module due to Joule heat can be suppressed.

  In the first embodiment to the eighth embodiment, an example in which a glass epoxy resin or the like is used as the first resin substrate 400 has been mainly described, but the present invention is not limited to this. For example, the weight of the first resin substrate 400, 3, 3a, 3b, 3c, 300, the first resin substrate 8 of the second resin substrate 4, or the second resin substrate 16 of the sheet member 5 is 70 weight. A mixture containing% to 95% by weight of an inorganic filler and a thermosetting resin may be used. By using such a material, the thermal expansion coefficient of the resin substrate can be brought close to that of the semiconductor chip, which is effective in suppressing warpage.

(Ninth embodiment)
A multi-stage semiconductor module 160 according to a ninth embodiment of the present invention will be described below with reference to FIGS.

  FIG. 27 is a cross-sectional view of the multi-stage semiconductor module 160 of the present embodiment. In these figures, the thickness, length, etc. of each figure differ from the actual shape from the viewpoint of drawing. Also, the number and shape of the embedded conductors and external connection terminals for external connection are different from actual shapes, and are easy to show.

  The semiconductor module 160 of this embodiment is formed by alternately laminating the first resin substrate 3 on which the semiconductor chip 210 is mounted and the sheet member 5. Further, in the semiconductor module 160, the thickness of the resin substrate (second resin substrate 4) used in the lowermost layer is made thicker than other resin substrates, and solder balls serving as external connection terminals are formed on the lower surface of the second resin substrate 4. 17 is provided.

  Each sheet member 5 is formed on the upper surface of the second resin base material 16 having the opening 10 for accommodating the semiconductor chip 210 at the center thereof, and on the upper surface of the second resin base material 16. Formed on the first adhesive member 151 covering the side surface and upper surface of the stopped semiconductor chip 210 and the lower surface of the second resin base material 16, and fused to the first adhesive member 151 in the center region and resin sealed A second adhesive member 152 covering the side surface and the upper surface of the stopped semiconductor chip 210, and a second embedded conductor penetrating the second resin base material 16, the first adhesive member 151, and the second adhesive member 152, respectively. 9.

  Each of the first resin substrates 3 is formed on the first resin base 8 and the upper surface of the first resin base 8, for example, and a plurality of semiconductor element connection terminals (connected to the main surface of the semiconductor chip 210 ( (Not shown), a plurality of first embedded conductors 7 that are provided in the periphery of the first resin substrate 8 and penetrate the first resin substrate 8, and on both surfaces of the first resin substrate 8 And a plurality of connection lands 13 provided at both ends of the first embedded conductor 7 and a plurality of wirings for connecting a predetermined semiconductor element connection terminal to the connection land 13 and the first embedded conductor 7. 12. In addition, connection lands 13 are provided on both surfaces of the second resin substrate 4, and wirings 12 and semiconductor element connection terminals are provided on the upper surface of the second resin substrate 4 in the same manner as the upper surface of the first resin substrate 3. Is provided.

  The feature of the semiconductor module 160 of the present embodiment is that the back surface of the semiconductor chip 210 is bonded to the first resin substrate 3 and the second resin substrate 4 by the insulating fixing agent 62 and the main surface of the semiconductor chip 210. Is connected to the semiconductor element connection terminal by a thin metal wire 60. The main surface of the semiconductor chip 210 and the fine metal wire 60 are sealed with a sealing resin 66 having a smaller planar size than the opening 10 and thinner than the second resin base material 16. As will be described later, the semiconductor chip 210 is mounted on a resin substrate by a conventional die bonding method and a wire bonding method.

  In the semiconductor module 160 of the present embodiment, the sheet member described in the second embodiment or the third embodiment can be used in addition to the sheet member described in the first embodiment. The material and structure of the adhesive member and the resin base material are the same as those in the first embodiment, and a description thereof will be omitted.

  Thus, the structure of the semiconductor module of the present invention can also be applied to the case where the semiconductor chip 210 is connected to the terminal on the resin substrate using the metal thin wire 60.

  Next, a process of forming the first resin substrate on which the resin-encapsulated semiconductor chip 210 is mounted will be described with reference to FIG. 28A to 28D are cross-sectional views illustrating a method for manufacturing the first resin substrate 3 having the resin-encapsulated semiconductor chip 210 in the semiconductor module of the present embodiment.

  First, as shown in FIG. 28A, a first resin substrate 3 having a semiconductor element connection terminal 11, a wiring 12, a connection land 13, a first embedded conductor 7 and the like is prepared.

  Next, as shown in FIG. 28B, an insulating adhesive 62 is applied to the central region of the upper surfaces of the first resin substrate 3 and the second resin substrate 4, and the semiconductor chip 210 is placed. Thereafter, die bonding is performed by heating. Subsequently, the terminal on the main surface of the semiconductor chip 210 and the semiconductor element connection terminal 11 on the first resin substrate 3 are connected by a conventional thin wire bonding method with a fine metal wire 60 made of gold, copper, aluminum or the like.

  Next, as shown in FIG. 28C, a resin molding die 64 having a cavity capable of accommodating the semiconductor chip 210, the fine metal wire 60, and the semiconductor element connection terminal 11 is pushed onto the surface of the first resin substrate 3. Hit it. In this step, the resin molding die 64 and the first resin substrate 3 are kept at a temperature at which the sealing resin 66 melts.

  Next, as shown in FIG. 28 (d), the sealing resin 66 is injected into the cavity of the resin molding die 64. After completion of the injection, the resin molding die 64 is opened after the sealing resin 66 is solidified by holding for a certain period of time. Thereby, the 1st resin substrate 3 used for the semiconductor module 160 of this embodiment can be obtained.

  As a modification of the semiconductor module 160 of this embodiment, a method of sealing the semiconductor chip 210 and the fine metal wire 60 with a liquid sealing resin 68 instead of the resin molding die 64 may be adopted.

  Hereinafter, a process of forming the first resin substrate 3a on which the sealed semiconductor chip 210 is mounted, which is used in a modification of the semiconductor module 160 of the present embodiment, will be described with reference to FIG. 29A to 29D are cross-sectional views showing a method for manufacturing the first resin substrate 3a on which the semiconductor chip 210 is mounted, which is used in a modification of the semiconductor module of the present embodiment.

  The steps shown in FIGS. 29A and 29B are the same as the steps shown in FIGS. 28A and 28B, and thus the description thereof is omitted.

  Next, as shown in FIG. 29 (c), a liquid sealing resin 68 having an appropriate viscosity contained in a syringe is discharged from the tip of the needle by adjusting the pressure and time, whereby the semiconductor chip 210, the thin metal wire 60, the semiconductor The element connection terminal 11 is covered with the liquid sealing resin 68. At this time, the amount of the liquid sealing resin 68 to be discharged is such that the sealing body is smaller than the area of the opening 10 of the second resin base material 16 and the thickness of the sealing body is smaller than that of the second resin base material 16. Make the amount thinner.

  Next, as shown in FIG. 29 (d), the liquid sealing resin 68 is heated and cured at a temperature and time at which the applied liquid sealing resin 68 is reliably cured. Thus, the 1st resin substrate 3a which comprises the semiconductor module of this modification can be obtained (a semiconductor module is not shown in figure).

  Thus, by pre-molding the semiconductor chip 210 and the fine metal wire 60 mounted on the first resin substrate 3 by mold sealing or potting sealing in advance, the warpage of the semiconductor module can be reduced. Even if a load is applied to the semiconductor chip 210, the occurrence of cracks and the like can be prevented. Further, like the semiconductor module of the embodiment described so far, the semiconductor module of this embodiment is excellent in moisture resistance.

  Since the semiconductor module of the present invention can be warped and bonded to the motherboard with a high yield, it is useful for miniaturization and high functionality of various electronic devices such as mobile phones and digital cameras.

1 is a schematic perspective view showing an overall configuration of a semiconductor module according to a first embodiment of the present invention. It is sectional drawing when the semiconductor module which concerns on 1st Embodiment is cut | disconnected along the II-II line | wire shown in FIG. (A) is a schematic plan view at the time of seeing the resin substrate used for the semiconductor module concerning a 1st embodiment from the upper surface side, (b) is along the IIIa-IIIa line shown in (a). It is sectional drawing when the resin substrate of 1st Embodiment is cut | disconnected, (c) is a schematic plan view at the time of seeing the resin substrate of 1st Embodiment from the lower surface side. (A), (b) is the top view which shows an example of an adhesive member among the sheet members used for the semiconductor module which concerns on 1st Embodiment, and the cross section which shows the said adhesive member at the time of cut | disconnecting by IVb-IVb line | wire FIG. 4C and 4D are a plan view showing another example of the adhesive member according to the first embodiment, and the adhesive member according to the first embodiment when cut along the IVd-IVd line. FIG. (A), (b) is the top view and partial sectional view which respectively show the 2nd resin base material among the sheet | seat members which concern on 1st Embodiment. (A)-(c) is sectional drawing which shows an example of the manufacturing method of the semiconductor chip mounted in the semiconductor module which concerns on 1st Embodiment. (A)-(d) is sectional drawing which shows the preparation methods of the resin substrate used for the semiconductor module which concerns on 1st Embodiment. (A)-(f) is sectional drawing which shows the preparation methods of the sheet | seat member used for the semiconductor module which concerns on 1st Embodiment. FIG. 2 is an exploded view of the semiconductor module according to the first embodiment shown in FIG. 1. It is sectional drawing which shows a mode that the 1st adhesive member and the 2nd adhesive member cover the side surface and upper surface of a semiconductor chip in the manufacturing process of the semiconductor module which concerns on 1st Embodiment. It is a schematic perspective view which shows the whole structure of the semiconductor module of the multistage structure concerning the 2nd Embodiment of this invention. It is sectional drawing when the semiconductor module of 2nd Embodiment is cut | disconnected along the XII-XII line | wire shown in FIG. (A)-(g) is sectional drawing which shows the manufacturing method of the sheet | seat member used for the semiconductor module which concerns on 2nd Embodiment. FIG. 13 is an exploded view of the semiconductor module according to the second embodiment shown in FIGS. 11 and 12. It is a schematic perspective view which shows the whole structure of the semiconductor module which concerns on the 3rd Embodiment of this invention. It is sectional drawing when the semiconductor module which concerns on 3rd Embodiment is cut | disconnected along the XVI-XVI line shown in FIG. (A)-(g) is sectional drawing which shows the manufacturing method of the sheet | seat member used for the semiconductor module which concerns on 3rd Embodiment. FIG. 17 is an exploded view of the semiconductor module according to the third embodiment shown in FIGS. 15 and 16. It is sectional drawing which shows the whole structure of the semiconductor module which concerns on the 4th Embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor module which concerns on the 5th Embodiment of this invention. It is sectional drawing which shows the modification of the semiconductor module which concerns on 5th Embodiment. It is sectional drawing which shows the structure of the semiconductor module which concerns on the 6th Embodiment of this invention. (A), (b) is a figure which shows the upper surface and lower surface of a 1st resin substrate used for the semiconductor module which concerns on the 7th Embodiment of this invention. (A), (b) is a top view of the semiconductor chip mounted in the 1st resin substrate which respectively concerns on 7th Embodiment, and follows the XXIVb-XXIVb line of the 1st resin substrate shown to (a). FIG. It is sectional drawing which shows the state which mounted the semiconductor chip concerning 7th Embodiment on the 1st resin substrate. It is a top view of the 1st resin substrate used for the semiconductor module concerning an 8th embodiment of the present invention. It is sectional drawing which shows the structure of the semiconductor module which concerns on 9th Embodiment. (A)-(d) is sectional drawing which shows the manufacturing method of the 1st resin substrate 3 which has a resin-sealed semiconductor chip among the semiconductor modules which concern on 9th Embodiment. (A)-(d) is sectional drawing which shows the manufacturing method of the 1st resin substrate mounted with the semiconductor chip used for the modification of the semiconductor module which concerns on 9th Embodiment.

Explanation of symbols

1, 100, 110, 120, 130, 140, 160, 170 Semiconductor module
2, 2a, 2b, 2c, 2d, 200, 210 Semiconductor chip
3, 3a, 3b, 3c, 300, 400 First resin substrate
4 Second resin substrate
5, 5a, 5b, 5c, 5d Sheet member
7, 7a, 7b, 132 First buried conductor
8, 80 First resin base material
9, 9a, 9b Second buried conductor
10 opening
11, 116 Semiconductor device connection terminals
12,120 wiring
13, 131 Land for connection
15 Adhesive layer
16 Second resin base material
17 Solder balls
18 Double-sided copper-clad board
19 Copper foil
20 Photosensitive film
21 Masking film
22 Rigid plate
23 Resin base material
24 Sealing resin
28, 280 Electrode bump
30 Semiconductor wafer
31 First stage first resin substrate
32 Second stage first resin substrate
33 Third stage first resin substrate
41 1st stage low stress resin
42 Second stage low stress resin
43 3rd stage low stress resin
51 First stage second resin base material
52 Second-stage second resin base material
53 Third stage second resin base material
60 fine metal wire
62 Adhesive
64 resin mold
66 Sealing resin
68 Liquid sealing resin
70, 90, 250 Through hole
131 Land for connection
140 Dummy electrode
151 First adhesive member
152 Second adhesive member
205 heat-resistant protective film
240 Liquid resin
251 First stage first adhesive member
252 Second stage first adhesive member
253 Third stage first adhesive member
310 Protrusion
320 Low stress resin
330 Auxiliary protrusion
351 First stage second adhesive member
352 Second stage second adhesive member
353 Second stage second adhesive member

Claims (20)

A resin substrate having a first resin base material and a first embedded conductor penetrating the first resin base material, the semiconductor chip being mounted on the upper surface; and an opening for accommodating the semiconductor chip. The formed second resin base material and sheet members having second embedded conductors penetrating through the second resin base material and electrically connected to the first embedded conductor are alternately laminated. A semiconductor module comprising:
It further comprises an adhesive member that covers the upper surface and the side surface of the semiconductor chip,
There are a plurality of the resin substrate and the sheet member,
Of the resin substrates, the resin substrate disposed at the bottom is thicker than the other resin substrates,
The sheet member further includes a second adhesive layer provided on an area surrounding the opening as viewed in plan, at least one of the upper surface and the lower surface of the second resin base material,
The semiconductor module, wherein the adhesive member is made of a low stress resin having a softening point lower than that of the second adhesive layer and lower rigidity than that of the second adhesive layer.   2. The semiconductor module according to claim 1, wherein a thickness of the second resin base is larger than a thickness of the semiconductor chip.   The thickness of at least one of the semiconductor chips mounted on the lowermost and uppermost resin substrates among the resin substrates is thicker than the semiconductor chips mounted on other resin substrates. The semiconductor module according to claim 1.   2. The semiconductor module according to claim 1, further comprising a rigid plate having higher thermal conductivity and higher rigidity than the resin substrate above the resin substrate disposed on the uppermost stage of the resin substrates. .   Of the resin substrates, the diameter of the first embedded conductor provided on a resin substrate other than the resin substrate disposed at the lowermost and uppermost stages, and the resin substrate other than the resin substrates disposed at the lowermost and uppermost stages The diameter of the second embedded conductor that contacts the first embedded conductor provided on the first and second embedded conductors is larger than the diameter of the first embedded conductor provided on the resin substrate disposed at the lowermost and uppermost stages. The semiconductor module according to claim 1, which is also larger. The semiconductor chip is mounted on the resin substrate with the main surface facing the resin substrate,
An electrode bump is provided in the central region of the main surface of the semiconductor chip,
The resin substrate connects the connection terminals joined to the electrode bumps, the connection lands connected to both ends of the first buried conductor, the connection terminals and the connection lands, The semiconductor module according to claim 1, further comprising a wiring provided on the upper surface and the lower surface. The semiconductor chip further has protrusions of equal height provided at both ends of the main surface,
The semiconductor module according to claim 6, wherein the resin substrate further includes a dummy electrode that contacts the protrusion.   The semiconductor module according to claim 6, wherein a diameter of some of the embedded conductors connected to the electrode bump is larger than a diameter of another embedded conductor. Electrode bumps are provided on the main surface of the semiconductor chip,
The resin substrate further includes a connection terminal bonded to the electrode bump, and a wiring connecting the connection terminal and the first embedded conductor,
2. The semiconductor module according to claim 1, wherein a diameter of a part of the embedded conductors among the first embedded conductors connected to the electrode bump is larger than a diameter of another embedded conductor. The semiconductor chip is mounted with the back surface facing the top surface of the resin substrate,
The resin substrate connects a connection terminal provided on an upper surface, connection lands connected to both ends of the first buried conductor, the connection terminal and the connection land, and an upper surface of the resin substrate. And wiring provided on the upper and lower surfaces,
The semiconductor module seals the metal thin wire connecting the main surface of the semiconductor chip and the connection terminal, and the metal thin wire and the main surface of the semiconductor chip, and has a thickness larger than that of the second resin base material. It further includes a thin sealing resin,
The semiconductor module according to claim 1, wherein the adhesive member covers a side surface and an upper surface of the sealing resin.   2. The semiconductor module according to claim 1, wherein the first resin base material constituting the resin substrate is made of a mixture containing 70 wt% or more and 95 wt% or less of an inorganic filler and a thermosetting resin. . A first resin substrate having a semiconductor chip mounted on the upper surface and having a first embedded conductor, and a semiconductor chip mounted on the upper surface, having the first embedded conductor, and thicker than the first resin substrate. 2 resin substrates, a resin base material in which an opening having a larger planar size than the semiconductor chip is formed, an adhesive member disposed on at least one of the upper and lower surfaces of the resin base material, and the resin base material Preparing a sheet member having a second embedded conductor (a);
Step of alternately laminating the sheet member and the first resin substrate on the second resin substrate so that the second resin substrate is at the bottom and the semiconductor chip is disposed in the opening ( b) and
The first resin substrate, the second resin substrate, and the sheet member laminated in the step (b) are heated and pressed from the lowermost stage and the uppermost stage to form the first resin board and the second resin board. A step (c) of bonding a resin substrate and the sheet member, connecting the first embedded conductor and the second embedded conductor, and flowing the adhesive member to cover the semiconductor chip. A method for manufacturing a semiconductor module.   13. The method of manufacturing a semiconductor module according to claim 12, wherein in the step (b), the adhesive member is disposed on an upper surface and a lower surface of the resin base material. In the step (b), the adhesive member is provided only on one of the upper surface and the lower surface of the resin base material,
The sheet member is provided in a region surrounding the opening as viewed in plan in the other surface of the resin base material, and is a first adhesive that bonds the resin base material and the second resin substrate. The method of manufacturing a semiconductor module according to claim 12, further comprising a layer.   After the step (c), a step of bonding a rigid plate having a higher thermal conductivity than the first resin substrate and the second resin substrate above the first resin substrate disposed at the uppermost stage. The method of manufacturing a semiconductor module according to claim 12, further comprising (d).   16. In the step (d), the warpage amount of the semiconductor module generated in the step (c) is obtained, and the material and thickness of the rigid plate are selected according to the obtained warpage amount. The manufacturing method of the semiconductor module of description.   After the step (b) and before the step (c), heat is higher than the first resin substrate and the second resin substrate above the first resin substrate disposed at the uppermost stage. The method of manufacturing a semiconductor module according to claim 12, further comprising a step of arranging a rigid plate having a high conductivity. The step (a)
Mounting the semiconductor chip on the resin substrate with the back surface facing the resin substrate (a1);
A step (a2) of forming a thin metal wire connecting a connection terminal provided on the resin substrate and a main surface of the semiconductor chip;
The method of manufacturing a semiconductor module according to claim 12, further comprising a step (a3) of molding a sealing resin for sealing the metal wires and the main surface of the semiconductor chip using a mold. Method. The step (a)
Mounting the semiconductor chip on the resin substrate with the back surface facing the resin substrate (a1);
A step (a2) of forming a thin metal wire connecting a connection terminal provided on the resin substrate and a main surface of the semiconductor chip;
A step (a4) of dropping the sealing resin in a liquid state on the main surface of the semiconductor chip and molding a sealing resin for sealing the metal thin wire and the main surface of the semiconductor chip. The method of manufacturing a semiconductor module according to claim 12. A first resin substrate having a semiconductor chip mounted on the upper surface and having a first embedded conductor, and a semiconductor chip mounted on the upper surface, having the first embedded conductor, and thicker than the first resin substrate. 2 and a resin base material in which an opening having a larger planar size than the semiconductor chip is formed, and an adhesive disposed in a region surrounding the opening as viewed in plan among the upper surface and the lower surface of the resin base material And a sheet member having a second embedded conductor penetrating the resin base material, and a planar size made of a resin having a softening point lower than that of the adhesive layer and lower in rigidity than the adhesive layer is larger than that of the opening. Preparing a small low stress member (a);
While laminating the sheet member and the first resin substrate alternately on the second resin substrate so that the second resin substrate is the lowest step, and the semiconductor chip is disposed in the opening, A step (b) of disposing the low-stress member on the semiconductor chip;
The first resin substrate, the second resin substrate, and the sheet member laminated in the step (b) are heated and pressed from the lowermost stage and the uppermost stage to cause the low-stress member to flow and the semiconductor A step (c) of covering the chip with the low-stress member;
By pressurizing the first resin substrate, the second resin substrate, and the sheet member laminated in the step (b) while heating them from the lowermost step and the uppermost step to a temperature higher than the step (c). A step (d) of adhering the first resin substrate and the second resin substrate and the sheet member and connecting the first embedded conductor and the second embedded conductor. A method for manufacturing a semiconductor module.

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