JP2008097016A - Mobile telephone system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce electric power consumption during standby by preventing common electrodes of a non-display region from being driven to scan at the voltage of a selection level in a portable telephone system with a liquid crystal display controller mounted thereon. <P>SOLUTION: The portable telephone system includes a liquid crystal display panel, the liquid crystal display controller having a first driver driving a plurality of first electrodes (common electrodes) of the liquid crystal panel and a second driver driving a plurality of second electrodes (segment electrodes) intersecting with the first electrodes, and a microprocessor controlling the operation of the liquid crystal display controller. The liquid crystal display controller has a display position setting register to assign the position of a partial display region. The display position setting register is rewritable by the microprocessor when the mobile telephone system is in a standby mode. The first driver drives, in a time division manner, the first electrodes of the partial display region assigned by the display position setting register at every frame period and applies the voltage of a non-selection level to the first electrodes of the non-display region. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display control technique and a technique that is particularly effective when applied to liquid crystal drive control. For example, the present invention relates to a technique that is effective when used in a display control circuit of a liquid crystal device for dot matrix character display.

  In general, a liquid crystal display device includes a liquid crystal display panel, a liquid crystal display control device formed into a semiconductor integrated circuit that drives the liquid crystal display panel, and a micro-computer that writes display data and controls the display operation of the liquid crystal display control device. It is composed of a processing unit (hereinafter referred to as a microprocessor) and the like.

  A conventional liquid crystal display control device incorporating a character generator for generating a dot matrix type display pattern has a display data RAM (DDRAM) for storing character codes, and a character pattern such as a character font. A character generator ROM (CGROM) to be stored, an address counter for reading display data from the display data RAM in accordance with the driving position of the liquid crystal display panel, and a driving signal for the common electrode and segment electrode of the liquid crystal display panel are formed to It is composed of a liquid crystal driving circuit for driving, a timing generating circuit for generating a clock signal for giving display timing, and the like.

  The microprocessor writes the character code corresponding to the character to be displayed on the liquid crystal display panel in the display data RAM. The address counter sequentially reads the character code from the display data RAM in accordance with the driving position of the liquid crystal display panel, accesses the character generator ROM by using the read character code as a part of the address, and sequentially reads the character pattern. . The read character pattern is sequentially sent to the segment shift register in the liquid crystal driving circuit as liquid crystal lighting / non-lighting data, and when one line of data is accumulated, all segment driver circuits Outputs a driving voltage at a lighting / non-lighting level all at once, and drives the liquid crystal display panel.

  Since each character is composed of a plurality of lines in the vertical direction, the above control is repeated for each display line by the number of character lines (eight lines if the character has a 5 × 8 dot configuration). Done. That is, the above lighting / non-lighting control of the display is performed in a time-sharing manner line by line. Therefore, the selection signal for one line generated from the timing control circuit is sent to the common shift register, and the shift register shifts for each line, so that the common driver sequentially outputs the driving voltage of the selection level for each line.

  In portable electronic devices such as mobile phones and pagers equipped with liquid crystal display devices as described above, it is not necessary to display the entire surface of the liquid crystal display panel during standby, and calendars, clock displays, and pictograms such as marks and icons It is sufficient that the limit display is made. However, in a conventional liquid crystal display device such as a mobile phone, although the display is reduced during standby, the liquid crystal drive duty is not changed. In other words, since scanning is performed for the common electrode in a row that is not displayed, there is a problem in that power consumption during standby cannot be reduced sufficiently.

  For example, in a liquid crystal display control apparatus having 32 common drivers, the common driver corresponding to the COM1 signal to the common driver corresponding to the COM32 signal are sequentially selected, and 32 lines are sequentially driven. Such a driving method is 1/32 duty driving. In this case, if the character font has a size of 5 × 8 dots, a character string for four lines can be displayed in the vertical direction. Even when such a liquid crystal display control device does not require full-line display for four lines, when time-division driving for four lines is performed, the liquid crystal drive voltage and current consumption are for full-line display for four lines. It is equivalent.

  Here, in the standby state of the system, the liquid crystal drive control can be performed if only a part of the display rows are selectively driven and the liquid crystal drive duty can be reduced by reducing the liquid crystal drive voltage without performing full display for four rows. The power consumption of the apparatus can be suppressed. However, when the liquid crystal drive voltage is changed, the optimum drive bias ratio also changes, so that a good display contrast cannot be obtained under the same drive conditions. Further, it has been clarified that when only the liquid crystal driving duty is lowered, the display position of the character font is fixed to the uppermost line, and the appearance balance as a display is deteriorated.

An object of the present invention is to reduce the total power consumption by changing the liquid crystal drive duty in accordance with the operating state of the system in an electronic device equipped with a liquid crystal display control device, and to perform such variable duty display. An object of the present invention is to provide a liquid crystal display technology capable of easily setting and driving an optimum driving voltage and an optimum driving bias condition according to the liquid crystal driving duty.
Another object of the present invention is to provide a liquid crystal display technology capable of providing the most easily visible display according to the operating state of the system.

Outlines of representative ones of the inventions disclosed in the present application will be described as follows.
That is, a drive duty selection register and a drive bias selection register that can be rewritten from the microprocessor are provided in the liquid crystal display control device. When switching from full-screen display of a liquid crystal display panel to display of only a part of rows, the setting values of the drive duty selection register and drive bias selection register are changed by a microprocessor so that a part of the liquid crystal display panel is selectively used. Display is performed with low voltage and low duty drive. Specifically, in a common shift register connected to a common driver that outputs a selection level in a time-sharing manner for each line, the selection information is sequentially shifted only in the shift register of the display portion. The shift register corresponding to the non-display portion is prevented from performing a shift operation.

  Further, a boosting magnification selection register capable of setting a boosting output magnification in the boosting circuit is provided in the liquid crystal display control device. When switching from full-screen display of the liquid crystal display panel to display of only a part of rows, the boost voltage output from the booster circuit is lowered by changing the set value of the boost magnification selection register by the microprocessor.

  According to the above-described means, only a part of the liquid crystal display panel can be selectively driven with a low duty according to an instruction from the microprocessor, so that the operating frequency and liquid crystal driving voltage of the internal common shift register can be lowered. Thereby, the total current consumption of the liquid crystal display control device can be suppressed. Further, since the optimum drive bias can be changed as the drive duty is changed, it is possible to prevent the contrast from being lowered. Furthermore, as the duty is reduced, the boosted output magnification of the booster circuit is set to a low value, so that the boosted output voltage can be lowered to the necessary minimum, thereby reducing the operating voltage of the liquid crystal drive power supply circuit. The efficiency of the booster circuit can be improved, and the current consumption of the liquid crystal display control device can be further suppressed.

  Desirably, a centering display designation register is provided in the liquid crystal display control device. As a result, it is possible to perform display at a position where the display is most easily seen during standby, for example, at the center of the liquid crystal display panel.

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.
In other words, in a liquid crystal display control device that controls a plurality of display lines, current consumption can be reduced when it is not necessary to display all the display lines when the system is on standby. Further, since all of these controls can be controlled by software by the microprocessor, it is possible to drive the liquid crystal with the minimum necessary current consumption according to the operating state of the system.

FIG. 1 shows a liquid crystal display system (liquid crystal display device) 100 according to an embodiment of the present invention. The display system 100 includes a dot matrix type liquid crystal display panel 1, a liquid crystal display control device 2 that outputs signals for driving common electrodes and segment electrodes of the liquid crystal display panel 1, and displays the liquid crystal display control. A microprocessor (MPU) 3 for setting control information of the apparatus 2 and writing display data, and a system power supply 4 such as a battery are included. Between the microprocessor 3 and the liquid crystal display control device 2, an enable signal E for enabling the chip of the device 2, a reset signal RS for instructing reset, and a read / write control signal R / W are sent from the MPU 3. A control signal line for transmitting to the device 2 and a data bus for transmitting and receiving 8-bit data signals DB0 to DB7 between the MPU 3 and the device 2 are provided. The liquid crystal display panel 1 and the liquid crystal display control device 2 are connected by common signal lines COM1 to COM32 and segment signal lines SEG1 to SEG80.
The liquid crystal display control device 2 displays on the screen of the liquid crystal display panel 1, a system interface circuit 4 that transmits and receives signals to and from the microprocessor 3, an instruction register 5 for setting internal control information and the like. Display data RAM 7 (display memory) for storing character code of characters, address counter 6 for reading display data from the display data RAM 7 in accordance with the driving position of the liquid crystal display panel 1, and character code read from the display data RAM 7 A character generator memory 8 for developing a dot-matrix character font pattern from the character generator, a parallel-to-serial conversion circuit 9 for converting a plurality of bits of display data read from the character generator memory 8 into serial data, and converted display data Shift one line for The segment shift register 12 that performs the shift, the latch circuit 13 that retains the shifted display data for one line, and the drive voltage waveform that is applied to the segment electrode of the liquid crystal display panel 1 based on the retained display data. A segment driver 14 for performing the operation, a common shift register 15 for forming a signal for sequentially selecting the common electrodes of the liquid crystal display panel 1, a common driver 16 for forming and outputting a drive voltage waveform applied to the common electrodes, and the display data memory. 7 generates a timing signal indicating a display position with respect to 7 and a clock signal for giving a display timing to the shift registers 12 and 15 and a liquid crystal driving voltage based on a power supply voltage Vci from a system power supply 40. Boost circuit 11 and liquid crystal drive based on boosted voltage A liquid crystal drive bias circuit 18 that generates an bias voltage, a power supply circuit 17 that includes a voltage follower (operational amplifier) that outputs an impedance of the generated bias voltage, and a desired one of the output bias voltages are selected. The segment driver circuit 14 and the liquid crystal drive voltage selection circuit 14 supplied to the common driver circuit 16 are included.

  The liquid crystal display controller 2 is formed on a single semiconductor chip as a CMOS LSI by a known semiconductor integrated circuit manufacturing technique. In FIG. 1, C1 and C2 are capacitive elements constituting the booster circuit, and C3 is a capacitive element for stabilizing the power supply. Since these capacitive elements are not sufficiently large in capacity of the capacitive elements that can be formed on the semiconductor chip, external capacitive elements (capacitors) are used. The character generator memory 8 is generally composed of a ROM (Read Only Memory), but a RAM may be added to the ROM in order to display a pattern created by the user. Although not particularly limited, the segment shift register 12 and the common shift register 15 are constituted by bidirectional shift registers.

The liquid crystal display control device 2 of this embodiment is stored in the character generator memory 8 by the microprocessor 3 writing the code of the character desired to be displayed via the system interface 4 in the display data RAM 7 corresponding to the display position. Arbitrary characters can be displayed. When the microprocessor 3 sets various control information for performing liquid crystal display via the system interface 4 in the instruction register 5, the apparatus 2 performs display control according to the set control information. Writing of data to the display data RAM 7 is started when the microprocessor 3 sets the head address of the display character string in the address counter 6, and then the address counter 6 automatically inputs the address while updating the address. The character codes to be written are written in the display data RAM 7 one after another.

  The display data (character code) is sequentially read by the display address signal generated by the timing generation circuit 10 being sent to the display data RAM 7, and the character pattern stored in the character generator memory 8 using this character code as an address. Is read out. Further, this character pattern is converted into serial data by the parallel-to-serial conversion circuit 9 and sequentially sent to the segment shift register 12 in the segment drive circuit (12, 13, 14). When data for one line is stored in the segment shift register 12, it is simultaneously latched in the latch circuit 13, and the segment driver 14 selects a lighting / non-lighting voltage from the latched data and outputs it to the liquid crystal display panel 1. The voltage level of the lighting / non-lighting driving is generated by the liquid crystal driving voltage selection circuit 19.

  For example, when a character font pattern composed of 5 × 8 dots is displayed in four lines in the vertical direction, since each display line is eight lines, the common driver 16 requires a total of 32 output circuits. As shown in FIG. 2, the common driver 16 outputs the common drive signals (COM1 to COM32) of the liquid crystal display panel 1 at a selected voltage level sequentially from COM1 to COM32. In this case, COM1 to COM8 are the first row, COM9 to COM16 are the second row, COM17 to COM24 are the third row, and COM25 to COM32 are the fourth row.

  In such a liquid crystal display panel 1 capable of displaying up to four lines, there is often no need for full-screen display using all four lines, such as when the system is on standby. For example, during the standby period, only two lines or one line is used to display only information such as time and date. In such a case, in the conventional liquid crystal display control device, a common drive signal is output even for a row that is not displayed, and a voltage at a non-lighting level is applied to the segment electrode. For this reason, there is a problem that the power consumption is not reduced even though the number of display lines is small. In the present invention, the common shift register 15 is operated so that a common drive signal is not applied to a row where display is not performed. As a result, the power consumption of the liquid crystal display control device 1 during standby can be reduced.

  However, in this case as well, when the common drive signal is sequentially output from COM1 and output at a selected level to display two lines or one line, COM1 to COM16 (see FIG. 3 and FIG. 4 respectively). The selection level is output in the range of 1/16 duty drive) and COM1 to COM8 (1/8 duty drive). When such driving is performed, as shown in FIGS. 5 (b) and 5 (c), the display is biased to two or one line at the top of the screen of the four-line display liquid crystal display panel 1, and the appearance is poor. Become. FIG. 5A shows a four-line display example in the case of 1/32 duty drive.

  Therefore, in this embodiment, when two-line display or one-line display is performed, as shown in FIGS. 6 and 7, selection drive from the common drive signals COM1 to COM8 is skipped, and COM9 to COM24 (1 / 16 duty drive) or by outputting a selection level in the range from COM9 to COM16 (1/8 duty drive), the center of the screen of the liquid crystal display panel 1 as shown in FIGS. The common shift register 15 is operated so as to selectively display on the screen. In addition, in this case, non-display lines other than the display area in the center of the screen are always driven with AC at a non-selection level, thereby avoiding the deterioration of the liquid crystal due to the DC bias applied to the liquid crystal and the display becoming dark. To be able to. FIG. 8A shows a four-line display example in the case of 1/32 duty drive.

  FIG. 9 shows a detailed implementation method for displaying in the center of the screen during low duty driving. The instruction register 5 of FIG. 1 includes a drive duty selection register 34 in which a drive duty value is set, and a centering display designation register 31 for instructing selective display at the center of the display screen. The microprocessor 3 sets predetermined values in the drive duty selection register 34 and the centering display designation register 31. The liquid crystal display control device 2 adjusts the cycle of the shift clock signal of the common shift register 15 formed by the timing generation circuit 10 based on the drive duty value set in the drive duty selection register 34. For example, when the drive duty is changed from 4-line display to 2-line display, the period of the shift clock is doubled to control the frame period to be constant. Further, when the driving duty is changed to one line display, the cycle of the shift clock is quadrupled.

  The set value of the centering display designation register 31 is supplied to the shift control circuit 35, and the shift control circuit 35 sequentially operates from the flip-flops F / F1 to F / F32 in the case of normal full-screen display (four-line display). By shifting “1”, a common signal of a selected level is output from the common driver 16 in a time-sharing manner, and, for example, based on the set value of the centering display designation register 31 during standby, for example, flip-flops F / F9 to F / F By sequentially shifting “1” up to F24, a common signal of a selection level is output in a time-sharing manner from the common driver 16 to the two common lines of the center.

  FIG. 10 shows a detailed timing chart when the period of the shift clock signal of the common shift register 15 is adjusted to make the frame period constant based on the set drive duty value. In the liquid crystal display control device 2 of this embodiment, the information instructed by the centering display designation register 31 and the shift clock generated by the timing generation circuit 10 are transferred to the shift control circuit 35 (FIG. 9) in the common shift register 15. Input and control a shift register composed of 32 flip-flops (F / F1 to F / F32). For example, in the case of 4-line display, the entire display is performed by sequentially shifting the selection information from F / F1 to F / F32. On the other hand, when displaying on two lines at the center of the screen, the shift starts from F / F9 and ends at F / F24. At this time, the flip-flops F / F1 to F / F8 and F / F25 to F / F32 are always reset and no shift is performed. When displaying on one line in the center of the screen, the shift starts from F / F9 and ends at F / F16. At this time, the flip-flops F / F1 to F / F8 and F / F17 to F / F32 are always reset and do not shift.

  In general, when the drive duty is lowered, the selection time of each line becomes longer, and the display of the entire panel is easily lit. Accordingly, in order to maintain the same appearance (contrast) as before the change even after the change to the low duty drive, it is necessary to lower the liquid crystal drive voltage and the drive bias. Moreover, if the liquid crystal driving voltage can be lowered by this low duty driving, there is a merit that power consumption can be reduced. In particular, in a liquid crystal display control device that requires a liquid crystal drive voltage higher than the power supply voltage of the system power supply 40, it is necessary to boost the system power supply voltage to generate a liquid crystal drive voltage. In this case, when the current flowing through the circuits (11 to 18) of the liquid crystal driving system is supplied via the booster circuit 11, the consumption current viewed from the system power supply side is, for example, twice, Tripled. Moreover, the boosting efficiency in the booster circuit 11 becomes worse as the magnification becomes higher. Therefore, when supplying current to the liquid crystal drive system circuits (11 to 18) via the booster circuit 11, it is advantageous to reduce the boost factor to the minimum necessary because current consumption can be suppressed.

  Furthermore, in this embodiment, when the drive duty is lowered to 1/2 or 1/4 for two-line display or one-line display, the period of the selection level of each common signal is doubled and quadrupled, respectively. I am doing so. As a result, the drive duty can be lowered without changing the frequency of one frame. In other words, if only the drive duty is lowered, the frame frequency may increase and the image quality may be deteriorated. However, in this embodiment, the drive duty is lowered without changing the frame frequency, so that the deterioration of the image quality can be avoided. .

  Note that the control for increasing the period of the selection level of each common signal by 2 and 4 respectively when the drive duty is reduced to 1/2 and 1/4 is supplied from the timing generation circuit 10 to the common shift register 15. This can be easily realized by reducing the clock frequency to 1/2 and 1/4, respectively. As described above, when the drive duty is lowered to 1/2 or 1/4, the clock frequency is lowered. Therefore, the operating frequency of the internal circuit composed of the CMOS circuit is lowered and the power consumption is also lowered. There is also an advantage.

  FIG. 11 shows circuits (11 to 18) of the liquid crystal driving system. The booster circuit 11 boosts the basic voltage supplied from the input voltage terminal Vci up to three times and outputs the boosted voltage to the VLOUT terminal. C1 and C2 are capacitors for boosting by a charge pump method, and C3 is a capacitor for stabilizing the power supply. In this embodiment, a boosting magnification selection register 33 is provided corresponding to the boosting circuit 11, and the microprocessor 3 sets a desired boosting magnification in the boosting magnification selection register 33 in the instruction register 5. The boosting magnification of the VLOUT output can be arbitrarily changed from 1 to 3 times.

  Although not particularly limited, the boosting magnification selection register 33 is provided in the instruction register 5. Vci may be a voltage (for example, 2.8 V) lower than Vcc obtained by resistance division of the power supply voltage Vcc (for example, 3 V). The voltage lower than the power supply voltage Vcc is used as the basic voltage Vci of the booster circuit 11 when the liquid crystal display panel 1 of this embodiment is driven, and the liquid crystal drive voltage may be about 8 V even when driven at the highest duty. At the same time, as described above, since the power consumption increases as the boost voltage is higher, the voltage obtained when the boost magnification is tripled to the maximum is prevented from becoming too high.

  FIG. 12 shows a specific circuit configuration example of the booster circuit 11, Table 1 shows the relationship between the set value of the boost ratio selection register 33 and the VLOUT output state of the booster circuit 11, and FIG. 13 shows the operation of generating each boosted voltage. Show the principle.

  As shown in FIG. 12, the booster circuit 11 includes a capacitor C1 connected between the external terminals T1 and T2, a capacitor C2 connected between the external terminals T3 and T4, a voltage input terminal Tvci, and a boosted voltage output terminal Tout. And switches S0 to S9 connected between the external terminals T1 to T4. As shown in FIG. 12A, the booster circuit 11 turns on only the switch S0 and outputs the input voltage Vci as it is from the terminal Tout as the output voltage VLOUT as shown in FIG.

  On the other hand, at the time of double boosting or triple boosting output, switches S2, S4, S7, and S9 are first turned on as shown in FIG. 12B, and capacitors C1 and C2 are charged to Vci, respectively. Next, at the time of double boosting, the switches S1, S3, S6, and S8 are turned on as shown in FIG. 12C, so that two capacitors C1 and C2 are connected in parallel as shown in FIG. And a terminal to which the ground potential is applied at the time of charging is connected to a voltage input terminal, and Vci is applied to output a voltage of 2 × Vci. When the voltage is triple boosted, as shown in FIG. 12D, the switches S1, S5, and S8 are turned on to connect the two capacitors C1 and C2 in series as shown in FIG. 13B. At the same time, the terminal to which the ground potential is applied at the time of charging is connected to the voltage input terminal, and Vci is applied to output a voltage of 3 × Vci.

  As described above, by allowing the boost output magnification of the booster circuit 11 to be arbitrarily set, when a low voltage is sufficient to drive the liquid crystal, the boost output is lowered to the minimum necessary level, thereby providing a liquid crystal drive power supply. The operating voltage of the drive bias circuit 18 and the power supply circuit 17 as circuits can be lowered, and the efficiency of the booster circuit 11 can be improved. As a result, the current consumption of the device 2 can be significantly suppressed.

  Next, a specific method for setting the boost magnification of the booster circuit 11 will be described. For example, assuming that the liquid crystal drive voltage in the case of performing 4-line display with 1/32 duty drive is 8 V, the booster circuit 11 needs to perform three times the boost when the system power supply voltage is 3 V. Therefore, data for instructing a boost factor of 3 is set in the boost factor selection register 33. On the other hand, even when it is sufficient to display only one row, for example, when the system is on standby, the liquid crystal drive voltage remains at 8 V with a triple boost when the 1/32 duty drive is maintained, and the consumption of the device 2 The current cannot be reduced. Therefore, data for instructing 1/8 duty drive is set in the drive duty selection register 34 to change the duty ratio, and data for instructing a boost factor of, for example, 2 times is set in the register 33 so that the liquid crystal drive voltage is set. Reduce to about 5V. As a result, a sufficient liquid crystal driving voltage can be obtained even when the boosting circuit 11 is changed to double boosting by the boosting magnification selection register 33, and the current consumption seen from the 3V system power supply 40 is reduced to about 2/3. It becomes possible to do.

In order to obtain good contrast when the liquid crystal drive duty is changed, it is desirable to optimize the drive bias ratio. Generally, when the drive duty is 1 / N, the optimum drive bias ratio B for obtaining the best contrast is
B = 1 / (√N + 1)
It becomes. For example, the optimum drive bias at 1/8 duty, 1/16 duty, and 1/32 duty are 1/4 bias, 1/5 bias, and 1 / 6.7 bias, respectively.

  FIG. 14 shows an embodiment of the liquid crystal drive bias circuit 18, and Table 2 shows the relationship between the setting state of the liquid crystal bias selection register 32 and the on / off states of the switches SW1 to SW9 in each bias mode. Although not particularly limited, the liquid crystal bias selection register 32 is provided in the instruction register 5. In Table 2, “-” represents an off state. In the liquid crystal display control device 2 of this embodiment, the microprocessor 3 arbitrarily changes the drive bias ratio in the liquid crystal drive bias circuit 18 by setting the drive bias in the liquid crystal bias selection register 32 in the instruction register 5. Can do.

  In FIG. 14, V1 and GND are segment electrode and common electrode selection levels, V2 and V5 are common electrode non-selection levels, and V3 and V4 are segment electrode non-selection levels. As described above, there are two sets of non-selection levels that prevent deterioration of the liquid crystal by alternatingly driving V2 and V3 or V5 and V4 to the common and segment electrodes corresponding to non-lighting dots. It is to do.

  In FIG. 14, VR is a variable resistor for contrast adjustment. Although not shown, a register for setting the resistance adjustment amount of the variable resistor VR is provided in the instruction register 5, and the contrast value of the liquid crystal display panel is adjusted by changing the resistance value of the variable resistor VR according to the register value. You may do it.

  FIGS. 15A to 15D show mounting examples when the liquid crystal display control device 2 of the above embodiment is mounted on a mobile phone together with a liquid crystal display panel. In FIG. 15A, the liquid crystal display control device chip 2 of the above embodiment configured as a semiconductor integrated circuit and an external capacitor C or resistor R are mounted on the back surface of the glass substrate constituting the liquid crystal display panel 1. A board 50 is joined, and a key matrix substrate 52 constituting an operation panel is connected to the board 50 via a wiring 51 called a heat seal. Reference numeral 53 denotes an MPU board on which the microprocessor chip 3 is mounted. The MPU board 53 and the key matrix substrate 52 are not particularly limited but are connected by a serial communication line 54.

  FIG. 15B shows a liquid crystal display control device chip 2 and an external capacitor C or resistor R mounted on a key matrix substrate 52 constituting an operation panel of a mobile phone, and a liquid crystal display via a heat seal 51. The panel 1 is connected to the key matrix substrate 52.

  In FIG. 15C, an external capacitor C and resistor R are mounted on a key matrix substrate 52 constituting an operation panel, and a liquid crystal display control device chip 2 is provided between the key matrix substrate 52 and the liquid crystal display panel 1. The connection is made by a mounted TCP (Tape Carrier Package) 51 ′.

  In FIG. 15D, an external capacitor C and resistor R are mounted on the key matrix substrate 52 constituting the operation panel, and the liquid crystal display control device chip 2 is mounted on the glass substrate constituting the liquid crystal display panel 1. Thus, the liquid crystal display panel 1 and the key matrix substrate 52 are connected by a heat seal 51.

  FIG. 16 shows a terminal arrangement example of the liquid crystal display control device 2 and a connection example between the liquid crystal display panel 1 and the liquid crystal display control device 2. As shown in FIG. 16, in the liquid crystal display control device 2 of this embodiment, terminals for outputting common signals COM1 to COM32 are arranged in half on the left and right sides (shorter sides) of the chip, and are arranged on one side of the longer side. Terminals for outputting segment signals are arranged. On the other side of the longer side, an input / output terminal for exchanging signals with a power supply terminal, an external terminal, and a microprocessor is provided. In addition to such a terminal arrangement, as described above, the segment shift register 12 and the common shift register 15 are configured by bidirectional shift registers, so that the liquid crystal display control device chip 2 can be mounted on the upper and lower sides of the liquid crystal display panel 1. Even if the chip is placed in an inverted state at any position, the common signal line and the segment signal line can be connected to each other without crossing.

  As described above, in the above embodiment, the drive duty selection register and the drive bias selection register that can be rewritten from the microprocessor are provided in the liquid crystal display control device, and only a part of the rows are displayed from the entire display of the liquid crystal display panel. When switching to display, the setting values of the drive duty selection register and drive bias selection register are changed, so that the display is selectively performed on a part of the liquid crystal display panel with low voltage and low duty drive. Since only a part of the liquid crystal display panel can be selectively driven with a low duty by the processor, the operating frequency of the internal shift register and the liquid crystal drive voltage can be lowered, and the total current consumption of the entire liquid crystal display control device can be suppressed. . In addition, the optimum driving bias can be changed with the change of the driving duty, and there is an effect that a reduction in contrast can be prevented.

  In addition, a boost ratio select register that can set the boost output ratio in the boost circuit is provided, and the boost output ratio of the boost circuit can be set low as the duty decreases, so the boost output voltage can be lowered to the minimum necessary level. Thus, the operating voltage of the liquid crystal driving power supply circuit can be lowered, the efficiency of the booster circuit can be improved, and the current consumption of the semiconductor integrated circuit device 2 can be suppressed.

  Further, since the centering display designation register is provided in the liquid crystal display control device, there is an effect that the partial line display during standby can be designated at the position where it is most easy to see, for example, the central portion of the liquid crystal display panel.

  The invention made by the present inventor has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Nor. For example, in the above embodiment, a liquid crystal display control apparatus that drives in a time-division manner line by line is described. However, the present invention can also be applied to a liquid crystal display control apparatus that drives a plurality of lines at the same time. is there. Further, in the above embodiment, the case where the display position of a part of the line at the time of standby is set at the center of the screen has been described. It is also possible to configure it so that it can be displayed.

  Further, in the above embodiment, the case where the display unit of the liquid crystal display panel is configured with a dot matrix capable of displaying four character lines has been described. However, three character lines or five character lines or more can be displayed by changing the number of common drivers. The present invention can also be applied to a liquid crystal display control device that drives a possible liquid crystal display panel. In mobile phones and the like, a pitgram on which an antenna mark, a mark indicating a reception level, or the like is displayed may be provided at the top or bottom of the screen, and these are generally configured by electrodes having a shape corresponding to the mark. The common driver of the liquid crystal display control device may be configured so that one or two or more common signals can be output corresponding to the pitgram. In this case, only the common signal corresponding to the pictogram is selectively driven, and the character display portion is always non-selectively driven, so that 1/1 duty (static) drive or 1/2 duty is further driven. Is also possible.

  In the above description, the present invention is mainly applied to a liquid crystal display control device which is a field of use of the present invention. However, the present invention is not limited to this, and various displays such as a fluorescent display tube display and a plasma display display. It can be used for drive control of a display device.

1 is a block diagram of a liquid crystal display system according to an embodiment of the present invention. It is a common driver output waveform at 1/32 duty drive (4 lines display). It is a common driver output waveform at the time of 1/16 duty drive (2 lines display) from COM1. It is a common driver output waveform at the time of 1/8 duty drive (1 line display) from COM1. FIGS. 5A, 5B, and 5C are display examples on the liquid crystal display panel when the duty is driven by 1/32, 1/16, and 1/8 duty from COM1. It is a common driver output waveform at the time of 1/16 duty drive (2 lines display) from COM9. It is a common driver output waveform at the time of 1/8 duty drive (1 line display) from COM9. FIGS. 8A, 8B, and 8C are display examples on the liquid crystal display panel when the duty is driven from COM9 by 1/32, 1/16, and 1/8 duty. It is a detailed circuit diagram of a common shift register for displaying in the center part of a display panel. It is the output waveform timing of the common shift register for displaying in the center part of the display panel. FIG. 3 is a circuit configuration diagram of a liquid crystal driving voltage generating booster circuit and a liquid crystal driving system. It is a circuit diagram which shows the specific example of the booster circuit for liquid crystal drive voltage generation. This is a boosting operation principle from 1 to 3 times that of a booster circuit for generating a liquid crystal driving voltage. It is a specific circuit block diagram of a liquid crystal drive bias setting circuit. FIG. 15A to FIG. 15D are schematic configuration diagrams showing mounting examples when the liquid crystal display control device of the embodiment is mounted on a mobile phone together with a liquid crystal display panel. FIGS. 16A and 16B are schematic configuration diagrams illustrating a terminal arrangement example of the liquid crystal display control device of the embodiment and a connection example between the liquid crystal display panel and the liquid crystal display control device.

Explanation of symbols

1 Microprocessor (MPU: Microprocessor unit)
2 Liquid crystal display control device 3 Liquid crystal display panel 4 System interface 5 Instruction register 6 Address counter 7 Display memory (display data RAM)
8 Character generator memory (CGROM)
DESCRIPTION OF SYMBOLS 9 Parallel conversion circuit 10 Timing generation circuit 11 Booster circuit 12 Segment shift register 13 Latch circuit 14 Segment driver 15 Common shift register 16 Common driver 17 Liquid crystal drive power supply circuit 18 Liquid crystal drive bias circuit 31 Centering display designation register 32 Drive bias selection register 33 Boost ratio selection register 34 Drive duty selection register 40 System power supply DB0 to DB7 Data bus signal E Read / write enable signal R / W Read / write selection signal RS register selection signal COM1 to COM32 Common drive signal terminals SEG1 to SEG80 Segment Drive signal terminals CSF1 to CSF32 Shift output signal of common shift register Vcc Power supply voltage GND Ground (ground)
Vci Boost basic voltage to boost circuit VLOUT Boost voltage output terminal

Claims (1)

A liquid crystal display panel;
Control of driving of the plurality of first electrodes provided in the first direction of the liquid crystal panel and the plurality of second electrodes provided in the second direction intersecting the first direction, and a partial display on the liquid crystal panel A liquid crystal display control device capable of setting an area;
A portable telephone system including a microprocessor for controlling the operation of the liquid crystal display control device,
The liquid crystal display control device includes:
An interface circuit to which a signal from the microprocessor is input;
A display data RAM coupled to the interface circuit for storing display data to be displayed on the liquid crystal panel;
An address counter for generating an address of the display data RAM;
A timing generation circuit for generating a timing signal inside the liquid crystal display control device;
A first driver coupled to the timing generation circuit and outputting a signal for driving the plurality of first electrodes;
A second driver that outputs a signal for driving the plurality of second electrodes according to display data read from the display data RAM;
A display position setting register coupled to the interface circuit for designating a position of the partial display area;
And connected to the liquid crystal panel,
The display position setting register can be rewritten by the microprocessor when the portable telephone system is set to a standby mode.
The first driver sequentially selects a selection level in a time-division manner in synchronization with the lighting timing for the plurality of first electrodes at the position of the partial display area specified by the display position setting register for each frame period. And a non-selection level is applied in parallel to the plurality of first electrodes at positions other than the partial display area corresponding to the non-display area in the liquid crystal panel.

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