JP2008091649A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which an underfill resin injection performance is improved, and the size of a fillet to be formed is reduced. <P>SOLUTION: Small chip side dummy bumps 4, smaller than bumps, are formed on the periphery of a chip 1 and a flip chip is mounted on a substrate 2, thus reducing the gaps between dummy bumps 4 and the substrate 2, and between dummy bumps 4. As a result, capillary action at the gaps facilitates the injection of the underfill resin, thus reducing the amount of coating. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which a semiconductor element is flip-chip mounted on a substrate and the semiconductor element and the substrate are sealed with resin.

  Conventionally, in a flip chip mounting type semiconductor device, an underfill resin is injected between a semiconductor element and a substrate in order to improve the reliability of flip chip connection. It was resin-sealed (for example, refer to Patent Document 1).

A conventional underfill resin injection step will be described with reference to the drawings.
FIG. 9 is a schematic perspective view showing the configuration of a conventional semiconductor device before underfill resin injection, FIG. 10 is a schematic perspective view showing the configuration of a conventional semiconductor device immediately after application of the underfill resin, and FIG. 11 is a conventional underfill. It is a schematic perspective view which shows the structure of the semiconductor device after resin injection completion.

  As shown in FIGS. 9 to 11, in a conventional semiconductor device, a chip 1 which is a semiconductor element is flip-chip mounted on a substrate 2 serving as an interposer for mounting the chip on a mother board. The chip 1 and the substrate 2 are electrically connected through the solder bumps.

  In order to hold the flip chip connection, the chip 1 and the substrate 2 are sealed with resin. As shown in FIGS. 9 and 10, the resin sealing is performed by moving the nozzle 5 substantially parallel to the end portion on the underfill resin injection side of the chip 1 while dropping the underfill resin droplet 13 from the nozzle 5. The underfill resin 6 is attached almost parallel to the vicinity of the end. At this time, a capillary phenomenon occurs between the chip 1 and the substrate 2, and the underfill resin 6 is injected between the chip 1 and the substrate 2. As a result, as shown in FIG. 11, the space between the chip 1 and the substrate 2 is sealed with resin. Further, the fillet 7 is formed by the underfill resin protruding from the chip 1.

  Currently, the air type and the jet type are mainly used for applying the underfill resin from the nozzle 5. The air method is a method in which a fixed amount of underfill resin droplets are dropped from a nozzle at a fixed coating pressure. The jet method is a method in which a fixed amount of underfill resin droplets is ejected from a nozzle.

  Next, how the underfill resin is injected will be described with reference to the drawings. FIG. 12 is a schematic cross-sectional view showing the configuration of a conventional semiconductor device before injection of the underfill resin, FIG. 13 is a schematic cross-sectional view showing the configuration of the conventional semiconductor device during application of the underfill resin, and FIG. It is a schematic sectional drawing which shows the structure of the semiconductor device after completion of implantation.

  As shown in FIG. 12, after chip 1 and substrate 2 are flip-chip mounted via connecting solder bumps 14, underfill resin droplets are dropped from nozzle 5 as shown in FIG. Utilizing this, an underfill resin 6 is injected between the chip 1 and the substrate 2. The capillary phenomenon occurs when the underfill resin 6 is in contact with both the substrate side surface of the chip 1 and the chip side surface of the substrate 2 and wets and spreads on both surfaces. Therefore, it is necessary to apply a large amount of underfill resin 6 as shown in FIG. After completion of the injection of the underfill resin, the space between the chip 1 and the substrate 2 is resin-sealed as shown in FIG. Further, the fillet 7 is formed by the underfill resin that protrudes from the chip.

Subsequently, a chip and a substrate constituting a conventional semiconductor device will be described with reference to the drawings.
15 is a schematic plan view of a chip constituting a conventional semiconductor device before forming solder bumps, and FIG. 16 is a schematic plan view of the chip constituting the conventional semiconductor device after forming solder bumps.

  As shown in FIG. 15, a chip-side connection pad 15 is formed at the center of one surface (substrate side surface) of the chip 1, and a probe inspection pad 8 is formed at the peripheral edge. The probe inspection pad 8 and the connection pad 15 are electrically connected via a wiring 9 (Al wiring or Cu wiring) formed inside the chip 1 and have the same potential.

  For the chip 1 shown in FIG. 15, as shown in FIG. 16, probe inspection marks 16 are formed on the probe inspection pads 8, and solder bumps 14 are formed on the connection pads 15. The solder bumps 14 are mainly formed by an electroplating method, a screen printing method, or a ball mounting method. In the probe inspection, a method in which a probe needle using a rhenium tungsten (ReW) material is pressure-bonded to a probe inspection pad is mainly used.

  Next, a conventional substrate will be described. FIG. 17 is a schematic plan view of a substrate constituting a conventional semiconductor device. The substrate is mainly composed of an organic resin system or ceramic. As shown in FIG. 17, the substrate has a shape substantially equal to a rectangular chip to be mounted at a substantially central portion of one surface (chip side surface). The semiconductor element mounting region 11 is set in advance, and although not shown, a connection pad on the substrate side is formed at the center of the semiconductor element mounting region 11. As another example of a conventional substrate, as shown in FIG. 18, there is a substrate in which solder bumps 17 are formed on a connection pad on the substrate side in order to improve connectivity with a chip. Thus, by forming solder bumps on the substrate side and connecting with the solder bumps on the chip side, the connection reliability between the chip and the substrate is improved. In this case, the solder bumps 17 on the substrate side are mainly formed by a screen printing method.

However, recent semiconductor devices are required to be made smaller in size, and the occupancy ratio of fillets formed by underfill resin protruding from the chip to the semiconductor devices is increasing. For this reason, there has been a problem that high functionality such as stacking of semiconductor devices is limited. For example, in a stacked semiconductor device, a region for forming a pad for connection with a pad formed under the upper substrate is limited on the surface of the lower substrate.
JP-A-1-238148

  In view of the above problems, the present invention forms a protrusion on the peripheral edge of the semiconductor element or the peripheral edge of the semiconductor element mounting region of the substrate so that a gap between the substrate side surface of the semiconductor element and the semiconductor element side surface of the substrate is formed. It is an object of the present invention to provide a semiconductor device that can easily generate a capillary phenomenon, improve the injectability of an underfill resin, and make the formed fillet smaller.

  The semiconductor device according to claim 1 of the present invention is a semiconductor device in which a semiconductor element is flip-chip mounted on a substrate and a space between the semiconductor element and the substrate is sealed with a resin, and the substrate side surface of the semiconductor element A plurality of connection bumps formed on the semiconductor element, a protrusion formed on a peripheral edge of the substrate side surface of the semiconductor element, and the connection formed on a semiconductor element mounting region preset on the semiconductor element side surface of the substrate. A plurality of connection pads that are electrically connected to the bumps, and the protrusions form gaps between the semiconductor element side surfaces of the substrate, and the gaps are embedded with the resin. It is characterized by.

  The semiconductor device according to claim 2 of the present invention is the semiconductor device according to claim 1, wherein the protrusion has a top portion continuous along at least one side of the semiconductor element. .

  A semiconductor device according to a third aspect of the present invention is the semiconductor device according to the first aspect, wherein a plurality of the protrusions are formed along at least one side of the semiconductor element. According to a fourth aspect of the present invention, there is provided the semiconductor device according to the third aspect, wherein the protrusions are arranged in the same row or zigzag.

  A semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to the third or fourth aspect, wherein the protrusion is a dummy bump. A semiconductor device according to a sixth aspect of the present invention is the semiconductor device according to the fifth aspect, further comprising a plurality of inspection pads formed on a peripheral portion of a substrate side surface of the semiconductor element, and the dummy bumps Is formed on the inspection pad.

  The semiconductor device according to claim 7 of the present invention is the semiconductor device according to claim 5 or 6, wherein the dummy bump is formed of a solder bump or a gold stud bump, and the connection bump. Is formed of solder bumps.

  The semiconductor device according to claim 8 of the present invention is the semiconductor device according to any one of claims 5 to 7, wherein the pitch of the dummy bumps is smaller than the pitch of the connection bumps. .

  A semiconductor device according to a ninth aspect of the present invention is the semiconductor device according to any one of the fifth to eighth aspects, wherein each of the dummy bumps is formed at a position separated from an end of the semiconductor element by about 50 to 300 μm. It is characterized by being.

  The semiconductor device according to claim 10 of the present invention is a semiconductor device in which a semiconductor element is flip-chip mounted on a substrate, and a gap between the semiconductor element and the substrate is sealed with a resin. A plurality of connection bumps formed on a side surface of the substrate, and a plurality of connection pads electrically connected to the connection bumps formed in a semiconductor element mounting region set in advance on the semiconductor element side surface of the substrate; A protrusion formed on a peripheral edge of the semiconductor element mounting region of the substrate, and the protrusion forms a gap with the side surface of the substrate of the semiconductor element, and the gap is embedded with the resin. It is characterized by being.

  The semiconductor device according to an eleventh aspect of the present invention is the semiconductor device according to the tenth aspect, wherein the protrusion has a top portion continuous along at least one side of the semiconductor element mounting region. And

  The semiconductor device according to claim 12 of the present invention is the semiconductor device according to claim 10, wherein a plurality of the protrusions are formed along at least one side of the semiconductor element mounting region. To do. A semiconductor device according to a thirteenth aspect of the present invention is the semiconductor device according to the twelfth aspect, wherein the protrusions are arranged in the same row or zigzag.

  A semiconductor device according to a fourteenth aspect of the present invention is the semiconductor device according to the twelfth or thirteenth aspect, wherein the protrusion is a dummy bump. A semiconductor device according to a fifteenth aspect of the present invention is the semiconductor device according to the fourteenth aspect, wherein the dummy bumps are formed of solder bumps or gold stud bumps.

  A semiconductor device according to a sixteenth aspect of the present invention is the semiconductor device according to the fourteenth or fifteenth aspect, wherein the pitch of the dummy bumps is smaller than the pitch of the connection bumps. .

  A semiconductor device according to a seventeenth aspect of the present invention is the semiconductor device according to any one of the fourteenth to sixteenth aspects, wherein each of the dummy bumps is separated from an end of the semiconductor element mounting region by about 50 to 300 μm. It is formed in the position.

  According to the present invention, it is possible to improve the injection property of the underfill resin, to further reduce the fillet length to be formed, and to use the substrate effectively. Stacking and miniaturization can be realized.

(Embodiment 1)
Hereinafter, the semiconductor device according to the first embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a schematic cross-sectional view showing a configuration of a semiconductor device before injection of an underfill resin in the first embodiment of the present invention. In FIG. 1, 1 is a chip which is a semiconductor element, 2 is a substrate, 3 is a connection bump on the chip side, and 4 is a chip side dummy bump which is a protrusion on the chip side. Here, a case where a dummy bump is formed as an example of a chip-side protrusion will be described, but the protrusion is not limited to a bump.

  As shown in FIG. 1, in the semiconductor device, a chip 1 is flip-chip mounted on a substrate 2, and the chip 1 and the substrate 2 are electrically connected via connection bumps 3. A connection pad (not shown) is formed at the center of the side surface of the substrate of the chip 1, and the connection bump 3 is formed on the connection pad on the chip side.

  A probe inspection pad (not shown) is formed on the peripheral edge of the substrate side surface of the chip 1, and a chip-side dummy bump 4 is formed on the probe inspection pad. As described above, in the first embodiment, the chip-side dummy bumps 4 are disposed in a peripheral region rather than a region in which the connection bumps 3 that electrically connect the chip 1 and the substrate 2 are disposed.

  On the other hand, a semiconductor element mounting area having a shape substantially equal to the rectangular chip to be mounted is set in advance at a substantially central portion of the chip side surface of the substrate 2. A connection pad on the substrate side is formed. The board-side connection pads are arranged at positions corresponding to the connection pads of the chip 1. When the chip 1 is flip-chip mounted on the substrate 2, the connection pads of the chip 1 and the connection pads of the substrate 2 are electrically connected via the connection bumps 3.

  As shown in FIG. 1, the chip-side dummy bump 4 is smaller in height than the connection bump 3, and a gap is formed between the chip side surface of the substrate 2 and the top of the chip-side dummy bump 4. The side dummy bumps 4 do not contribute to the electrical connection between the chip 1 and the substrate 2. Furthermore, the pitch of the chip-side dummy bumps 4 is smaller than the pitch of the connection bumps 3. As a result, the gap between the chip 1 and the substrate 2 at the peripheral edge of the chip 1 and the gap between the adjacent chip-side dummy bumps 4 are reduced, so that a capillary phenomenon occurs between the chip and the substrate when the underfill resin is injected. Is likely to occur. The capillary phenomenon occurs when the underfill resin adheres to the chip side surface of the substrate 2 and the surface of the chip-side dummy bump 4 or both surfaces of the adjacent chip-side dummy bump 4 and the wettability is once secured on both surfaces. Once a capillary phenomenon occurs between the chip and the substrate, an underfill resin is naturally injected between the chip and the substrate without applying an external force.

  FIG. 2 is a schematic cross-sectional view showing the configuration of the semiconductor device when the underfill resin is applied in the first embodiment of the present invention, and FIG. 3 shows the configuration of the semiconductor device after completion of the underfill resin injection in the first embodiment of the present invention. It is a schematic sectional drawing shown. In addition, the same code | symbol is attached | subjected to the member same as the member demonstrated based on FIG. 1, and description is abbreviate | omitted. 2 and 3, 5 is a nozzle, 6 is an underfill resin, and 7 is a fillet.

  After the chip 1 and the substrate 2 are flip-chip mounted through the connection bumps 3, when the underfill resin is injected, the nozzle 5 is injected with the underfill resin of the chip 1 while dropping the underfill resin droplets from the nozzle 5. It is made to move substantially parallel to the end portion on the side, and the underfill resin is attached almost parallel to the vicinity of the end portion. At this time, as shown in FIG. 2, until the underfill resin 6 adheres to both the chip side surface of the substrate 2 and the surface of the chip-side dummy bump 4 in the vicinity of the region where the chip 1 on the chip side surface of the substrate 2 is projected. Then, underfill resin droplets are dropped from the nozzle 5 and the underfill resin 6 is injected between the chip 1 and the substrate 2 by utilizing capillary action. The capillary phenomenon occurs when the underfill resin 6 is in contact with both sides of the chip side surface of the substrate 2 and the surface of the chip side dummy bump 4 and wets and spreads on both sides. After completion of the injection of the underfill resin, the space between the chip 1 and the substrate 2 is resin-sealed as shown in FIG. Further, the fillet 7 is formed by the underfill resin that protrudes from the chip.

  According to the first embodiment, the gap between the chip 1 and the substrate 2 at the peripheral edge of the chip 1 is reduced by the presence of the chip-side dummy bump, and the capillary phenomenon is more likely to occur. Therefore, the application amount of the underfill resin can be reduced. Furthermore, since the gap between adjacent chip-side dummy bumps 4 is also reduced, the amount of underfill resin applied can be further reduced. Therefore, the amount of underfill resin flowing on the opposite side to the injection direction is reduced, and the fillet 7 can be made smaller as shown in FIG.

  As described above, the sealing resin between the chip 1 and the substrate 2 improves the flip chip connection reliability. The method of applying the underfill resin from the nozzle may be an air method or a jet method.

  FIG. 4 is a schematic plan view of a chip constituting the semiconductor device according to the first embodiment of the present invention. In addition, the same code | symbol is attached | subjected to the member same as the member demonstrated based on FIGS. 1-3, and description is abbreviate | omitted. In FIG. 4, 8 is a probe inspection pad, and 9 is a wiring. However, the wiring 9 is formed inside the chip 1 and is shown here as a watermark.

  As shown in FIG. 4, on one surface (substrate side surface) of the chip 1, connection bumps 3 are formed on connection pads (not shown), and chip-side dummy bumps 4 are formed on probe inspection pads 8. Has been. Further, the connection pads and the connection bumps 3 are disposed at the center of one surface of the chip 1, and the probe inspection pads 8 and the chip-side dummy bumps 4 are disposed at the peripheral edge of one surface of the chip 1. Yes.

  The probe inspection pads 8 arranged on the peripheral edge of the chip 1 may be arranged in the same row as shown in FIG. 4 or may be arranged in a staggered manner. Further, the connection pad 3 may have a round shape, a cylindrical shape, a square shape, a polygonal shape, or the like. The shape of the chip-side dummy bump 4 may be round, cylindrical, quadrangular, polygonal, or the like.

  Also, if the chip-side dummy bump and the connection bump are formed by solder bumps, the electroplating method, screen printing method, ball mounting method, etc. are adopted as the bump formation method, and the chip-side dummy bump and the connection bump are the same conditions Can be formed. Since the chip-side dummy bump is not used for electrical connection between the chip and the substrate, it may be a gold stud bump.

  Also, any one pair of the chip-side dummy bump formed on the probe inspection pad 8 and the connection bump 3 formed on the connection pad is a wiring (Al wiring) formed inside the chip 1. (Or Cu wiring) 9 and the same potential.

  Further, since the region where the probe inspection pad 8 is formed is extremely smaller than the region where the connection bump 3 is formed, the probe inspection pad 8 is a small pad and formed at a narrow pitch. Further, since the probe inspection pad 8 has a function as an electrode, the surface is made of aluminum (Al) or copper (Cu).

  Further, the chip-side dummy bump 4 is formed at a position about 50 to 300 μm away from the end of the chip 1. This is determined in consideration of both the position of the dummy bump where the capillary phenomenon easily occurs and the pad length necessary for the probe inspection. Further, the arrangement of the chip-side dummy bumps 4 is not particularly limited as long as it is an area within the above-described range. For example, they may be arranged in the same row along one side of the chip 1 or may be arranged in a staggered manner.

  In the first embodiment, the chip-side dummy bump is provided on the probe inspection pad 8, but it is of course applicable to a semiconductor device using a chip on which the probe inspection pad is not formed. Of course, the present invention can also be applied to the case where connection bumps are formed on the connection pads of the substrate 2 by screen printing or the like.

  Further, the chip-side dummy bumps are formed along each side of the chip 1, but may be formed at least along one side of the underfill resin injection side. Further, the case where a plurality of chip-side dummy bumps 4 are formed along each side of the peripheral edge of the chip 1 has been described. However, the present invention is not limited thereto, and for example, a wall-like shape having a top portion continuous along one side of the chip 1 A plurality of protrusions may be formed on each side, or a wall-like protrusion having a top that is continuous over one side of the chip 1 may be formed on each side.

  Further, the present invention is not limited to the case where the connection bump 3 is formed at the central portion of the side surface of the substrate of the chip 1 but can be applied to the case where it is formed at the peripheral portion. In this case, a protrusion is formed between adjacent connection bumps.

(Embodiment 2)
Next, a semiconductor device according to the second embodiment of the present invention will be described with reference to the drawings. However, the same members as those described in the first embodiment are denoted by the same reference numerals, and description thereof is omitted. The semiconductor device according to the second embodiment is different from the first embodiment in that a protrusion (dummy bump) is provided on the substrate side instead of the chip side.

  FIG. 5 is a schematic cross-sectional view showing the configuration of the semiconductor device before injection of the underfill resin in the second embodiment of the present invention. In FIG. 5, reference numeral 10 denotes a substrate-side dummy bump which is a protrusion on the substrate side. Here, a case where dummy bumps are formed as an example of the substrate-side protrusions will be described, but the protrusions are not limited to bumps.

  As shown in FIG. 5, the substrate-side dummy bumps 10 are formed on the periphery of the semiconductor element mounting region set in advance on the chip side surface of the substrate 2. As described above, in the second embodiment, the substrate-side dummy bumps 10 are arranged in a peripheral region rather than a region in which the connection bumps 3 that electrically connect the chip 1 and the substrate 2 are arranged.

  The substrate-side dummy bump 10 is smaller in height than the connection bump 3, and a gap is formed between the substrate side surface of the chip 1 and the top of the substrate-side dummy bump 10. It does not contribute to the electrical connection of the substrate 2. Furthermore, the pitch of the substrate-side dummy bumps 10 is smaller than the pitch of the connection bumps 3.

  Thus, as in the first embodiment, the gap between the chip 1 and the substrate 2 at the peripheral edge of the chip 1 and the gap between the adjacent substrate-side dummy bumps 10 are reduced. Sometimes capillary action tends to occur between the chip and the substrate. The capillary phenomenon occurs when the underfill resin adheres to the substrate side surface of the chip 1 and the surface of the substrate-side dummy bump 10 or both surfaces of the adjacent substrate-side dummy bump 10 and the wettability is once secured on both surfaces.

  FIG. 6 is a schematic cross-sectional view showing the configuration of the semiconductor device when the underfill resin is applied in the second embodiment of the present invention, and FIG. 7 shows the configuration of the semiconductor device after completion of the underfill resin injection in the second embodiment of the present invention. It is a schematic sectional drawing shown.

  As shown in FIG. 6, when the underfill resin is injected, the substrate side surface and the substrate side of the chip 1 are in the vicinity of the region where the chip 1 is projected on the chip side surface of the substrate 2 as in the first embodiment. The underfill resin droplets are dropped from the nozzle 5 until the underfill resin 6 adheres to both surfaces of the dummy bump 10, and the underfill resin 6 is injected between the chip 1 and the substrate 2 using the capillary phenomenon. . The capillary phenomenon occurs when the underfill resin 6 is in contact with both the substrate side surface of the chip 1 and the surface of the substrate-side dummy bump 10 and spreads wet on both surfaces. After completion of the injection of the underfill resin, the space between the chip 1 and the substrate 2 is sealed with resin as shown in FIG. Further, the fillet 7 is formed by the underfill resin that protrudes from the chip.

  According to the second embodiment, the gap between the chip 1 and the substrate 2 at the peripheral edge of the chip 1 is reduced by the presence of the substrate-side dummy bump, and the capillary phenomenon is more likely to occur. Therefore, the application amount of the underfill resin can be reduced. Furthermore, since the gap between the adjacent substrate-side dummy bumps 10 is also reduced, the amount of underfill resin applied can be further reduced. Accordingly, the amount of underfill resin flowing on the opposite side to the injection direction is reduced, and the fillet 7 can be made smaller as shown in FIG.

  FIG. 8 is a schematic plan view of a substrate constituting the semiconductor device according to the second embodiment of the present invention. In FIG. 8, reference numeral 11 denotes a semiconductor element mounting region, and 12 denotes connection bumps on the substrate side. As shown in FIG. 8, a substrate-side connection bump 12 is formed on a connection pad (not shown) in the central portion of the semiconductor element mounting region 11 on one surface (chip side surface) of the substrate 2, and the peripheral portion. A substrate-side dummy bump 10 is formed on the substrate.

  In many cases, a solder resist or the like is formed on the surface of the substrate. A resist dummy opening is formed at a position where the substrate-side dummy bump 10 is formed, and a spherical dummy bump is formed by screen printing and reflow. it can.

  If the substrate-side dummy bump 10 and the substrate-side connection bump 12 are formed by solder bumps, a screen printing method is adopted as a bump forming method, and the substrate-side dummy bump 10 and the substrate-side connection bump 12 are formed under the same conditions. can do. Since the substrate-side dummy bump 10 is not used for electrical connection between the chip and the substrate, it may be a gold stud bump. In addition, the configuration of the semiconductor device according to the second embodiment can of course be applied even when the connection bump is not formed on the connection pad of the substrate 2. The substrate-side dummy bump may have a round shape, a cylindrical shape, a square shape, a polygonal shape, or the like.

  Further, the substrate-side dummy bump 10 is formed at a position separated from the end of the semiconductor element mounting region 11 by about 50 to 300 μm. This is determined in consideration of the position of the dummy bump where the capillary phenomenon is likely to occur.

  Further, the arrangement of the substrate-side dummy bumps 10 is not particularly limited as long as it is an area within the above-described range. For example, they may be arranged in the same row along one side of the semiconductor element mounting region 11 or may be arranged in a staggered manner.

  Further, although the substrate-side dummy bump 10 is formed along each side of the semiconductor element mounting region 11, it may be formed along at least one side of the underfill resin injection side. Further, the case where a plurality of substrate-side dummy bumps 10 are formed along each side of the peripheral edge of the semiconductor element mounting region 11 has been described. However, the present invention is not limited to this, for example, a head that continues along one side of the semiconductor element mounting region 11. A plurality of wall-like projections having a top portion may be formed on each side, or a wall-like projection portion having a top portion continuous over one side of the semiconductor element mounting region 11 may be formed on each side.

  Further, the present invention is not limited to the case where the connection bump 3 is formed at the central portion of the side surface of the substrate of the chip 1 but can be applied to the case where it is formed at the peripheral portion. In this case, the protrusion is formed so as to be positioned between the adjacent connection bumps.

  The present invention improves the underfill injection property of a flip-chip mounting type semiconductor device, can reduce the fillet length, and enables effective use of the substrate. Stacking can be realized, which is useful for mobile and other electronic devices.

Schematic sectional view showing a configuration of a semiconductor device before underfill resin injection in the first embodiment of the present invention Schematic sectional view showing the configuration of the semiconductor device during underfill resin application in Embodiment 1 of the present invention Schematic sectional view showing the configuration of the semiconductor device after completion of underfill resin injection in the first embodiment of the present invention Schematic plan view of a chip constituting the semiconductor device in the first embodiment of the present invention. Schematic sectional view showing the configuration of the semiconductor device before underfill resin injection in the second embodiment of the present invention Schematic sectional view showing the configuration of the semiconductor device during underfill resin application in Embodiment 2 of the present invention Schematic sectional view showing the configuration of the semiconductor device after completion of underfill resin injection in the second embodiment of the present invention Schematic plan view of the substrate constituting the semiconductor device in the second embodiment of the present invention Schematic perspective view showing the configuration of a conventional semiconductor device before underfill resin injection Schematic perspective view showing the configuration of a conventional semiconductor device immediately after underfill resin application The schematic perspective view which shows the structure of the semiconductor device after completion of conventional underfill resin injection Schematic sectional view showing the configuration of a conventional semiconductor device before underfill resin injection Schematic cross-sectional view showing the configuration of a conventional semiconductor device when applying underfill resin Schematic sectional view showing the configuration of a semiconductor device after completion of conventional underfill resin injection Schematic plan view before forming solder bumps on a chip constituting a conventional semiconductor device Schematic plan view after forming solder bumps on a chip constituting a conventional semiconductor device Schematic plan view of a substrate constituting a conventional semiconductor device (Part 1) Schematic plan view of a substrate constituting a conventional semiconductor device (part 2)

Explanation of symbols

1 Chip 2 Substrate 3 Chip-side connection bump 4 Chip-side dummy bump 5 Nozzle 6 Underfill resin 7 Fillet 8 Probe inspection pad 9 Wiring in chip 10 Substrate side dummy bump 11 Semiconductor element mounting area 12 Substrate side connection bump 13 Underfill resin droplet 14 Solder bump on chip side 15 Pad for connection 16 Probe inspection mark 17 Solder bump on substrate side

Claims (17)

A semiconductor device in which a semiconductor element is flip-chip mounted on a substrate and a space between the semiconductor element and the substrate is sealed with a resin,
A plurality of connection bumps formed on a side surface of the semiconductor element;
A protrusion formed on the peripheral edge of the substrate side surface of the semiconductor element;
A plurality of connection pads electrically connected to the connection bumps formed in a semiconductor element mounting region set in advance on a semiconductor element side surface of the substrate;
And the protruding portion forms a gap with a side surface of the semiconductor element of the substrate, and the gap is embedded in the resin.   The semiconductor device according to claim 1, wherein the protrusion has a top portion continuous along at least one side of the semiconductor element.   The semiconductor device according to claim 1, wherein a plurality of the protrusions are formed along at least one side of the semiconductor element.   4. The semiconductor device according to claim 3, wherein the protrusions are arranged in the same row or zigzag.   The semiconductor device according to claim 3, wherein the protrusion is a dummy bump.   6. The semiconductor device according to claim 5, further comprising a plurality of inspection pads formed on a peripheral portion of a side surface of the semiconductor element, wherein the dummy bumps are formed on the inspection pads. A semiconductor device.   7. The semiconductor device according to claim 5, wherein the dummy bump is formed of a solder bump or a gold stud bump, and the connection bump is formed of a solder bump.   8. The semiconductor device according to claim 5, wherein a pitch of the dummy bumps is smaller than a pitch of the connection bumps.   9. The semiconductor device according to claim 5, wherein each of the dummy bumps is formed at a position about 50 to 300 [mu] m away from an end of the semiconductor element. A semiconductor device in which a semiconductor element is flip-chip mounted on a substrate and a space between the semiconductor element and the substrate is sealed with a resin,
A plurality of connection bumps formed on a side surface of the semiconductor element;
A plurality of connection pads electrically connected to the connection bumps formed in a semiconductor element mounting region set in advance on a semiconductor element side surface of the substrate;
A protrusion formed at a peripheral edge of the semiconductor element mounting region of the substrate;
The semiconductor device is characterized in that a gap is formed between the protrusion and the substrate side surface of the semiconductor element, and the gap is embedded with the resin.   The semiconductor device according to claim 10, wherein the protrusion has a top portion continuous along at least one side of the semiconductor element mounting region.   The semiconductor device according to claim 10, wherein a plurality of the protrusions are formed along at least one side of the semiconductor element mounting region.   13. The semiconductor device according to claim 12, wherein the protrusions are arranged in the same row or zigzag.   The semiconductor device according to claim 12, wherein the protrusion is a dummy bump.   15. The semiconductor device according to claim 14, wherein the dummy bump is formed of a solder bump or a gold stud bump.   16. The semiconductor device according to claim 14, wherein a pitch of the dummy bumps is smaller than a pitch of the connection bumps.   17. The semiconductor device according to claim 14, wherein each of the dummy bumps is formed at a position about 50 to 300 μm away from an end of the semiconductor element mounting region.

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