JP2008086099A - Inverter device - Google Patents

Inverter device Download PDF

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Publication number
JP2008086099A
JP2008086099A JP2006261821A JP2006261821A JP2008086099A JP 2008086099 A JP2008086099 A JP 2008086099A JP 2006261821 A JP2006261821 A JP 2006261821A JP 2006261821 A JP2006261821 A JP 2006261821A JP 2008086099 A JP2008086099 A JP 2008086099A
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Prior art keywords
stage
conductor plate
natural number
switching element
diode
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JP2006261821A
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Japanese (ja)
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Hiroshi Otsuka
浩 大塚
Kazuhiro Saito
和弘 齋藤
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Honda Motor Co Ltd
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Honda Motor Co Ltd
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Priority to JP2006261821A priority Critical patent/JP2008086099A/en
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  • Inverter Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To equalize the heat balance of the entire inverter circuit by cooling an IGBT element more than IGBT elements on the first stage and the final stage of a triple bridge inverter circuit. <P>SOLUTION: In an inverter device which has a triple bridge inverter circuit where a series circuit is composed of a plurality of switching elements arranged in three stages and three series circuits are connected in parallel, the switching element on the second stage is arranged upstream of a cooling path which is supplied with a refrigerant for cooling the triple inverter circuit, and the switching elements on the first stage and the third stage are arranged downstream of the above cooling path. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、トリプルブリッジインバータ回路等複数の負荷が接続されるブリッジインバータ回路を有するインバータ装置の実装構造に関する。   The present invention relates to an inverter device mounting structure having a bridge inverter circuit to which a plurality of loads such as a triple bridge inverter circuit are connected.

図２０（ａ）に示すモータ１９６（負荷）が１個のインバータ回路１９２は、ＩＧＢＴ素子（スイッチング素子）とフライホイールダイオードとを逆並列接続したＩＧＢＴモジュールが三相インバータ回路の各アームを構成する。Ｕ相，Ｖ相，Ｗ相の上アームと下アームを構成するＩＧＢＴモジュールは直列接続されて三相インバータ回路を構成する。   The inverter circuit 192 having one motor 196 (load) shown in FIG. 20A is configured by an IGBT module in which an IGBT element (switching element) and a flywheel diode are connected in antiparallel to each arm of the three-phase inverter circuit. . The IGBT modules constituting the upper and lower arms of the U phase, V phase, and W phase are connected in series to constitute a three-phase inverter circuit.

ＩＧＢＴ素子Ｕ１及びフライホイールダイオードＤＵ１は、Ｕ相の上アーム（ハイ側）を構成する。また、ＩＧＢＴ素子Ｖ１及びフライホイールダイオードＤＶ１は、Ｖ相の上アームを構成し、ＩＧＢＴ素子Ｗ１及びフライホイールダイオードＤＷ１は、Ｗ相の上アームを構成する。   IGBT element U1 and flywheel diode DU1 constitute the upper arm (high side) of the U phase. IGBT element V1 and flywheel diode DV1 constitute an upper arm of V phase, and IGBT element W1 and flywheel diode DW1 constitute an upper arm of W phase.

ＩＧＢＴ素子Ｕ２及びフライホイールダイオードＤＵ２は、Ｕ相の下アーム（ロー側）を構成する。また、ＩＧＢＴ素子Ｖ２及びフライホイールダイオードＤＶ２は、Ｖ相の下アームを構成し、ＩＧＢＴ素子Ｗ２及びフライホイールダイオードＤＷ２は、Ｗ相の下アームを構成する。   IGBT element U2 and flywheel diode DU2 constitute the lower arm (low side) of the U phase. The IGBT element V2 and the flywheel diode DV2 constitute a lower arm of the V phase, and the IGBT element W2 and the flywheel diode DW2 constitute a lower arm of the W phase.

ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１のコレクタがバッテリ１９４のＰバスバーＰＢに接続されている。ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のエミッタがバッテリ１９４のＮバスバーＮＢに接続されている。各ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１，Ｕ２，Ｖ２，Ｗ２のコレクタ−エミッタ間は、エミッタからコレクタの方向が順方向となるようにフライホイールダイオードＤＵ２，ＤＶ２，ＤＷ２，ＤＵ１，ＤＶ１，ＤＷ１が接続されている。   The collectors of IGBT elements U 1, V 1, W 1 are connected to P bus bar PB of battery 194. The emitters of IGBT elements U2, V2, and W2 are connected to N bus bar NB of battery 194. Flywheel diodes DU2, DV2, DW2, DU1, DV1, DW1 are connected between the collector and emitter of each IGBT element U1, V1, W1, U2, V2, W2 so that the direction from the emitter to the collector is the forward direction. ing.

ＩＧＢＴ素子Ｕ１，Ｕ２，Ｖ１，Ｖ２，Ｗ１，Ｗ２をパルス幅変調によりＯＮ／ＯＦＦするパルス信号（ゲート信号）が図示しないＥＣＵよりＩＧＢＴ素子Ｕ１，Ｕ２，Ｖ１，Ｖ２，Ｗ１，Ｗ２のゲートに入力される。各ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１のエミッタ及び各ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のコレクタは、モータ６のＵ，Ｖ，Ｗ相の各コイル端子に接続されている。   A pulse signal (gate signal) for turning ON / OFF the IGBT elements U1, U2, V1, V2, W1, and W2 by pulse width modulation is input from the ECU (not shown) to the gates of the IGBT elements U1, U2, V1, V2, W1, and W2. Is done. The emitters of the IGBT elements U1, V1, and W1 and the collectors of the IGBT elements U2, V2, and W2 are connected to the U, V, and W phase coil terminals of the motor 6, respectively.

図２０（ｂ）に示すように、インバータ回路１９０の実装構造は、絶縁材２１２上に６個の導体板２０６＃Ｕｉ（ｉ＝１〜２），２０６＃Ｖｉ（ｉ＝１〜２），２０６＃Ｖｉ（ｉ＝１〜２），２０６＃Ｗｉ（ｉ＝１〜２）が並べて配置される。導体板２０６＃Ｕｉ（ｉ＝１〜２），２０６＃Ｖｉ（ｉ＝１〜２），２０６＃Ｗｉ（ｉ＝１〜２）上に、ＩＧＢＴ素子２０８＃Ｕｉ（ｉ＝１〜２），２０８＃Ｖｉ（ｉ＝１〜２），２０８＃Ｗｉ（ｉ＝１〜２）及びフライホイールダイオード２１０＃Ｕｉ（ｉ＝１〜２），２１０＃Ｖｉ（ｉ＝１〜２），２１０＃Ｗｉ（ｉ＝１〜２）が形成されている。   As shown in FIG. 20B, the mounting structure of the inverter circuit 190 has six conductor plates 206 # Ui (i = 1 to 2), 206 # Vi (i = 1 to 2), 206 # Vi (i = 1 to 2) and 206 # Wi (i = 1 to 2) are arranged side by side. On the conductor plates 206 # Ui (i = 1 to 2), 206 # Vi (i = 1 to 2), and 206 # Wi (i = 1 to 2), the IGBT element 208 # Ui (i = 1 to 2), 208 # Vi (i = 1 to 2), 208 # Wi (i = 1 to 2) and flywheel diode 210 # Ui (i = 1 to 2), 210 # Vi (i = 1 to 2), 210 # Wi (I = 1 to 2) is formed.

正極接続端子２００＃Ｕ，２００＃Ｖ，２００＃Ｗは、導体板２０６＃Ｕ１，２０６＃Ｖ１，２０６＃Ｗ１に接続される。負極接続端子２０２＃Ｕ，２０２＃Ｖ，２０２＃Ｗは、ＩＧＢＴ素子２０８＃Ｕ，２０８＃Ｖ，２０８＃Ｗ及びフライホイールダイオード２１０＃Ｕ２，２１０＃Ｖ２，２１０＃Ｗ２に接続される。   The positive electrode connection terminals 200 # U, 200 # V, and 200 # W are connected to the conductor plates 206 # U1, 206 # V1, and 206 # W1. Negative electrode connection terminals 202 # U, 202 # V, 202 # W are connected to IGBT elements 208 # U, 208 # V, 208 # W and flywheel diodes 210 # U2, 210 # V2, 210 # W2.

出力端子２０４＃Ｕ，２０４＃Ｖ，２０４＃Ｗは、導体板２０６＃Ｕ２，２０６＃Ｖ２，２０６＃Ｗ２に接続される。ＩＧＢＴ素子２０８＃Ｕ１，２０８＃Ｖ１，２０８＃Ｗ１のエミッタ及びフライホイールダイオード２１０＃Ｕ１，２１０＃Ｖ１，２１０＃Ｗ１のアノード並びに導体板２０６＃Ｕ２，２０６＃Ｖ２，２０６＃Ｗ２は接続導体２０３＃Ｕ，２０３＃Ｖ，２０３＃Ｗにより接続される。   Output terminals 204 # U, 204 # V, 204 # W are connected to conductor plates 206 # U2, 206 # V2, 206 # W2. The emitters of the IGBT elements 208 # U1, 208 # V1, 208 # W1, the anodes of the flywheel diodes 210 # U1, 210 # V1, 210 # W1 and the conductor plates 206 # U2, 206 # V2, 206 # W2 are connected conductors 203. #U, 203 # V, 203 # W are connected.

一方、例えば、特許文献１には、３段に配置されたスイッチング素子により直列回路が構成されるとともに、３つの直列回路が並列に接続されたトリプルブリッジインバータ回路と、該トリプルブリッジインバータ回路の各相の１段目の前記スイッチング素子と２段目のスイッチング素子との接続点に接続された各制御端子からなる３つの制御端子を有する第１負荷と、トリプルブリッジインバータ回路の各列の２段目の前記スイッチング素子と３段目のスイッチング素子との接続点に接続された各制御端子からなる３つの制御端子を有する第２負荷と、スイッチング素子のオン／オフ状態を制御するインバータ制御手段とを備えたインバータ装置が知られている。
特開２００４−１１２９７０号公報 On the other hand, for example, in Patent Document 1, a series circuit is configured by switching elements arranged in three stages, and a triple bridge inverter circuit in which three series circuits are connected in parallel, and each of the triple bridge inverter circuits A first load having three control terminals each having a control terminal connected to a connection point between the switching element in the first stage of the phase and the switching element in the second stage, and two stages in each row of the triple bridge inverter circuit A second load having three control terminals comprising control terminals connected to a connection point between the switching element of the eye and the switching element of the third stage, and inverter control means for controlling the on / off state of the switching element; There is known an inverter device provided with
JP 2004-112970 A

しかしながら、従来のトリプルブリッジインバータ回路には以下のような問題がある。トリプルブリッジインバータ回路を実現するモジュールでは１相あたり出力が２箇所必要となり、図２０（ｂ）に示したモジュール構造では実現不可能である。また、トリプルブリッジインバータ回路の２段目のＵ，Ｖ，Ｗ相のＩＧＢＴ素子は、第１負荷を駆動制御する場合及び第２負荷を駆動制御する場合において、パルス幅変調（ＰＷＭ変調）によりＯＮ／ＯＦＦが制御されることから、１段目及び３段目のＵ，Ｖ，Ｗ相のＩＧＢＴ素子よりもスイッチング回数が多くなる。   However, the conventional triple bridge inverter circuit has the following problems. In a module that realizes a triple bridge inverter circuit, two outputs per phase are required, which cannot be realized with the module structure shown in FIG. In addition, the U, V and W phase IGBT elements in the second stage of the triple bridge inverter circuit are turned on by pulse width modulation (PWM modulation) when driving the first load and when controlling the second load. Since / OFF is controlled, the number of times of switching is larger than that of the first, third, and U-phase IGBT elements in the third and third stages.

ＩＧＢＴ素子のスイッチングがあると、スイッチングロスにより発熱する。従って、２段目のＩＧＢＴ素子は１段目及び３段目のＩＧＢＴ素子よりも発熱が大きくなる。そのため、２段目のＩＧＢＴ素子を１段目及び３段目のＩＧＢＴ素子よりもより冷却する必要がある。   When there is switching of the IGBT element, heat is generated due to switching loss. Accordingly, the second-stage IGBT element generates more heat than the first-stage and third-stage IGBT elements. Therefore, it is necessary to cool the second-stage IGBT element more than the first-stage and third-stage IGBT elements.

同様に、２×Ｍ又は（２×Ｍ＋１）（Ｍ≧２以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の直列回路が並列に接続されたＭ段Ｎ相のブリッジインバータ回路を有するインバータ装置においても、初段及び最終段以外のＩＧＢＴ素子は初段及び最終段のＩＧＢＴ素子よりも発熱が大きくなることから、より冷却する必要がある。   Similarly, a series circuit is configured by switching elements arranged in 2 × M or (2 × M + 1) (M ≧ 2 or more natural number) stages, and N (N is a natural number of 2 or more) series circuits. Even in an inverter device having an M-stage N-phase bridge inverter circuit connected in parallel, the IGBT elements other than the first and last stages generate more heat than the first and last stage IGBT elements. is there.

本発明は、上記問題点に鑑みてなされたものであり、トリプルブリッジインバータ回路やＬ（Ｌ≧４）段Ｎ相（Ｎ≧２）ブリッジインバータ回路の初段及び最終段のＩＧＢＴ素子よりもそれ以外のＩＧＢＴ素子をより冷却してインバータ回路全体の熱バランスを均等化するインバータ装置を提供することを目的とする。   The present invention has been made in view of the above problems, and other than the IGBT elements at the first stage and the final stage of the triple bridge inverter circuit and the L (L ≧ 4) stage N phase (N ≧ 2) bridge inverter circuit. It is an object of the present invention to provide an inverter device that further cools the IGBT element and equalizes the thermal balance of the entire inverter circuit.

請求項１記載の発明によると、３段に配置された複数のスイッチング素子により直列回路が構成されるとともに、３つの前記直列回路が並列に接続されたトリプルブリッジインバータ回路を有するインバータ装置であって、２段目の前記スイッチング素子が前記トリプルブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置され、１段目及び３段目の前記スイッチング素子が前記冷却経路の下流側に配置されていることを特徴とするインバータ装置が提供される。   According to the first aspect of the present invention, there is provided an inverter device including a triple bridge inverter circuit in which a series circuit is configured by a plurality of switching elements arranged in three stages and the three series circuits are connected in parallel. The second-stage switching element is disposed upstream of a cooling path to which a refrigerant for cooling the triple bridge inverter circuit is supplied, and the first-stage and third-stage switching elements are downstream of the cooling path. An inverter device characterized by being arranged on the side is provided.

請求項２記載の発明によると、請求項１記載の発明において、前記トリプルブリッジインバータ回路の所定相の１段目の前記スイッチング素子及び２段目の前記スイッチング素子に接続された第１出力端子、並びに前記トリプルブリッジインバータ回路の前記所定相の２段目のスイッチング素子及び３段目の前記スイッチング素子に接続された第２出力端子が、前記冷却経路の上流側に配置され、１段目の前記スイッチング素子に接続された直流電源の正極入力端子及び３段目の前記スイッチング素子に接続された前記直流電源の負極入力端子が前記冷却経路の下流側に配置されていることを特徴とするインバータ装置が提供される。   According to the invention of claim 2, in the invention of claim 1, the first output terminal connected to the first stage switching element and the second stage switching element of the predetermined phase of the triple bridge inverter circuit, And a second output terminal connected to the second-stage switching element of the predetermined phase and the third-stage switching element of the triple bridge inverter circuit is arranged on the upstream side of the cooling path, and the first-stage switching element An inverter device, wherein a positive input terminal of a DC power source connected to the switching element and a negative input terminal of the DC power source connected to the third stage switching element are arranged on the downstream side of the cooling path. Is provided.

請求項３記載の発明によると、請求項２記載の発明において、第１導体板を含み該第１導体板上に１段目の前記スイッチング素子及びダイオードが設けられた第１基板と、絶縁材上に第２導体板が形成され該第２導体板上に２段目の前記スイッチング素子及びダイオードが設けられた第２基板と、絶縁材上に第３導体板が形成され該第３導体板上に３段目の前記スイッチング素子及びダイオードが設けられた第３基板と、２段目の前記スイッチング素子及びダイオード並びに前記第２導体板に接続された第１接続導体とを備え、前記第２基板は前記第１及び第３基板よりも前記冷却経路の上流側に配置されていることを特徴とするインバータ装置が提供される。   According to a third aspect of the present invention, in the second aspect of the present invention, the first substrate including the first conductive plate and having the first-stage switching element and the diode provided on the first conductive plate, and the insulating material A second conductor plate is formed on the second substrate on which the second-stage switching elements and diodes are provided, and a third conductor plate is formed on the insulating material. A third substrate on which the third-stage switching element and diode are provided; a second-stage switching element and diode; and a first connection conductor connected to the second conductor plate; An inverter device is provided in which the substrate is arranged on the upstream side of the cooling path from the first and third substrates.

請求項４記載の発明によると、請求項３記載の発明において、前記正極入力端子は前記第１導体板に接続され、前記第１出力端子は前記第２導体板に接続され、前記第２出力端子は２段目の前記スイッチング素子及びダイオード並びに前記第３導体板に接続された第２接続導体から成り、第１電流は、前記正極入力端子、前記第１導体板、１段目の前記スイッチング素子、前記第１接続導体及び前記第２導体板を通して前記第１出力端子に流れ、第２電流は、前記第２接続導体及び３段目の前記スイッチング素子を通して前記負極入力端子に流れるよう構成されていることを特徴とするインバータ装置が提供される。   According to the invention of claim 4, in the invention of claim 3, the positive input terminal is connected to the first conductor plate, the first output terminal is connected to the second conductor plate, and the second output. The terminal includes the second-stage switching element and diode, and a second connection conductor connected to the third conductor plate, and the first current is the positive input terminal, the first conductor plate, and the first-stage switching. An element, the first connection conductor, and the second conductor plate flow to the first output terminal, and a second current flows to the negative input terminal through the second connection conductor and the third-stage switching element. An inverter device is provided.

請求項５記載の発明によると、請求項４記載の発明において、前記第１、第２及び第３基板は、互いに所定距離離間して配置され、前記第１、第２及び第３基板間に、１段目、２段目、及び３段目の前記スイッチング素子をＯＮ／ＯＦＦするための駆動信号端子が配置されていることを特徴とするインバータ装置が提供される。   According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the first, second and third substrates are spaced apart from each other by a predetermined distance, and between the first, second and third substrates. There is provided an inverter device characterized in that drive signal terminals for turning on / off the switching elements in the first stage, the second stage, and the third stage are arranged.

請求項６記載の発明によると、（２×Ｍ＋１）（Ｍは２以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続されたＭ段Ｎ相ブリッジインバータ回路を有するインバータ装置であって、ｊ（ｊ＝２から２×Ｍまでの自然数）段目の前記スイッチング素子が、１段目及び（２×Ｍ＋１）段目の前記スイッチング素子よりも、前記Ｍ段Ｎ相ブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置されていることを特徴とするインバータ装置が提供される。   According to the invention of claim 6, a series circuit is configured by switching elements arranged in (2 × M + 1) (M is a natural number of 2 or more) stages, and N (N is a natural number of 2 or more) pieces of the circuit An inverter device having an M-stage N-phase bridge inverter circuit in which series circuits are connected in parallel, wherein the switching element of j (j = 2 to 2 × M) stage is the first stage and (2 An inverter device is provided, which is arranged upstream of the cooling path to which the refrigerant for cooling the M-stage N-phase bridge inverter circuit is supplied rather than the switching element of the (M + 1) stage. The

請求項７記載の発明によると、請求項６記載の発明において、第ｋ（ｋは１〜（２×Ｍ＋１）までの自然数）導体板を含み該第ｋ導体板上にｋ（ｋは１〜（２×Ｍ＋１）までの自然数）段目の前記スイッチング素子及び第ｋダイオードが設けられた第ｋ基板と、前記第ｋ導体板（ｋは１）に接続された直流電源の正極入力端子と、（２×Ｍ＋１）段目の前記スイッチング素子及び第ｋダイオード（ｋは（２×Ｍ＋１））に接続された前記直流電源の負極入力端子と、第ｋ（ｋは１〜（２×Ｍ）までの自然数）段目のスイッチング素子及び第ｋダイオード並びに第（ｋ＋１）（ｋは１〜（２×Ｍ）までの自然数）導体板に接続された第ｋ出力端子とを備え、前記第ｋ基板（ｋは（１からＭまでの自然数））は前記第（ｋ＋１）基板（ｋは（１からＭまでの自然数））よりも前記冷却経路の下流側に配置され、前記第ｋ基板（ｋは（Ｍ＋１）から２×Ｍまでの自然数））は前記第（ｋ＋１）基板（ｋは（（Ｍ＋１）から２×Ｍまでの自然数））よりも前記冷却経路の上流側に配置されていることを特徴とするインバータ装置が提供される。   According to the invention described in claim 7, in the invention described in claim 6, the k-th (k is a natural number from 1 to (2 × M + 1)) conductor plate is included and k (k is 1 to 2) on the k-th conductor plate. (Natural number up to (2 × M + 1)) k-th substrate provided with the switching element and k-th diode in the stage, a positive input terminal of a DC power source connected to the k-th conductor plate (k is 1), A negative input terminal of the DC power source connected to the switching element and the k-th diode (k is (2 × M + 1)) in the (2 × M + 1) stage, and k (k is 1 to (2 × M)) A k-th output terminal connected to a (k + 1) -th switching element and a k-th diode and a (k + 1) -th (k is a natural number from 1 to (2 × M)) conductor plate, k is (natural number from 1 to M)) is the (k + 1) th substrate (k is (1 to M The k-th substrate (k is a natural number from (M + 1) to 2 × M)) is arranged on the downstream side of the cooling path with respect to the (k + 1) -th substrate (k is ((M + 1) To 2 × M natural number)) is provided upstream of the cooling path. An inverter device is provided.

請求項８記載の発明によると、（２×Ｍ）（Ｍは２以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続されたＭ段Ｎ相ブリッジインバータ回路であって、ｊ（ｊ＝２から（２×Ｍ−１）の自然数）段目の前記スイッチング素子が、前記１段目及び（２×Ｍ）段目の前記スイッチング素子よりも前記Ｍ段Ｎ相ブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置されていることを特徴とするインバータ装置が提供される。   According to the eighth aspect of the present invention, a series circuit is configured by switching elements arranged in (2 × M) (M is a natural number of 2 or more) stages, and N (N is a natural number of 2 or more) pieces of the circuit. In an M-stage N-phase bridge inverter circuit in which series circuits are connected in parallel, the switching element of j (j = 2 to (2 × M−1) natural number) stage is the first stage and (2 (X) An inverter device is provided, which is arranged upstream of a cooling path to which a refrigerant for cooling the M-stage N-phase bridge inverter circuit is supplied rather than the switching element of the M-th stage. .

請求項９記載の発明によると、請求項８記載の発明において、第ｋ（ｋは１〜（２×Ｍ）までの自然数）導体板を含み該第ｋ導体板上にｋ（ｋは１〜（２×Ｍ）までの自然数）段目の前記スイッチング素子及び第ｋダイオードが設けられた第ｋ基板と、前記第ｋ導体板（ｋは１）に接続された直流電源の正極入力端子と、（２×Ｍ）段目の前記スイッチング素子及び第ｋダイオード（ｋは（２×Ｍ））に接続された前記直流電源の負極入力端子と、第ｋ（ｋは１〜（２×Ｍ−１）までの自然数）段目のスイッチング素子及び第ｋダイオード並びに第（ｋ＋１）（ｋは１〜（２×Ｍ−１）までの自然数）導体板に接続された第ｋ出力端子とを備え、前記第ｋ基板（ｋは１から（Ｍ−１）までの自然数）は前記第（ｋ＋１）基板（ｋは（１から（Ｍ−１）までの自然数））よりも前記冷却経路の下流側に縦列に配置され、前記第ｋ基板（ｋは（Ｍ＋１）から（２×Ｍ−１）までの自然数）は前記第（ｋ＋１）基板（ｋは（Ｍ＋１）から（２×Ｍ−１）までの自然数）よりも前記冷却経路の上流側に縦列に配置されていることを特徴とするインバータ装置が提供される。   According to the ninth aspect of the invention, in the eighth aspect of the invention, the kth (k is a natural number from 1 to (2 × M)) conductor plate is included, and k (k is 1 to 2) on the kth conductor plate. (Natural number up to (2 × M)) k-th substrate provided with the switching element and k-th diode in the stage, a positive input terminal of a DC power source connected to the k-th conductor plate (k is 1), A negative input terminal of the DC power source connected to the switching element and the k-th diode (k is (2 × M)) in the (2 × M) stage, and the k-th (k is 1 to (2 × M−1). ) Switching element and k-th diode, and (k + 1) -th (k is a natural number from 1 to (2 × M−1)) k-th output terminal connected to the conductor plate, The kth substrate (k is a natural number from 1 to (M−1)) is the (k + 1) th substrate (k is (1 to (M− ) To the downstream side of the cooling path, and the kth substrate (k is a natural number from (M + 1) to (2 × M−1)) is the (k + 1) th substrate ( An inverter device is provided in which k is arranged in a column on the upstream side of the cooling path from (M + 1) to (2 × M−1) natural numbers).

請求項１記載の発明によれば、発熱の大きい２段目のスイッチング素子が冷却経路の上流側に配置され、発熱がより小さい１段目及び３段目のスイッチング素子が冷却経路の下流側に配置されているので、インバータ全体の熱バランスが均等化され、スイッチング素子の統一化が図れて、インバータ装置の小型化及び低コストとなる。   According to the first aspect of the present invention, the second-stage switching element that generates a large amount of heat is disposed on the upstream side of the cooling path, and the first-stage and third-stage switching elements that generate less heat are positioned on the downstream side of the cooling path. Since they are arranged, the thermal balance of the entire inverter is equalized, the switching elements are unified, and the inverter device is reduced in size and cost.

請求項２記載の発明によれば、第１出力端子及び第２出力端子が、冷却経路の上流側に配置され、正極入力端子及び負極入力端子が冷却経路の下流側に配置されているので、インバータ装置の製造性の向上及び低コストとなる。   According to the invention of claim 2, since the first output terminal and the second output terminal are arranged on the upstream side of the cooling path, and the positive electrode input terminal and the negative electrode input terminal are arranged on the downstream side of the cooling path, The productivity of the inverter device is improved and the cost is reduced.

請求項３記載の発明によれば、基板並びにスイッチング素子及びダイオードを統一することができ更に製造性の向上及び低コストとなる。   According to the invention described in claim 3, the substrate, the switching element and the diode can be unified, and the productivity is further improved and the cost is reduced.

請求項４記載の発明によれば、正極入力端子を第１導電板に接続し、第１出力端子を第２導体板に接続し、第２出力端子を第２接続導体により構成したので、インバータ装置の構成が簡単になり、更に製造性の向上及び低コストとなる。   According to the fourth aspect of the present invention, the positive input terminal is connected to the first conductive plate, the first output terminal is connected to the second conductive plate, and the second output terminal is constituted by the second connection conductor. The configuration of the apparatus is simplified, and the productivity is further improved and the cost is reduced.

請求項５記載の発明によれば、駆動信号端子をスイッチング素子に近接して配置することが可能となり、インバータ装置のサイズを小さくでき、更に製造性の向上及び低コストとなる。   According to the fifth aspect of the present invention, the drive signal terminal can be disposed close to the switching element, the size of the inverter device can be reduced, and the manufacturability can be improved and the cost can be reduced.

請求項６記載の発明によれば、（２×Ｍ）（Ｍ≧２の自然数）段Ｎ相ブリッジインバータ回路の１段目及び（２×Ｍ）段目のスイッチング素子がそれ以外のスイッチング素子よりも冷却経路の下流側に配置されているので、インバータ全体の熱バランスが均等化され、スイッチング素子の統一化が図れて、インバータ装置の小型化及び低コストとなる。   According to the invention of claim 6, the switching elements of the first stage and the (2 * M) stage of the (2 × M) (natural number of M ≧ 2) stage N-phase bridge inverter circuit are different from the other switching elements. Since it is arranged downstream of the cooling path, the thermal balance of the entire inverter is equalized, the switching elements can be unified, and the inverter device can be reduced in size and cost.

請求項７記載の発明によれば、（２×Ｍ）（Ｍ≧２の自然数）段Ｎ相ブリッジインバータ回路を有するインバータ装置の基板並びにスイッチング素子及びダイオードを統一することができ製造性の向上及び低コストとなる。   According to the seventh aspect of the invention, the substrate of the inverter device having the (2 × M) (natural number of M ≧ 2) stage N-phase bridge inverter circuit, the switching element and the diode can be unified, and the productivity is improved. Low cost.

請求項８記載の発明によれば、（２×Ｍ＋１）（Ｍ≧２の自然数）段Ｎ相ブリッジインバータ回路の１段目及び（２×Ｍ＋１）段目のスイッチング素子がそれ以外のスイッチング素子よりも冷却経路の下流側に配置されているので、インバータ全体の熱バランスが均等化され、スイッチング素子の統一化が図れて、インバータ装置の小型化及び低コストとなる。   According to the eighth aspect of the present invention, the switching elements of the first stage and (2 * M + 1) stage of the (2 × M + 1) (M ≧ 2 natural number) stage N-phase bridge inverter circuit are more than the other switching elements. Since it is arranged downstream of the cooling path, the thermal balance of the entire inverter is equalized, the switching elements can be unified, and the inverter device can be reduced in size and cost.

請求項９記載の発明によれば、（２×Ｍ＋１）（Ｍ≧２の自然数）段Ｎ相ブリッジインバータ回路を有するインバータ装置の基板並びにスイッチング素子及びダイオードを統一することができ製造性の向上及び低コストとなる。   According to the ninth aspect of the present invention, the substrate of the inverter device having the (2 × M + 1) (M ≧ 2 natural number) stage N-phase bridge inverter circuit, the switching element, and the diode can be unified, and the productivity is improved. Low cost.

図１はトリプルブリッジインバータ装置１の回路図である。トリプルブリッジインバータ装置１は、直流電源２、トリプルブリッジインバータ回路４、第１モータ６及び第２モータ８を具備する。   FIG. 1 is a circuit diagram of the triple bridge inverter device 1. The triple bridge inverter device 1 includes a DC power supply 2, a triple bridge inverter circuit 4, a first motor 6 and a second motor 8.

直流電源２は、第１モータ６及び第２モータ８にインバータ回路４を介して電力供給するための蓄電装置であり、リチウムイオン電池やニッケル水素電池などであり、複数の単電池がモジュール化された複数のバッテリブロックが直列接続されている。直流電源２はキャパシタでも良い。   The DC power supply 2 is a power storage device for supplying power to the first motor 6 and the second motor 8 via the inverter circuit 4, and is a lithium ion battery, a nickel metal hydride battery, or the like, and a plurality of single cells are modularized. A plurality of battery blocks are connected in series. The DC power supply 2 may be a capacitor.

インバータ回路４は、各３段に配置されたスイッチング素子であるＩＧＢＴ素子Ｕｉ（ｉ＝１〜３），Ｖｉ（ｉ＝１〜３），Ｗｉ（ｉ＝１〜３）により３つの直列回路が並列に接続されたトリプルブリッジインバータ回路である。   The inverter circuit 4 includes three series circuits by IGBT elements Ui (i = 1 to 3), Vi (i = 1 to 3), and Wi (i = 1 to 3), which are switching elements arranged in three stages. It is a triple bridge inverter circuit connected in parallel.

直流電源２のハイ（Ｈｉ）側ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１のコレクタは正極接続端子（正極接続バスバー）により直流電源２の正極側端子に接続され、下段（Ｌｏ）側ＩＧＢＴ素子Ｕ３，Ｖ３，Ｗ３のエミッタは負極接続端子（負極接続バスバー）により直流電源２の負極側端子に接続され、上段（Ｈｉ）側ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１のエミッタは中段（Ｍｉｄ）側ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のコレクタに接続され、Ｍｉｄ側ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のエミッタはＬｏ側ＩＧＢＴ素子Ｕ３，ＶＬ，ＷＬのコレクタに接続され、Ｈｉ側ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１、ＭｉＤ側ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２、Ｌｏ側ＩＧＢＴ素子Ｕ３，Ｖ３，Ｗ３のコレクタ−エミッタ間にはエミッタからコレクタに向けて順方向となるようにしてフライホイールダイオードＤＵｉ（ｉ＝１〜３），ＤＶｉ（ｉ＝１〜３），ＤＷｉ（ｉ＝１〜３）が接続されている。   The collectors of the high (Hi) side IGBT elements U1, V1, W1 of the DC power source 2 are connected to the positive side terminal of the DC power source 2 by a positive electrode connection terminal (positive electrode connection bus bar), and the lower (Lo) side IGBT elements U3, V3, The emitter of W3 is connected to the negative electrode side terminal of the DC power supply 2 by a negative electrode connection terminal (negative electrode connection bus bar), and the emitters of the upper (Hi) side IGBT elements U1, V1, W1 are the middle stage (Mid) side IGBT elements U2, V2, and so on. Connected to the collector of W2, the emitters of the Mid-side IGBT elements U2, V2, W2 are connected to the collectors of the Lo-side IGBT elements U3, VL, WL, Hi-side IGBT elements U1, V1, W1, MiD-side IGBT element U2, V2, W2, Lo side IGBT elements U3, V3, W3 between the collector and the emitter so that the forward direction from the emitter toward the collector Flywheel diode DUi (i = 1~3) and, DVi (i = 1~3), DWi (i = 1~3) is connected.

ＩＧＢＴ素子Ｕｉ（ｉ＝１〜３），Ｖｉ（ｉ＝１〜３），Ｗｉ（ｉ＝１〜３）のゲートには図示しないＥＣＵよりゲートドライブ回路を介してＩＧＢＴ素子Ｕｉ（ｉ＝１〜３），ＩＧＢＴ素子Ｖｉ（ｉ＝１〜３），ＩＧＢＴ素子Ｗｉ（ｉ＝１〜３）をオン／オフするパルス信号が入力される。各ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１のエミッタ及び各ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のコレクタは、第１モータ６のＵ，Ｖ，Ｗ相の例えば固定子巻線などのコイル端子（制御端子）に各相個別に接続されている。また、各ＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２のエミッタ及び各ＩＧＢＴ素子Ｕ３，Ｖ３，Ｗ３のコレクタは、第２モータ８のＵ，Ｖ，Ｗ相の例えば固定子巻線などのコイル端子（制御端子）に各相個別に接続されている。   The gates of the IGBT elements Ui (i = 1 to 3), Vi (i = 1 to 3), and Wi (i = 1 to 3) are connected to the IGBT elements Ui (i = 1 to 1) from an ECU (not shown) via a gate drive circuit. 3) A pulse signal for turning on / off the IGBT element Vi (i = 1 to 3) and the IGBT element Wi (i = 1 to 3) is input. The emitters of the IGBT elements U1, V1, and W1 and the collectors of the IGBT elements U2, V2, and W2 are connected to coil terminals (control terminals) such as stator windings of the U, V, and W phases of the first motor 6, respectively. The phases are connected individually. The emitters of the IGBT elements U2, V2, and W2 and the collectors of the IGBT elements U3, V3, and W3 are coil terminals (control terminals) such as stator windings of the U, V, and W phases of the second motor 8. Are connected individually to each phase.

インバータ回路４においては、第１モータ６の駆動及び回生作動を制御する際には、各相にある３つのＩＧＢＴ素子においてＬｏ側ＩＧＢＴ素子Ｕ３，Ｖ３，Ｗ３がＯＮ状態に固定され、ＩＧＢＴ素子Ｕ１，Ｕ２、Ｖ１，Ｖ２、Ｗ１，Ｗ２による構成される等価的な第１インバータに対して、ＩＧＢＴ素子Ｕ１，Ｕ２、Ｖ１，Ｖ２、Ｗ１，Ｗ２をパルス幅変調（ＰＷＭ）方式によりＯＮ／ＯＦＦ駆動するゲート信号がＥＣＵから入力される。   In the inverter circuit 4, when controlling the driving and regenerative operation of the first motor 6, the Lo-side IGBT elements U3, V3, W3 are fixed to the ON state in the three IGBT elements in each phase, and the IGBT element U1 , U2, V1, V2, W1, and W2, IGBT elements U1, U2, V1, V2, W1, and W2 are ON / OFF driven by a pulse width modulation (PWM) method. A gate signal is input from the ECU.

また、第２モータ８の駆動及び回生作動を制御する際には、トリプルブリッジインバータ回路４の各相にある３つのＩＧＢＴ素子においてＨｉ側ＩＧＢＴ素子Ｕ１，Ｖ１，Ｗ１がＯＮ状態に固定され、ＩＧＢＴ素子Ｕ２，Ｕ３、Ｖ２，Ｖ３、Ｗ２，Ｗ３により構成される等価的な第２インバータに対して、ＩＧＢＴ素子Ｕ２，Ｕ３、Ｖ２，Ｖ３、Ｗ２，Ｗ３をパルス幅変調方式によりＯＮ／ＯＦＦ駆動するゲート信号がＥＣＵから入力される。   Further, when controlling the driving and regenerative operation of the second motor 8, the Hi-side IGBT elements U1, V1, W1 are fixed to the ON state in the three IGBT elements in each phase of the triple bridge inverter circuit 4, and the IGBT The IGBT elements U2, U3, V2, V3, W2, and W3 are ON / OFF driven by a pulse width modulation method with respect to an equivalent second inverter constituted by the elements U2, U3, V2, V3, W2, and W3. A gate signal is input from the ECU.

第１及び第２モータ６，８は、トリプルブリッジインバータ回路４との間で電力変換が行われる負荷であり、３相電力機器、例えば、ハイブリッド車両や電動車両などの車両に駆動源として搭載されるＤＣブラシレスモータ等である。第１モータ６は、例えば、車両に駆動源として搭載されるＤＣブラシレスモータ等であり、第２モータ８は、例えば、車両に搭載される空調装置等を駆動する車両用補機としてのＤＣブラシレスモータ等である。   The first and second motors 6 and 8 are loads that perform power conversion with the triple bridge inverter circuit 4, and are mounted as drive sources in a three-phase power device such as a hybrid vehicle or an electric vehicle. DC brushless motor. The first motor 6 is, for example, a DC brushless motor mounted as a drive source in the vehicle, and the second motor 8 is, for example, a DC brushless as a vehicle auxiliary machine that drives an air conditioner mounted in the vehicle. Motors and the like.

図２は、図１に示すトリプルブリッジインバータ回路４の実装構造を示す図である。フィン３７が下部に形成されたヒートシンク３６上にＵ相インバータモジュール２０＃Ｕ，Ｖ相インバータモジュール２０＃Ｖ及びＷ相インバータモジュール２０＃Ｗが、フィン３７の下方に形成されるトリプルブリッジインバータ回路４を冷却するための冷却経路３８に供給される冷媒の流動方向と直角に並べて配置されている。   FIG. 2 is a diagram showing a mounting structure of the triple bridge inverter circuit 4 shown in FIG. A triple-bridge inverter circuit 4 in which a U-phase inverter module 20 # U, a V-phase inverter module 20 # V, and a W-phase inverter module 20 # W are formed below the fins 37 on the heat sink 36 in which the fins 37 are formed below. Are arranged side by side at right angles to the flow direction of the refrigerant supplied to the cooling path 38 for cooling the refrigerant.

Ｕ相の正極接続端子２２＃Ｕ及び負極接続端子２４＃Ｕ、Ｖ相の正極接続端子２２＃Ｖ及び負極接続端子２４＃Ｖ、並びにＷ相の正極接続端子２２＃Ｗ及び負極接続端子２４＃Ｗが、冷却経路３８の下流側３８Ｄに設けられる。Ｕ相の第１及び第２出力端子２６＃Ｕ，２８＃Ｕ、Ｖ相の第１及び第２出力端子２６＃Ｖ，２８＃Ｖ及びＷ相の第１及び第２出力端子２６＃Ｗ，２８＃Ｗが冷却経路３８の上流側３８Ｕに設けられる。   U-phase positive electrode connection terminal 22 # U and negative electrode connection terminal 24 # U, V-phase positive electrode connection terminal 22 # V and negative electrode connection terminal 24 # V, and W-phase positive electrode connection terminal 22 # W and negative electrode connection terminal 24 #. W is provided on the downstream side 38 </ b> D of the cooling path 38. U-phase first and second output terminals 26 # U, 28 # U, V-phase first and second output terminals 26 # V, 28 # V, and W-phase first and second output terminals 26 # W, 28 # W is provided on the upstream side 38U of the cooling path 38.

正極接続端子２２＃Ｕ，２２＃Ｖ，２２＃Ｗは正極側の電源ラインを通して直流電源２の正極に接続される。負極接続端子２４＃Ｕ，２４＃Ｖ，２４＃Ｗは、負極側の電源ラインを通して直流電源２の負極に接続される。第１出力端子２６＃Ｕ，２６＃Ｖ，２６＃Ｗは、第１出力ラインを通して第１モータ６のＵ，Ｖ，Ｗ相のコイルの端子に接続される。第２出力端子２８＃Ｕ，２８＃Ｖ，２８＃Ｗは、第２出力ラインを通して第２モータ８のＵ，Ｖ，Ｗ相のコイルの端子に接続される。   The positive electrode connection terminals 22 # U, 22 # V, and 22 # W are connected to the positive electrode of the DC power supply 2 through the positive power supply line. The negative electrode connection terminals 24 # U, 24 # V, and 24 # W are connected to the negative electrode of the DC power supply 2 through the negative power supply line. The first output terminals 26 # U, 26 # V, and 26 # W are connected to the terminals of the U, V, and W phase coils of the first motor 6 through the first output line. The second output terminals 28 # U, 28 # V, 28 # W are connected to the terminals of the U, V, W phase coils of the second motor 8 through the second output line.

Ｕ相インバータモジュール２０＃Ｕの上面から突出する信号端子３０＃Ｕｉ（ｉ＝１〜３）はＥＣＵからＵ相のＩＧＢＴ素子Ｕｉ（ｉ＝１〜３）のゲートなどにゲート信号を入力する端子である。Ｖ相インバータモジュール２０＃Ｖの上面から突出する信号端子３０＃Ｖｉ（ｉ＝１〜３）はＥＣＵからＶ相のＩＧＢＴ素子Ｖｉ（ｉ＝１〜３）のゲートなどにゲート信号などを入力する端子である。Ｗ相インバータモジュール２０＃Ｗの上面から突出する信号端子３０＃Ｗｉ（ｉ＝１〜３）はＥＣＵからＷ相のＩＧＢＴ素子Ｗｉ（ｉ＝１〜３）のゲートなどにゲート信号を入力する端子である。信号端子３０＃Ｕｉ（ｉ＝１〜３），３０＃Ｖｉ（ｉ＝１〜３），３０＃Ｕｉ（ｉ＝１〜３）が図示しないコネクタを通して、図示しないゲートドライブ回路などに接続される。   Signal terminal 30 # Ui (i = 1 to 3) protruding from the upper surface of U-phase inverter module 20 # U is a terminal for inputting a gate signal from the ECU to the gate of U-phase IGBT element Ui (i = 1 to 3). It is. Signal terminal 30 # Vi (i = 1 to 3) protruding from the upper surface of V-phase inverter module 20 # V inputs a gate signal or the like from the ECU to the gate of V-phase IGBT element Vi (i = 1 to 3). Terminal. The signal terminal 30 # Wi (i = 1 to 3) protruding from the upper surface of the W-phase inverter module 20 # W is a terminal for inputting a gate signal from the ECU to the gate of the W-phase IGBT element Wi (i = 1 to 3). It is. Signal terminals 30 # Ui (i = 1 to 3), 30 # Vi (i = 1 to 3), 30 # Ui (i = 1 to 3) are connected to a gate drive circuit (not shown) through a connector (not shown). .

トリプルブリッジインバータ回路４の冷却経路３８に冷却装置により供給される冷媒は、ファンによる冷却風や冷却水である。図３は冷却経路３８に冷却水を供給する冷却装置の一例を示す図である。冷却装置５０は、例えば、図３（ａ）に示すように、内燃機関５２と第１モータ６と変速機５６を直列に直結した構造のハイブリッド車両４９に搭載されており、このハイブリッド車両４９では、例えば内燃機関５２及び走行用の第１モータ６の両方の駆動力は、変速機５６を介して駆動輪Ｗに伝達される。   The refrigerant supplied by the cooling device to the cooling path 38 of the triple bridge inverter circuit 4 is cooling air or cooling water from a fan. FIG. 3 is a diagram illustrating an example of a cooling device that supplies cooling water to the cooling path 38. For example, as shown in FIG. 3A, the cooling device 50 is mounted on a hybrid vehicle 49 having a structure in which an internal combustion engine 52, a first motor 6 and a transmission 56 are directly connected in series. For example, the driving forces of both the internal combustion engine 52 and the traveling first motor 6 are transmitted to the drive wheels W via the transmission 56.

第１モータ６は、ハイブリッド車両４９の運転状態に応じて内燃機関５２の駆動力を補助する補助駆動力を発生するようになっている。また、ハイブリッド車両４９の減速時に車輪Ｗ側から第１モータ６側に駆動力が伝達されると、第１モータ６は、発電機として機能していわゆる回生制動力を発生し、車体の運動エネルギーを電気エネルギーとして回収する。   The first motor 6 generates an auxiliary driving force that assists the driving force of the internal combustion engine 52 in accordance with the operating state of the hybrid vehicle 49. Further, when the driving force is transmitted from the wheel W side to the first motor 6 side when the hybrid vehicle 49 is decelerated, the first motor 6 functions as a generator to generate a so-called regenerative braking force, and the kinetic energy of the vehicle body Is recovered as electrical energy.

ウォータポンプ６２の下流側に配置された図示しないウォータジャケットから排出される冷却水は、ラジエータ６４に流通し、ラジエータ６４からインバータユニット４Ａの下方に形成された冷却経路３８に供給される。冷却経路３８に供給された冷却水は、第１モータ６の冷却経路に供給された後、ウォータポンプ６２を通して、ウォータジャケットに還流する。インバータユニット４Ａとは、図２に示すインバータモジュール及び図示しない平滑コンデンサを含み、正極接続端子２２＃Ｕ，２２＃Ｖ，２２＃Ｗ等が正極側の電源ライン等に接続されて車両に搭載可能となったものをいう。   Cooling water discharged from a water jacket (not shown) disposed on the downstream side of the water pump 62 flows to the radiator 64 and is supplied from the radiator 64 to a cooling path 38 formed below the inverter unit 4A. The cooling water supplied to the cooling path 38 is supplied to the cooling path of the first motor 6 and then returns to the water jacket through the water pump 62. The inverter unit 4A includes the inverter module shown in FIG. 2 and a smoothing capacitor (not shown), and the positive electrode connection terminals 22 # U, 22 # V, 22 # W, etc. are connected to the positive power line and can be mounted on the vehicle. The thing that became.

インバータユニット４Ａは、図３（ｂ）に示すように、略直方体箱型のケース７０ａ内にインバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗの第１及び第２出力端子２６＃Ｕ，２８＃Ｕ、２６＃Ｖ，２８＃Ｖ及び２６＃Ｗ，２８＃Ｗが第１側部７１に隣接し、正極接続端子２２＃Ｕ，２２＃Ｖ，２２＃Ｗ及び負極接続端子２４＃Ｕ，２４＃Ｖ，２４＃Ｗが第２側部７２に隣接するように収容される。   As shown in FIG. 3B, the inverter unit 4A includes first and second output terminals 26 # U, 28 of the inverter modules 20 # U, 20 # V, 20 # W in a substantially rectangular box-shaped case 70a. #U, 26 # V, 28 # V and 26 # W, 28 # W are adjacent to the first side portion 71, and positive electrode connection terminals 22 # U, 22 # V, 22 # W and negative electrode connection terminals 24 # U, 24 # V and 24 # W are accommodated adjacent to the second side portion 72.

ケース７０ａの開口部近傍の位置において、側部７１，７２には、底面上で開口し、鉛直方向Ｖに向かい所定の深さを有する各側部溝部７１ａ，７２ａが形成されている。ケース７０ａの開口部近傍の位置において、一方の側部７１には、この側部７１の内部に形成された側部溝部７１ａに連通して外部から側部溝部７１ａに冷却水を供給可能な供給配管７１ｂが設けられ、他方の側部７２には、この側部７２の内部に形成された側部溝部７２ａに連通して側部溝部７２ａ内から外部へと冷却水を排出可能な排出配管７２ｂが設けられている。   At positions near the opening of the case 70a, the side portions 71 and 72 are formed with side groove portions 71a and 72a that open on the bottom surface and have a predetermined depth in the vertical direction V, respectively. In the position near the opening of the case 70a, the one side 71 is connected to the side groove 71a formed inside the side 71 so that cooling water can be supplied to the side groove 71a from the outside. A pipe 71b is provided, and the other side 72 is connected to a side groove 72a formed inside the side 72, and a discharge pipe 72b capable of discharging cooling water from the inside of the side groove 72a to the outside. Is provided.

上記ケース７０ａの構造により、供給配管７１ｂから供給された冷却水は、側部溝部７１ａ、底部及び側部７２を通して，排出配管７２ｂより排出され、供給配管７１ａ→側部溝部７１ａ→底部→側部溝部７２ａ→排出配管７２ｂの経路からなる冷却経路３８が形成され、この冷却経路３８に冷却水が供給されることにより、ケース７０ａに収納されたインバータユニット４ＡのＩＧＢＴ素子などが冷却される。   With the structure of the case 70a, the cooling water supplied from the supply pipe 71b is discharged from the discharge pipe 72b through the side groove 71a, the bottom and the side 72, and is supplied from the supply pipe 71a → side groove 71a → bottom → side. A cooling path 38 including a path from the groove 72a to the discharge pipe 72b is formed, and the cooling water is supplied to the cooling path 38, whereby the IGBT element of the inverter unit 4A housed in the case 70a is cooled.

冷却装置としてファンが使用される場合は、第１出力端子２６＃Ｕ，２６＃Ｖ，２６＃Ｗ及び第２出力端子２８＃Ｕ，２８＃Ｖ，２８＃Ｗを正極接続端子２２＃Ｕ，２２＃Ｖ，２２＃Ｗ及び負極接続端子２４＃Ｕ，２４＃Ｖ，２４＃Ｗよりもファンから供給される冷風が上流側になるよう配置する。   When a fan is used as the cooling device, the first output terminals 26 # U, 26 # V, 26 # W and the second output terminals 28 # U, 28 # V, 28 # W are connected to the positive connection terminals 22 # U, It arrange | positions so that the cold wind supplied from a fan may become upstream rather than 22 # V, 22 # W and negative electrode connection terminal 24 # U, 24 # V, 24 # W.

図４は、図２中のインバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗの内部実装構造を示す図である。インバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗの実装構造は、実質的に同一であり、インバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗのヒートシンク３６上での配置位置が異なるのみであるので、一つのインバータモジュール、例えば、インバータモジュール２０＃Ｕの実装構造について説明する。   FIG. 4 is a diagram showing an internal mounting structure of inverter modules 20 # U, 20 # V, and 20 # W in FIG. The mounting structures of the inverter modules 20 # U, 20 # V, and 20 # W are substantially the same, and only the arrangement positions of the inverter modules 20 # U, 20 # V, and 20 # W on the heat sink 36 are different. Therefore, a mounting structure of one inverter module, for example, the inverter module 20 # U will be described.

図５は第１実施形態によるインバータモジュール２０＃Ｕの実装構造を示す図である。この第１実施形態はビームリードのインバータモジュールである。ビームリードとは、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３）の電極両面を半田で接続することをいう。   FIG. 5 is a diagram showing a mounting structure of the inverter module 20 # U according to the first embodiment. This first embodiment is a beam lead inverter module. The beam lead means that both electrode surfaces of the IGBT element 86 # Ui (i = 1 to 3) and the flywheel diode 88 # Ui (i = 1 to 3) are connected by solder.

図５（ａ）に示すように、インバータモジュール２０＃Ｕは、絶縁材８２＃Ｕ上に、導体板８４＃Ｕｉ（ｉ＝１〜３）及び端子台９２＃Ｕが接着等により固定されている。絶縁材８２＃Ｕは、セラミックやエポキシなどである。導体板８４＃Ｕｉ（ｉ＝１〜３）は、第１〜３基板であり、端子台９２＃Ｕを挟んで配置されている。導体板８４＃Ｕｉ（ｉ＝１〜３）は、例えば、平面形状が長方形の銅板である。   As shown in FIG. 5A, the inverter module 20 # U has a conductor plate 84 # Ui (i = 1 to 3) and a terminal block 92 # U fixed on an insulating material 82 # U by bonding or the like. Yes. The insulating material 82 # U is ceramic or epoxy. Conductor plates 84 # Ui (i = 1 to 3) are first to third substrates, and are arranged with terminal block 92 # U interposed therebetween. The conductor plate 84 # Ui (i = 1 to 3) is, for example, a copper plate having a rectangular planar shape.

図５（ａ）及び図５（ａ）のＡ−Ａ線断面図である図５（ｂ）に示すように、正極接続端子２２＃Ｕは導体板８４＃Ｕ１の長手方向に平行に延伸されて形成された導電板で構成され、導体板８４＃Ｕ１に半田又は超音波により接合されている。導体板８４＃Ｕ１及び導体板８４＃Ｕ３は、互いの長手方向が隣接するように端子台９２＃Ｕを挟んで配置される。導体板８４＃Ｕ２は、長手方向が導体板８４＃Ｕ１，８４＃Ｕ３の短手方向に隣接するように端子台９２＃Ｕを挟んで配置されている。   As shown in FIG. 5B, which is a cross-sectional view taken along the line AA in FIGS. 5A and 5A, the positive electrode connection terminal 22 # U is extended in parallel to the longitudinal direction of the conductor plate 84 # U1. And is joined to the conductor plate 84 # U1 by solder or ultrasonic waves. The conductor plate 84 # U1 and the conductor plate 84 # U3 are arranged with the terminal block 92 # U interposed therebetween so that their longitudinal directions are adjacent to each other. Conductor plate 84 # U2 is arranged with terminal block 92 # U sandwiched so that the longitudinal direction is adjacent to the short direction of conductor plates 84 # U1 and 84 # U3.

導体板８４＃Ｕ１上に、図５（ａ）及び図５（ｂ）に示すように、その長手方向にＨｉ側ＩＧＢＴ素子８６＃Ｕ１及びＨｉ側フライホイールダイオード８８＃Ｕ１が並んで配置され、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ電極及びＨｉ側フライホイールダイオード８８＃Ｕ１のカソード電極が半田９４＃Ｕ１，９６＃Ｕ１により接合されている。例えば、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１を正極接続端子２２＃Ｕ側に、Ｈｉ側フライホイールダイオード８８＃Ｕ１を導体板８４＃Ｕ２側にして、配置されている。Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１及びＨｉ側フライホイールダイオード８８＃Ｕ１の位置は逆でも良い。   On the conductor plate 84 # U1, as shown in FIGS. 5 (a) and 5 (b), a Hi-side IGBT element 86 # U1 and a Hi-side flywheel diode 88 # U1 are arranged side by side in the longitudinal direction. The collector electrode of Hi-side IGBT element 86 # U1 and the cathode electrode of Hi-side flywheel diode 88 # U1 are joined by solder 94 # U1, 96 # U1. For example, the Hi-side IGBT element 86 # U1 is disposed on the positive electrode connection terminal 22 # U side, and the Hi-side flywheel diode 88 # U1 is disposed on the conductor plate 84 # U2 side. The positions of the Hi-side IGBT element 86 # U1 and the Hi-side flywheel diode 88 # U1 may be reversed.

接続導体板（接続バスバー）９０＃Ｕは、図５（ａ）及び図５（ｂ）に示すように、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ電極に対向して形成されたエミッタ電極及びＨｉ側フライホイールダイオード８８＃Ｕ１のカソード電極に対向して形成されたアノード電極に半田９５＃Ｕ１，９７＃Ｕ１により接合されている。また、接続導体板９０＃Ｕは、図５（ｂ）に示すように、その一端が導体板８４＃Ｕ２に半田又は超音波により接合されている。   As shown in FIGS. 5A and 5B, the connection conductor plate (connection bus bar) 90 # U includes an emitter electrode and a Hi side formed facing the collector electrode of the Hi side IGBT element 86 # U1. The anode electrode formed facing the cathode electrode of the flywheel diode 88 # U1 is joined by solder 95 # U1, 97 # U1. Further, as shown in FIG. 5B, one end of the connection conductor plate 90 # U is joined to the conductor plate 84 # U2 by solder or ultrasonic waves.

図５（ｂ）及び図５（ａ）中のＢ−Ｂ線断面図である図５（ｃ）に示すように、導体板８４＃Ｕ２上に、その長手方向にＭｉｄ側ＩＧＢＴ素子８６＃Ｕ２及びＭｉｄ側フライホイールダイオード８８＃Ｕ２が並んで配置され、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ電極及びＭｉｄ側フライホイールダイオード８８＃Ｕ２のカソード電極が半田９４＃Ｕ２，９６＃Ｕ２により接合されている。例えば、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２を導体板８４＃Ｕ１の短手側に隣接し、ＭｉＤ側フライホイールダイオード８８＃Ｕ２を導体板８４＃Ｕ３の短手側に隣接にして、配置されている。ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２及びＭｉＤ側フライホイールダイオード８８＃Ｕ２の位置は逆でも良い。   As shown in FIG. 5C, which is a cross-sectional view taken along the line BB in FIG. 5B and FIG. 5A, on the conductor plate 84 # U2, the mid-side IGBT element 86 # U2 in the longitudinal direction thereof. And the Mid-side flywheel diode 88 # U2 are arranged side by side, and the collector electrode of the MiD-side IGBT element 86 # U2 and the cathode electrode of the Mid-side flywheel diode 88 # U2 are joined by solder 94 # U2 and 96 # U2. Yes. For example, the MiD side IGBT element 86 # U2 is disposed adjacent to the short side of the conductor plate 84 # U1, and the MiD side flywheel diode 88 # U2 is disposed adjacent to the short side of the conductor plate 84 # U3. . The positions of the MiD side IGBT element 86 # U2 and the MiD side flywheel diode 88 # U2 may be reversed.

第１出力端子（第１出力バスバー）２６＃Ｕは、図５（ａ）及び図５（ｃ）に示すように、正極接続端子２２＃Ｕと逆方向に延伸されて形成された導電板で構成され、導体板８４＃Ｕ２上に、半田又は超音波により接合されている。   The first output terminal (first output bus bar) 26 # U is a conductive plate formed by extending in the opposite direction to the positive electrode connection terminal 22 # U, as shown in FIGS. 5 (a) and 5 (c). And is joined to the conductor plate 84 # U2 by solder or ultrasonic waves.

第２出力端子（第２出力バスバー）２８＃Ｕは、正極接続端子２２＃Ｕと逆方向、且つ第１出力端子２６＃Ｕと平行に延伸されて形成された導電板で構成され、図５（ａ）〜図５（ｃ）に示すように、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ電極に対向して形成されたエミッタ電極及びＭｉＤ側フライホイールダイオード８８＃Ｕ２のカソード電極に対向して形成されたアノード電極と半田９５＃Ｕ２，９７＃Ｕ２により接合されている。第２出力端子２８＃Ｕは、図５（ｃ）に示すように、その一端が導体板８４＃Ｕ３に、半田又は超音波により接合されている。   The second output terminal (second output bus bar) 28 # U is composed of a conductive plate formed by extending in the opposite direction to the positive electrode connection terminal 22 # U and parallel to the first output terminal 26 # U. As shown in FIGS. 5A to 5C, the emitter electrode formed opposite to the collector electrode of the MiD-side IGBT element 86 # U2 and the cathode electrode of the MiD-side flywheel diode 88 # U2 are formed. The anode electrode and the solder 95 # U2 and 97 # U2 are joined. As shown in FIG. 5C, one end of the second output terminal 28 # U is joined to the conductor plate 84 # U3 by solder or ultrasonic waves.

導体板８４＃Ｕ３上に、図５（ａ）及び図５（ｃ）に示すように、その長手方向にＬｏ側ＩＧＢＴ素子８６＃Ｕ３及びＬｏ側フライホイールダイオード８８＃Ｕ３が並んで配置され、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ電極及びＬｏ側フライホイールダイオード８８＃Ｕ３のカソード電極が半田９４＃Ｕ３，９６＃Ｕ３により接合されている。例えば、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３を導体板８４＃Ｕ２の長手方向に隣接し、Ｌｏ側フライホイールダイオード８８＃Ｕ３をＬｏ側ＩＧＢＴ素子８６＃Ｕ３と反対側に配置されている。Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３及びＬｏ側フライホイールダイオード８８＃Ｕ３の位置は逆でも良い。   On the conductor plate 84 # U3, as shown in FIG. 5 (a) and FIG. 5 (c), the Lo-side IGBT element 86 # U3 and the Lo-side flywheel diode 88 # U3 are arranged side by side in the longitudinal direction. The collector electrode of the Lo side IGBT element 86 # U3 and the cathode electrode of the Lo side flywheel diode 88 # U3 are joined together by solder 94 # U3, 96 # U3. For example, the Lo-side IGBT element 86 # U3 is adjacent to the conductor plate 84 # U2 in the longitudinal direction, and the Lo-side flywheel diode 88 # U3 is disposed on the opposite side of the Lo-side IGBT element 86 # U3. The positions of the Lo side IGBT element 86 # U3 and the Lo side flywheel diode 88 # U3 may be reversed.

負極接続端子２４＃Ｕは、正極接続端子２２＃Ｕと同方向平行に延伸されて形成された導電板で構成され、図５（ａ）及び図５（ｃ）に示すように、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ電極に対向して形成されたエミッタ電極上及びＬｏ側フライホイールダイオード８８＃Ｕ３のカソード電極に対向して形成されたアノード電極に、半田９５＃Ｕ３，９７＃Ｕ３により接合されている。導体板８４＃Ｕｉ（ｉ＝１〜３）の形状、並びにＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３）の配置及び素子が同じである。   The negative electrode connection terminal 24 # U is composed of a conductive plate formed to extend in the same direction as the positive electrode connection terminal 22 # U. As shown in FIGS. 5A and 5C, the Lo-side IGBT Solder 95 # U3, 97 # U3 is joined to the emitter electrode formed facing the collector electrode of element 86 # U3 and the anode electrode formed facing the cathode electrode of Lo side flywheel diode 88 # U3. Has been. The shape of the conductor plate 84 # Ui (i = 1 to 3) and the arrangement and elements of the IGBT element 86 # Ui (i = 1 to 3) and the flywheel diode 88 # Ui (i = 1 to 3) are the same. .

信号端子３０＃Ｖｉ（ｉ＝１〜３）及び信号端子３０＃Ｖｉ（ｉ＝１〜３）に対応して電極パターンが形成されている端子台９２＃Ｕは、導体板８４＃Ｕｉ（ｉ＝１〜３）を挟んで配置されている。電極パターンは、ワイヤ９２＃Ｕｉ（ｉ＝１〜３）により、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）の上面に設けられたゲート電極などに接続される。インバータモジュール２０＃Ｕは、エポキシ樹脂等のモールド材８３＃Ｕにより全面封止される。   The terminal block 92 # U on which the electrode pattern is formed corresponding to the signal terminal 30 # Vi (i = 1 to 3) and the signal terminal 30 # Vi (i = 1 to 3) is provided on the conductor plate 84 # Ui (i = 1 to 3). The electrode pattern is connected to a gate electrode provided on the upper surface of the IGBT element 86 # Ui (i = 1 to 3) by a wire 92 # Ui (i = 1 to 3). The inverter module 20 # U is entirely sealed with a molding material 83 # U such as an epoxy resin.

図５に示したインバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗが、図６（ａ）に示すように、ヒートシンク３６上に塗布・形成されたサーマルコンパウンド１１０上に、搭載・固定されて、図６（ｂ）に示すインバータ２０が形成される。   As shown in FIG. 6A, the inverter modules 20 # U, 20 # V, and 20 # W shown in FIG. 5 are mounted and fixed on the thermal compound 110 applied and formed on the heat sink 36. Thus, the inverter 20 shown in FIG. 6B is formed.

図７は図５に示したインバータモジュール２０＃Ｕの電流の流れを示す図である。例えば、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）が全てＯＮ状態のとき、図７に示すように、第１電流Ｉ１は、正極接続端子２２＃Ｕ→導体板８４＃Ｕ１→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のエミッタ→接続導体板９０＃Ｕ→導体板８４＃Ｕ２→第１出力端子２６＃Ｕと流れる。   FIG. 7 is a diagram showing a current flow of inverter module 20 # U shown in FIG. For example, when all of the IGBT elements 86 # Ui (i = 1 to 3) are in the ON state, as shown in FIG. 7, the first current I1 is the positive electrode connection terminal 22 # U → the conductor plate 84 # U1 → the high-side IGBT. The current flows through the collector of the element 86 # U1, the emitter of the high-side IGBT element 86 # U1, the connection conductor plate 90 # U, the conductor plate 84 # U2, and the first output terminal 26 # U.

図７に示すように、第２電流Ｉ２は、正極接続端子２２＃Ｕ→導体板８４＃Ｕ１→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のエミッタ→接続導体板９０＃Ｕ→導体板８４＃Ｕ２→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のエミッタ→第２出力端子２８＃Ｕと流れる。   As shown in FIG. 7, the second current I2 is generated from the positive electrode connection terminal 22 # U → the conductor plate 84 # U1 → the collector of the Hi-side IGBT element 86 # U1 → the emitter of the Hi-side IGBT element 86 # U1 → the connection conductor plate 90. It flows from # U → conductor plate 84 # U2 → the collector of the MiD-side IGBT element 86 # U2 → the emitter of the MiD-side IGBT element 86 # U2 → the second output terminal 28 # U.

図７に示すように、第３電流Ｉ３は、正極接続端子２２＃Ｕ→導体板８４＃Ｕ１→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ→Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のエミッタ→接続導体板９０＃Ｕ→導体板８４＃Ｕ２→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のエミッタ→第２出力端子２８＃Ｕ→導体板８４＃Ｕ３→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のエミッタ→負極接続端子２４＃Ｕと流れる。   As shown in FIG. 7, the third current I3 is the positive electrode connection terminal 22 # U → the conductor plate 84 # U1 → the collector of the Hi-side IGBT element 86 # U1 → the emitter of the Hi-side IGBT element 86 # U1 → the connection conductor plate 90. # U → conductor plate 84 # U2 → collector of MiD side IGBT element 86 # U2 → emitter of MiD side IGBT element 86 # U2 → second output terminal 28 # U → conductor plate 84 # U3 → Lo side IGBT element 86 # U3 Current flows from the collector to the emitter of the Lo side IGBT element 86 # U3 → the negative electrode connection terminal 24 # U.

同様に、例えば、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１がＯＦＦ状態、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２がＯＮ状態、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３がＯＮ状態、Ｈｉ側ＩＧＢＴ素子８６＃Ｖ１がＯＮ状態、ＭｉＤ側ＩＧＢＴ素子８６＃Ｖ２がＯＦＦ状態、Ｌｏ側ＩＧＢＴ素子８６＃Ｖ３がＯＮ状態のとき、電流は、第１出力端子２６＃Ｖ→第１出力端子２６＃Ｕ→導体板８４＃Ｕ２→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ→ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のエミッタ→第２出力端子２８＃Ｕ→導体板８４＃Ｕ３→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のエミッタ→負極接続端子２４＃Ｕと流れて、第１モータ６が駆動制御される。   Similarly, for example, the Hi-side IGBT element 86 # U1 is in the OFF state, the MiD-side IGBT element 86 # U2 is in the ON state, the Lo-side IGBT element 86 # U3 is in the ON state, the Hi-side IGBT element 86 # V1 is in the ON state, MiD When the side IGBT element 86 # V2 is in the OFF state and the Lo side IGBT element 86 # V3 is in the ON state, the current is the first output terminal 26 # V → the first output terminal 26 # U → the conductor plate 84 # U2 → the MiD side IGBT element 86 # U2 collector → MiD-side IGBT element 86 # U2 emitter → second output terminal 28 # U → conductor plate 84 # U3 → Lo-side IGBT element 86 # U3 collector → Lo-side IGBT element 86 # U3 Flowing through the emitter → negative electrode connection terminal 24 # U, the first motor 6 is driven and controlled.

また、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１，８６＃Ｖ１，８６＃Ｗ１がＯＮ状態、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２がＯＦＦ状態、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３がＯＮ状態、ＭｉＤ側ＩＧＢＴ素子８６＃Ｖ２がＯＮ状態、Ｌｏ側ＩＧＢＴ素子８６＃Ｖ３がＯＦＦ状態のとき、電流は、第２出力端子２８＃Ｖ→第２出力端子２８＃Ｕ→導体板８４＃Ｕ３→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ→Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のエミッタ→負極接続端子２４＃Ｕと流れて、第２モータ８が駆動制御される。   Further, the Hi-side IGBT elements 86 # U1, 86 # V1, 86 # W1 are in the ON state, the MiD-side IGBT element 86 # U2 is in the OFF state, the Lo-side IGBT element 86 # U3 is in the ON state, and the MiD-side IGBT element 86 # V2 Is ON, and the Lo-side IGBT element 86 # V3 is OFF, the current flows from the second output terminal 28 # V → second output terminal 28 # U → conductor plate 84 # U3 → Lo-side IGBT element 86 # U3. Flowing from the collector → the emitter of the Lo side IGBT element 86 # U3 → the negative electrode connection terminal 24 # U, the second motor 8 is driven and controlled.

このとき、図４及び図８に示すように、発熱が大きいインバータモジュール２０＃Ｕ，２０＃Ｖ及び２０＃ＷのＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２、８６＃Ｖ２、８６＃Ｗ２を冷却経路３８の上流３８Ｕに配置し、発熱がより小さいインバータモジュール２０＃Ｕ，２０＃Ｖ及び２０＃ＷのＨｉ側ＩＧＢＴ素子ＩＧＢＴ素子８６＃Ｕ１，８６＃Ｖ１，８６＃Ｗ１及びＬｏ側ＩＧＢＴ素子８６＃Ｕ３，８６＃Ｖ３，８６＃Ｗ３を冷却経路３８の下流３８Ｄに配置したので、インバータ４全体の熱バランスが均等化される。   At this time, as shown in FIGS. 4 and 8, the MiD-side IGBT elements 86 # U2, 86 # V2, and 86 # W2 of the inverter modules 20 # U, 20 # V, and 20 # W that generate a large amount of heat are connected to the cooling path 38. Inverter modules 20 # U, 20 # V and 20 # W, which are arranged in the upstream 38U and generate less heat IGBT elements IGBT elements 86 # U1, 86 # V1, 86 # W1 and Lo side IGBT elements 86 # U3 Since 86 # V3 and 86 # W3 are arranged downstream 38D of the cooling path 38, the overall heat balance of the inverter 4 is equalized.

インバータ４全体の熱バランスが均等化されるので、上述のように、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３），８６＃Ｖｉ（ｉ＝１〜３），８６＃Ｗｉ（ｉ＝１〜３）及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３），８８＃Ｖｉ（ｉ＝１〜３），８８＃Ｗｉ（ｉ＝１〜３）の統一化が図れる。   Since the thermal balance of the entire inverter 4 is equalized, as described above, the IGBT elements 86 # Ui (i = 1 to 3), 86 # Vi (i = 1 to 3), 86 # Wi (i = 1 to 1) 3) and the flywheel diodes 88 # Ui (i = 1 to 3), 88 # Vi (i = 1 to 3), 88 # Wi (i = 1 to 3) can be unified.

図９〜図１２を参照して、ビームリードの場合のインバータユニットの製造方法を説明する。まず、インバータモジュール２０＃Ｕの製造方法の説明をする。図９（ａ）に示すように、導体板８４＃Ｕ１上に半田９４＃Ｕ１，９６＃Ｕ１、半田９４＃Ｕ１上にＨｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ、半田９６＃Ｕ１上にフライホイールダイオード８８＃Ｕ１のカソード、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタに対向して形成されたエミッタ上に半田９５＃Ｕ１、フライホイールダイオード８８＃Ｕ１のカソードに対向して形成されたアノード上に半田９７＃Ｕ１、半田９５＃Ｕ１，９７＃Ｕ１上に接続導体板９０＃Ｕを配置する（半田接合前工程）。   With reference to FIGS. 9-12, the manufacturing method of the inverter unit in the case of a beam lead is demonstrated. First, a method for manufacturing the inverter module 20 # U will be described. As shown in FIG. 9 (a), solder 94 # U1, 96 # U1 on conductor plate 84 # U1, collector of Hi-side IGBT element 86 # U1 on solder 94 # U1, and flywheel on solder 96 # U1. Solder on the cathode formed of the diode 88 # U1, the emitter formed facing the collector of the high-side IGBT element 86 # U1, and solder formed on the anode formed facing the cathode of the flywheel diode 88 # U1 Connection conductor plate 90 # U is disposed on 97 # U1 and solder 95 # U1, 97 # U1 (step before soldering).

図９（ｂ）に示すように、半田９４＃Ｕ１，９５＃Ｕ１，９６＃Ｕ１，９７＃Ｕ１を溶融し、導体板８４＃Ｕ１上に、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ及びフライホイールダイオード８８＃Ｕ１のカソードを接合し、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のエミッタ及びフライホイールダイオード８８＃Ｕ１のアノードに接続導体板９０＃Ｕを接合する（半田接合工程）。   As shown in FIG. 9B, the solder 94 # U1, 95 # U1, 96 # U1, 97 # U1 is melted, and the collector and flywheel of the Hi-side IGBT element 86 # U1 are formed on the conductor plate 84 # U1. The cathode of the diode 88 # U1 is joined, and the connection conductor plate 90 # U is joined to the emitter of the Hi-side IGBT element 86 # U1 and the anode of the flywheel diode 88 # U1 (solder joining process).

同様に、導体板８４＃Ｕ２上に、Ｍｉｄ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ及びフライホイールダイオード８８＃Ｕ２のカソードを半田により接合し、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のエミッタ及びフライホイールダイオード８８＃Ｕ２のアノードにＴ字形状の第２出力端子２８＃Ｕを半田により接合する。   Similarly, on the conductor plate 84 # U2, the collector of the Mid-side IGBT element 86 # U2 and the cathode of the flywheel diode 88 # U2 are joined by solder, and the emitter of the MiD-side IGBT element 86 # U2 and the flywheel diode 88 #. A T-shaped second output terminal 28 # U is joined to the anode of U2 by soldering.

また、導体板８４＃Ｕ３上に、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ及びフライホイールダイオード８８＃Ｕ３のカソードを半田により接合し、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のエミッタ及びフライホイールダイオード８８＃Ｕ３のアノードに負極接続端子２４＃Ｕを半田により接合する。   Further, on the conductor plate 84 # U3, the collector of the Lo side IGBT element 86 # U3 and the cathode of the flywheel diode 88 # U3 are joined by solder, and the emitter of the Lo side IGBT element 86 # U3 and the flywheel diode 88 # U3. The negative electrode connection terminal 24 # U is joined to the anode of this by soldering.

図９（ｃ）に示すように、導体板８４＃Ｕ１及び８４＃Ｕ３を一定距離離間して、その長手方向が平行となるよう配置し、導体板８４＃Ｕ２を導体板８４＃Ｕ１，８４＃Ｕ３の短手方向の面から一定距離離間して，その長手方向が導体板８４＃Ｕ１、８４＃Ｕ３の短手方向に平行となるように配置する（半田接合後Ｕ，Ｖ，Ｗ配置工程）。   As shown in FIG. 9 (c), the conductor plates 84 # U1 and 84 # U3 are spaced apart from each other by a predetermined distance so that their longitudinal directions are parallel to each other, and the conductor plate 84 # U2 is placed on the conductor plates 84 # U1, 84. Arranged so that the longitudinal direction is parallel to the short direction of the conductor plates 84 # U1 and 84 # U3 at a certain distance from the surface in the short direction of # U3 (U, V, W arrangement after soldering) Process).

図１０（ａ）及び図１１（ｂ）に示すように、導体板８４＃Ｕ１と正極接続端子２２＃Ｕの一端とを接合部１１０＃Ｕ１において半田又は超音波接合する。導体板８４＃Ｕ２と第１出力端子２６＃Ｕの一端とを接合部１１０＃Ｕ２において半田又は超音波接合する。図１０（ａ）及び図１１（ｂ）に示すように、導体板８４＃Ｕ２と接続導体板９０＃Ｕの一端とを接合部１１０＃Ｕ４において半田又は超音波接合する。また、図１０（ａ）及び図１１（ｃ）に示すように、導体板８４＃Ｕ３と第２出力端子２８＃Ｕの一端とを接合部１１０＃Ｕ３において超音波接合する。図１０（ａ）の工程を超音波・半田接合工程と呼ぶ。   As shown in FIGS. 10A and 11B, the conductor plate 84 # U1 and one end of the positive electrode connection terminal 22 # U are soldered or ultrasonically joined at the joint 110 # U1. The conductor plate 84 # U2 and one end of the first output terminal 26 # U are soldered or ultrasonically joined at the joint 110 # U2. As shown in FIGS. 10A and 11B, the conductor plate 84 # U2 and one end of the connection conductor plate 90 # U are soldered or ultrasonically joined at the joint 110 # U4. Also, as shown in FIGS. 10A and 11C, the conductor plate 84 # U3 and one end of the second output terminal 28 # U are ultrasonically joined at the joint 110 # U3. The process of FIG. 10A is called an ultrasonic wave / solder joining process.

図１０（ｂ）に示すように、例えば、Ｌ字型の信号端子及び電極パターンが形成された端子台９２＃Ｕを導体板８４＃Ｕ１と導体板８４＃Ｕ２の間，導体板８４＃Ｕ１と導体板８４＃Ｕ２の間に配置し、端子台９２＃Ｕ上に形成された電極パターンとＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）に形成された電極パターンをアルミワイヤ９２＃Ｕｉ（ｉ＝１〜３）により接合する（アルミワイヤ接合工程）。尚、ＩＧＢＴ素子８４＃ｉ（ｉ＝１〜３）は、アルミワイヤ９２＃Ｕｉ（ｉ＝１〜３）が最短となるように配置されている。図１０（ｃ）に示すように、導体板８４＃Ｕｉ（ｉ＝１〜３）の下面に接着剤等によりエポキシ樹脂等の絶縁材を接合して、絶縁材８２＃Ｕを形成する（絶縁材接合工程）。   As shown in FIG. 10B, for example, a terminal block 92 # U on which an L-shaped signal terminal and an electrode pattern are formed is placed between the conductor plate 84 # U1 and the conductor plate 84 # U2, and the conductor plate 84 # U1. The electrode pattern formed on the terminal block 92 # U and the electrode pattern formed on the IGBT element 86 # Ui (i = 1 to 3) are arranged between the aluminum wire 92 # Ui ( Joining by i = 1 to 3) (aluminum wire joining step). The IGBT element 84 # i (i = 1 to 3) is arranged so that the aluminum wire 92 # Ui (i = 1 to 3) is the shortest. As shown in FIG. 10C, an insulating material 82 # U is formed by bonding an insulating material such as an epoxy resin to the lower surface of the conductor plate 84 # Ui (i = 1 to 3) with an adhesive or the like. Material joining process).

図１２（ａ）に示すように、絶縁材８２＃Ｕ、導体板８４＃Ｕｉ（ｉ＝１〜３）、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３）等をゲルやエポキシ樹脂等のモールド材８３＃Ｕにより封止して、インバータモジュール２０＃Ｕを形成する（モールド工程）。図１０（ａ）〜図１２（ａ）と同様にして、インバータモジュール２０＃Ｖ，２０＃Ｗを形成する。   As shown in FIG. 12A, the insulating material 82 # U, the conductor plate 84 # Ui (i = 1 to 3), the IGBT element 86 # Ui (i = 1 to 3) and the flywheel diode 88 # Ui (i = 1 to 3) is sealed with a molding material 83 # U such as gel or epoxy resin to form the inverter module 20 # U (molding process). Inverter modules 20 # V and 20 # W are formed in the same manner as in FIGS. 10 (a) to 12 (a).

図１２（ｂ）に示すように、ヒートシンク３６上にサーマルコンパウンド１１０を塗布した後、サーマルコンパウンド１１０上にインバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗを並べて配置する（サーマルコンパウンド塗布工程）。図１２（ｃ）に示すように、インバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗをステー１１２によりボルト１１４締めでヒートシンク３６に固定する（アセンブル工程）。以上の工程を経て、図２に示すインバータモジュール２０が製作される。尚、図９（ｂ）の半田接合工程の後に、図１０（ｃ）の絶縁材接合工程を行ってから、図１０（ａ）の超音波・半田接合工程及び図１０（ｂ）のアルミワイヤ接合工程を行っても良い。   As shown in FIG. 12B, after applying the thermal compound 110 on the heat sink 36, the inverter modules 20 # U, 20 # V, and 20 # W are arranged side by side on the thermal compound 110 (thermal compound application step). . As shown in FIG. 12C, the inverter modules 20 # U, 20 # V, and 20 # W are fixed to the heat sink 36 by fastening the bolts 114 with the stay 112 (assembly process). The inverter module 20 shown in FIG. 2 is manufactured through the above steps. In addition, after the solder bonding process of FIG. 9B, the insulating material bonding process of FIG. 10C is performed, and then the ultrasonic wave / solder bonding process of FIG. 10A and the aluminum wire of FIG. You may perform a joining process.

以上説明した第１実施形態によれば、発熱の一番高い中段のＩＧＢＴ素子Ｕ２，Ｖ２，Ｗ２を冷却経路の上流側に配置したので、インバータ全体の熱バランスが均等化される。インバータ全体の熱バランスが均等化されるので、素子の統一化が図れ、小型化、低コストとなる。基板及び素子を統一することで製造性の向上及び低コストとなる。   According to the first embodiment described above, since the middle-stage IGBT elements U2, V2, W2 with the highest heat generation are arranged on the upstream side of the cooling path, the thermal balance of the entire inverter is equalized. Since the heat balance of the entire inverter is equalized, the elements can be unified, and the size and cost can be reduced. By unifying the substrate and the element, the productivity is improved and the cost is reduced.

第２実施形態
図１３は、第２実施形態によるインバータモジュール２０＃Ｕの実装構造を示す図である。この第２実施形態はアルミワイヤ接合によるインバータモジュールである。アルミワイヤ接合とは、ＩＧＢＴ素子Ｕｉ（ｉ＝１〜３）及びフライホイールダイオードＤＵｉ（ｉ＝１〜３）の電極片面を半田で、他方の電極面をアルミワイヤで接続することをいう。導体板８４＃Ｕｉ（ｉ＝１〜３）とＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）のコレクタ電極及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３）のカソード電極は第１実施形態と同様に半田９４＃ｉ（ｉ＝１〜３）及び９６＃Ｕｉ（ｉ＝１〜３）で接合されている。 Second Embodiment FIG. 13 is a diagram showing a mounting structure of an inverter module 20 # U according to a second embodiment. This 2nd Embodiment is an inverter module by aluminum wire joining. Aluminum wire bonding refers to connecting one electrode surface of the IGBT element Ui (i = 1 to 3) and the flywheel diode DUi (i = 1 to 3) with solder and the other electrode surface with an aluminum wire. The conductor plate 84 # Ui (i = 1 to 3), the collector electrode of the IGBT element 86 # Ui (i = 1 to 3) and the cathode electrode of the flywheel diode 88 # Ui (i = 1 to 3) are the first embodiment. In the same manner as above, they are joined by solder 94 # i (i = 1 to 3) and 96 # Ui (i = 1 to 3).

図１３（ａ）及び図１３（ａ）のＡ−Ａ線断面図である図１３（ｂ）に示すように、ＩＧＢＴ素子８６＃Ｕ１のエミッタの接合部１２２＃Ｕ１、フライホイールダイオード８８＃Ｕ１のアノードの接合部１２４＃Ｕ１及び導体板８４＃Ｕ２の接合部１２２＃Ｕ４がアルミワイヤ１２０＃Ｕ１により接続されている。図１３（ａ）、図１３（ｂ）及び図１３（ａ）のＢ−Ｂ線断面図である図１３（ｃ）に示すように、ＩＧＢＴ素子８６＃Ｕ２のエミッタの接合部１２２＃Ｕ２、フライホイールダイオード８８＃Ｕ２のアノードの接合部１２４＃Ｕ２及び第２出力端子２８＃Ｕの接合部１２２＃Ｕ５がアルミワイヤ１２０＃Ｕ２により接続されている。   As shown in FIG. 13B, which is a cross-sectional view taken along line AA in FIGS. 13A and 13A, the junction 122 # U1 of the emitter of the IGBT element 86 # U1 and the flywheel diode 88 # U1 The anode junction 124 # U1 and the conductor plate 84 # U2 junction 122 # U4 are connected by an aluminum wire 120 # U1. As shown in FIG. 13C, which is a cross-sectional view taken along the line BB in FIGS. 13A, 13B, and 13A, the junction 122 # U2 of the emitter of the IGBT element 86 # U2, The anode junction 124 # U2 of the flywheel diode 88 # U2 and the junction 122 # U5 of the second output terminal 28 # U are connected by an aluminum wire 120 # U2.

また、図１３（ａ）及び図１３（ｃ）に示すように、ＩＧＢＴ素子８６＃Ｕ３のエミッタの接合部１２２＃Ｕ３、フライホイールダイオード８８＃Ｕ３のアノードの接合部１２４＃Ｕ３及び負極接続端子２４＃Ｕの接合部１２６＃Ｕ３がアルミワイヤ１２０＃Ｕ３により接続されている。尚、第２出力端子２８＃Ｕ及び負極接続端子２４＃Ｕは、導体板８４＃Ｕ２，８４＃Ｕ３に対して浮いている。   Further, as shown in FIGS. 13A and 13C, the junction 122 # U3 of the emitter of the IGBT element 86 # U3, the junction 124 # U3 of the anode of the flywheel diode 88 # U3, and the negative electrode connection terminal 24 # U joint 126 # U3 is connected by aluminum wire 120 # U3. The second output terminal 28 # U and the negative electrode connection terminal 24 # U are floating with respect to the conductor plates 84 # U2 and 84 # U3.

図１３（ａ）及び図１３（ｂ）に示すように、正極接続端子２２＃Ｕは導体板８４＃Ｕ１に半田又は超音波により接合部１２６＃Ｕ１で接合されている。図１３（ａ）及び図１３（ｂ）に示すように、第１出力端子２６＃Ｕは導体板８４＃Ｕ２に半田又は超音波により接合部１２６＃Ｕ２で接合されている。図１３（ａ）及び図１３（ｃ）に示すように、第２出力端子２８＃Ｕは導体板８４＃Ｕ３に半田又は超音波により接合部１２６＃Ｕ４で接合されている。   As shown in FIGS. 13A and 13B, the positive electrode connection terminal 22 # U is joined to the conductor plate 84 # U1 by solder or ultrasonic waves at the joint 126 # U1. As shown in FIGS. 13A and 13B, the first output terminal 26 # U is joined to the conductor plate 84 # U2 by solder or ultrasonic waves at the joint 126 # U2. As shown in FIGS. 13A and 13C, the second output terminal 28 # U is joined to the conductor plate 84 # U3 by solder or ultrasonic waves at the joint 126 # U4.

このアルミワイヤ接合のインバータモジュールの電流の流れ及び冷却装置による冷却効果は第１実施形態と同様である。   The current flow of the aluminum wire bonded inverter module and the cooling effect by the cooling device are the same as in the first embodiment.

図１４〜図１６を参照して、アルミワイヤ接合の場合のインバータユニットの製造方法を説明する。まず、インバータモジュール２０＃Ｕの製造方法の説明をする。図１４（ａ）に示すように、導体板８４＃Ｕ１上に半田９４＃Ｕ１及び半田９６＃Ｕ１、半田９４＃Ｕ１上にＨｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ電極、半田９６＃Ｕ１上にフライホイールダイオード８８＃Ｕ１のカソード電極となるよう配置する（半田接合前工程）。   With reference to FIGS. 14-16, the manufacturing method of the inverter unit in the case of aluminum wire joining is demonstrated. First, a method for manufacturing the inverter module 20 # U will be described. As shown in FIG. 14A, solder 94 # U1 and solder 96 # U1 are formed on the conductor plate 84 # U1, and the collector electrode of the Hi-side IGBT element 86 # U1 is formed on the solder 94 # U1 and the solder 96 # U1. It arrange | positions so that it may become a cathode electrode of flywheel diode 88 # U1 (process before soldering joint).

図１４（ｂ）に示すように、半田９４＃Ｕ１，９６＃Ｕ１を溶融し、導体板８４＃Ｕ１上に、Ｈｉ側ＩＧＢＴ素子８６＃Ｕ１のコレクタ及びフライホイールダイオード８８＃Ｕ１のカソードを接合する（半田接合工程）。同様に、導体板８４＃Ｕ２上に、ＭｉＤ側ＩＧＢＴ素子８６＃Ｕ２のコレクタ及びフライホイールダイオード８８＃Ｕ２のカソードを半田により接合する。導体板８４＃Ｕ３上に、Ｌｏ側ＩＧＢＴ素子８６＃Ｕ３のコレクタ及びフライホイールダイオード８８＃Ｕ３のカソードを半田により接合する。図１４（ａ），１４（ｂ）の工程は、Ｈｉ，Ｍｉｄ，Ｌｏについて共通である。   As shown in FIG. 14B, the solder 94 # U1, 96 # U1 is melted, and the collector of the high-side IGBT element 86 # U1 and the cathode of the flywheel diode 88 # U1 are joined on the conductor plate 84 # U1. (Solder bonding process). Similarly, the collector of the MiD-side IGBT element 86 # U2 and the cathode of the flywheel diode 88 # U2 are joined to the conductor plate 84 # U2 by solder. On the conductor plate 84 # U3, the collector of the Lo-side IGBT element 86 # U3 and the cathode of the flywheel diode 88 # U3 are joined by solder. 14A and 14B are common to Hi, Mid, and Lo.

図１４（ｃ）に示すように、導体板８４＃Ｕ１及び８４＃Ｕ３を一定距離離間して、その長手方向が平行となるよう配置し、導体板８４＃Ｕ２を導体板８４＃Ｕ１，８４＃Ｕ３の短手方向の面から一定距離離間して，その長手方向が導体板８４＃Ｕ１、８４＃Ｕ３の短手方向に平行となるように配置する（半田接合後Ｕ，Ｖ，Ｗ配置工程）。   As shown in FIG. 14 (c), the conductor plates 84 # U1 and 84 # U3 are spaced apart from each other by a predetermined distance so that their longitudinal directions are parallel to each other, and the conductor plate 84 # U2 is placed on the conductor plates 84 # U1, 84. Arranged so that the longitudinal direction is parallel to the short direction of the conductor plates 84 # U1 and 84 # U3 at a certain distance from the surface in the short direction of # U3 (U, V, W arrangement after soldering) Process).

図１５（ａ）に示すように、導体板８４＃Ｕ１と正極接続端子２２＃Ｕの一端とを接合部１２６＃Ｕ１において半田又は超音波接合する。導体板８４＃Ｕ２と第１出力端子２６＃Ｕの一端とを接合部１２６＃Ｕ２において半田又は超音波接合する。導体板８４＃Ｕ３と第２出力端子２８＃Ｕとを接合部１２６＃Ｕ４において半田又は超音波接合する。負極接続端子２４＃Ｕの一端を導体板８４＃Ｕ３上に配置する。図１５（ａ）の工程を超音波・半田接合工程と呼ぶ。   As shown in FIG. 15A, the conductor plate 84 # U1 and one end of the positive electrode connection terminal 22 # U are soldered or ultrasonically joined at the joint 126 # U1. The conductor plate 84 # U2 and one end of the first output terminal 26 # U are soldered or ultrasonically joined at the joint 126 # U2. The conductor plate 84 # U3 and the second output terminal 28 # U are soldered or ultrasonically joined at the joint 126 # U4. One end of the negative electrode connection terminal 24 # U is disposed on the conductor plate 84 # U3. The process of FIG. 15A is called an ultrasonic wave / solder joining process.

図１５（ｂ）に示すように、信号端子及び電極パターンが形成されたＬ字型の端子台９２＃Ｕを導体板８４＃Ｕ１と導体板８４＃Ｕ２の間，導体板８４＃Ｕ１と導体板８４＃Ｕ３の間に配置にする。ＩＧＢＴ素子８６＃Ｕ１のエミッタ、フライホイールダイオード８８＃Ｕ１のアノード及び導体板８４＃Ｕ２をアルミワイヤ１２０＃Ｕ１により接合する。ＩＧＢＴ素子８６＃Ｕ２のエミッタ、フライホイールダイオード８８＃Ｕ２のアノード及び第２出力端子２８＃Ｕをアルミワイヤ１２０＃Ｕ２により接合する。   As shown in FIG. 15B, an L-shaped terminal block 92 # U on which signal terminals and electrode patterns are formed is placed between the conductor plate 84 # U1 and the conductor plate 84 # U2, and the conductor plate 84 # U1 and the conductor. Place between the plates 84 # U3. The emitter of IGBT element 86 # U1, the anode of flywheel diode 88 # U1, and conductor plate 84 # U2 are joined by aluminum wire 120 # U1. The emitter of IGBT element 86 # U2, the anode of flywheel diode 88 # U2, and second output terminal 28 # U are joined by aluminum wire 120 # U2.

ＩＧＢＴ素子８６＃Ｕ３のエミッタ、フライホイールダイオード８８＃Ｕ３のアノード及び負極接続端子２４＃Ｕをアルミワイヤ１２０＃Ｕ３により接合する。更に、端子台９２＃Ｕ上に形成された電極パターンとＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）に形成された電極パターンをアルミワイヤ９２＃Ｕｉ（ｉ＝１〜３）により接合する。図１５（ｂ）の工程をアルミワイヤ接合工程と呼ぶ。   The emitter of IGBT element 86 # U3, the anode of flywheel diode 88 # U3, and negative electrode connection terminal 24 # U are joined by aluminum wire 120 # U3. Further, the electrode pattern formed on the terminal block 92 # U and the electrode pattern formed on the IGBT element 86 # Ui (i = 1 to 3) are joined by the aluminum wire 92 # Ui (i = 1 to 3). The process of FIG. 15B is called an aluminum wire bonding process.

図１５（ｃ）に示すように、導体板８４＃Ｕ１、８４＃Ｕ２，８４＃Ｕ３の下面に接着剤等によりエポキシ樹脂等の絶縁材を接合して、絶縁材８２＃Ｕを形成する（絶縁材接合工程）。図１６（ａ）に示すように、絶縁材８２＃Ｕ、導体板８４＃Ｕｉ（ｉ＝１〜３）、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜３）及びフライホイールダイオード８８＃Ｕｉ（ｉ＝１〜３）等をゲルやエポキシ樹脂等のモールド材８３＃Ｕにより封止して、インバータモジュール２０＃Ｕを形成する（モールド工程）。図１４（ａ）〜図１６（ａ）と同様にして、インバータモジュール２０＃Ｖ，２０＃Ｗを形成する。   As shown in FIG. 15C, an insulating material 82 # U is formed by bonding an insulating material such as an epoxy resin to the lower surface of the conductor plates 84 # U1, 84 # U2 and 84 # U3 with an adhesive or the like ( Insulating material joining process). As shown in FIG. 16A, the insulating material 82 # U, the conductor plate 84 # Ui (i = 1 to 3), the IGBT element 86 # Ui (i = 1 to 3) and the flywheel diode 88 # Ui (i = 1 to 3) is sealed with a molding material 83 # U such as gel or epoxy resin to form the inverter module 20 # U (molding process). Inverter modules 20 # V and 20 # W are formed in the same manner as in FIGS. 14 (a) to 16 (a).

図１６（ｂ）に示すように、ヒートシンク３６上にサーマルコンパウンド１１０を塗布した後、サーマルコンパウンド１１０上にインバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗを並べて配置する（サーマルコンパウンド塗布工程）。図１６（ｃ）に示すように、インバータモジュール２０＃Ｕ，２０＃Ｖ，２０＃Ｗをステー１１２によりボルト１１４締めでヒートシンク３６に固定する（アセンブル工程）。以上の工程を経て、図２に示すインバータモジュール２０が製作される。尚、図１４（ｂ）の半田接合工程の後に、図１５（ｃ）の絶縁材接合工程を行ってから、図１５（ａ）の超音波・半田接合工程、図１５（ｂ）のアルミワイヤ接合工程を行っても良い。   As shown in FIG. 16B, after applying the thermal compound 110 on the heat sink 36, the inverter modules 20 # U, 20 # V, and 20 # W are arranged side by side on the thermal compound 110 (thermal compound application step). . As shown in FIG. 16C, the inverter modules 20 # U, 20 # V, and 20 # W are fixed to the heat sink 36 by the bolts 114 by the stay 112 (assembly process). The inverter module 20 shown in FIG. 2 is manufactured through the above steps. 14B, after performing the insulating material bonding step of FIG. 15C, the ultrasonic wave / solder bonding step of FIG. 15A and the aluminum wire of FIG. 15B. You may perform a joining process.

以上説明した第２実施形態によれば、第１実施形態と同様の効果が得られる。更に、図１４（ａ），１４（ｂ）の工程はＨｉ側，ＭｉＤ側及びＬｏ側について共通であり、１５（ａ）の超音波・半田接合工程の接合点数は、Ｈｉ側，ＭｉＤ側及びＬｏ側で同じ１個であり、正極接続端子２２＃U及び第１出力端子２６＃Ｕの形状が同一であることから、工程を簡単にできる。   According to the second embodiment described above, the same effect as the first embodiment can be obtained. Further, the processes of FIGS. 14A and 14B are common to the Hi side, the MiD side, and the Lo side, and the number of bonding points in the ultrasonic wave / solder bonding process of 15A is as follows. Since it is the same one on the Lo side and the shapes of the positive electrode connection terminal 22 # U and the first output terminal 26 # U are the same, the process can be simplified.

次に、一般のＬ（Ｌは４以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続されたＬ段Ｎ相ブリッジインバータ回路を有するインバータ装置の場合の実装構造の説明をする。Ｋ＝Ｌ−１とおく。   Next, a series circuit is configured by switching elements arranged in a general L (L is a natural number of 4 or more) stage, and N (N is a natural number of 2 or more) serial circuits are connected in parallel. A mounting structure in the case of an inverter device having an L-stage N-phase bridge inverter circuit will be described. Let K = L−1.

（１） Ｋ（＝モータ数）が偶数の場合
全ての相ついて同一構造となるので、Ｕ相の場合について説明をする。Ｋが偶数（Ｌ＝２×Ｐ＋１）の場合は、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）は奇数となる。直列に接続されたＬ個のＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）は初段（Ｈｉ側）を８６＃Ｕ１、最終段（Ｌｏ側）を８６＃ＵＬとする。ＩＧＢＴ素子８６＃Ｕｉ及びフライホイールダイオード８８＃ｉが設けられた導体板（基板）８４＃Ｕｉ（ｉ＝１〜Ｌ）は次のように配置される。 (1) When K (= number of motors) is an even number Since all the phases have the same structure, the case of the U phase will be described. When K is an even number (L = 2 × P + 1), the IGBT element 86 # Ui (i = 1 to L) is an odd number. The L IGBT elements 86 # Ui (i = 1 to L) connected in series have the first stage (Hi side) as 86 # U1 and the last stage (Lo side) as 86 # UL. Conductor plate (substrate) 84 # Ui (i = 1 to L) provided with IGBT element 86 # Ui and flywheel diode 88 # i is arranged as follows.

図１７（ａ）及び図１７（ｂ）、並びに図１８（ａ）及び図１８（ｂ）に示すように、導体板８４＃Ｕｉ（ｉ＝１〜Ｐ）は、縦列に配置される。導体板８４＃Ｕｉ（ｉ＝Ｐ＋２〜２Ｐ＋１）は、導体板８４＃Ｕｊ（ｊ＝Ｌ＋１−ｉ）の長手方向に隣接し、縦列に配置される。また、導体板８４＃Ｕ（Ｐ＋１）は、冷却経路の最上流側となるよう長手方向が導体板８４＃ＵＰ及び８４＃Ｕ（Ｐ＋２）の短手方向に隣接して配置する。   As shown in FIGS. 17A and 17B and FIGS. 18A and 18B, the conductor plates 84 # Ui (i = 1 to P) are arranged in a column. The conductor plates 84 # Ui (i = P + 2 to 2P + 1) are adjacent to each other in the longitudinal direction of the conductor plates 84 # Uj (j = L + 1−i) and are arranged in columns. Further, the conductor plate 84 # U (P + 1) is disposed so that the longitudinal direction thereof is adjacent to the short direction of the conductor plates 84 # UP and 84 # U (P + 2) so as to be on the most upstream side of the cooling path.

端子台１５２＃Ｕｉ（ｉ＝１〜Ｐ−１）は、導体板８４＃Ｕｉ（ｉ＝Ｐ＋３〜２Ｐ＋１）と導体板８４＃Ｕｊ（ｊ＝Ｌ＋１−ｉ）とに挟まれて形成される。端子台１５２＃Ｕｉ（ｉ＝Ｐ）は、導体板８４＃Ｕｉ（ｉ＝Ｐ，Ｐ＋１，Ｐ＋２）に挟まれて配置される。   The terminal block 152 # Ui (i = 1 to P-1) is formed between the conductor plate 84 # Ui (i = P + 3 to 2P + 1) and the conductor plate 84 # Uj (j = L + 1−i). Terminal block 152 # Ui (i = P) is disposed between conductor plates 84 # Ui (i = P, P + 1, P + 2).

Ｌ個のＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）を導体板８４＃Ｕｉ（ｉ＝１〜Ｌ）及び正極接続端子２２＃U、負極接続端子２４＃Ｕ、Ｋ個のモータが接続される出力端子１５０＃Ｕｉ（ｉ＝１〜Ｋ）又は接続端子９０＃Ｕを通して直列に接続する。例えば、出力端子１５０＃Ｕｉ（ｉ＝１〜Ｋ）をＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ−１）のエミッタ、フライホイールダイオード８８＃Ｕｉ（ｉ＝１〜Ｌ−１）のアノード及び導体板８４＃Ｕ（ｉ＋１）（ｉ＝１〜Ｌ−１）に接続する。   The L IGBT elements 86 # Ui (i = 1 to L) are connected to the conductor plate 84 # Ui (i = 1 to L), the positive electrode connection terminal 22 # U, the negative electrode connection terminal 24 # U, and K motors. Are connected in series through the output terminal 150 # Ui (i = 1 to K) or the connection terminal 90 # U. For example, the output terminal 150 # Ui (i = 1 to K) is the emitter of the IGBT element 86 # Ui (i = 1 to L-1), the anode of the flywheel diode 88 # Ui (i = 1 to L-1), and The conductor plate 84 # U (i + 1) (i = 1 to L-1) is connected.

Ｋ＝２の場合、図１７（ａ）に示すように、出力端子１５０＃Ｕｉ（ｉ＝１，２）を導体板８４＃Ｕ２上及び導体板８４＃Ｕ２の上方に平行に延伸して形成するか、図１７（ｂ）に示すように、出力端子１５０＃Ｕ１を導体板８４＃Ｕ１の上方に導体板８４＃Ｕ１の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕ２を導体板８４＃Ｕ２の上方に導体板８４＃Ｕ２の短手方向に平行に延伸して形成する。   When K = 2, as shown in FIG. 17A, the output terminal 150 # Ui (i = 1, 2) is formed by extending in parallel above the conductor plate 84 # U2 and above the conductor plate 84 # U2. Alternatively, as shown in FIG. 17B, the output terminal 150 # U1 is formed above the conductor plate 84 # U1 so as to extend in parallel to the short direction of the conductor plate 84 # U1, and the output terminal 150 # U2 is formed. Is formed above the conductor plate 84 # U2 in parallel with the short direction of the conductor plate 84 # U2.

Ｋ＝４の場合、図１８（ａ）に示すように、出力端子１５０＃Ｕ１，１５０＃Ｕ２を導体板８４＃Ｕ１，８４＃Ｕ２の上方に導体板８４＃Ｕ１，８４＃Ｕ２の短手方向に平行に延伸して形成し、出力端子１５０＃３を導体板８４＃Ｕ３の上方に導体板８４＃Ｕ３の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕ４を導体板８４＃Ｕ４の上方に導体板８４＃Ｕ４の短手方向に平行に延伸して形成する。   When K = 4, as shown in FIG. 18 (a), the output terminals 150 # U1 and 150 # U2 are placed above the conductor plates 84 # U1 and 84 # U2 to be shorter than the conductor plates 84 # U1 and 84 # U2. The output terminal 150 # 3 is formed to extend parallel to the short direction of the conductor plate 84 # U3 above the conductor plate 84 # U3, and the output terminal 150 # U4 is formed to the conductor plate. It is formed by extending parallel to the short direction of the conductor plate 84 # U4 above the 84 # U4.

Ｋ＝６の場合、図１８（ｂ）に示すように、出力端子１５０＃Ｕ１，１５０＃Ｕ２，１５０＃Ｕ３を導体板８４＃Ｕ１，８４＃Ｕ２，８４＃Ｕ３の上方に導体板８４＃Ｕ１，８４＃Ｕ２，８４＃Ｕ３の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕ４を導体板８４＃Ｕ４の上方に導体板８４＃Ｕ４の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕ５，１５０＃Ｕ６を導体板８４＃Ｕ５，８４＃Ｕ６の上方に導体板８４＃Ｕ５，８４＃Ｕ６の短手方向に平行に延伸して形成する。   When K = 6, as shown in FIG. 18B, the output terminals 150 # U1, 150 # U2 and 150 # U3 are placed above the conductor plates 84 # U1, 84 # U2 and 84 # U3, the conductor plate 84 #. U1, 84 # U2 and 84 # U3 are formed by extending parallel to the short direction, and output terminal 150 # U4 is extended above conductive plate 84 # U4 and parallel to the short direction of conductive plate 84 # U4. The output terminals 150 # U5 and 150 # U6 are formed above the conductor plates 84 # U5 and 84 # U6 so as to extend in parallel with the short sides of the conductor plates 84 # U5 and 84 # U6.

一般化すると、出力端子１５０＃Ｕｉ（ｉ＝１〜Ｐ）を導体板８４＃Ｕｉ（ｉ＝１〜Ｐ）の上方に８４＃Ｕｉ（ｉ＝１〜Ｐ）の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕ（Ｐ＋１）を導体板８４＃Ｕ（Ｐ＋１）の上方に８４＃Ｕ（Ｐ＋１）の短手方向に平行に延伸して形成し、出力端子１５０＃Ｕｉ（ｉ＝Ｐ＋２〜Ｌ−１）を導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜Ｌ−１）の上方に導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜Ｌ−１）の短手方向に平行に延伸して形成する。   In general, the output terminal 150 # Ui (i = 1 to P) is extended above the conductor plate 84 # Ui (i = 1 to P) in parallel with the short direction of 84 # Ui (i = 1 to P). The output terminal 150 # U (P + 1) is formed extending above the conductor plate 84 # U (P + 1) in parallel with the short direction of 84 # U (P + 1), and the output terminal 150 # Ui ( i = P + 2 to L-1) is extended in parallel with the short direction of the conductor plate 84 # Ui (i = P + 1 to L-1) above the conductor plate 84 # Ui (i = P + 1 to L-1). Form.

（２） Ｋ（＝モータ数）が奇数の場合
Ｋが奇数（Ｌ＝２×Ｐ）の場合は、ＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）は偶数となる。但し、直列に接続されたＬ個のＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）は初段（Ｈｉ側）を８６＃Ｕ１、最終段（Ｌｏ側）を８６＃ＵＬとする。ＩＧＢＴ素子８６＃Ｕｉ及びフライホイールダイオード８８＃ｉが形成された導体板（基板）８４＃Ｕｉ（ｉ＝１〜Ｌ）は次のように配置される。 (2) When K (= number of motors) is an odd number When K is an odd number (L = 2 × P), the IGBT element 86 # Ui (i = 1 to L) is an even number. However, in the L IGBT elements 86 # Ui (i = 1 to L) connected in series, the first stage (Hi side) is 86 # U1, and the last stage (Lo side) is 86 # UL. The conductor plate (substrate) 84 # Ui (i = 1 to L) on which the IGBT element 86 # Ui and the flywheel diode 88 # i are formed is arranged as follows.

図１９（ａ）〜（ｃ）に示すように、導体板８４＃Ｕｉ（ｉ＝１〜Ｐ）は、長手方向に縦列に配置される。導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜２Ｐ）は、導体板８４＃Ｕｊ（ｊ＝Ｌ＋１−ｉ）の長手方向に隣接し、長手方向に縦列に配置される。端子台１５２＃Ｕｉ（ｉ＝１〜Ｐ）は、導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜２Ｐ）と導体板８４＃Ｕｊ（ｊ＝Ｌ＋１−ｉ）とに挟まれて形成される。   As shown in FIGS. 19A to 19C, the conductor plates 84 # Ui (i = 1 to P) are arranged in tandem in the longitudinal direction. The conductor plates 84 # Ui (i = P + 1 to 2P) are adjacent to the conductor plate 84 # Uj (j = L + 1−i) in the longitudinal direction, and are arranged in tandem in the longitudinal direction. The terminal block 152 # Ui (i = 1 to P) is formed between the conductor plate 84 # Ui (i = P + 1 to 2P) and the conductor plate 84 # Uj (j = L + 1−i).

Ｌ個のＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ）を導体板８４＃Ｕｉ（ｉ＝１〜Ｌ）及び正極接続端子２２＃U、負極接続端子２４＃Ｕ及びＫ個のモータが接続される出力端子１６０＃Ｕｉ（ｉ＝１〜Ｋ）を通して直列に接続する。例えば、出力端子１６０＃Ｕｉ（ｉ＝１〜Ｌ−１）をＩＧＢＴ素子８６＃Ｕｉ（ｉ＝１〜Ｌ−１）のエミッタ、フライホイールダイオード８８＃Ｕｉ（ｉ＝１〜Ｌ−１）のアノード及び導体板８４＃Ｕ（ｉ＋１）（ｉ＝１〜Ｌ−１）に接続する。導体板８４＃ＵＰ，８４＃Ｕ（Ｐ＋１）を冷却経路の最上流に配置する。   The L IGBT elements 86 # Ui (i = 1 to L) are connected to the conductor plate 84 # Ui (i = 1 to L), the positive electrode connection terminal 22 # U, the negative electrode connection terminal 24 # U, and K motors. Are connected in series through output terminals 160 # Ui (i = 1 to K). For example, the output terminal 160 # Ui (i = 1 to L-1) is the emitter of the IGBT element 86 # Ui (i = 1 to L-1) and the flywheel diode 88 # Ui (i = 1 to L-1). The anode and the conductor plate 84 # U (i + 1) (i = 1 to L-1) are connected. Conductor plates 84 # UP and 84 # U (P + 1) are arranged in the uppermost stream of the cooling path.

Ｋ＝３の場合、図１９（ａ）に示すように、出力端子１６０＃Ｕ１を導体板８４＃Ｕ１の上方に導体板８４＃Ｕ１の短手方向に平行に延伸して形成し、出力端子１６０＃Ｕ２を導体板８４＃Ｕ２の上方に導体板８４＃Ｕ２の長手方向に平行に延伸して形成し、出力端子１６０＃Ｕ３を導体板８４＃Ｕ３の上方に導体板８４＃Ｕ３の短手方向に平行に延伸して形成する。   In the case of K = 3, as shown in FIG. 19A, the output terminal 160 # U1 is formed above the conductor plate 84 # U1 so as to extend parallel to the short direction of the conductor plate 84 # U1. 160 # U2 is formed above the conductor plate 84 # U2 so as to extend parallel to the longitudinal direction of the conductor plate 84 # U2, and the output terminal 160 # U3 is formed above the conductor plate 84 # U3 with the short of the conductor plate 84 # U3. It is formed by stretching parallel to the hand direction.

Ｋ＝５の場合、図１９（ｂ）に示すように、出力端子１６０＃Ｕｉ（ｉ＝１〜２）を導体板８４＃Ｕｉ（ｉ＝１〜２）の上方に導体板８４＃Ｕｉ（ｉ＝１〜２）の短手方向に平行に延伸して形成し、出力端子１６０＃３を導体板８４＃Ｕ３の上方に導体板８４＃Ｕ３の長手方向に平行に延伸して形成し、出力端子１６０＃Ｕｉ（ｉ＝４，５）を導体板８４＃Ｕ４，８４＃Ｕ５の上方に導体板８４＃Ｕｉ（ｉ＝４，５）の短手方向に平行に延伸して形成する。   When K = 5, as shown in FIG. 19B, the output terminal 160 # Ui (i = 1 to 2) is placed above the conductor plate 84 # Ui (i = 1 to 2) to the conductor plate 84 # Ui ( i = 1 to 2) is formed by extending parallel to the short direction, and the output terminal 160 # 3 is formed above the conductor plate 84 # U3 by extending parallel to the longitudinal direction of the conductor plate 84 # U3, The output terminal 160 # Ui (i = 4, 5) is formed above the conductor plates 84 # U4, 84 # U5 so as to extend parallel to the short direction of the conductor plate 84 # Ui (i = 4, 5).

Ｋ＝７の場合、図１９（ｃ）に示すように、出力端子１６０＃Ｕｉ（ｉ＝１〜３）を導体板８４＃Ｕｉ（ｉ＝１〜３）の上方に導体板８４＃Ｕｉ（ｉ＝１〜３）の短手方向に平行に延伸して形成し、出力端子１５０＃４を導体板８４＃Ｕ４の上方に導体板８４＃Ｕ４の長手方向に平行に延伸して形成し、出力端子１５０＃Ｕｉ（ｉ＝５〜７）を導体板８４＃Ｕｉ（ｉ＝５〜７）の上方に導体板８４＃Ｕｉ（ｉ＝５〜７）の短手方向に平行に延伸して形成する。   When K = 7, as shown in FIG. 19 (c), the output terminal 160 # Ui (i = 1 to 3) is placed above the conductor plate 84 # Ui (i = 1 to 3) to the conductor plate 84 # Ui ( i = 1 to 3) extending in parallel with the short direction, and forming the output terminal 150 # 4 above the conductor plate 84 # U4 in parallel with the longitudinal direction of the conductor plate 84 # U4, The output terminal 150 # Ui (i = 5-7) is extended above the conductor plate 84 # Ui (i = 5-7) in parallel with the short direction of the conductor plate 84 # Ui (i = 5-7). Form.

一般化すると、出力端子１５０＃Ｕｉ（ｉ＝１〜Ｐ−１）を導体板８４＃Ｕｉ（ｉ＝１〜Ｐ−１）の上方に８４＃Ｕｉ（ｉ＝１〜Ｐ−１）の短手方向に平行に延伸して形成し、出力端子１５０＃ＵＰを導体板８４＃ＵＰの上方に８４＃ＵＰの長手方向に平行に延伸して形成し、出力端子１５０＃Ｕｉ（ｉ＝Ｐ＋１〜Ｌ−１）を導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜Ｌ−１）の上方に導体板８４＃Ｕｉ（ｉ＝Ｐ＋１〜Ｌ−１）の短手方向に平行に延伸して形成する。   When generalized, the output terminal 150 # Ui (i = 1 to P-1) is short of 84 # Ui (i = 1 to P-1) above the conductor plate 84 # Ui (i = 1 to P-1). The output terminal 150 # UP is formed by extending parallel to the longitudinal direction of the 84 # UP above the conductor plate 84 # UP, and is formed by extending the output terminal 150 # Ui (i = P + 1 to 1). L-1) is formed above the conductor plate 84 # Ui (i = P + 1 to L-1) by extending in parallel with the short side direction of the conductor plate 84 # Ui (i = P + 1 to L-1).

モータ数が奇数でも偶数でも、正極接続端子２２＃Ｕが設けられた導体板８４＃Ｕ１、負極接続端子２４＃Ｕが設けられた導体板８４＃ＵＬ、導体板８４＃Ｕ（Ｐ＋１）又は８４＃ＵＰ（Ｌ＝２Ｐ＋１又はＬ＝２Ｐ）、それ以外の導体板と４仕様形状となる。全てにおいて、導体板（銅版）、ＩＧＢＴ素子及びフライホイールダイオードのチップ位置は同じであり、最上流の出力端子以外の出力端子の形状は同一であり、正極接続端子２２＃Ｕが接続されるまでは、３仕様で形成可能である。   Whether the number of motors is odd or even, the conductor plate 84 # U1 provided with the positive electrode connection terminal 22 # U, the conductor plate 84 # UL provided with the negative electrode connection terminal 24 # U, the conductor plate 84 # U (P + 1) or 84 #UP (L = 2P + 1 or L = 2P), other conductor plates and 4 specification shapes. In all cases, the chip positions of the conductor plate (copper plate), IGBT element, and flywheel diode are the same, the shape of the output terminals other than the most upstream output terminal is the same, and until the positive electrode connection terminal 22 # U is connected Can be formed in three specifications.

以上説明したように、Ｌ（Ｌは４以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続されたＬ段Ｎ相ブリッジインバータ回路を有するインバータ装置においても、第１及び第２実施形態と同様の効果がある。   As described above, a series circuit is configured by switching elements arranged in L (L is a natural number of 4 or more) stages, and N (N is a natural number of 2 or more) serial circuits are connected in parallel. The inverter device having the L-stage N-phase bridge inverter circuit also has the same effect as the first and second embodiments.

本発明のインバータ装置の構成図である。It is a block diagram of the inverter apparatus of this invention. 本発明の実施形態によるインバータを示す図である。It is a figure which shows the inverter by embodiment of this invention. 冷却装置を示す図である。It is a figure which shows a cooling device. 本発明の実施形態によるインバータと冷却経路の関係を示す図である。It is a figure which shows the relationship between the inverter and cooling path by embodiment of this invention. 本発明の第１実施形態によるインバータを示す図である。It is a figure which shows the inverter by 1st Embodiment of this invention. 本発明の第１実施形態によるインバータを示す図である。It is a figure which shows the inverter by 1st Embodiment of this invention. 電流の流れを示す図である。It is a figure which shows the flow of an electric current. 本発明の効果を説明するための図である。It is a figure for demonstrating the effect of this invention. 本発明の第１実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 1st Embodiment of this invention. 本発明の第１実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 1st Embodiment of this invention. 本発明の第１実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 1st Embodiment of this invention. 本発明の第１実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 1st Embodiment of this invention. 本発明の第２実施形態によるインバータを示す図である。It is a figure which shows the inverter by 2nd Embodiment of this invention. 本発明の第２実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 2nd Embodiment of this invention. 本発明の第２実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 2nd Embodiment of this invention. 本発明の第２実施形態によるインバータの製造方法を示す図である。It is a figure which shows the manufacturing method of the inverter by 2nd Embodiment of this invention. モータ数が偶数の場合のインバータを示す図である。It is a figure which shows an inverter in case the number of motors is an even number. モータ数が偶数の場合のインバータを示す図である。It is a figure which shows an inverter in case the number of motors is an even number. モータ数が奇数の場合のインバータを示す図である。It is a figure which shows an inverter in case a motor number is an odd number. ２段３相インバータを示す図である。It is a figure which shows a two-stage three-phase inverter.

符号の説明Explanation of symbols

２０＃Ｕ，２０＃Ｖ，２０＃Ｗ インバータモジュール
２２＃Ｕ，２２＃Ｖ，２２＃Ｗ 正極接続端子
２４＃Ｕ，２４＃Ｖ，２４＃Ｗ 負極接続端子
２６＃Ｕ 第１出力端子
２８＃Ｕ 第２出力端子
３８ 冷却経路
８４＃Ｕｉ（ｉ＝１〜３） 導体板
８６＃Ｕｉ（ｉ＝１〜３） ＩＧＢＴ素子
８８＃Ｕｉ（ｉ＝１〜３） フライホイールダイオード
９０ 接続導体 20 # U, 20 # V, 20 # W Inverter module 22 # U, 22 # V, 22 # W Positive connection terminal 24 # U, 24 # V, 24 # W Negative connection terminal 26 # U First output terminal 28 # U Second output terminal 38 Cooling path 84 # Ui (i = 1 to 3) Conductor plate 86 # Ui (i = 1 to 3) IGBT element 88 # Ui (i = 1 to 3) Flywheel diode 90 Connecting conductor

Claims (9)

３段に配置された複数のスイッチング素子により直列回路が構成されるとともに、３つの前記直列回路が並列に接続されたトリプルブリッジインバータ回路を有するインバータ装置であって、
２段目の前記スイッチング素子が前記トリプルブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置され、１段目及び３段目の前記スイッチング素子が前記冷却経路の下流側に配置されていることを特徴とするインバータ装置。 A series circuit is constituted by a plurality of switching elements arranged in three stages, and an inverter device having a triple bridge inverter circuit in which the three series circuits are connected in parallel,
The second-stage switching element is disposed upstream of the cooling path to which the refrigerant for cooling the triple bridge inverter circuit is supplied, and the first-stage and third-stage switching elements are downstream of the cooling path. An inverter device characterized in that the inverter device is arranged. 前記トリプルブリッジインバータ回路の所定相の１段目の前記スイッチング素子及び２段目の前記スイッチング素子に接続された第１出力端子、並びに前記トリプルブリッジインバータ回路の前記所定相の２段目のスイッチング素子及び３段目の前記スイッチング素子に接続された第２出力端子が、前記冷却経路の上流側に配置され、１段目の前記スイッチング素子に接続された直流電源の正極入力端子及び３段目の前記スイッチング素子に接続された前記直流電源の負極入力端子が前記冷却経路の下流側に配置されていることを特徴とする請求項１記載のインバータ装置。   A first output terminal connected to the first stage switching element of the predetermined phase of the triple bridge inverter circuit and the second stage switching element, and a second stage switching element of the predetermined phase of the triple bridge inverter circuit And a second output terminal connected to the switching element in the third stage is arranged upstream of the cooling path, and a positive input terminal of a DC power source connected to the switching element in the first stage and a third stage The inverter apparatus according to claim 1, wherein a negative input terminal of the DC power source connected to the switching element is disposed on the downstream side of the cooling path. 第１導体板を含み該第１導体板上に１段目の前記スイッチング素子及びダイオードが設けられた第１基板と、第２導体板を含み該第２導体板上に２段目の前記スイッチング素子及びダイオードが設けられた第２基板と、第３導体板を含み該第３導体板上に３段目の前記スイッチング素子及びダイオードが設けられた第３基板と、１段目の前記スイッチング素子及びダイオード並びに前記第２導体板に接続された第１接続導体とを備え、前記第２基板は前記第１及び第３基板よりも前記冷却経路の上流側に配置されていることを特徴とする請求項２記載のインバータ装置。   A first substrate including a first conductor plate and provided with the first-stage switching element and diode on the first conductor plate; and a second substrate including the second conductor plate on the second conductor plate. A second substrate provided with an element and a diode; a third substrate including a third conductor plate; and a third substrate provided with the switching element and the diode on the third stage on the third conductor plate; and the switching element on the first stage. And a diode and a first connection conductor connected to the second conductor plate, wherein the second substrate is disposed upstream of the cooling path from the first and third substrates. The inverter device according to claim 2. 前記正極入力端子は前記第１導体板に接続され、前記第１出力端子は前記第２導体板に接続され、前記第２出力端子は２段目の前記スイッチング素子及びダイオード並びに前記第３導体板に接続された第２接続導体から成り、
第１電流は、前記正極入力端子、前記第１導体板、１段目の前記スイッチング素子、前記第１接続導体及び前記第２導体板を通して前記第１出力端子に流れ、
第２電流は、前記第２接続導体、前記第３導体板及び３段目の前記スイッチング素子を通して前記負極入力端子に流れるよう構成されていることを特徴とする請求項３記載のインバータ装置。 The positive input terminal is connected to the first conductor plate, the first output terminal is connected to the second conductor plate, and the second output terminal is the second-stage switching element and diode, and the third conductor plate. Comprising a second connecting conductor connected to
The first current flows to the first output terminal through the positive input terminal, the first conductor plate, the first-stage switching element, the first connection conductor, and the second conductor plate,
4. The inverter device according to claim 3, wherein the second current is configured to flow to the negative input terminal through the second connection conductor, the third conductor plate, and the third-stage switching element. 前記第１、第２及び第３基板は、互いに所定距離離間して配置され、前記第１、第２及び第３基板間に、１段目、２段目、及び３段目の前記スイッチング素子をＯＮ／ＯＦＦするための駆動信号端子が配置されていることを特徴とする請求項４記載のインバータ装置。   The first, second, and third substrates are spaced apart from each other by a predetermined distance, and the first, second, and third-stage switching elements are disposed between the first, second, and third substrates. The inverter device according to claim 4, wherein a drive signal terminal for turning on / off is disposed. （２×Ｍ＋１）（Ｍは２以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続された（２×Ｍ＋１）段Ｎ相ブリッジインバータ回路を有するインバータ装置であって、
ｊ（ｊ＝２から２×Ｍまでの自然数）段目の前記スイッチング素子が、１段目及び（２×Ｍ＋１）段目の前記スイッチング素子よりも、前記Ｍ段Ｎ相ブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置されていることを特徴とするインバータ装置。 A series circuit is configured by switching elements arranged in (2 × M + 1) (M is a natural number of 2 or more) stages, and N (N is a natural number of 2 or more) serial circuits are connected in parallel ( 2 × M + 1) inverter device having a stage N-phase bridge inverter circuit,
The switching element of the j stage (natural number from j = 2 to 2 × M) is more cooled than the switching element of the first stage and the (2 × M + 1) stage of the M-stage N-phase bridge inverter circuit. An inverter device, wherein the inverter device is disposed upstream of a cooling path to which a refrigerant for supplying the refrigerant is supplied. 第ｋ（ｋは１〜（２×Ｍ＋１）までの自然数）導体板を含み該第ｋ導体板上にｋ（ｋは１〜（２×Ｍ＋１）までの自然数）段目の前記スイッチング素子及び第ｋダイオードが設けられた第ｋ基板と、前記第ｋ導体板（ｋは１）に接続された直流電源の正極入力端子と、（２×Ｍ＋１）段目の前記スイッチング素子及び第ｋダイオード（ｋは（２×Ｍ＋１））に接続された前記直流電源の負極入力端子と、第ｋ（ｋは１〜（２×Ｍ）までの自然数）段目のスイッチング素子及び第ｋダイオード並びに第（ｋ＋１）（ｋは１〜（２×Ｍ）までの自然数）導体板に接続された第ｋ出力端子とを備え、
前記第ｋ基板（ｋは（１からＭまでの自然数））は前記第（ｋ＋１）基板（ｋは（１からＭまでの自然数））よりも前記冷却経路の下流側に配置され、
前記第ｋ基板（ｋは（Ｍ＋１）から２×Ｍまでの自然数））は前記第（ｋ＋１）基板（ｋは（（Ｍ＋１）から２×Ｍまでの自然数））よりも前記冷却経路の上流側に配置されていることを特徴とする請求項６記載のインバータ装置。 The k-th (k is a natural number from 1 to (2 × M + 1)) conductor plate and k (k is a natural number from 1 to (2 × M + 1)) stage switching element and the k-th conductor plate, a k-th substrate provided with a k-diode, a positive input terminal of a DC power source connected to the k-th conductor plate (k is 1), the switching element and the k-th diode (k in the (2 × M + 1) stage) Is the negative input terminal of the DC power supply connected to (2 × M + 1)), the kth (k is a natural number from 1 to (2 × M)) stage switching element, the kth diode, and the (k + 1) th (K is a natural number from 1 to (2 × M)) k-th output terminal connected to the conductor plate,
The kth substrate (k is a (natural number from 1 to M)) is disposed downstream of the cooling path from the (k + 1) th substrate (k is a (natural number from 1 to M)),
The kth substrate (k is a natural number from (M + 1) to 2 × M) is upstream of the cooling path than the (k + 1) th substrate (k is a (natural number from (M + 1) to 2 × M)). The inverter device according to claim 6, wherein the inverter device is disposed in a row. （２×Ｍ）（Ｍは２以上の自然数）段に配置されたスイッチング素子により直列回路が構成されるとともに、Ｎ（Ｎは２以上の自然数）個の前記直列回路が並列に接続された（２×Ｍ）段Ｎ相ブリッジインバータ回路であって、
ｊ（ｊ＝２から（２×Ｍ−１）の自然数）段目の前記スイッチング素子が、前記１段目及び（２×Ｍ）段目の前記スイッチング素子よりも前記Ｍ段Ｎ相ブリッジインバータ回路の冷却のための冷媒が供給される冷却経路の上流側に配置されていることを特徴とするインバータ装置。 A series circuit is constituted by switching elements arranged in (2 × M) (M is a natural number of 2 or more) stages, and N (N is a natural number of 2 or more) series circuits are connected in parallel ( 2 × M) stage N-phase bridge inverter circuit,
j (j = 2 to (2 × M−1) natural number) of the switching elements in the M-stage N-phase bridge inverter circuit rather than the first and (2 × M) -stage switching elements An inverter device, wherein the inverter device is disposed upstream of a cooling path through which a cooling medium for cooling is supplied. 第ｋ（ｋは１〜（２×Ｍ）までの自然数）導体板を含み該第ｋ導体板上にｋ（ｋは１〜（２×Ｍ）までの自然数）段目の前記スイッチング素子及び第ｋダイオードが設けられた第ｋ基板と、前記第ｋ導体板（ｋは１）に接続された直流電源の正極入力端子と、（２×Ｍ）段目の前記スイッチング素子及び第ｋダイオード（ｋは（２×Ｍ））に接続された前記直流電源の負極入力端子と、第ｋ（ｋは１〜（２×Ｍ−１）までの自然数）段目のスイッチング素子及び第ｋダイオード並びに第（ｋ＋１）（ｋは１〜（２×Ｍ−１）までの自然数）導体板に接続された第ｋ出力端子とを備え、
前記第ｋ基板（ｋは１から（Ｍ−１）までの自然数）は前記第（ｋ＋１）基板（ｋは（１から（Ｍ−１）までの自然数））よりも前記冷却経路の下流側に縦列に配置され、
前記第ｋ基板（ｋは（Ｍ＋１）から（２×Ｍ−１）までの自然数）は前記第（ｋ＋１）基板（ｋは（Ｍ＋１）から（２×Ｍ−１）までの自然数）よりも前記冷却経路の上流側に縦列に配置されていることを特徴とする請求項８記載のインバータ装置。 The kth (k is a natural number from 1 to (2 × M)) conductor plate and k (k is a natural number from 1 to (2 × M)) stage switching element and the kth conductor plate on the kth conductor plate a k-th substrate provided with a k-diode, a positive input terminal of a DC power source connected to the k-th conductor plate (k is 1), the switching element and the k-th diode (k) in the (2 × M) stage Is the negative input terminal of the DC power source connected to (2 × M)), the kth (k is a natural number from 1 to (2 × M−1)) stage switching elements, the kth diode, and the ( k + 1) (k is a natural number from 1 to (2 × M−1)) k-th output terminal connected to the conductor plate,
The kth substrate (k is a natural number from 1 to (M−1)) is located further downstream of the cooling path than the (k + 1) th substrate (k is a (natural number from 1 to (M−1))). Arranged in columns,
The kth substrate (k is a natural number from (M + 1) to (2 × M−1)) is more than the (k + 1) th substrate (k is a natural number from (M + 1) to (2 × M−1)). 9. The inverter device according to claim 8, wherein the inverter device is arranged in a column on the upstream side of the cooling path.
JP2006261821A 2006-09-27 2006-09-27 Inverter device Withdrawn JP2008086099A (en)

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