JP2008078165A - Semiconductor device protective structure and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device protective structure and a manufacturing method thereof. <P>SOLUTION: The structure includes a die having contact point metal balls formed thereon and electrically coupled to a printed board. The backside of the die is directly fixed on the substrate, and a first buffer layer is formed on the substrate. The substrate is configured on a second buffer layer so that the second buffer layer can substantially surround the entire substrate to reduce damage of the substrate when an outside object collides against the side of the substrate. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

The present invention relates to a semiconductor device structure, and more particularly, to a semiconductor device protection structure and a method for manufacturing the same. The semiconductor device structure has a crack caused by a side surface of a die or a substrate that collides with an external object. It can be avoided.

Generally, in the electrical component field, integrated circuits (ICs) are assembled on a semiconductor substrate known as a chip, and are most commonly made of silicon. Silicon chips provide an effective extension of the distance or pitch between silicon input / output contacts, making it compatible for attachment to printed circuit boards and protecting the IC from mechanical and environmental damage. Commonly assembled in large packages to help. With the tendency to gradually shift to the feature of packing products into reduced product packaging, the use of smaller electronic components to improve size and feature densification is constant and enormous Problems are presented to consumers and manufacturers of related products.

Chip scale packages (CSPs) have been developed to provide an alternative solution for direct attach flip chip devices. These packages (CSPs) are a new compact form used to solve the size, weight and performance problems of electronic products, especially consumer products such as telephones, pagers, portable computers, video cameras, etc. Represents semiconductor packaging. The standard has not yet been officially approved for the CSP, and as a result, there are numerous variations, some of which are described in the “chip scale package” described above. In general, the chip is the main component of a CSP with a package area that is no more than 20% larger than the area of the chip itself, but the package has support features that make it more robust than flip chip direct attachment.

As shown in FIG. 1, this is a side view of a flip chip device 100 according to the prior art. The flip chip 100 includes a die 102 having a metal pad 105 and generally has a fabricated IC device structure. The die 102 has a plurality of electrical contacts 104 such as redistribution layer (RDL) traces. A bump 103 such as a solder ball is formed on the electrical contact 104. The protective layer 106 covers the electrical contact 104 so as to expose the electrical contact 104 so as to allow contact with the solder ball 103. Further, the protective film 101 is applied to the bottom surface of the die 102.

The protective film 101 can be formed of any suitable material. For example, the protective film 101 can be formed of a plastic material or epoxy. This epoxy is also commonly used as a glob top material for chip-on-board applications that protect the die 102 and wire bonds. The protective film 101 substantially prevents chipping during the dicing operation and can have any thickness suitable for individual applications. For example, the protective film 101 can have a thickness that allows laser marking of a thick film without a laser transmitting through the thick film. Preferably, the protective film 101 is about 38.1 to 127 &#13211; (1.5 to 5 mils). Most preferably, the overcoat is about 50.8-76.2 &#13211; (about 2-3 mils).

In addition, substrates for flip-chip or semiconductor devices (such as integrated circuits) may fail due to lateral damage or cracks caused by the sides of the die or substrate where these devices collide with external objects or lateral lateral forces are applied. It has a friability that easily results in (wafer fail) cell edges. Thus, the reliability or lifetime of the flip chip or semiconductor device is reduced.

In view of the foregoing, the present invention provides an improved semiconductor device structure that overcomes the aforementioned disadvantages.

In order to achieve the above and other objects, according to an object of the present invention, a semiconductor device protection structure and a method for manufacturing the same are disclosed.

The semiconductor device protection structure of the present invention can prevent the die or substrate from cracking due to the side surface of the die or substrate colliding with an external object.

In the semiconductor device protection structure of the present invention, when the side of the die or substrate collides with an external object, the die or substrate is cracked by a buffer layer that substantially surrounds the die or substrate to reduce damage to the die or substrate. You can avoid that.

The present invention provides a semiconductor device protection structure. The structure includes a die having a plurality of electrical contacts on the first surface of the die. A plurality of conductive balls are connected to the contacts. The protective layer covers the plurality of electrical contacts and the dielectric layer to expose the electrical contacts to allow the conductive ball to be electrically connected to the outer portion. The second surface of the die is secured directly on the substrate. A first buffer layer is formed on the substrate adjacent to the die. The substrate is formed on top of the second buffer layer such that the second buffer layer surrounds substantially the entire substrate, thereby reducing damage to the substrate when the sides of the substrate collide with an external object.

The substrate includes an inclined sidewall slot formed therein. The second buffer layer is refilled into the inclined sidewall slots. The depth of the inclined side wall slot is slightly smaller than the thickness of the substrate.

In another aspect, the present invention discloses a method for manufacturing a semiconductor device protection structure. The method includes providing a plurality of dies in which a plurality of conductive balls formed thereon are electrically connected to an external portion. Next, a plurality of dice are secured on the substrate. The first buffer layer is formed on the substrate adjacent to the die so as to expose the plurality of conductive balls. A portion of the substrate is removed to form a plurality of slots substantially aligned with the first buffer layer. Finally, a second buffer layer is formed on the substrate and filled with a plurality of slots.

The method described above further includes sawing and / or etching the substrate into a plurality of individual semiconductor device protection structures along substantially the center of the slot.

The slot includes an inclined sidewall slot. The depth of the inclined side wall slot is slightly smaller than the thickness of the substrate.

In yet another aspect, the present invention discloses a method for manufacturing a semiconductor device protection structure. The method includes providing a substrate having a plurality of dice having a plurality of conductive balls formed thereon. Next, the back surface of the partial substrate is removed so as to form a plurality of slots. The buffer layer is formed on the substrate and filled with a plurality of slots.

The method described above further includes sawing and / or etching the substrate into a plurality of individual semiconductor device protection structures along substantially the center of the slot.

The buffer layer can achieve the function of preventing the die or the substrate from being damaged when the side surface of the die or the substrate collides with an external object.

The above objects and other features and advantages of the present invention will become more apparent after reading the following detailed description in conjunction with the drawings.

According to the semiconductor device protection structure of the present invention, when the external force is applied to the side surface of the die or the substrate, the protection structure of the present invention substantially reduces the die or the substrate in order to reduce damage to the die or the substrate. The surrounding buffer layer has the effect of avoiding cracking of the die or the substrate.

Methods and structures for protecting semiconductor devices (such as integrated circuits) or substrates during and after the dicing operation are described below. In the following description, numerous specific details are set forth to provide a thorough understanding of the present invention, and the scope of the present invention is particularly limited except as set forth in the appended claims. is not.

In one embodiment, the present invention discloses a method for manufacturing a semiconductor device protection structure. The method includes providing a substrate, such as a silicon wafer, having a plurality of dice having a plurality of conductive balls formed thereon. Next, the back surface portion of the substrate is removed to form a plurality of slots 206. A buffer layer is formed on top of the substrate and fills into the plurality of slots 206. The buffer layer includes BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. Further, the step of removing the partial substrate is performed by sawing or etching.

The method described above saws and / or etches the substrate substantially along the center of the slot, thereby separating the substrate into a plurality of individual semiconductor devices having a protective structure 200, as shown in FIG. The method further includes the step of: The buffer layer can achieve the function of reducing the lateral damage of the die due to the smaller contact area of the die when the side surface of the die collides with a lateral external object.

As shown in FIG. 2, this is a side view of a semiconductor device protection structure 200 according to the present invention. The semiconductor device protection structure 200 includes a die 202 having metal pads 205. The die 202 has a plurality of electrical contacts 204 such as RDL traces. Bumps 203 such as solder balls are formed on the electrical contacts 204. The protective layer 207 covers the electrical contact 204 so as to expose the electrical contact 204 to allow contact of the solder ball 203.

The die 202 includes a plurality of slots formed inwardly from a back surface of the die 202 into a portion of the die 202. Further, a buffer layer 201 is applied to the bottom surface of the die 202 and refilled into the slot for protection. Since the slots 206 formed by sawing or etching are filled with BCB, SINR (siloxane polymer), epoxy, polyimide, or resin, less contact area of the die 202 is achieved. Thus, the buffer layer 201 causes the die 202 to be laterally damaged due to the smaller contact area of the die 202 when the lateral portion of the die 202 collides with an external object or when a lateral external force is applied. The ability to reduce that can be achieved.

As shown in FIG. 3, this is a side view of a semiconductor device structure 300. The semiconductor device structure 300 includes a die 305 in which a metal pad 306 and a contact metal ball 307 formed thereon are electrically connected to a printed circuit board (not shown). The protective layer 309 covers the electrical contacts 308 to expose the electrical contacts 308 to allow contact of the contact metal balls 307.

The back surface of the die 305 is directly fixed on the substrate 302 through the adhesive layer 304, and the first buffer layer 303 is formed on the substrate 302. The first buffer layer 303 is formed adjacent to the die 305. It should be noted that the dimensions of the substrate 302 are larger than the dimensions of the die 305. The substrate 302 is formed on the second buffer layer 301. The substrate 302 may be damaged or cracked when the side surface of the substrate 302 collides with an external object or when an external force is applied due to lack of protection of the second buffer layer 301. Thus, the die 305 can be peeled from the substrate 302, reducing the reliability and lifetime of the semiconductor device structure 300.

In another aspect, the present invention discloses a method for manufacturing a semiconductor device protection structure. The method includes providing a plurality of dies in which a plurality of conductive balls formed thereon are electrically connected to the outer portion. Next, a plurality of dice are fixed to the top of the substrate. The first buffer layer is formed on the substrate so as to expose the plurality of conductive balls. A portion of the substrate is removed to form a plurality of slots substantially aligned with the first buffer layer. Finally, a second buffer layer is formed on the substrate and filled with a plurality of slots.

The method described above saws and / or etches the substrate substantially along the center of the slot, thereby separating the dice into a plurality of individual semiconductor devices having a protective structure 400, as shown in FIG. The method further includes the step of:

In the embodiment, the semiconductor device protection structure 400 according to the present invention has a metal pad 406 and a contact metal ball 407 formed thereon electrically connected to a printed circuit board (PCB) or an external part (not shown). Die 405 to be processed. A dielectric layer 410 covers a partial area of die 405 such that a plurality of electrical contacts 408 are exposed. In one embodiment, the electrical contacts 408 are, for example, a metal alloy such as a Ti / Cu alloy formed by sputtering and / or a Cu / Ni / Au alloy formed by electroplating. The protective layer 411 includes a plurality of electrical contacts 408 to expose the electrical contacts 408 to allow the conductive balls 407 to be electrically connected to a printed circuit board (PCB) or an external portion (not shown). Cover the dielectric layer 410. In a preferred embodiment, the material of the protective layer 411 includes BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. The back surface of the die 405 is directly fixed to the substrate 402 through the adhesive layer 404, and the first buffer layer 403 is formed on the substrate 402 adjacent to the die 405. For example, the substrate 402 includes silicon, glass, alloy 42, quartz, ceramic, PCB (printed circuit board), or code substrate.

Further, the first buffer layer 403 includes silicon rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin.

As shown in FIG. 4, the second buffer layer 401 has a tilted sidewall slot 409 to reduce damage to the substrate 402 when the side surface of the substrate 402 collides with an external object or when an external force is applied. Due to the above, the second buffer layer 401 is configured to substantially surround the entire substrate 402. Therefore, especially when the second buffer layer 401 surrounds the entire substrate 402, the reliability and lifetime of the semiconductor device protection structure 400 of the present invention is increased. In some cases, the sloped sidewall slot 409 can be etched by wet etching or other controllable dry etching and chemical erosion. The depth of the inclined side wall slot 409 is slightly smaller than the thickness of the substrate 402.

In a preferred embodiment, the material of the second buffer layer 401 includes silicon rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin.

Therefore, according to the present invention, when the external force is applied to the side surface of the die or the substrate, the protective structure of the present invention is used to reduce the damage to the die or the substrate. The buffer layer that substantially surrounds the die or the substrate can be avoided from cracking.

While specific embodiments have been illustrated and described, it will be apparent to those skilled in the art that various modifications can be made without departing from the scope intended to be limited only by the appended claims. Is clear.

It is a schematic side view of the flip chip device which concerns on a prior art. It is the schematic of the semiconductor device protection structure which concerns on this invention. 1 is a schematic view of a semiconductor device structure. It is the schematic of the other semiconductor device protection structure of this invention.

Explanation of symbols

100 Flip chip 101, 106, 207 Protective film 102, 202, 305 Die 103, 203 Bump 104, 204, 308 Electric contact 105, 205, 306 Metal pad 200 Protective structure 206 Slot 300 Semiconductor device structure 302, 302 Substrate 303 First buffer layer 304 Adhesive layer 307 Contact metal ball

Claims (15)

A die having a plurality of electrical contacts on a first surface of the die;
A plurality of conductive balls connected to the electrical contacts;
A substrate secured on the second surface of the die;
A first buffer layer formed on the substrate adjacent to the die;
Including a second buffer layer;
The substrate has an upper portion of the second buffer layer to reduce damage to the substrate when the second buffer layer substantially surrounds the entire substrate, thereby applying an external force to the side surface of the substrate. A semiconductor device protection structure characterized by comprising: The substrate includes an inclined sidewall slot formed therein, and the second buffer layer is filled in the inclined sidewall slot, and the depth of the inclined sidewall slot is slightly smaller than the thickness of the substrate. The semiconductor device protection structure according to claim 1. In order to allow the plurality of conductive balls to be electrically connected to an external portion, the conductive ball further includes a protective layer covering the electrical contacts to expose the electrical contacts, and the material of the protective layer includes: The semiconductor device protection structure according to claim 1, comprising silicon rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. 2. The semiconductor device protection structure according to claim 1, wherein the substrate includes silicon, glass, alloy 42, quartz, ceramic, PCB (printed substrate), or code substrate (flex substance). 2. The semiconductor device protection structure according to claim 1, wherein a material of the first buffer layer and the second buffer layer includes silicon rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. A die having a plurality of electrical contacts on a first surface of the die;
A plurality of conductive balls connected to the electrical contacts;
A substrate secured on the second surface of the die;
Including a buffer layer,
The substrate is configured on top of the buffer layer such that the buffer layer substantially surrounds the entire substrate, thereby reducing damage to the substrate when an external force is applied to a side surface of the substrate. A semiconductor device protection structure. The substrate includes a plurality of sidewall slots formed therein, and the buffer layer is filled in the plurality of sidewall slots, and the depth of the plurality of sidewall slots is slightly smaller than the thickness of the substrate. The semiconductor device protection structure according to claim 6. In order to allow the plurality of conductive balls to be electrically connected to an external portion, the conductive ball further includes a protective layer covering the electrical contacts to expose the electrical contacts, and the material of the protective layer is silicon. The semiconductor device protection structure according to claim 6, comprising rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. 7. The semiconductor device protection structure according to claim 6, wherein the substrate includes silicon, glass, alloy 42, quartz, ceramic, PCB (printed circuit board), or code substrate. The semiconductor device protection structure according to claim 6, wherein the material of the buffer layer includes silicon rubber, BCB, SINR (siloxane polymer), epoxy, polyimide, or resin. Providing a plurality of dice having a plurality of conductive balls formed thereon;
Fixing the plurality of dice on a substrate;
Forming a first buffer layer on top of the substrate adjacent to the die to expose the plurality of conductive balls;
Removing a portion of the substrate to form a plurality of slots substantially aligned with the first buffer layer;
Forming a second buffer layer filling the plurality of slots on the substrate;
The manufacturing method of the semiconductor device protection structure characterized by including. 12. The fabrication of a semiconductor device protection structure according to claim 11, further comprising sawing or etching the substrate into a plurality of individual semiconductor device protection structures substantially along the center of the slot. Method. 12. The method of manufacturing a semiconductor device protection structure according to claim 11, wherein the slot includes an inclined sidewall slot, and the depth of the inclined sidewall slot is substantially the same as the thickness of the substrate. Providing a substrate having a plurality of dice having a plurality of conductive balls formed thereon;
Removing a portion of the back surface of the substrate to form a plurality of slots;
Forming a buffer layer filling the plurality of slots on the substrate;
The manufacturing method of the semiconductor device protection structure characterized by including. The semiconductor device protection structure according to claim 14, further comprising sawing or etching the substrate into a plurality of individual semiconductor device protection structures along substantially the center of the slot. Method.

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