JP2008066682A - Variable capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable capacitor capable of realizing both of lowering of a bias voltage and the maximization of an electrostatic capacitance changing rate. <P>SOLUTION: This variable capacitor comprises, a first capacitance portion which is formed by alternately laminating a plurality of first capacitance electrodes 4 and a plurality of first bias electrodes 6 via dielectric layers; a second capacitance portion which is formed by alternately laminating a plurality of second capacitance electrodes 5 and a plurality of second bias electrodes 7 via dielectric layers; and a variable capacitance portion in which a bias electrode 6a and a bias electrode 7a face each other via a dielectric layer. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a variable capacitor using the dielectric constant electric field dependence of a ferroelectric, and relates to a variable capacitor capable of both reducing a bias voltage and maximizing a capacitance change rate.

  The following are known as variable capacitors for changing the capacitance. (A) Capacitors that change the capacitance area by moving one of a plurality of opposed metal plates, so-called variable capacitors, (b) A plurality of ceramic capacitors connected in parallel, and a switch IC is connected to each capacitor. There are those that are connected to perform the switching operation, and (c) those that use the non-linear capacitance characteristics with respect to the reverse bias voltage of the diode.

  However, the variable capacitor (a) has a problem that it is difficult to reduce the size because the capacity is changed by mechanical means. Further, (b) has a problem that it is difficult to reduce the size because a switch IC is required, and the capacitance cannot be continuously changed because the capacitor is switched by switching. Further, (c) has a problem in that the manufacturing cost is high because a vacuum process is required for the manufacturing.

  Therefore, as a means for solving these problems, (d) a variable capacitor utilizing the dielectric constant electric field dependence of a ferroelectric has been proposed. In this method, an external electric field is applied to the dielectric sandwiched between the capacitor electrodes of the capacitor, thereby changing the dielectric constant of the dielectric to change the capacitance. Examples of such a variable capacitor include those in which a bias electrode is provided between capacitive electrodes as in JP-A-62-259417 and an electric field is applied, and in JP-A-62-281319. There is one in which an electric field is applied such that a capacitor electrode is sandwiched between bias electrodes. Since these have a simple structure and are easy to manufacture in the same manner as ordinary capacitors, it is possible to obtain a variable capacitor that can be easily reduced in size at low cost.

Japanese Patent Laid-Open No. 62-259417 JP-A-62-281319

  The variable capacitor is required to have (i) a large capacitance change rate and (b) a low bias voltage. In order to obtain a large capacitance change rate, it is necessary to increase the variation of the dielectric constant of the dielectric. To increase the variation of the dielectric constant, it is necessary to increase the electric field strength applied to the dielectric. The electric field strength is expressed by (bias voltage / bias electrode distance). From this, it is possible to increase the electric field strength by increasing the applied voltage between the bias electrodes or by reducing the distance between the bias electrodes, but to increase the electric field strength at a low bias voltage, It is necessary to reduce the gap.

  Here, looking at the variable capacitor disclosed in Japanese Patent Application Laid-Open No. 62-281319, it is a type of variable capacitor in which an electric field is applied so that the capacitor electrode is sandwiched between the bias electrodes. Therefore, there is a limit to lowering the bias voltage. For this reason, a variable capacitor of the type in which a bias electrode is provided between capacitive electrodes and an electric field is applied as described in Japanese Patent Application Laid-Open No. 62-259417 is more advantageous for lowering the bias voltage.

  A model of such a variable capacitor is shown in FIG. The variable capacitor shown in FIG. 12A includes a first capacitor electrode 4 and a second capacitor electrode 5 which are opposed to each other with a dielectric having a dielectric constant ε, and the first capacitor electrode 4 and the second capacitor electrode 5 Between the capacitive electrode 5, the first bias electrode 6 facing the first capacitive electrode 4 via a dielectric, and the first bias electrode 6 and the second capacitive electrode 5 It has the 2nd bias electrode 7 which opposes via a dielectric material. A bias voltage from a power source PS is applied between the first bias electrode 6 and the second bias electrode 7, and the electric field generated thereby causes the first bias electrode 6 and the second bias electrode 7 to be biased. The dielectric constant of the dielectric between is changed to ε ′.

This variable capacitor can be expressed by an equivalent circuit as shown in FIG. That is, the capacitance of this variable capacitor is the capacitance C ₁ formed by the first capacitance electrode 4 and the first bias electrode 6 facing each other through a dielectric having a dielectric constant ε, and the dielectric constant ε. A capacitance C ₂ formed by the second capacitor electrode 5 and the second bias electrode 7 facing each other through a dielectric, and a first bias electrode 6 facing through a dielectric having a dielectric constant ε ′. And a variable capacitance _CV formed by the second bias electrode 7 are connected in series. Therefore, the capacitance C _total formed between the first capacitor electrode 4 and the second capacitor electrode 5 is expressed by the following equation.

Formula 1

Here, the maximum value of _{C V C V ·} MAX, the minimum value of _{C V} as _{C V · MIN, C V =} C V · MAX, a _{C total} when the _{C total · MAX, C V =} C V _{· MIN,} a _{C total} when _{C total · MIN,} the capacitance change rate of the variable capacitor _C total _{· MAX / C total · MIN} is as follows when the.

Formula 2

  Here, Formula 2 is arranged and expressed as the following formula.

Formula 3

From Equation 3, in order to increase maximum capacitance change rate, _{C 1} and _{C 2} sufficiently large (for example, _{C 1} and 10 times more _{C V} the capacitance of _{C 2)} relative to the _{C V} There is a need to. In order to realize this with the structure of FIG. 12A, the first capacitance electrode 4 and the first bias electrode 6 with respect to the distance between the first bias electrode 6 and the second bias electrode 7. And the distance between the second capacitor electrode 5 and the second bias electrode 7 can be made sufficiently small.

  However, in order to reduce the bias voltage, it is necessary to reduce the distance between the first bias electrode 6 and the second bias electrode 7. It is necessary to further reduce the distance between the first bias electrode 6 and the distance between the second capacitor electrode 5 and the second bias electrode 7. There is a problem that there is a limit to lowering the bias voltage because the thickness of the dielectric has a limit in terms of manufacturing method. The present invention solves such problems and obtains a variable capacitor that can achieve both a reduction in bias voltage and a maximum rate of change in capacitance.

  The present invention provides, as a first solving means, a first capacitor section composed of a first capacitor electrode and a first bias electrode facing each other through a dielectric in a dielectric laminate, and a dielectric A second capacitive portion composed of a second capacitive electrode and a second bias electrode facing each other via a first dielectric layer, and a first bias electrode and a second bias electrode facing each other via a dielectric. And a first external electrode electrically connected to the first capacitive electrode and electrically connected to the second capacitive electrode on the surface of the laminate. A variable having a second external electrode, a third external electrode electrically connected to the first bias electrode, and a fourth external electrode electrically connected to the second bias electrode In the capacitor, at least one of the first capacitor and the second capacitor is a plurality of The amount electrodes and a plurality of bias electrodes to propose a variable capacitor, characterized in that to form a laminated structure superimposed alternately with the dielectric.

According to the first solution, the capacitance can be sufficiently increased by making C ₁ or C ₂ of the equivalent circuit of FIG. 12B a laminated structure, so that the bias voltage can be lowered. It is possible to obtain a variable capacitor that can simultaneously maximize the rate of change in capacitance.

  In the present invention, as a second solution, a variable capacitor is proposed in which the thickness of the dielectric of the variable capacitor is smaller than the thickness of the dielectric between the other electrodes.

  According to the second solving means, since the electric field strength of the variable capacitance section can be increased, the bias voltage can be further lowered.

  When such a variable capacitor is actually operated, it is necessary to separate the first bias electrode or the second bias electrode and the power source of the bias voltage with a high impedance portion such as a resistance element that is DC-conductive. There is. If they are not separated, the signal applied to the capacitor electrode flows to the power supply and does not operate as a variable capacitor. In order to solve this, as a third solution, at least between the first bias electrode and the third external electrode, or between the second bias electrode and the fourth external electrode, A variable capacitor is proposed in which a high-impedance part that conducts in a direct current is provided in either of them.

  The high impedance portion may be formed as an electrode film of an external electrode, or a resistor used for a chip resistor or a coil conductor may be incorporated in the multilayer body in the capacitor.

  According to the present invention, it is possible to obtain a variable capacitor capable of both reducing the bias voltage and maximizing the capacitance change rate.

  An embodiment according to a variable capacitor of the present invention will be described with reference to the drawings. FIG. 1 is an external perspective view of the variable capacitor of the present invention, and FIG. 2 is an exploded view. The variable capacitor 1 has a substantially rectangular parallelepiped dielectric laminate 2 in which a first capacitor electrode 4, a second capacitor electrode 5, a first bias electrode 6, 6a, and a second bias electrode 7, 7a are incorporated. And a first external electrode 3a, a second external electrode 3b, a third external electrode 3c, and a fourth external electrode 3d formed on the four side surfaces of the laminate 2. The first external electrode 3a is formed on the side surface from which the first capacitive electrode 4 is drawn, the second external electrode 3b is formed on the side surface from which the second capacitive electrode 5 is drawn, and the third external electrode 3c. Is formed on the side surface from which the first bias electrodes 6 and 6a are drawn, and the fourth external electrode 3d is formed on the side surface from which the second bias electrodes 7 and 7a are drawn.

The internal structure of the multilayer body 2 is a first capacitor section in which a plurality of first capacitor electrodes 4 and a plurality of first bias electrodes 6 and 6a are alternately stacked via a dielectric (FIG. 12B). and equivalent) in C _1, the second capacitor portion in which a plurality of second capacitor electrodes 5 and a plurality of first bias electrode 7,7a are alternately stacked via the dielectric (see FIG. 12 (b) and C ₂ corresponding to) be composed of a variable capacitance unit that bias electrode 6a and the bias electrode 7a is opposed through the dielectric corresponding to the C _V in (FIG. 12 (b)), the stacking direction vertical to the dielectric layer 2a is laminated as a protective layer. In this case, both the first capacitor unit and the second capacitor unit have a laminated structure, but in the case of the use where the first capacitor unit and the second capacitor unit are directly connected to the reference potential surface, as shown in FIG. Only the capacitor portion may have a laminated structure. In this case, the non-stacked structure is connected to the reference potential surface. In addition, it is desirable that the first capacitance portion and the second capacitance portion have substantially the same capacitance. In addition, the first bias electrode 6a and the second bias electrode 7a forming the variable capacitor section are provided with the first bias electrode 6a and the second bias electrode 7a in order to reduce the stray capacitance generated between the first capacitor electrode 4 and the second capacitor electrode 5. Between one capacitor electrode 4 and the first bias electrode 6a or between the second capacitor electrode 5 and the second bias electrode 7a, the dielectric thickness is increased or a dielectric having a different dielectric constant is inserted. May be.

  Since such a variable capacitor 1 can be manufactured by a general manufacturing process of multilayer electronic components, it can be manufactured at a relatively low cost. Moreover, as a dielectric material which comprises the laminated body 2, if it is film-form ferroelectric materials, such as an organic dielectric material used for a film capacitor other than ceramic dielectric materials, such as barium titanate, for example, it can use suitably. Further, different materials having different characteristics such as dielectric constant may be combined. Furthermore, the conductive material used for the capacitor electrode, the bias electrode, and the external electrode can be appropriately selected in accordance with the manufacturing process and the dielectric material, such as Ag, Cu, Ni, and Pd.

The operating state of the variable capacitor 1 of the present invention is shown in FIG. When a bias voltage is applied from the power source PS to the third external electrode 3c and the fourth external electrode 3d, the dielectric constant of the dielectric between the first bias electrode 6 and the second bias electrode 7 changes, and the capacitance of C _V Changes. Since C ₁ and C ₂ have a laminated structure, they have a sufficiently large capacitance compared to _CV . As a result, the overall capacitance change rate of the variable capacitor 1 approaches the _CV capacitance change rate as much as possible, and can be maximized. In order to reduce the bias voltage, when the thickness of the dielectric between the first bias electrode 6 and the second bias electrode 7 is reduced, it is necessary to increase the capacities of C ₁ and C ₂ . Since the variable capacitor 1 of the present invention can be dealt with by increasing the number of stacked layers of C ₁ and C ₂ , both lowering the bias voltage and maximizing the rate of change in capacitance are compatible within the allowable range of the component size. be able to.

  In FIG. 4, a high impedance portion RE is provided between the power source PS and the third external electrode 3c and the fourth external electrode 3d. This is because, when the variable capacitor 1 of the present invention is actually operated, a signal applied between the first external electrode 3a and the second external electrode 3b flows to the power source PS without the high impedance portion RE. This is because it does not operate as a variable capacitor. This phenomenon becomes more pronounced as the signal frequency increases.

  Therefore, as another embodiment of the variable capacitor of the present invention, a variable capacitor incorporating a high impedance portion as shown in the exploded view of FIG. 5 is proposed. In this variable capacitor, the first bias electrodes 6 and 6a are connected by a through-hole conductor SH, the third external electrode 3c and the through-hole conductor SH are connected by a high impedance portion RE, and the second bias electrode 7 , 7a are connected by a through-hole conductor SH, and the fourth external electrode 3d and the through-hole conductor SH are connected by a high impedance portion RE. Examples of the high impedance portion RE include a resistance material such as ruthenium oxide used for a chip resistor, a meandering conductor, an inductance element such as a coil, and the like that can impart high impedance while conducting in a DC manner. . In the case of a coil, a laminated coil may be used in addition to a planar coil. Further, a resistance material may be used instead of the conductor filled in the through-hole conductor SH.

  Note that the through-hole conductor SH does not have to be provided in the structure shown in FIGS. In this structure, the first bias electrodes 6 and 6a are connected to the dummy electrode DE1, and the dummy electrode DE1 and the third external electrode 3c are connected by the high impedance part RE. The second bias electrodes 7 and 7a are connected to the dummy electrode DE2, and the dummy electrode DE2 and the fourth external electrode 3d are connected by the high impedance part RE. By connecting the wiring connected to the power source of the bias voltage to the third external electrode 3c and the fourth external electrode 3d, the high impedance part RE can be provided between the power source and the bias electrode. Since the dummy electrodes DE1 and DE2 are connected to the bias electrode, for example, when the impedance value is insufficient in the built-in high impedance unit RE, a power source is connected to the dummy electrodes DE1 and DE2 to provide an external high impedance. An element may be interposed.

  Further, as shown in FIG. 7, the high impedance portion RE may be formed using a resistance material as an electrode film of the third external electrode 3c or the fourth external electrode 3d. Thus, by applying a resistance material to the external electrode of the variable capacitor, it becomes possible to operate as a variable capacitor independently without incorporating the high impedance part RE and without using the through-hole conductor SH. Here, an example is shown in which the resistors are formed on both the third external electrode 3c side and the fourth external electrode 3d side, but it is effective if they are formed on either one.

  Although the variable capacitor according to the present invention has been described with respect to the appearance as shown in FIG. 1, the formation position of the external electrode varies depending on how the capacitor electrode and the bias electrode are drawn. For example, as shown in FIG. 8, the external electrodes may be formed at the four corners. Further, as shown in FIG. 9, two external electrodes may be formed on a pair of opposite side surfaces. Further, as shown in FIG. 10, four external electrodes may be formed on one side surface. Further, as shown in FIG. 11, external electrodes may be formed on the upper surface or the lower surface by a method such as drawing through through holes. The arrangement of the first external electrode 3a, the second external electrode 3b, the third external electrode 3c, and the fourth external electrode 3d is not limited to the arrangement shown in each drawing, and can be set as appropriate. . The shape of the dielectric laminate has been described as a substantially rectangular parallelepiped shape in the present embodiment, but may be a shape other than a substantially rectangular parallelepiped shape such as a substantially cylindrical shape as long as it is within the scope of the present invention. .

It is a perspective view which shows the external appearance of the variable capacitor of this invention. It is a disassembled perspective view which shows the internal structure of the variable capacitor of this invention. It is a disassembled perspective view which shows the internal structure of the variable capacitor of this invention. It is a model figure which shows operation | movement of the variable capacitor of this invention. It is a disassembled perspective view which shows the internal structure of the variable capacitor of another example of this invention. (A) is a disassembled perspective view which shows the internal structure of the variable capacitor of another example of this invention, (b) is a perspective view which shows the external appearance. It is a perspective view which shows the external appearance of the variable capacitor of another example of this invention. It is a perspective view which shows the variation of the external appearance of the variable capacitor of this invention. It is a perspective view which shows the variation of the external appearance of the variable capacitor of this invention. It is a perspective view which shows the variation of the external appearance of the variable capacitor of this invention. It is a perspective view which shows the variation of the external appearance of the variable capacitor of this invention. (A) is the model figure of a variable capacitor, (b) is the equivalent circuit schematic.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Variable capacitor 2 Dielectric laminated body 2a Dielectric layer 3a 1st external electrode 3b 2nd external electrode 3c 3rd external electrode 3d 4th external electrode 4 1st capacity electrode 5 2nd capacity electrode 6 , 6a First bias electrode 7, 7a Second bias electrode

Claims (5)

A first capacitor portion composed of a first capacitor electrode and a first bias electrode facing each other through a dielectric in a dielectric laminate, and a second capacitor electrode facing through the dielectric And a second capacitor part constituted by a second bias electrode, and a variable capacitor part constituted by a first bias electrode and a second bias electrode opposed via a dielectric,
A first external electrode electrically connected to the first capacitive electrode; a second external electrode electrically connected to the second capacitive electrode; and A variable capacitor having a third external electrode electrically connected to the bias electrode and a fourth external electrode electrically connected to the second bias electrode;
At least one of the first capacitor section and the second capacitor section has a stacked structure in which a plurality of capacitor electrodes and a plurality of bias electrodes are alternately stacked via a dielectric. A variable capacitor.   2. The variable capacitor according to claim 1, wherein the thickness of the dielectric of the variable capacitance portion is thinner than the thickness of the dielectric between the other electrodes.   A high-impedance portion that conducts a direct current is provided between at least one of the first bias electrode and the third external electrode or between the second bias electrode and the fourth external electrode. The variable capacitor according to claim 1.   The variable capacitor according to claim 3, wherein the high impedance portion forms an electrode film of an external electrode.   The variable capacitor according to claim 3, wherein the high impedance portion is a conductor built in the capacitor.

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