JP2008066643A - Temperature distribution measurement method and adjusting method for heat treatment equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a temperature distribution measurement method for more accurately obtaining the in-plane temperature distribution, when carrying out heat treatment of a semiconductor wafer, and to provide an adjustment method for heat treatment equipment that uses the temperature distribution measurement method. <P>SOLUTION: This temperature distribution measurement method includes a process for introducing dopant impurity to the first surface of a semiconductor wafer 10 for a monitor; a process for forming a conductive film 14 on the semiconductor wafer for monitor at the opposite side of the first surface; a process for carrying out heat treatment on the semiconductor wafer for monitor; a process for measuring sheet resistance at each location of the first face of the semiconductor wafer for a monitor; and a process for calculating the temperature distribution within the face of the semiconductor wafer for the monitor in the heat treatment process, based on the sheet resistance obtained by measurement and a relation between a preliminarily calculated sheet resistance and heat treatment temperature. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a temperature distribution measurement method and a heat treatment apparatus adjustment method.

  In the manufacturing process of a semiconductor device, various processes such as film formation by CVD or the like, heat treatment (annealing), and etching are performed.

  In order to improve the manufacturing yield of the semiconductor device, it is important to make the in-plane temperature distribution of the semiconductor wafer uniform during the heat treatment.

  The following techniques have been proposed as techniques for measuring the in-plane temperature distribution of a semiconductor wafer.

  That is, Patent Document 1 includes a step of introducing impurities into the surface of the monitor semiconductor wafer, a heat treatment step of heat-treating the monitor semiconductor wafer, and a step of measuring the sheet resistance at each location on the surface of the monitor semiconductor wafer. A method for measuring a temperature of a semiconductor wafer for monitoring, comprising: obtaining the sheet resistance and obtaining a temperature distribution of the monitoring semiconductor wafer in the heat treatment step based on a relationship between the sheet resistance obtained in advance and the heat treatment temperature is disclosed. Yes.

Further, in Patent Document 2, a process of heat-treating a monitor semiconductor wafer into which impurities are introduced, a process of measuring sheet resistance at a plurality of locations on the surface of the monitor semiconductor wafer, and the obtained sheet resistance were obtained in advance. There is disclosed a temperature measurement method including a step of obtaining a temperature of a monitoring semiconductor wafer in a heat treatment step based on a relationship between sheet resistance and temperature.
JP 2000-208524 A JP 2004-39776 A

  However, the in-plane temperature distribution of the monitoring semiconductor wafer obtained by the temperature measuring method proposed in Patent Documents 1 and 2 may be significantly different from the in-plane temperature distribution when an actual semiconductor wafer is heat-treated. For example, when manufacturing an FRAM, after forming a lower electrode and a capacitor dielectric film on a semiconductor wafer, heat treatment is performed to improve the crystallinity of the capacitor dielectric film. The in-plane temperature distribution of the semiconductor wafer when heat-treating the capacitor dielectric film or the like formed on the conductive film is significantly different from the in-plane temperature distribution of the monitoring semiconductor wafer required by the proposed temperature measurement method. Therefore, based on the measurement result of the in-plane temperature distribution of the monitoring semiconductor wafer obtained by the proposed temperature measurement method, each output of the heating lamp group of the heat treatment apparatus so as to obtain a uniform in-plane temperature distribution. When adjusting the above, there is a case where a uniform in-plane temperature distribution cannot be obtained when the semiconductor wafer is actually heat-treated.

  An object of the present invention is to provide a temperature distribution measuring method capable of more accurately obtaining an in-plane temperature distribution when a semiconductor wafer is heat-treated, and a method of adjusting a heat treatment apparatus using the temperature distribution measuring method.

  According to one aspect of the present invention, the step of introducing a dopant impurity into the first surface of the monitoring semiconductor wafer and the second surface of the monitoring semiconductor wafer opposite to the first surface are electrically conductive. A step of forming a film; a step of heat-treating the semiconductor wafer for monitoring; a step of measuring sheet resistance at each location on the first surface of the semiconductor wafer for monitoring; and a sheet obtained by measurement A temperature distribution measuring method comprising: a step of determining an in-plane temperature distribution of the monitoring semiconductor wafer in the heat treatment step based on a resistance and a relationship between a sheet resistance and a heat treatment temperature obtained in advance. Provided.

  According to another aspect of the present invention, a dopant impurity is introduced into the first surface of the monitoring semiconductor wafer, and the second surface of the monitoring semiconductor wafer on the opposite side of the first surface. In addition, a step of forming a conductive film, a step of performing a heat treatment on the monitoring semiconductor wafer by a heating lamp group of a heat treatment apparatus, and a sheet resistance at each location on the first surface of the monitoring semiconductor wafer A step of measuring, a step of obtaining a temperature distribution in the surface of the semiconductor wafer for monitoring in the heat treatment step, based on a relationship between the sheet resistance obtained by the measurement, the sheet resistance obtained in advance and the heat treatment temperature, Adjusting the output of each of the heating lamp groups so that the temperature distribution in the surface of the semiconductor wafer for monitoring becomes uniform. It is subjected.

  According to the present invention, an in-plane temperature distribution of a monitoring semiconductor wafer during heat treatment is obtained using a monitoring semiconductor wafer in which a dopant impurity is introduced on one surface and a conductive film is formed on the other surface. Therefore, the in-plane temperature distribution of the semiconductor wafer when heat-treating the semiconductor wafer on which the conductive film or the like is formed can be accurately obtained.

  Then, the output of each heating lamp constituting the heating lamp group of the heat treatment apparatus is adjusted so that the in-plane temperature distribution in the monitoring semiconductor wafer on which the conductive film or the like is formed is uniform, and the heat treatment apparatus thus adjusted If heat treatment is performed on a semiconductor wafer on which a conductive film or the like is formed using, the in-plane temperature distribution of the semiconductor wafer during the heat treatment can be made uniform.

  FIG. 5 is a graph showing a temperature change of each part when heat treatment is performed on a bare semiconductor wafer, specifically, a semiconductor wafer on which a conductive film or the like is not formed. FIG. 6 is a graph showing the temperature change of each part when heat treatment is performed on a semiconductor wafer on which a conductive film or the like is formed. More specifically, FIG. 6 shows a semiconductor wafer in which a silicon oxide film having a thickness of 100 nm, a Ti film having a thickness of 20 nm, a Pt film having a thickness of 180 nm, and a PZT film having a thickness of 200 nm are sequentially formed on one surface. It is a graph which shows the temperature change of each part at the time of heat-processing with respect to.

  5A and 6, the horizontal axis indicates time, and the vertical axis indicates temperature. The numbers in FIGS. 5A and 6 correspond to the numbers of the measurement points shown in FIG. A thermocouple was used as a temperature sensor for measuring the temperature of each part.

  As can be seen from FIG. 5A, in the bare semiconductor wafer, the temperature of the semiconductor wafer hardly decreases after the temperature of the semiconductor wafer has increased.

  On the other hand, as can be seen from FIG. 6, in a semiconductor wafer having a conductive film or the like formed on one surface, the temperature of the semiconductor wafer gradually decreases after the temperature of the semiconductor wafer increases.

  Further, as can be seen from FIG. 5A, in the bare semiconductor wafer, the peripheral portion tends to increase in temperature and the central portion tends not to increase in temperature.

  On the other hand, as can be seen from FIG. 6, in the semiconductor wafer on which one conductive film or the like is formed, the peripheral portion is unlikely to increase in temperature, and the central portion tends to increase in temperature.

  The reason why the temperature change and in-plane temperature distribution during the heat treatment are greatly different between the bare semiconductor wafer and the semiconductor wafer on which the conductive film or the like is formed is considered to be as follows.

  That is, in the case of a semiconductor wafer having a conductive film or the like formed on one surface, infrared light introduced into the semiconductor wafer from the other surface side is reflected by the conductive film or the like and returned to the semiconductor wafer. Further, in the case of a bare semiconductor wafer, there is no conductive film that reflects infrared rays introduced into the semiconductor wafer.

  In the case of a semiconductor wafer on which a conductive film is formed, the conductive film increases the thermal conductivity, whereas in the case of a bare semiconductor wafer, such a conductive film does not exist.

  Due to such structural differences, it is considered that the temperature change and in-plane temperature distribution during heat treatment are greatly different between a bare semiconductor wafer and a semiconductor wafer having a conductive film formed on one surface.

  FIG. 7 is a diagram showing the in-plane distribution of the sheet resistance of one surface of the semiconductor wafer when heat treatment is performed on the semiconductor wafer doped with boron on one surface.

  FIG. 8 is a graph showing the in-plane distribution of the sheet resistance of one surface of a semiconductor wafer when heat treatment is performed on a semiconductor wafer in which boron is doped on one surface and a conductive film is formed on the other surface. It is. On the other surface of the semiconductor wafer, a conductive film was formed by sequentially forming a 20 nm thick Ti film and a 180 nm thick Pt film. These Ti film and Pt film correspond to the lower electrode of the ferroelectric capacitor.

  As can be seen from FIG. 7, when heat treatment is performed on a semiconductor wafer doped with boron on one surface, the sheet resistance at the central portion becomes relatively high and the sheet resistance at the peripheral portion becomes relatively low.

  On the other hand, as can be seen from FIG. 8, when heat treatment is performed on a semiconductor wafer in which boron is doped on one surface and a conductive film is formed on the other surface, the sheet resistance at the peripheral portion becomes relatively high. The sheet resistance at the center is relatively low.

  Thus, when heat treatment is performed on a semiconductor wafer doped with boron on one surface, and heat treatment is performed on a semiconductor wafer doped with boron on one surface and a conductive film formed on the other surface. In this case, the in-plane distribution of the sheet resistance is remarkably different from each other.

  As can be seen from these, the output of each of the heating lamp groups of the heat treatment apparatus so as to obtain a uniform in-plane temperature distribution based on the measurement result of the in-plane temperature distribution obtained by the proposed temperature measurement method. When a semiconductor wafer on which a conductive film or the like is formed is heat treated using such a heat treatment apparatus, the in-plane temperature distribution of the semiconductor wafer becomes non-uniform.

  As a result of intensive studies, the inventors of the present application have come up with the idea of obtaining an in-plane temperature distribution using a monitoring semiconductor wafer in which a dopant impurity is introduced on one surface and a conductive film is formed on the other surface. If such a monitoring semiconductor wafer is used, it is possible to accurately obtain the in-plane temperature distribution of the semiconductor wafer when the semiconductor wafer on which the conductive film or the like is formed is heat-treated. Then, the output of each heating lamp group of the heat treatment apparatus is adjusted so that the in-plane temperature distribution in the monitoring semiconductor wafer on which the conductive film or the like is formed is uniform, and the conductive film is formed using the heat treatment apparatus thus adjusted. If the heat treatment is performed on the semiconductor wafer formed with the above, it becomes possible to make the in-plane temperature distribution of the semiconductor wafer uniform when performing the heat treatment.

[One Embodiment]
A temperature distribution measuring method according to an embodiment of the present invention and a method for adjusting a heat treatment apparatus using the temperature distribution measuring method will be described with reference to FIGS. 1 and 2 are process cross-sectional views illustrating the temperature distribution measuring method according to the present embodiment. 3 and 4 are graphs showing the relationship between the heat treatment temperature and the sheet resistance.

  First, a semiconductor wafer (monitoring semiconductor wafer) 10 is prepared. As the monitoring semiconductor wafer 10, a first conductivity type semiconductor wafer is used. Specifically, for example, an N-type silicon wafer 10 is prepared. The specific resistance of the silicon wafer 10 is, for example, about 15 ± 5Ω / □.

Next, a dopant impurity of the second conductivity type is introduced into the first surface of the monitoring semiconductor wafer 10 by ion implantation. For example, boron is used as the dopant impurity. The reason why boron is used as the dopant impurity is that the sensitivity is improved in a temperature region of 800 ° C. or lower, which is the process temperature after forming the conductive film 14. The ion implantation conditions are, for example, about 50 keV. The dose amount of the dopant impurity is, for example, not less than the critical dose amount. Here, the critical dose is a dose that can be activated in a semiconductor wafer. Here, the dose amount of the dopant impurity is set to, for example, about 1 × 10 ¹⁴ atoms / cm ² . To prevent channeling during ion implantation, the tilt angle is set to 7 degrees and the twist angle is set to 22 degrees, for example.

  Thus, as shown in FIG. 1A, the impurity implantation region 12 is formed on the first surface of the monitoring semiconductor wafer 10.

  Next, the conductive film 14 is formed on the second surface of the monitoring semiconductor wafer 10, that is, on the surface opposite to the first surface of the monitoring semiconductor wafer 10 by sputtering, for example (FIG. 1 ( b)). As the conductive film 14, a conductive film made of, for example, a metal or a metal compound is formed. Here, a Ti film having a thickness of 20 nm, for example, is formed as the conductive film 14. The film forming temperature of the conductive film 14 is, for example, 150 ° C. In an actual semiconductor device, the conductive film 14 corresponds to, for example, a lower electrode of a capacitor.

  In this embodiment, the Ti film is used as the material of the conductive film 14 because the Ti film is relatively easy to remove and the monitoring semiconductor wafer 10 can be easily regenerated.

  The conductive film 14 is formed on the second surface opposite to the first surface where the impurity implanted region 12 is formed because the conductive film 14 is formed on the first surface where the impurity implanted region 12 is formed. In this case, the impurity implantation region 12 is covered with the conductive film 14, and the sheet resistance of the monitoring semiconductor wafer 10 cannot be measured.

  Thus, the second semiconductor impurity implantation region 12 is formed on the first surface, and the monitoring semiconductor wafer 10 having the conductive film 14 formed on the second surface is formed.

  For example, when manufacturing a FRAM (Ferroelectric Random Access Memory), a laminated film of, for example, a Ti film and a Pt film is used as a material for the lower electrode. In this embodiment, the second semiconductor wafer 10 for monitoring is used. Only the Ti film is formed on the surface. In the present embodiment, the reason why only the Ti film is formed on the second surface of the monitoring semiconductor wafer 10 is as follows.

  9 to 19 are diagrams showing the in-plane distribution of the sheet resistance of the heat-treated semiconductor wafer.

  9 and 10, dopant impurities are introduced into the first surface of the semiconductor wafer, and a 20 nm thick Ti film and a 180 nm thick Pt film are sequentially stacked on the second surface of the semiconductor wafer. The in-plane distribution of the sheet resistance when the heat treatment for 90 seconds is performed is shown. FIG. 11 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 20 nm thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 573 ° C. for 90 seconds. The in-plane distribution of resistance is shown. FIG. 12 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 50 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 573 ° C. for 90 seconds. The in-plane distribution of resistance is shown. FIG. 13 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 100 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 573 ° C. for 90 seconds. The in-plane distribution of resistance is shown. FIG. 14 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 200 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 573 ° C. for 90 seconds. The in-plane distribution of resistance is shown.

  As can be seen from FIGS. 9 to 14, when the heat treatment conditions are relatively low and for a long time, only the Ti film is formed on the second surface of the semiconductor wafer, and Ti is formed on the second surface of the semiconductor wafer. There is no significant difference in the in-plane distribution of the sheet resistance between the case where the laminated film of the film and the Pt film is formed.

  In FIG. 15, dopant impurities are introduced into the first surface of the semiconductor wafer, and a 20 nm thick Ti film and a 180 nm thick Pt film are sequentially stacked on the second surface of the semiconductor wafer, at 708 ° C. for 20 seconds. The in-plane distribution of sheet resistance when the heat treatment is performed is shown. FIG. 16 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 20 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 708 ° C. for 20 seconds. The in-plane distribution of resistance is shown. FIG. 17 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 50 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 708 ° C. for 20 seconds. The in-plane distribution of resistance is shown. FIG. 18 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a Ti film with a thickness of 100 nm is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 708 ° C. for 20 seconds. The in-plane distribution of resistance is shown. FIG. 19 shows a sheet when dopant impurities are introduced into the first surface of the semiconductor wafer, only a 200 nm-thick Ti film is formed on the second surface of the semiconductor wafer, and heat treatment is performed at 708 ° C. for 20 seconds. The in-plane distribution of resistance is shown.

  As can be seen from FIGS. 15 to 19, even when the heat treatment conditions are relatively high temperature and for a short time, only when the Ti film is formed on the second surface of the semiconductor wafer and when the Ti surface is formed on the second surface of the semiconductor wafer. There is no significant difference in the in-plane distribution of the sheet resistance between the case where the laminated film of the film and the Pt film is formed.

  Therefore, the in-plane distribution of the sheet resistance when only the Ti film is formed on the second surface of the semiconductor wafer and the heat treatment is performed, and the lamination of the Ti film and the Pt film on the second surface of the semiconductor wafer. It can be seen that there is no significant difference between the in-plane distribution of the sheet resistance when the film is formed and heat-treated.

  By the way, when the Pt film is formed on the monitoring semiconductor wafer 10, it is not easy to regenerate the monitoring semiconductor wafer 10.

  For this reason, in this embodiment, only the Ti film is formed on the second surface of the monitoring semiconductor wafer 10.

  Here, the case where a 20 nm Ti film is formed as the conductive film 14 has been described as an example, but the thickness of the Ti film is not limited to 20 nm. However, when the thickness of the Ti film is less than 10 nm, the infrared reflectance by the conductive film 14 is significantly reduced, and the heat conduction by the conductive film 14 is also significantly reduced. Then, the in-plane temperature distribution when the semiconductor wafer on which the lower electrode or the like is formed is heat-treated and the in-plane temperature distribution when the monitoring semiconductor wafer 10 is heat-treated are significantly different. For this reason, when a Ti film is used as the conductive film 14, the thickness of the Ti film is desirably 10 nm or more.

  Next, the monitoring semiconductor wafer 10 is introduced into the chamber of the heat treatment apparatus. As such a heat treatment apparatus, for example, a lamp annealing apparatus is used. As such a lamp annealing device, for example, a rapid thermal annealing (RTA) device is used. When the monitoring semiconductor wafer 10 is placed in the chamber of the heat treatment apparatus, the second surface of the monitoring semiconductor wafer 10, that is, the surface on which the conductive film 14 is formed is on the front side. The semiconductor wafer 10 is mounted on a mounting table (not shown). In other words, the monitoring semiconductor wafer 10 is mounted on the mounting table such that the first surface of the monitoring semiconductor wafer 10 faces the mounting table. Heat lamp groups 22a and 22b composed of a plurality of heat lamps 20a and 20b are respectively positioned above and below the monitoring semiconductor wafer 10 (see FIG. 2A).

  A temperature sensor (not shown) is connected to a location on the monitoring semiconductor wafer 10. As such a temperature sensor, for example, a contact-type temperature sensor using a thermocouple is used.

  Next, heat treatment is performed on the monitoring semiconductor wafer 10. The atmosphere for the heat treatment is an inert atmosphere such as Ar gas. When heat treatment is performed, boron atoms are replaced with silicon atoms at a location where the crystal is broken by ion implantation, free electrons are generated, and the impurity implanted region 12 is activated. The amount of free electrons generated depends on the amount of heat treatment. Therefore, by measuring the sheet resistance of each part of the first surface of the monitoring semiconductor wafer 10, the amount of heat treatment in each part of the monitoring semiconductor wafer 10, that is, the heat treatment temperature in each part of the monitoring semiconductor wafer 10 is obtained. Is possible.

  When heat-treating the monitoring semiconductor wafer 10, an absolute temperature in a part of the monitoring semiconductor wafer 10 is measured using a temperature sensor that is in contact with at least a part of the monitoring semiconductor wafer 10.

  In the present embodiment, the heat treatment is performed with the second surface of the monitoring semiconductor wafer 10 facing the front side for the following reason.

  That is, for example, when a heat treatment is performed on a semiconductor wafer on which a conductive film to be a lower electrode of a capacitor and a capacitor dielectric film are formed, the heat treatment is performed with the surface on which the conductive film is formed facing up. Is called.

  The conductive film 14 formed on the second surface of the monitoring semiconductor wafer 10 corresponds to the lower electrode of the capacitor.

  For this reason, if the heat treatment is performed on the monitoring semiconductor wafer 10 with the second surface faced up, the same conditions as in the case of performing the heat treatment on an actual semiconductor wafer on which a conductive film or the like is formed are obtained. The monitoring semiconductor wafer 10 can be heat-treated.

  For this reason, in this embodiment, the heat treatment is performed with the second surface of the monitoring semiconductor wafer 10 faced up.

  When heat treatment is performed on the monitoring semiconductor wafer 10, the impurity implantation region 12 formed on the first surface of the monitoring semiconductor wafer 10 becomes an impurity active region (impurity diffusion region) 12a (FIG. 2B). reference).

  Next, the sheet resistance of each part of the first surface of the monitoring semiconductor wafer 10 is measured.

  Next, the in-plane temperature distribution of the monitoring semiconductor wafer 10 in the heat treatment step is obtained based on the relationship between the heat treatment temperature and the sheet resistance obtained in advance.

  The relationship between the heat treatment temperature and the sheet resistance is obtained in advance as follows.

  FIG. 3 is a graph (part 1) showing the relationship between the heat treatment temperature and the sheet resistance. The horizontal axis indicates the heat treatment temperature, and the vertical axis indicates the sheet resistance. In FIG. 3, the relationship between the heat treatment temperature and the sheet resistance in the range of 585 ° C. ± 30 ° C. was obtained because the heat treatment temperature when the FRAM capacitor dielectric film was heat treated at a relatively low temperature was about 585 ° C., for example. This is because.

  As can be seen from FIG. 3, the relationship between the heat treatment temperature and the sheet resistance can be linearly approximated within a certain temperature range. As can be seen from FIG. 3, within the range of 555 ° C. to 615 ° C., for example, the sheet resistance decreases by, for example, about 18Ω / □ every time the heat treatment temperature increases by 1 ° C.

  FIG. 4 is a graph (part 2) showing the relationship between the heat treatment temperature and the sheet resistance. The horizontal axis indicates the heat treatment temperature, and the vertical axis indicates the sheet resistance. In FIG. 4, the relationship between the heat treatment temperature and the sheet resistance in the range of 725 ° C. ± 50 ° C. is obtained because the heat treatment temperature when the FRAM capacitor dielectric film is heat treated at a relatively high temperature is, for example, about 725 ° C. This is because.

  As can be seen from FIG. 4, the relationship between the heat treatment temperature and the sheet resistance can be linearly approximated within a certain temperature range. As can be seen from FIG. 4, for example, within a range of 675 ° C. to 775 ° C., the sheet resistance decreases by about 5Ω / □ every time the heat treatment temperature increases by 1 ° C.

  Thus, the relationship between the heat treatment temperature and the sheet resistance is obtained in advance.

  Next, based on the sheet resistance obtained by measuring each part of the monitoring semiconductor wafer 10 and the relationship between the heat treatment temperature and the sheet resistance obtained in advance, the in-plane temperature distribution of the monitoring semiconductor wafer 10 in the heat treatment step Is required.

  As described above, when the heat treatment is performed, an absolute temperature at a certain position of the monitoring semiconductor wafer 10 is obtained by a temperature sensor connected to the certain position of the monitoring semiconductor wafer 10. Therefore, based on the sheet resistance obtained by measuring each part of the monitoring semiconductor wafer 10, the relationship between the heat treatment temperature and the sheet resistance obtained in advance, and the absolute temperature measured by the temperature sensor, An absolute in-plane temperature distribution in the semiconductor wafer 10 is obtained.

  Next, the heat treatment apparatus is adjusted so that the in-plane temperature distribution of the monitoring semiconductor wafer 10 is uniform. As described above, the heat treatment apparatus is provided with the heating lamp groups 22a and 22b (see FIG. 2A) for heating the semiconductor wafer. By appropriately adjusting the outputs of the heating lamps 20a and 20b constituting the heating lamp groups 22a and 22b, the in-plane temperature distribution of the monitoring semiconductor wafer 10 during the heat treatment can be controlled. It is possible to make the in-plane temperature distribution of the monitoring semiconductor wafer 10 uniform. In this way, the heat treatment apparatus is adjusted so that the in-plane temperature distribution of the monitoring semiconductor wafer 10 is uniform.

  If an actual semiconductor wafer on which a conductive film or the like is formed is heat-treated using the heat treatment apparatus thus adjusted, the in-plane temperature distribution of the semiconductor wafer during the heat treatment can be made uniform.

  As described above, according to the present embodiment, the monitoring semiconductor wafer 10 when the heat treatment is performed using the monitoring semiconductor wafer 10 in which the dopant impurity is introduced on one surface and the conductive film is formed on the other surface. Therefore, the in-plane temperature distribution of the semiconductor wafer when the semiconductor wafer on which the conductive film or the like is formed is heat-treated can be accurately obtained.

  Then, the output of each heating lamp constituting the heating lamp group of the heat treatment apparatus is adjusted so that the in-plane temperature distribution in the monitoring semiconductor wafer 10 on which the conductive film or the like is formed is uniform, and the heat treatment thus adjusted is adjusted. If heat treatment is performed on a semiconductor wafer on which a conductive film or the like is formed using an apparatus, the in-plane temperature distribution of the semiconductor wafer during the heat treatment can be made uniform.

(Modification)
Next, a temperature distribution measurement method and a heat treatment apparatus adjustment method according to a modification of the present embodiment will be described with reference to FIGS. 20 and 21 are process cross-sectional views illustrating a temperature distribution measuring method according to this modification.

  The temperature distribution measurement method and the heat treatment apparatus adjustment method according to this modification are mainly characterized in that a dielectric film 16 is further formed on the conductive film 14 formed on the second surface of the monitoring semiconductor wafer 10. .

  First, the steps from introducing a dopant impurity into the first surface of the monitoring semiconductor wafer 10 to forming the conductive film 14 on the second surface of the monitoring semiconductor wafer 10 are shown in FIGS. Since the method is the same as the temperature distribution measuring method according to the first embodiment described above using 1 (b), description thereof will be omitted.

Next, the dielectric film 16 is formed on the conductive film 14 formed on the second surface of the monitoring semiconductor wafer 10. The dielectric film 16 corresponds to, for example, a capacitor dielectric film in an actual semiconductor device. As the dielectric film 16, for example, a Pb (Zr, Ti) O ₃ film (PZT film) which is a ferroelectric film is formed.

  Thus, the conductive film 14 and the dielectric film 16 are formed on the second surface of the monitoring semiconductor wafer 10.

  In this modification, not only the conductive film 14 but also the dielectric film 16 is formed on the second surface of the monitoring semiconductor wafer 10 when the configuration of the monitoring semiconductor wafer 10 and the capacitor dielectric film are heat-treated. This is to more closely approximate the configuration of the semiconductor wafer.

  As a result, the in-plane temperature distribution of the semiconductor wafer when the capacitor dielectric film is heat-treated can be obtained more accurately using the monitoring semiconductor wafer 10.

  Thereafter, the steps from the introduction of the monitoring semiconductor wafer 10 into the chamber of the heat treatment apparatus to the adjustment of the heat treatment apparatus are the same as the temperature distribution measuring method described above with reference to FIGS. 2 (a) and 2 (b). Since it is the same as the adjustment method of a heat processing apparatus, description is abbreviate | omitted.

  Thus, the dielectric film 16 may be further formed on the conductive film 14 formed on the second surface of the monitoring semiconductor wafer 10. According to this modification, the in-plane temperature distribution of the semiconductor wafer when the capacitor dielectric film is heat-treated can be obtained more accurately using the monitoring semiconductor wafer 10.

[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.

  For example, in the above embodiment, the case where a Ti film is formed as the conductive film 14 has been described as an example. However, the conductive film 14 is not limited to the Ti film. For example, V, Cr, Mn, Fe, Co, Ni, Cu, Zn, Zr, Nb, Mo, Tc, Ru, Rh, Pd, Ag, Hf, Ta, W, Re, Os, Ir, Pt, or A metal such as Au may be used as the material of the conductive film 14.

In the above embodiment, the case where a metal film, specifically, a Ti film is used as the conductive film 14 has been described as an example. However, the conductive film 14 is not limited to the metal film. For _{example, TiSi, TiSi 2, ZrSi,} ZrSi 2, HfSi, HfSi 2, VSi 2, NbSi 2, TaSi 2, CrSi, CrSi 2, MoSi 2, WSi 2, MnSi, MnSi 2, TcSi, TcSi 2, ReSi, ReSi ₂ , FeSi, FeSi ₂ , RuSi, OsSi, CoSi, CoSi ₂ , RhSi, RhSi ₂ , IrSi, IrSi ₂ , NiSi, NiSi ₂ , PdSi, or a metal compound (silicide) such as PtSi, and the material of the conductive film 14 It may be used as

In the above embodiment, the case where a metal film, specifically, a Ti film is used as the conductive film 14 has been described as an example. However, the conductive film 14 is not limited to the metal film. For example, Cr ₂ N, Cu ₃ N, Fe ₄ N, Fe ₃ N, LaN, Li ₃ N, Mg ₃ N ₂ , Mo ₂ N, NbN, TaN, TiN, W ₂ N, WN ₂ , YN, or A metal compound (nitride) such as ZrN may be used as the material of the conductive film 14.

  In the above embodiment, the case where an N-type semiconductor wafer is used as the monitoring semiconductor wafer 10 has been described as an example. However, the conductivity type of the monitoring semiconductor wafer 10 is not limited to the N-type, but a P-type. A semiconductor wafer may be used.

  Moreover, in the said embodiment, although boron was used as a dopant impurity introduce | transduced into the 1st surface of the semiconductor wafer 10 for a monitor, this dopant impurity is not limited to boron. A dopant impurity having a conductivity type different from that of the monitoring semiconductor wafer 10 can be appropriately used.

  In the above embodiment, the case where a lamp annealing apparatus, more specifically, a short-time annealing apparatus is used as the heat treatment apparatus used when performing the heat treatment has been described as an example, but the heat treatment apparatus used when performing the heat treatment is described. Is not limited to this. The principle of the present invention can be widely applied when a semiconductor wafer is heat-treated in a relatively short time using a heating means.

  In the above-described embodiment, the case where a lamp annealing apparatus, more specifically, a short-time annealing apparatus is used as the heat treatment apparatus used for the heat treatment has been described as an example. However, the heat treatment apparatus is limited to a dedicated heat treatment apparatus. Is not to be done. For example, an MOCVD apparatus having both a film forming function and a heat treatment function is also included in the heat treatment apparatus.

As described above in detail, the features of the present invention are summarized as follows.
(Appendix 1)
Introducing dopant impurities into the first surface of the monitoring semiconductor wafer;
Forming a conductive film on the second surface of the monitoring semiconductor wafer opposite to the first surface;
Heat-treating the monitoring semiconductor wafer;
Measuring sheet resistance at each location on the first surface of the monitoring semiconductor wafer;
A sheet resistance obtained by the measurement, and a step of obtaining an in-plane temperature distribution of the monitoring semiconductor wafer in the heat treatment step based on a relationship between the sheet resistance obtained in advance and the heat treatment temperature. Temperature distribution measurement method.
(Appendix 2)
The temperature distribution measuring method according to claim 1,
The temperature distribution measuring method, wherein the conductive film is made of a metal or a metal compound.
(Appendix 3)
In the temperature distribution measuring method according to claim 1 or 2,
In the step of performing the heat treatment, the monitoring semiconductor wafer is placed on the mounting table so that the first surface of the monitoring semiconductor wafer faces the mounting table, and the monitoring semiconductor wafer A temperature distribution measuring method characterized by performing heat treatment.
(Appendix 4)
In the temperature distribution measuring method according to any one of claims 1 to 3,
In the step of performing the heat treatment, a heat distribution is performed on the monitoring semiconductor wafer by a heating lamp.
(Appendix 5)
The temperature distribution measuring method according to claim 4, wherein
In the step of performing the heat treatment, a heat treatment is performed on the monitoring semiconductor wafer by a short-time annealing method.
(Appendix 6)
In the temperature distribution measuring method according to any one of claims 1 to 5,
The method for measuring temperature distribution, further comprising a step of forming a dielectric film on the conductive film after the step of forming the conductive film and before the step of performing the heat treatment.
(Appendix 7)
In the temperature distribution measuring method according to any one of claims 1 to 6,
The temperature distribution measurement method, wherein the dopant impurity is boron.
(Appendix 8)
In the temperature distribution measuring method according to any one of claims 1 to 7,
The conductive film is a Ti film. A temperature distribution measuring method, wherein:
(Appendix 9)
The temperature distribution measuring method according to claim 8,
The temperature distribution measuring method, wherein the thickness of the Ti film is 10 nm or more.
(Appendix 10)
In the temperature distribution measuring method according to any one of claims 1 to 9,
In the heat treatment step, a temperature sensor connected to a part of the monitoring semiconductor wafer is used to measure the temperature of the part of the monitoring semiconductor wafer,
In the step of obtaining the temperature distribution of the monitoring semiconductor wafer, the sheet resistance obtained by the measurement, the relationship between the sheet resistance obtained in advance and the heat treatment temperature, and the monitoring semiconductor wafer measured by the temperature sensor An absolute temperature distribution in the surface of the monitoring semiconductor wafer in the heat treatment step is obtained based on a part of the temperature.
(Appendix 11)
Introducing dopant impurities into the first surface of the monitoring semiconductor wafer;
Forming a conductive film on the second surface of the monitoring semiconductor wafer opposite to the first surface;
A step of performing heat treatment on the monitoring semiconductor wafer by a heating lamp group of a heat treatment apparatus;
Measuring sheet resistance at each location on the first surface of the monitoring semiconductor wafer;
Based on the sheet resistance obtained by the measurement, and the relationship between the sheet resistance and the heat treatment temperature obtained in advance, a step of obtaining the in-plane temperature distribution of the monitoring semiconductor wafer in the heat treatment step;
Adjusting the output of each of the heating lamp groups so that the temperature distribution in the surface of the semiconductor wafer for monitoring becomes uniform.

It is process sectional drawing (the 1) which shows the temperature distribution measuring method by one Embodiment of this invention. It is process sectional drawing (the 2) which shows the temperature distribution measuring method by one Embodiment of this invention. It is a graph (the 1) which shows the relationship between heat processing temperature and sheet resistance. It is a graph (the 2) which shows the relationship between heat processing temperature and sheet resistance. It is a graph which shows the temperature change of each part at the time of heat-processing with respect to the semiconductor wafer in which the electrically conductive film etc. are not formed. It is a graph which shows the temperature change of each part at the time of heat-processing with respect to the semiconductor wafer in which the electrically conductive film etc. were formed. It is a figure which shows the in-plane distribution of the sheet resistance of a semiconductor wafer when heat-treating with respect to the semiconductor wafer which doped boron on one side. It is a graph which shows in-plane distribution of the sheet resistance of a semiconductor wafer when heat-treating with respect to the semiconductor wafer which doped boron on one side and formed the electrically conductive film on the other side. It is FIG. (1) which shows the in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (2) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. FIG. 10 is a third diagram illustrating an in-plane distribution of sheet resistance of a heat-treated semiconductor wafer. It is FIG. (4) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (5) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (6) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. FIG. 11 is a diagram (No. 7) illustrating an in-plane distribution of sheet resistance of a heat-treated semiconductor wafer. It is FIG. (The 8) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (9) which shows in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (10) which shows the in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is FIG. (11) which shows the in-plane distribution of the sheet resistance of the heat-processed semiconductor wafer. It is process sectional drawing (the 1) which shows the temperature distribution measuring method by the modification of one Embodiment of this invention. It is process sectional drawing (the 2) which shows the temperature distribution measuring method by the modification of one Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Monitor semiconductor wafer 12 ... Impurity implantation area | region 12a ... Impurity active region 14 ... Conductive film 16 ... Dielectric film

Claims (5)

Introducing dopant impurities into the first surface of the monitoring semiconductor wafer;
Forming a conductive film on the second surface of the monitoring semiconductor wafer opposite to the first surface;
Heat-treating the monitoring semiconductor wafer;
Measuring sheet resistance at each location on the first surface of the monitoring semiconductor wafer;
A sheet resistance obtained by the measurement, and a step of obtaining an in-plane temperature distribution of the monitoring semiconductor wafer in the heat treatment step based on a relationship between the sheet resistance obtained in advance and the heat treatment temperature. Temperature distribution measurement method. The temperature distribution measuring method according to claim 1,
The temperature distribution measuring method, wherein the conductive film is made of a metal or a metal compound. In the temperature distribution measuring method according to claim 1 or 2,
In the step of performing the heat treatment, a heat distribution is performed on the monitoring semiconductor wafer by a heating lamp. In the temperature distribution measuring method according to any one of claims 1 to 3,
In the heat treatment step, a temperature sensor connected to a part of the monitoring semiconductor wafer is used to measure the temperature of the part of the monitoring semiconductor wafer,
In the step of obtaining the temperature distribution of the monitoring semiconductor wafer, the sheet resistance obtained by the measurement, the relationship between the sheet resistance obtained in advance and the heat treatment temperature, and the monitoring semiconductor wafer measured by the temperature sensor An absolute temperature distribution in the surface of the monitoring semiconductor wafer in the heat treatment step is obtained based on a part of the temperature. Introducing dopant impurities into the first surface of the monitoring semiconductor wafer;
Forming a conductive film on the second surface of the monitoring semiconductor wafer opposite to the first surface;
A step of performing heat treatment on the monitoring semiconductor wafer by a heating lamp group of a heat treatment apparatus;
Measuring sheet resistance at each location on the first surface of the monitoring semiconductor wafer;
Based on the sheet resistance obtained by the measurement, and the relationship between the sheet resistance and the heat treatment temperature obtained in advance, a step of obtaining the in-plane temperature distribution of the monitoring semiconductor wafer in the heat treatment step;
Adjusting the output of each of the heating lamp groups so that the temperature distribution in the surface of the semiconductor wafer for monitoring becomes uniform.

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