JP2008066063A - Plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high definition plasma display panel realizing stability of address discharge without increasing capacitive electric power unnecessarily, and capable of displaying an image with rich display gradation. <P>SOLUTION: In the plasma display panel, address discharge is carried out divided in first half and second half after resetting discharge, and sustaining discharge is carried out to all sub-pixels to which the first half and the second half address discharges are performed. The areas Sye, Sae of the electrodes Ye, 10 contributing to address discharge of the second half are constituted to be larger than the areas Syo, Sao of the electrodes Yo, 10 contributing to the address discharge of the first half. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a plasma display panel, and more particularly to a plasma display panel that performs address discharge in the first half and the second half.

  FIG. 1 is a diagram schematically showing an example of a conventional plasma display panel (hereinafter also referred to as PDP), and shows a typical panel structure of an AC type PDP.

  As shown in FIG. 1, in the front substrate 1, an X electrode (sustain electrode: display electrode) 3 and a Y electrode (scan electrode: display electrode) 4 are formed on a glass substrate 1 a. Each of these X electrode 3 and Y electrode 4 is constituted by, for example, a transparent electrode 5 made of ITO and a metal electrode (bus electrode) 6 made of a laminated structure of Cr / Cu / Cr. Here, a discharge gap 7 is formed between the X electrode 3 and the Y electrode 4, and a display line is formed between each adjacent X electrode 3 and Y electrode 4. Furthermore, a dielectric layer 8 and a protective layer 9 are formed on the X electrode 3 and the Y electrode 4.

  On the other hand, in the rear substrate 2, the address electrodes 10 are formed on the glass substrate 2a in a direction orthogonal to the X electrodes 3 and the Y electrodes 4 of the front substrate 1 to constitute a matrix display. Further, like the front substrate 1, the address electrode 10 is often covered and insulated by the dielectric layer 11, and parallel partitions (on the dielectric layer 11 so as to be positioned on both sides of the address electrode 10). Ribs) 12 are formed. A red phosphor layer 13R, a green phosphor layer 13G, and a blue phosphor layer 13B are sequentially formed between the barrier ribs 12.

  Here, the address lines in which the phosphor layers 13R, 13G, and 13B of the respective colors are formed on the address electrodes 10 and the display lines between the adjacent X electrodes 3 and Y electrodes 4 intersect with each other. A pixel (15) is formed, and one pixel (picture element) is constituted by a set of three sub-pixels of red, green, and blue.

  Then, the front substrate 1 and the rear substrate 2 are bonded together, and a discharge gas mainly containing a rare gas is sealed in a space secured by the partition walls 12 to form a panel.

FIG. 2 is a diagram showing driving waveforms in an example of a conventional plasma display panel.
As shown in FIG. 2, when driving a plasma display panel, for example, a reset pulse 20 is applied to all scan electrodes (Y electrodes) in a reset period to perform reset discharge, and an image is output in a subsequent address period. The address discharge is performed to select the sub-pixel 15 to be lit to display.

  That is, for example, in the AC type PDP described above, the Y electrode is caused by a potential difference generated between the scanning pulse 14 applied to the Y electrode 4 and the address pulse 16 applied to the address electrode 10 in accordance with the timing in the address period. 4 and the address electrode 10 are subjected to counter discharge (address discharge, address discharge), and the subpixel 15 is selected.

  Then, using the address discharge between the Y electrode 4 and the address electrode 10 as a trigger, a surface discharge is generated between the X electrode 3 and the Y electrode 4 to form wall charges between both electrodes, and the address operation is completed. To do. In the sub-pixel in which the wall charges are formed after the address operation, when the sustain pulse 17 is applied to the X electrode 3 and the Y electrode 4 in the sustain period (sustain discharge period), the surface discharge is maintained in the discharge gap 7. It is generated by the number of times of application of 17, and the luminance corresponding to that is emitted. In the plasma display, gradation display is performed by changing the number of times the sustain pulse 17 is applied for each subfield and combining them.

  FIG. 3 is a diagram schematically showing the configuration of electrodes in another example of a conventional plasma display panel, and shows a typical configuration of electrodes assuming an AC type PDP high-definition panel. In FIG. 3, reference numeral Xo indicates an odd-numbered X electrode (3), Xe indicates an even-numbered X electrode, Yo indicates an odd-numbered Y electrode (4), and Ye indicates an even-numbered Y electrode.

  By the way, in order to increase the definition, it is effective to increase the aperture ratio by widening the space between the metal electrodes of the X electrode and the Y electrode in order to improve the light emission efficiency. Therefore, the width of the non-discharge gap 18 becomes narrow and approaches the width of the discharge gap 7, so that erroneous discharge is likely to occur.

  Therefore, as shown in FIG. 3, it must be devised so that a potential corresponding to the sustain voltage Vs is not applied between the electrodes constituting the non-discharge gap 18, and between the non-discharge gaps 18, And X electrodes (Xo and Xe) or Y electrodes (Yo and Ye).

  FIG. 4 is a diagram showing driving waveforms in another example of the conventional plasma display panel, and shows waveforms necessary for performing the address operation of the panel shown in FIG.

  Next, in the PDP having the electrode configuration shown in FIG. 3, the necessity of applying the scanning pulse 14 in a line-by-line manner will be described.

  As shown in FIG. 4, first, when a scanning pulse 14 having a potential −Vy is applied to the Yo electrode (odd number Y electrode), the sustain discharge is generated between the Yo electrode and the Xo electrode (odd number X electrode). Therefore, a positive potential Vx pulse 19 is applied to the Xo electrode, and a surface discharge is performed between the Yo electrode and the Xo electrode by using a counter discharge (address discharge) between the Yo electrode and the address electrode (10) as a trigger. To. Here, in the case of the electrode configuration as shown in FIG. 3, the Xe electrode (even-numbered X electrode) is also at substantially the same distance as the Xo electrode, so that the positive potential Vx pulse differs from the Xo electrode in the Xe electrode. Do not give 19.

  However, if the scan pulse 14 is applied to the Ye electrode (even-numbered Y electrode) after the address discharge (address operation) has been completed with this Yo electrode, the positive potential Vx pulse 19 is no longer applied to the Xo electrode. Thus, a positive potential Vx pulse 19 must be applied to the Xe electrode. This is because a pulse is applied to the X electrode every scan, and the reactive power due to switching increases.

  FIG. 5 is a diagram showing driving waveforms obtained by dividing the address period into the first half and the second half in another example of the conventional plasma display panel.

  As shown in FIG. 5, in order to suppress the increase in reactive power due to the switching described above, the scan electrode (Y electrode) is divided into a Yo electrode group and a Ye electrode group, and the sustain electrode (X electrode) is also an Xo electrode. For example, after the scan and address operation of the odd electrode group corresponding to the first half of the address period is finished, the scan and address operation of the even electrode group corresponding to the second half of the address period is performed. It is essential to perform scanning.

  FIG. 6 is a diagram schematically showing a configuration of electrodes in still another example of a conventional plasma display panel, and shows a configuration of electrodes of an ALiS (Alternate Lighting of Surface) type plasma display panel (ALiS structure PDP). Is. This PDP having the ALiS structure does not require a non-discharge gap, and is therefore suitable for achieving high definition.

  That is, as shown in FIG. 6, the ALiS structure PDP has no non-discharge gap (for example, reference numeral 18 in FIG. 3 described above) and the discharge gap 17 exists on both sides of the scan electrode. For example, when the scan pulse 14 is applied to the scan electrode (Yo electrode), it is necessary to give the Xo electrode a positive Vx potential and not to the Xe electrode so as to have a discharge selectivity.

  As a result, as described with reference to FIG. 4, when the scan pulse 14 is applied to the Ye electrode after the Yo electrode, switching for applying the Vx pulse to the X electrode is required only for the scan line, which is invalid. Electric power will increase.

  Accordingly, in the ALiS structure PDP having such an electrode configuration, the scan electrode is divided into the Yo electrode group and the Ye electrode group, and the sustain electrode is also the Xo electrode group, as described with reference to FIG. And the Xe electrode group, the even-numbered electrode group (Xe electrode corresponding to the second half of the address period after the scanning and addressing operation of the odd-numbered electrode group (Xo electrode group and Yo electrode group) corresponding to the first half of the address period is finished. Group and Ye electrode group) and interlaced scanning such as addressing is required.

  In this specification, the line that performs the address discharge in the first half of the address period is described as an odd number and the line that performs the address discharge in the second half of the address period is described as an even number. Needless to say.

  By the way, conventionally, the area where the address electrode and the scan electrode (display electrode) face each other is changed for each color of the phosphor layer, and the area where the scan electrode used as the scan electrode and the address electrode faces is used as the scan electrode. Proposal is made to make the address discharge more stable and faster by eliminating the voltage difference of the counter discharge start voltage and widening the margin of the drive voltage by making it wider than the counter area of the scan electrode and address electrode that are not used. (For example, refer to Patent Document 1).

  Conventionally, the shape of the data electrode (address electrode) is such that the portion facing the surface discharge gap in the vicinity of the scan electrode is a wide portion, and the side end on the side opposite to the surface discharge gap of the scan electrode is faced. There has also been proposed an AC type plasma display panel in which a writing operation is reliably performed in a short time by reducing the power consumption by making the portion narrow (see, for example, Patent Document 2).

JP 2002-343257 A JP 2004-158462 A

  As described above, conventionally, the area where the address electrode and the scan electrode face each other is changed for each color of the phosphor layer, or the shape of the address electrode is changed between the surface discharge gap of the scan electrode and the opposite side thereof. There has been proposed a method in which the width is changed and a reliable writing operation is performed in a short time.

  However, conventional plasma display panels have not been fully effective in high-definition panels. That is, as the panel resolution and the number of display gradations increase, the writing operation must be performed in a shorter time, and the discharge delay increases as the address period increases and the latter half of the address period occurs. There is a problem that it becomes difficult to perform the address operation.

  In addition, the capacitive load between the electrodes has increased due to the higher definition of the panel, and it is optimal to easily increase the electrode area and stabilize the discharge characteristics because it will cause an increase in capacitive power. The solution was not reached.

  As described with reference to FIGS. 5 and 6, a PDP has been proposed in which address discharge is divided into the first half and the second half after the reset discharge and is performed by jumping line by line. The display line that performs the address discharge in the first half of the address period and the display line that performs the address discharge in the second half of the address period have different display quality because the time after the reset discharge is different.

  That is, for example, in even-numbered display lines (Xe, Ye) that perform address discharge in the second half of the address period, odd-numbered display lines (Xo, Yo) that perform address discharge in the first half of the address period from the reset discharge. Longer, the address discharge delay becomes larger and black noise phenomenon is more likely to occur, and the influence of the address discharge delay is displayed differently between even-numbered display lines and odd-numbered display lines. Therefore, the display quality is supposed to deteriorate.

  In view of the problems of the above-described conventional technology, the present invention can realize stabilization of address discharge without unnecessarily increasing capacitive power and can display an image with a large number of display gradations. The purpose is to provide a high-definition plasma display panel.

  According to the present invention, there is provided a plasma display panel in which address discharge is divided into a first half and a second half after a reset discharge, and a sustain discharge is performed on all sub-pixels that have performed the first half and second half address discharges. The plasma display panel is characterized in that the area of the electrode contributing to the second half address discharge is larger than the area of the electrode contributing to the first half address discharge.

  The plasma display panel includes a first substrate in which a plurality of sustain electrodes and scan electrodes are arranged in parallel while forming a discharge gap between the sustain electrodes and the scan electrodes, the sustain electrodes and the scan electrodes, A second substrate on which a plurality of address electrodes are arranged in the intersecting direction, address discharge is performed between the scan electrode and the address electrode, and one subpixel is configured by the sustain electrode corresponding thereto An interlaced scanning plasma display panel that performs the address discharge every other line of the scan electrode, wherein the area of the address electrode and the scan electrode that contributes to the address discharge in the second half is the address discharge in the first half. It can be configured to be larger than the area of the address electrode and the scanning electrode that contribute.

  In addition, the sum of the areas of the scan electrodes and the address electrodes in the sub-pixel that scans in the second half corresponds to the area of the scan electrodes and the address electrodes in the sub-pixel that scans in the first half. Or the area where the scan electrode and the address electrode intersect in the sub-pixel scanned in the second half is larger than the area where the scan electrode and the address electrode intersect in the sub-pixel scanned in the first half. May be larger.

  Further, the area of the scan electrode scanned in the second half is larger than the area of the scan electrode scanned in the first half, or the area of the address electrode corresponding to the scan electrode scanned in the second half is larger. The area of the address electrode corresponding to the scan electrode scanned in the first half may be larger.

  According to the plasma display panel of the present invention, the area of the electrode that contributes to the address discharge in the second half of the address period in which the time from the reset discharge is long and the influence of the delay of the address discharge is large is the electrode that contributes to the address discharge in the first half of the address period. In other words, the address discharge in the second half of the address period is performed so that the influence of the delay of the address discharge is reduced. In addition, the display quality difference as a whole of the PDP is improved by reducing the difference in display deterioration due to the delay of the address discharge between the display line for performing the address discharge.

  As described above, the present invention can reduce the address operation time and address discharge delay without unnecessarily increasing the reactive power by devising the shape of the scan electrode and the address electrode according to the address scanning method. it can. In particular, the present invention provides high definition and multi-gradation display in an interlaced scanning plasma display panel in which address discharge is divided into the first half and the second half every other display line (scanning electrode) after the reset discharge. Thus, it is possible to realize a countermeasure for shortening the address operation to be realized and prevent an address discharge delay.

  According to the present invention, there is provided a high-definition plasma display panel that can stabilize an address discharge without unnecessarily increasing capacitive power and can display an image with a large number of display gradations. can do.

  Hereinafter, embodiments of the plasma display panel according to the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 7 is a diagram schematically showing the configuration of electrodes in the first embodiment of the plasma display panel according to the present invention, and shows the configuration of typical electrodes assuming a high-definition panel of an AC type PDP. . In FIG. 7, reference numeral 5 is a transparent electrode, 6 is a metal electrode, 7 is a discharge gap, 10 is an address electrode, and 12 is a barrier rib. Further, reference numeral Xo represents an odd-numbered X electrode (sustain electrode 3), Xe represents an even-numbered X electrode, Yo represents an odd-numbered Y electrode (scanning electrode 4), and Ye represents an even-numbered Y electrode. Yes.

  FIG. 7 shows a scan electrode group that contributes the electrode area Sye of the scan electrode group Ye contributing to the second half of the address period to the first half of the address period in the plasma display panel (PDP) having the electrode arrangement as shown in FIG. It is formed wider than the electrode area Syo of Yo.

  That is, as shown in FIG. 7, in the PDP of the first embodiment, the area of the even-numbered scan electrode Ye that performs address discharge in the second half of the address period with the address electrode 10 (area of the transparent electrode 5). Sye is formed to be wider than the area of the odd-numbered scan electrode Yo (area of the transparent electrode 5) that performs address discharge in the first half of the address period with the address electrode 10, for example, in the second half of the address period. The display deterioration due to the influence of the address discharge delay in the even-numbered display lines for discharging is reduced.

  This reduces, for example, the difference in display degradation due to the delay in address discharge between the odd-numbered display lines that perform address discharge in the first half of the address period and the even-numbered display lines that perform address discharge in the second half of the address period. Display quality as a whole PDP is improved.

  As a result, it is possible to suppress a decrease in display due to an address discharge delay in the second half of the address without increasing address power or sustain power, and to stabilize address discharge without unnecessarily increasing capacitive power. As a result, it is possible to display an image with a rich display gradation.

  FIG. 8 is a diagram schematically showing the configuration of electrodes in the second embodiment of the plasma display panel according to the present invention.

  As is clear from comparison between FIG. 8 and FIG. 7 showing the first embodiment described above, in the PDP of the second embodiment, the even-numbered address discharge is performed between the address electrodes 10 in the latter half of the address period. The area Sae of the address electrode 10 in the part corresponding to the scan electrode Ye (at the opposite position) is the same as that of the part corresponding to the odd-numbered scan electrode Yo that performs address discharge with the address electrode 10 in the first half of the address period. The address electrode 10 is formed wider than the area Sao.

  FIG. 9 is a diagram schematically showing the configuration of electrodes in the third embodiment of the plasma display panel according to the present invention.

  As is clear from a comparison between FIG. 9 and FIG. 8 showing the first embodiment and FIG. 8 showing the second embodiment, in the PDP of the third embodiment, the first embodiment and the second embodiment are compared. Both are to apply.

  That is, as shown in FIG. 9, in the PDP of the third embodiment, the area Sye of the even-numbered scan electrode Ye that performs address discharge in the latter half of the address period with the address electrode 10 is Are formed wider than the area Syo of the odd-numbered scan electrode Yo that performs address discharge in the first half of the address period, and the even-numbered scan electrode Ye that performs address discharge in the second half of the address period with the address electrode 10. The area Sae of the portion corresponding to the address electrode 10 is formed wider than the area Sao of the portion corresponding to the odd-numbered scan electrode Yo corresponding to the odd-numbered scan electrode Yo that performs address discharge with the address electrode 10 in the first half of the address period. It is supposed to do.

  According to the second and third embodiments of the PDP according to the present invention, as in the first embodiment described above, for example, the delay of the address discharge in the even-numbered display line that performs the address discharge in the second half of the address period. Deterioration of display due to influence is reduced. For example, an odd-numbered display line that performs address discharge in the first half of the address period and an even-numbered display line that performs address discharge in the second half of the address period are caused by address discharge delay. The difference in display deterioration is reduced, and the display quality of the entire PDP is improved.

  FIG. 10 is a diagram schematically illustrating the configuration of electrodes in the fourth embodiment of the plasma display panel according to the present invention. The ALiS structure does not require the non-discharge gap (18) described with reference to FIG. The example which applied this invention with respect to PDP is shown. 11 and 12 also show an example in which the present invention is applied to a PDP having an ALiS structure. The PDPs of the fourth to sixth embodiments shown in FIGS. 10 to 12 correspond to those in which the first to third embodiments shown in FIGS. 7 to 9 are applied to the PDP having the ALiS structure. .

  As shown in FIG. 10, in the PDP of the fourth embodiment, the area of the even-numbered scan electrode Ye (area of the transparent electrode 5) Sye that performs address discharge in the latter half of the address period with the address electrode 10 is set. The area of the odd-numbered scan electrode Yo that performs address discharge in the first half of the address period with the address electrode 10 (area of the transparent electrode 5) is formed wider than, for example, the address discharge in the second half of the address period. Display deterioration due to the influence of an address discharge delay in an even-numbered display line to be performed is reduced.

  FIG. 11 is a diagram schematically showing the configuration of electrodes in the fifth embodiment of the plasma display panel according to the present invention.

  As shown in FIG. 11, in the PDP of the fifth embodiment, the area Sae of the portion of the address electrode 10 corresponding to the even-numbered scan electrode Ye that performs address discharge in the latter half of the address period with the address electrode 10. Is formed wider than the area Sao of the address electrode 10 corresponding to the odd-numbered scan electrode Yo that performs address discharge in the first half of the address period with the address electrode 10.

  FIG. 12 is a view schematically showing the configuration of the electrodes in the sixth embodiment of the plasma display panel according to the present invention. Both the fourth embodiment shown in FIG. 10 and the fifth embodiment shown in FIG. It is applied.

  That is, as shown in FIG. 12, in the PDP of the sixth embodiment, the area Sye of the even-numbered scan electrode Ye that performs address discharge in the second half of the address period with the address electrode 10 is Are formed wider than the area Syo of the odd-numbered scan electrode Yo that performs address discharge in the first half of the address period, and the even-numbered scan electrode Ye that performs address discharge in the second half of the address period with the address electrode 10. The area Sae of the portion corresponding to the address electrode 10 is formed wider than the area Sao of the portion corresponding to the odd-numbered scan electrode Yo corresponding to the odd-numbered scan electrode Yo that performs address discharge with the address electrode 10 in the first half of the address period. It is supposed to be.

  According to the fourth to sixth embodiments of the PDP according to the present invention, as in the first to third embodiments described above, for example, the address in the even-numbered display line that performs address discharge in the second half of the address period. Deterioration of display due to the influence of the discharge delay is reduced, so that, for example, an odd number display line that performs address discharge in the first half of the address period and an even number display line that performs address discharge in the second half of the address period The difference in display deterioration due to the discharge delay is reduced, and the display quality as a whole PDP is improved.

  Note that the lines that perform address discharge in the first half of the address period are odd-numbered and the lines that perform address discharge in the second half of the address period are described as even-numbered. is there.

  Thus, according to each embodiment of the plasma display panel according to the present invention, for example, odd-numbered display lines that perform address discharge in the first half of the address period and even-numbered displays that perform address discharge in the second half of the address period. It is possible to reduce the display deterioration difference due to the address discharge delay between the lines and improve the display quality of the entire PDP.

  As a result, it is possible to suppress a decrease in display due to an address discharge delay in the second half of the address without increasing address power or sustain power, and to stabilize address discharge without unnecessarily increasing capacitive power. As a result, it is possible to display an image with a rich display gradation.

  The present invention can be widely used, for example, in a display device such as a personal computer or a workstation, a flat-type wall-mounted television, or a plasma display panel for displaying advertisements or information. It can be suitably used for a plasma display panel having a large screen.

It is a figure which shows an example of the conventional plasma display panel typically. It is a figure which shows the drive waveform in an example of the conventional plasma display panel. It is a figure which shows schematically the structure of the electrode in the other example of the conventional plasma display panel. It is a figure which shows the drive waveform in the other example of the conventional plasma display panel. It is a figure which shows the drive waveform which divided | segmented the address period into the first half and the second half in the other example of the conventional plasma display panel. It is a figure which shows schematically the structure of the electrode in the further another example of the conventional plasma display panel. It is a figure which shows schematically the structure of the electrode in 1st Example of the plasma display panel based on this invention. It is a figure which shows schematically the structure of the electrode in 2nd Example of the plasma display panel based on this invention. It is a figure which shows schematically the structure of the electrode in 3rd Example of the plasma display panel based on this invention. It is a figure which shows schematically the structure of the electrode in 4th Example of the plasma display panel based on this invention. It is a figure which shows schematically the structure of the electrode in 5th Example of the plasma display panel based on this invention. It is a figure which shows schematically the structure of the electrode in the 6th Example of the plasma display panel based on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Front plate 1a Glass substrate 2 Back plate 2a Glass substrate 3 Sustain electrode (X electrode: Display electrode)
4 Scanning electrode (Y electrode: display electrode)
DESCRIPTION OF SYMBOLS 5 Transparent electrode 6 Metal electrode 7 Discharge gap 8 Dielectric layer 9 Protective film 10 Address electrode 11 Dielectric layer 12 Partition (rib)
13R, 13G, 13B Phosphor 14 Scan pulse 15 Subpixel 16 Address pulse 17 Sustain pulse 18 Non-discharge gap 19 Vx pulse 20 Reset pulse Xo, Xe, Xn, Xn + 1 Sustain electrode (X electrode)
Yo, Ye, Yn, Yn + 1 Scan electrode (Y electrode)
Sao, Sae, Syo, Sye Electrode area

Claims (6)

A plasma display panel that performs an address discharge in a first half and a second half after a reset discharge, and performs a sustain discharge on all subpixels that have performed the first half and second half address discharge,
The plasma display panel characterized in that an area of the electrode contributing to the second half address discharge is larger than an area of the electrode contributing to the first half address discharge. The plasma display panel according to claim 1, wherein the plasma display panel comprises:
A first substrate in which a plurality of sustain electrodes and scan electrodes are arranged in parallel while forming a discharge gap between the sustain electrodes and the scan electrodes;
A second substrate on which a plurality of address electrodes are arranged in a direction crossing the sustain electrodes and the scan electrodes,
An interlaced scanning type plasma display panel that performs address discharge between the scan electrodes and the address electrodes, constitutes one subpixel with the corresponding sustain electrodes, and performs the address discharge every other line of the scan electrodes Because
2. The plasma display panel according to claim 1, wherein an area of the address electrode and the scan electrode contributing to the second half address discharge is larger than an area of the address electrode and the scan electrode contributing to the first half address discharge. The plasma display panel according to claim 2,
The sum of the areas of the scan electrodes and the address electrodes in the second half of the sub-pixel that is scanned is the sum of the areas of the scan electrodes and the address electrodes of the first half of the sub-pixel that are scanned in the first half. A plasma display panel characterized by being larger than. The plasma display panel according to claim 2,
A plasma display, wherein an area where the scan electrode and the address electrode intersect in the second half scanning subpixel is larger than an area where the scan electrode and the address electrode intersect in the first half scanning subpixel. panel. The plasma display panel according to claim 3 or 4,
The plasma display panel, wherein an area of the scan electrode scanned in the second half is wider than an area of the scan electrode scanned in the first half.   6. The plasma display panel according to claim 3, wherein an area of the address electrode corresponding to the scan electrode scanned in the second half corresponds to the scan electrode scanned in the first half. A plasma display panel having a larger area than the address electrode.

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