JP2008064954A - Liquid crystal display device and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device of a FFS (Fringe-Field Switching) system in which a short-circuit between a pixel electrode and a common electrode can be prevented in a contact portion of a common potential line and an aperture ratio of a pixel is improved. <P>SOLUTION: A common potential line COM is formed on a gate insulating film 13. An interlayer insulating film 14 is formed covering the common potential line COM. Then the interlayer insulating film 14 on the common potential line COM is selectively etched to form a contact hole CH3. In this step, etching is carried out to produce a taper angle θ of the contact hole CH3 of 60 degrees or more. A pad electrode 16 connected to the common potential line COM through the contact hole CH3 is formed by a sputtering method. A flattening film 59 made of a photosensitive resin is formed over the entire surface, exposed through a predetermined photomask and developed. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device in which the orientation direction of liquid crystal molecules is controlled by an electric field between a pixel electrode and a common electrode formed on the same substrate, and a manufacturing method thereof.

  As one of the means to increase the viewing angle of liquid crystal display devices, optical switching is performed by generating a horizontal electric field between electrodes on the same substrate and rotating the liquid crystal molecules in a plane parallel to the substrate by this electric field. A method for providing functions has been developed. Examples of this technique include an in-plane switching (abbreviated as “IPS”) system and a fringe field switching (abbreviated as “FFS”) system which is an improvement of the IPS system. Are known.

  Hereinafter, an FFS liquid crystal display device will be described with reference to the drawings. FIG. 5 is a plan view showing an FFS mode liquid crystal display device, and FIG. 6 is a sectional view taken along line XX. In this liquid crystal display device, a plurality of display pixels are arranged in a matrix. In FIGS. 5 and 6, only one display pixel 1P is shown.

  A TFT substrate 10 made of a glass substrate or the like is disposed facing the light source BL. A first polarizing plate 11 that linearly polarizes the light from the light source BL is formed on the side of the TFT substrate 10 facing the light source BL. A buffer film 12 made of a silicon oxide film or a silicon nitride film is formed on the side of the TFT substrate 10 that does not face the light source BL.

  An active layer PS made of polysilicon or the like is formed on the buffer film 12 in the formation region of the pixel selection transistor TR. On the buffer film 12, a gate insulating film 13 made of a silicon oxide film, a silicon nitride film or the like and covering the active layer PS is formed. On the gate insulating film 13, a gate line GL constituting a gate electrode is formed so as to face the active layer PS. The gate line GL is made of a metal containing chromium or molybdenum.

  On the gate insulating film 13, a common potential line COM made of a metal containing chromium or molybdenum or the like for supplying a common potential is formed. The gate line GL, the common potential line COM, and the gate insulating film 13 are covered with an interlayer insulating film 14.

  The interlayer insulating film 14 is provided with a contact hole CH1 exposing the source region of the active layer PS and a contact hole CH2 exposing the drain region. The interlayer insulating film 14 is provided with a contact hole CH3 exposing the common potential line COM.

  A display signal line DL connected to the source region of the active layer PS through the contact hole CH1 is formed on the surface of the interlayer insulating film. A drain electrode 15 connected to the drain region of the active layer PS through the contact hole CH2 is formed on the surface of the interlayer insulating film. A pad electrode 16 connected to the common potential line COM is formed on the surface of the interlayer insulating film 14. The display signal line DL, the drain electrode 15 and the pad electrode 16 are made of a metal containing aluminum or an aluminum alloy. Further, a planarizing film 59 made of a photosensitive resin is formed on the drain electrode 15, the pad electrode 16 and the interlayer insulating film 14. The planarizing film 59 is provided with a contact hole CH4 exposing the drain electrode 15 and a contact hole CH5 exposing the pad electrode 16.

  On the planarizing film 59, the pixel electrode 60 connected to the drain electrode 15 through the contact hole CH4 is formed. The pixel electrode 60 is made of a transparent electrode material such as ITO. A voltage corresponding to the display signal is applied to the pixel electrode 60. In addition, an insulating film 61 is formed on the pixel electrode 60 to cover it. A common electrode 62 having a plurality of slit portions S extending in parallel is formed on the insulating film 61. The common electrode 62 is made of a transparent electrode material such as ITO. The common electrode 62 is connected to the pad electrode 16 through the contact hole CH5. An alignment film (not shown) that covers the common electrode 62 is formed on the insulating film 61.

  Further, a color filter substrate (hereinafter abbreviated as “CF substrate”) 20 made of a glass substrate or the like is disposed facing the TFT substrate 10. A color filter and an alignment film (not shown) are formed on the CF substrate 20 facing the TFT substrate 10. A second polarizing plate 21 is formed on the CF substrate 20 on the side not facing the TFT substrate 10. The first and second polarizing plates 11 and 21 are arranged so that the polarizing axes of the polarizing plates are orthogonal to each other. A liquid crystal layer 30 is sealed between the TFT substrate 10 and the CF substrate 20.

  In the liquid crystal display device, in the state where no voltage is applied to the pixel electrode 60, the average alignment direction of the major axes of the liquid crystal molecules of the liquid crystal layer 30 (hereinafter simply referred to as “alignment direction”) is the first polarized light. The inclination is orthogonal to the polarization axis of the plate 11. At this time, the linearly polarized light transmitted through the liquid crystal layer 30 is not emitted from the second polarizing plate 21 because its polarization axis is perpendicular to the polarizing axis of the second polarizing plate 21. That is, the display state is black display.

On the other hand, when a voltage is applied to the pixel electrode 60 and an electric field is generated between the pixel electrode 60 and the common electrode 62, the alignment direction of the liquid crystal molecules rotates so as to follow the electric lines of force of the electric field. At this time, the linearly polarized light incident on the liquid crystal layer 30 becomes elliptically polarized light due to birefringence, but has a linearly polarized light component transmitted through the second polarizing plate 21, and the display state in this case is white display.
JP-A-2005-244205 JP 2002-296611 A JP 2001-102362 A Japanese Patent Application Laid-Open No. 11-045879 JP-A-10-200117

  In the liquid crystal display device, the pad electrode 16 is formed through the contact hole CH3 formed in the interlayer insulating film 14 on the common potential line COM, and the contact formed on the planarizing film 59 and the insulating film 61 on the pad electrode 16. A common electrode 62 connected to the pad electrode 16 through the hole CH5 is formed.

  The contact holes CH3 and CH5 are preferably overlapped to reduce the planar contact area in order to increase the aperture ratio of the pixel. However, in such a layout, when the planarization film 59 made of a photosensitive resin is exposed to form the contact hole CH5, irregular reflection occurs from the lower layer, and the planarization film 59 at the end of the contact hole CH5 has “ There is a problem that a “dimple” occurs, which causes a short circuit between the common electrode 62 and the pixel electrode 60.

  This problem will be described in detail with reference to FIG. As shown in FIG. 4A, a common potential line COM is formed over the gate insulating film 13. Then, an interlayer insulating film 14 is formed so as to cover the common potential line COM. Although the structure of the lower layer of the gate insulating film 13 is omitted, it is the same as FIG.

  Next, the interlayer insulating film 14 on the common potential line COM is selectively etched to form a contact hole CH3. Then, the pad electrode 16 connected to the common potential line COM through the contact hole CH3 is formed by sputtering. The pad electrode 16 is made of a metal such as aluminum. Thereafter, a planarizing film 59 made of a photosensitive resin is formed on the entire surface, and this is exposed using a predetermined photomask.

  At this time, if the taper angle θ of the contact hole CH3 is small, irregular reflection by the pad electrode 16 on the tapered surface of the contact hole CH3 occurs, and the planarizing film 59 at the end of the contact hole CH5 that should not be exposed is exposed. Will receive. Then, in the case where the planarizing film is a positive photosensitive resin, the exposed portion is removed by the subsequent development processing, and as a result of retreating to the right side of FIG. 4C, a “dent” having a length x is generated. .

  Thereafter, as shown in FIG. 4D, the pixel electrode 60 is formed on the planarizing film 59, the insulating film 61 is formed thereon, and the common electrode 62 is further formed thereon. At this time, since the planarization film 59 has “dents” and the step coverage of the insulating film 61 is deteriorated, the common electrode 62 and the pixel electrode 60 are short-circuited.

  In addition, the arrow of the irregular reflection light in FIG. 4 and FIG. 1 to be described later is schematically shown.

  The present invention has been made in view of the above-described problems. A common potential line formed on a substrate, an interlayer insulating film formed on the common potential line, and a first opening opened in the interlayer insulating film. A metal wiring connected to the common potential line through a contact hole, a planarizing film made of a photosensitive resin formed on the metal wiring, a pixel electrode formed on the planarizing film, and the planarizing film A second contact hole overlapping the first contact hole, an insulating film formed on the pixel electrode, a third contact hole formed in the insulating film, and the second contact hole. And a common electrode connected to the metal wiring and extending on the insulating film through a third contact hole, wherein the taper angle of the first contact hole is 60 degrees or more. That.

  This prevents overexposure due to irregular reflection by the pad electrode 16 on the tapered surface of the contact hole CH3 during the exposure of the planarizing film 59. Therefore, in the layout in which the contact holes CH3 and CH5 are overlapped, the common electrode 62 is used. And the pixel electrode 60 can be prevented from being short-circuited.

  According to the present invention, in the FFS mode liquid crystal display device, a short circuit between the pixel electrode and the common electrode can be prevented at the contact portion of the common potential line. Accordingly, the two contact portions of the common potential line can be overlapped, and the aperture ratio of the pixel can be improved.

  A liquid crystal display device and a manufacturing method thereof according to an embodiment of the present invention will be described. In the present embodiment, the contact portion of the common potential line COM of the liquid crystal display device will be described, but the other components are the same as those described in the background art section.

  As shown in FIG. 1A, a common potential line COM is formed over the gate insulating film 13. Then, an interlayer insulating film 14 is formed so as to cover the common potential line COM. Although the structure of the lower layer of the gate insulating film 13 is omitted, it is the same as FIG.

  Next, the interlayer insulating film 14 on the common potential line COM is selectively etched to form a contact hole CH3. At this time, the etching is performed so that the taper angle θ of the contact hole CH3 is 60 degrees or more. The etching method is preferably dry etching, but may be wet etching.

  Then, the pad electrode 16 connected to the common potential line COM through the contact hole CH3 is formed by sputtering. The pad electrode 16 is made of a metal such as aluminum. Then, a planarizing film 59 made of a photosensitive resin is formed on the entire surface, and this is exposed using a predetermined photomask, and then developed.

  As a result, a contact hole CH5A exposing the pad electrode 16 is formed in the planarizing film 59. Contact hole CH5A overlaps contact hole CH3. Thereby, the aperture ratio of the pixel can be improved.

Thereafter, as shown in FIG. 1C, a pixel electrode 60 is formed on the planarizing film 59, and an insulating film 61 made of a low-temperature plasma silicon nitride film is formed thereon. Then, the insulating film 61
Is etched to form a contact hole CH5B exposing the pad electrode 16. Then, a common electrode 62 connected to the pad electrode 16 through the contact holes CH5A and CH5B and extending on the pixel electrode 60 through the insulating film 61 is formed.

  Here, as shown in FIG. 3, as the taper angle θ of the contact hole CH3 is increased, overexposure due to irregular reflection by the pad electrode 16 of the contact hole CH3 is suppressed, and the length “x” of the planarizing film 59 is reduced. Becomes smaller. According to the experiments by the present inventors, the length x of the “dent” can be controlled to 1 μm or less, and the common electrode 62 and the pixel electrode 60 do not short-circuit. Therefore, it can be seen from FIG. 3 that when the taper angle θ of the contact hole CH3 is 60 degrees or more, the length “x” of the “dent” is 1 μm or less, and the common electrode 62 and the pixel electrode 60 do not short-circuit. .

  In this embodiment, an example in which the common electrode 62 is formed on the insulating film 61 is shown. However, as the second embodiment, a configuration in which the common electrode 62 and the pixel electrode 60 are replaced, that is, as shown in FIG. Alternatively, the insulating film 61 may be formed on the common electrode 62, and the pixel electrode 60 may be formed on the insulating film 61.

  In that case, the drain electrode 15 is connected to the drain region through the contact hole CH2 opened on the drain region of the active layer PS, and the pixel electrode 60 is connected to the drain electrode 15 through the contact hole CH4 on the drain electrode 15. The present invention can also be applied to the method of forming the contact hole CH2 and the taper angle θ.

It is a figure which shows the manufacturing method of the liquid crystal display device by the 1st Embodiment of this invention. 2 is a cross-sectional view of a contact hole on a common potential line of the liquid crystal display device according to the first embodiment of the present invention. FIG. It is a figure which shows the relationship between the "dent" of a planarization film | membrane, and the taper angle of the contact hole on a common electric potential line. It is a figure which shows the manufacturing method of the liquid crystal display device by a prior art example. It is a top view which shows the liquid crystal display device of a FFS system. FIG. 6 is a cross-sectional view along the line XX. It is sectional drawing of the contact hole of the liquid crystal display device by the 2nd Embodiment of this invention.

Explanation of symbols

1P display pixel 10 TFT substrate 11 first polarizing plate 12 buffer film 13 gate insulating film 14 interlayer insulating film 15 drain electrode 16 pad electrode 20 CF substrate 21 second polarizing plate 30 liquid crystal layer 59 flattening film 60 pixel electrode 61 insulation Film 62 Common electrode CH1, CH2, CH3, CH4, CH5 Contact hole CH5A, CH5B Contact hole COM Common potential line GL Gate line PS Active layer S Slit part θ Taper angle

Claims (4)

A common potential line formed on the substrate;
An interlayer insulating film formed on the common potential line;
Metal wiring connected to the common potential line through a first contact hole opened in the interlayer insulating film;
A planarization film made of a photosensitive resin formed on the metal wiring;
A pixel electrode formed on the planarization film;
A second contact hole formed in the planarization film and overlapping the first contact hole;
An insulating film formed on the pixel electrode;
A third contact hole formed in the insulating film;
A common electrode connected to the metal wiring and extending on the insulating film through the second and third contact holes, and the taper angle of the first contact hole is 60 degrees or more. A liquid crystal display device. An active layer formed on the substrate;
An interlayer insulating film formed on the active layer;
Metal wiring connected to the active layer through a first contact hole opened in the interlayer insulating film;
A planarization film made of a photosensitive resin formed on the metal wiring;
A common electrode formed on the planarizing film;
A second contact hole formed in the planarization film and overlapping the first contact hole;
An insulating film formed on the common electrode;
A third contact hole formed in the insulating film;
And a pixel electrode connected to the metal wiring and extending on the insulating film through the second and third contact holes, and the taper angle of the first contact hole is 60 degrees or more. A liquid crystal display device. Forming a common potential line on the substrate;
Forming an interlayer insulating film on the common potential line;
Selectively etching the interlayer insulating film to form a first contact hole having a taper angle of 60 degrees or more;
Forming a metal wiring connected to the common potential line through the first contact hole;
A step of forming a second contact hole overlapping the first contact hole by applying a planarizing film made of a photosensitive resin on the metal wiring and performing exposure and development thereon;
Forming a pixel electrode made of a transparent electrode material on the planarizing film;
Forming an insulating film on the pixel electrode;
Forming a third contact hole in the insulating film;
Forming a common electrode made of a transparent electrode material connected to the metal wiring and extending on the insulating film through the second and third contact holes, and manufacturing a liquid crystal display device Method. Forming an active layer on the substrate;
Forming an interlayer insulating film on the active layer;
Selectively etching the interlayer insulating film to form a first contact hole having a taper angle of 60 degrees or more;
Forming a metal wiring connected to the active layer through the first contact hole;
A step of forming a second contact hole overlapping the first contact hole by applying a planarizing film made of a photosensitive resin on the metal wiring and performing exposure and development thereon;
Forming a common electrode on the planarizing film;
Forming an insulating film on the common electrode;
Forming a third contact hole in the insulating film;
Forming a pixel electrode connected to the metal wiring and extending on the insulating film through the second and third contact holes, and a method for manufacturing a liquid crystal display device.

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