JP2008060286A - Semiconductor light-emitting element and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the efficiency of the light extraction of a semiconductor light-emitting element. <P>SOLUTION: Substrate surfaces are exposed on the sides forming semiconductor laminating structures 2 to 4 as light emitters, and irregularities are formed to the exposed substrate surfaces in each semiconductor light-emitting element 100. Consequently, when a light projected from the semiconductor laminating structures 2 to 4 as the light emitters to substrates 1 reaches the exposed surface sides of the substrates 1, a ratio is elevated as emitting the light to the outside without a total reflection. It is remarkable when the refractive indices of the semiconductor laminating structures 2 to 4 are larger than those of the substrates 1, and an effect is remarkable particularly when the light emitter is formed of the laminating structure of a group III nitride compound semiconductor and sapphire, silicon, SiC or a spinel is used as the substrate. When the element is isolated by a dicing together with a semiconductor layer, the side face of the semiconductor layer brought into contact with a dicing saw suffers a damage, and is changed into an optical absorber, but such a damaged region is not formed in this element. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device. In particular, the present invention relates to a group III nitride compound semiconductor light emitting device formed on a heterogeneous substrate and a method for manufacturing the same.

  It is known that the group III nitride compound semiconductor has a large refractive index of about 2.4, and extraction of light emitted from the light emitting layer is not sufficient. That is, the critical angle is large due to the large refractive index, and the proportion of light that is reflected many times within the laminated structure of the group III nitride compound semiconductor and is not emitted to the outside cannot be ignored.

  In view of this, various contrivances have been made to improve the light extraction efficiency by providing irregularities on the surface of the laminated portion of the group III nitride compound semiconductor or the back surface of the growth substrate. Patent documents 1 and 2 are mentioned as such composition.

In device isolation of group III nitride compound semiconductor light emitting devices, it is also known that the epitaxial growth film on the outer peripheral portion of each device is previously removed by etching in addition to a method of directly applying a dicer to an epitaxial wafer. . This technique is described in Patent Document 3, for example.
JP 2002-280611 A JP 2004-221529 A Japanese Unexamined Patent Publication No. 7-131069

  The technique of Patent Document 1 for processing the surface of a laminated portion of a group III nitride compound semiconductor is not always easy. Further, in the so-called face-up light emitting element, the unevenness on the back surface of the substrate is not effective, and even if the unevenness is provided in the lower part of the light emitting layer as in Patent Document 2, the group III nitride compound having a large refractive index is finally obtained. If the light extraction from the semiconductor must be performed, the light extraction efficiency is not sufficiently improved.

  The present inventors have studied to improve the light extraction efficiency of the semiconductor light-emitting device, and completed a technique that brings about an improvement in light extraction efficiency of nearly 10% as described below. That is, an object of the present invention is to provide a semiconductor light emitting device with improved light extraction efficiency and a method for manufacturing the same.

  The invention according to claim 1 is a semiconductor light emitting device in which a semiconductor multilayer structure is formed by laminating a semiconductor on a concavo-convex surface of a substrate having a concavo-convex surface. A semiconductor light emitting device having a surface exposed. That is, it is a semiconductor light emitting element in a state where the uneven surface of the exposed substrate surrounds the outer peripheral portion of the semiconductor multilayer structure.

The invention according to claim 2 is characterized in that the semiconductor multilayer structure is made of a group III nitride compound semiconductor. Group III nitride compound semiconductor is a general formula Al _x Ga _y In _1-xy N, where x, y and x + y are all represented by 0 or more and 1 or less, and an arbitrary impurity is added. Or a group III element substituted with a partial composition of Al, Ga and / or In, or a group V element substituted with a partial composition of N. The invention according to claim 3 is characterized in that the substrate is made of sapphire, silicon, SiC or spinel.

  The invention according to claim 4 is characterized in that the outer peripheral portion of the semiconductor laminated structure is formed with a taper having an included angle of 45 degrees or less toward a portion where the uneven surface of the substrate is exposed. The invention according to claim 5 is characterized in that the uneven surface of the plate is exposed by dry etching.

  According to a sixth aspect of the present invention, there is provided a method for manufacturing a semiconductor light emitting device, comprising: a step of forming a semiconductor stacked structure by stacking a semiconductor on an uneven surface of a substrate having an uneven surface; and an outer periphery of the semiconductor stacked structure of each device And a step of performing selective dry etching to expose the concavo-convex surface of the substrate. The outer peripheral portion of the semiconductor multilayer structure of each element is the inside of the separation line when the wafer is separated in a later element separation step. For element isolation, for example, an isolation method using dicing or laser processing is assumed.

  The invention according to claim 7 is characterized in that dry etching uses a gas containing chlorine or a compound of chlorine. In the invention according to claim 8, the mask used in dry etching is formed separately for each element except for a predetermined region sandwiching the separation line between the elements, and is reflowed at a higher temperature after pre-baking. Thus, the thickness of the outer peripheral portion of the mask is changed, and the outer peripheral portion of the semiconductor multilayer structure is formed in a tapered shape during etching. Pre-baking is performed after exposure and development of a mask formed of a resist or the like, and substantially completes the polymerization of the resist. Thereafter, the fact that the mask thickness is reduced at the outer periphery due to deformation of the thermoplastic resin resist at a higher temperature is utilized.

  In each semiconductor light emitting element, the substrate surface is exposed on the side where the semiconductor multilayer structure as the light emitting portion is formed, and the exposed substrate surface is provided with irregularities. Therefore, when the light that has entered the substrate from the semiconductor multilayer structure that is the light emitting portion reaches the surface side of the exposed substrate (the side on which the semiconductor multilayer structure that is the light emitting portion is formed), the light is not totally reflected and is transmitted to the outside. The proportion released is increased (claim 1). This is conspicuous when the refractive index of the semiconductor multilayer structure is larger than the refractive index of the substrate, and the light emitting part is formed by the laminated structure of the group III nitride compound semiconductor, and sapphire, silicon, SiC or spinel is formed. The effect is particularly remarkable when the substrate is used (claims 2 and 3). Also, when element separation is performed by dicing with the semiconductor layer, the side surface of the semiconductor layer that contacts the dicing saw is damaged and becomes a light absorbing portion, but the present invention removes the peripheral portion of the semiconductor multilayer structure in advance. Therefore, even when the substrate is cut with, for example, a dicing saw, the dicing saw does not contact the semiconductor multilayer structure, and no damaged region is formed in the semiconductor multilayer structure.

  Further, when the outer peripheral portion of the semiconductor multilayer structure is tapered toward the portion where the uneven surface of the substrate is exposed, the light that reaches the tapered portion in the semiconductor multilayer structure is not totally reflected to the outside. The percentage released is increased. The inclination angle (decline) of the taper can be arbitrarily adjusted, but a taper with a constant depression angle of 45 degrees or less can be easily formed with good reproducibility by using the following manufacturing method (claim 4).

  In order to manufacture the semiconductor light emitting element as described above, a step of laminating a semiconductor on the uneven surface of a substrate having an uneven surface, and a portion that becomes an outer peripheral portion of the semiconductor multilayer structure of each element after division And a step of performing selective dry etching in order to expose the uneven surface of the substrate. In dry etching, a gas containing chlorine or a chlorine compound is preferably used. In order to form the above-described taper, a mask for each element is formed once by applying, exposing, and developing a photoresist. A portion not covered with the mask at this time is a region sandwiching the cutting line. The mask is sufficiently polymerized and cured by pre-baking and reflowed at a higher temperature than the pre-baking so that the thickness of the outer peripheral portion of the mask becomes thinner toward the edge. In this way, the thickness of the peripheral portion of the mask is tapered so that the mask is sequentially decomposed and removed from the outer peripheral portion during etching. As a result, the timing at which etching is substantially started is shifted in the outer peripheral portion of the semiconductor multilayer structure of each element, so that a tapered shape can be formed in the outer peripheral portion of the semiconductor multilayer structure after etching.

  The present invention can be achieved by making an outer peripheral portion of a substrate surface surrounding a light emitting portion of each element into a concavo-convex shape in a semiconductor light emitting device having an arbitrary configuration. As described above, when the refractive index of the semiconductor multilayer structure is larger than the refractive index of the substrate, the improvement of the light extraction efficiency is remarkable, and the light emitting part is formed by the laminated structure of the group III nitride compound semiconductor, and the sapphire The effect is particularly remarkable when silicon, SiC or spinel is used as the substrate.

  Unevenness is formed on the substrate surface before the semiconductor is epitaxially grown. The shape of the unevenness is arbitrary, but the easiest shape is to provide a large number of convex portions having a truncated cone shape or a truncated cone shape. Or conversely, a large number of concave portions having the shape of the inverted truncated cone or side of the truncated pyramid may be formed. Such irregularities can be formed by a known technique by dry etching using a mask or anisotropic wet etching, depending on the material of the substrate. Alternatively, it can be formed by machining or laser processing. In consideration of the subsequent epitaxial growth, it is necessary that a surface that matches the original substrate surface remains at a certain rate or more. In this respect, when completely random unevenness is formed, it is preferable not to form the unevenness in the epitaxial growth region. On the contrary, as long as the surface which coincides with the original substrate surface remains in a certain ratio or more, unevenness may be formed also in the epitaxial growth region. For the stacking of the semiconductors on the substrate on which the unevenness is formed, a method may be used in which the buffer layer is uniformly formed, ELO growth is performed at an initial stage to close the recesses, and then growth is performed in the vertical direction. The irregularities may be stripes or dots, and may be arranged periodically or randomly. In addition, the uneven | corrugated area | region which the individual element after isolation | separation exposed should be a 10-50 micrometers width | variety area | region in a top view, for example.

The dry etching of the semiconductor to expose the unevenness of the substrate requires that the target semiconductor layer can be etched and that the etching rate of the substrate is sufficiently lower than the etching rate of the semiconductor layer. For example, in the case of a combination of a group III nitride compound semiconductor and a sapphire substrate, chlorine (Cl ₂ ) or boron trichloride (BCl ₃ ) can be used as an etching gas. In addition, when an inert gas such as argon (Ar) is mixed with the etching gas, the etching becomes good.

  As the etching mask, a novolac resist having a thickness of 1 to 20 μm can be used as it is. In addition, an inorganic material such as silicon oxide or silicon nitride can also be used as a mask. Since an inorganic material mask has better etching resistance than an organic resist mask, the etching speed can be increased.

  If a thermoplastic organic resist is used, after resist application, exposure, development, removal of unnecessary parts and pre-baking, the temperature is raised and reflowed to reduce the thickness of the outer periphery of the mask toward the edge, It becomes easy to form a tapered shape in the outer peripheral portion of the semiconductor layer. In the case of a novolak resin, it is preferable to pre-bake at 130 ° C. or lower to degas water and nitrogen, and then reflow the outer periphery at 150 to 180 ° C. The pre-bake time or reflow time is preferably about 1 minute or less, or about 5 minutes or less.

FIG. A sectional view is shown in FIG. The semiconductor light emitting device 100 whose plan view is shown in B was formed as follows.
Prepared is a sapphire substrate 1 having a thickness of about 300 μm on which a frustoconical convex portion having a diameter of 2 μm at the top, a diameter of 3 μm at the bottom, and a height of 0.8 μm is periodically formed on one surface at an interval of 5 μm. did.
On the sapphire substrate 1, an nN film having a thickness of about 5 μm made of GaN doped with 1 × 10 ¹⁸ / cm ^{3 of} silicon (Si) through an AlN buffer layer of about 15 nm and a thickness of about 500 nm made of non-doped GaN. An n-type layer made of n-type Al _0.15 Ga _0.85 N with a thickness of 25 nm doped with 1 × 10 ¹⁷ / cm ^{3 of} silicon (Si) was formed. FIG. In A, only the n-type layer 2 is shown.

On the n-type layer 2, three pairs of a well layer made of non-doped In _0.2 Ga _0.8 N having a thickness of 3 nm and a barrier layer made of non-doped GaN having a thickness of 20 nm are stacked to form a light emitting layer having a multiple quantum well structure (active Layer) 3 is formed.

Further, on the light emitting layer (active layer) 3, a p-type layer made of p-type Al _0.15 Ga _0.85 N having a thickness of 25 nm doped with 2 × 10 ¹⁹ / cm ^{3 of} Mg, and 8 × 10 ¹⁹ / mg of Mg. A p-type contact layer made of 100-nm thick p-type GaN doped with cm ³ was formed. FIG. In A, only the p-type layer 4 is shown.

  A translucent electrode 5 made of ITO is formed on the p-type layer 4, nickel (Ni) having a thickness of about 30 nm, and gold having a thickness of about 1.5 μm on the translucent electrode 5 made of ITO. A pad electrode 6 in which (Au) and aluminum (Al) with a film thickness of about 10 nm are stacked is formed. An n electrode 7 is formed on the n-type layer 2. The n-electrode 7 is configured by laminating vanadium (V) with a film thickness of about 18 nm and aluminum (Al) with a film thickness of about 100 nm on the part of the n-type layer 2 that is partially exposed.

  In the semiconductor light emitting device, the semiconductor layers 2 to 4 were epitaxially grown on the sapphire substrate 1 and etching for forming the n electrode 7 was performed, and then the electrodes were formed as follows.

  First, using a mixture of tin oxide and indium oxide (tin oxide 5%) as a target, a translucent electrode 5 made of ITO having a thickness of 300 nm was formed by an electron beam evaporation method under an oxygen pressure of 0.06 Pa. Next, baking was performed at 600 ° C. for 5 minutes in a nitrogen atmosphere. Thereafter, a region where the translucent electrode 5 made of ITO should be left was masked using a photoresist, and the translucent electrode 5 made of ITO without masking was removed with an iron chloride etching solution.

  Next, after forming a mask with a window where the pad electrode 6 is to be formed by photoresist, a nickel layer with a thickness of about 30 nm 3, a gold layer with a thickness of about 1.5 μm, an aluminum layer with a thickness of about 10 nm, Were sequentially formed on the translucent electrode 5. Thereafter, the photoresist was removed.

  Exactly in the same manner, after forming a mask using a region where the n electrode 7 is to be formed with a photoresist, a vanadium layer having a thickness of about 18 nm and an aluminum layer 142 having a thickness of about 100 nm are exposed to the n-type contact layer. Formed in the region. Thereafter, the photoresist was removed.

  Next, the translucent electrode (ITO) 5, the pad electrode 6, and the n electrode 7 were heat-treated.

Next, in order to separate the semiconductor layers of the individual elements and expose the irregularities on the surface of the sapphire substrate 1, a novolac photoresist mask was formed to a thickness of 10 μm. The thickness is preferably 5 μm or more, and more preferably 8 μm or more. That is, by exposure / development, a mask is formed only in a rectangular area surrounded by a 50 μm-width grid frame centered on the separation line, and then prebaked at 130 ° C. for 1 minute and then at 170 ° C. for 1 minute Heat treatment was performed to reflow the outer periphery of the mask so that the mask became thinner toward the edge. Thereafter, an etching gas having a ratio of 9: 1 of chlorine (Cl ₂ ) and argon (Ar) was supplied at 100 sccm to etch the n-type layer 2 in the region to be the outer periphery of each element after separation. ICP, 300W. As a result, the irregularities on the substrate surface of the outer peripheral portion of the element were exposed, and a taper with a depression angle of 30 degrees was formed in the portion of the n-type layer 2 facing the exposed portion of the substrate surface.

  Thereafter, the light emitting device 100 was formed by dicing into individual devices. The width of the exposed portion of the uneven portion on the outer periphery of the light emitting device 100 after the separation was about 25 μm.

  The light emission intensity of the light emitting element 100 formed in this way is shown in FIG. For comparison, after forming the process electrode (the n-type layer 2 covers the separation line), the light emitting device 900 (FIG. 3) was separated by a dicing saw without performing etching for exposing the sapphire substrate. ) Is shown together with FIG. According to FIG. 2 each having about 4000 pieces of data, the light emitting device 100 according to the present example is 5 to 10% in comparison with the light emitting device 900 that is separated by dicing without exposing the uneven portion of the substrate surface. The light extraction efficiency was improved. This is because, in addition to the effect of improving the light extraction efficiency from the irregularities in the peripheral portion, there is no light absorption by the damaged region on the side surface of the semiconductor multilayer structure due to dicing as described below.

  In Example 1, the semiconductor layers of the individual elements were separated, and the relationship between the atmospheric pressure during etching and the etching temperature to expose the irregularities on the surface of the sapphire substrate 1 was examined. This is shown in FIG. It was found that the higher the atmospheric pressure during etching, the higher the etching rate and the lower the wafer temperature. From the heat resistance of the resist, the substrate temperature should be 250 ° C. or lower, more preferably 230 ° C. or lower. Since a higher etching rate is preferable, the pressure range is preferably 1.5 to 3 Pa. Within this range, both the processing speed and the substrate temperature (resist film protection) can be achieved.

  FIG. 5 shows the state of crystal defects by a cross-sectional SEM image of the outer periphery of the n-type layer 2 of the light-emitting element formed at this time and a panchromatic image of the cathodoluminescence method. Note that “Ref” is a light emitting element 900 in which the semiconductor layers of the individual elements are separated and the elements are separated by a dicing saw without performing etching for exposing the unevenness of the surface of the sapphire substrate 1.

  From the result of cathodoluminescence, the light emitting element 900 (Ref) which has been diced together with the semiconductor layer has a horizontal damaged region having a thickness of about 2 μm. A damaged area generated during dicing absorbs light, which deteriorates light extraction.

  On the other hand, according to the present invention, it is understood that the damaged region has a horizontal thickness of 0.2 μm or less and hardly occurs in the semiconductor layer. That is, according to the present invention, it is possible to prevent a damage region that deteriorates light extraction from occurring in the semiconductor layer.

  In addition, it can be seen that the taper angle (the depression angle) of the outer peripheral portion of the semiconductor layer changes depending on the atmospheric pressure during etching. Actually, the taper angle decreases as the pressure increases to 0.5 Pa, 2 Pa, and 3 Pa. This is because the substrate temperature decreases and the etching rate of the semiconductor layer becomes higher than the etching rate of the resist.

[Modification]
Instead of the resist, silicon oxide or silicon nitride can be used as an etching mask material. In this case, silicon oxide is formed on the entire surface by CVD, and then the silicon oxide film is patterned by photolithography. The semiconductor layer can be dry etched using the silicon oxide mask thus patterned. Note that a coating material such as spin-on glass can be used instead of CVD. When an inorganic material is used as a mask for dry etching of a semiconductor layer, the etching temperature can be increased even at a high temperature, so that the etching speed can be increased. However, the substrate temperature is 200 to 600 ° C., preferably 500 ° C. or less.

Sectional drawing (1.A) and top view (1.B) which show the structure of the semiconductor light-emitting device 100 which concerns on one specific Example of this invention. The graph which shows the emitted light intensity of the semiconductor light-emitting device 100 which concerns on an Example, and the semiconductor light-emitting device 900 which concerns on a comparative example. Sectional drawing which shows the structure of the semiconductor light-emitting device 900 which concerns on a comparative example. The graph which showed the pressure at the time of the etching for semiconductor layer isolation | separation, the etching rate, and the relationship of wafer temperature. The SEM image and CL image showing the pressure at the time of etching for semiconductor layer separation and the taper state of the outer peripheral portion of the formed n-GaN layer 2 are combined with the SEM image and CL image when the element is separated by dicing. The image figure shown.

Explanation of symbols

1: Sapphire substrate having irregularities on the epitaxial growth surface side 2: n-type group III nitride compound semiconductor layer (n-type layer), including a buffer layer and a non-doped layer immediately above it.
3: Light emitting layer (active layer)
4: p-type group III nitride compound semiconductor layer (p-type layer)
5: Translucent electrode 6: Pad electrode 7: N electrode

Claims (8)

In a semiconductor light emitting device in which a semiconductor laminated structure is formed by laminating a semiconductor on the uneven surface of a substrate having an uneven surface,
A semiconductor light-emitting element, wherein an uneven surface of the substrate is exposed at an outer peripheral portion of the semiconductor multilayer structure. The semiconductor light emitting device according to claim 1, wherein the semiconductor multilayer structure is made of a group III nitride compound semiconductor. 3. The semiconductor light emitting device according to claim 1, wherein the substrate is made of sapphire, silicon, SiC, or spinel. 4. The taper having a depression angle of 45 degrees or less is formed on an outer peripheral portion of the semiconductor multilayer structure toward a portion where the uneven surface of the substrate is exposed. 5. The semiconductor light-emitting device described in 1. The semiconductor light emitting element according to claim 1, wherein the uneven surface of the substrate is exposed by dry etching. In the method for manufacturing a semiconductor light emitting device,
Forming a semiconductor laminated structure by laminating a semiconductor on an irregular surface of a substrate having irregularities on the surface;
And a step of performing selective dry etching in order to expose the uneven surface of the substrate at the outer peripheral portion of the semiconductor multilayer structure of each element. The method for manufacturing a semiconductor light emitting device according to claim 6, wherein the dry etching uses a gas containing chlorine or a compound of chlorine. The mask used for the dry etching is formed separately for each element except for a predetermined region sandwiching the separation line between the elements, and is pre-baked and then reflowed at a higher temperature to form a film on the outer periphery of the mask. 8. The method of manufacturing a semiconductor light emitting element according to claim 6, wherein the thickness is changed and the outer peripheral portion of the semiconductor multilayer structure is formed into a tapered shape at the time of etching.