JP2008053278A - Laminated capacitor - Google Patents

Laminated capacitor Download PDF

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JP2008053278A
JP2008053278A JP2006225293A JP2006225293A JP2008053278A JP 2008053278 A JP2008053278 A JP 2008053278A JP 2006225293 A JP2006225293 A JP 2006225293A JP 2006225293 A JP2006225293 A JP 2006225293A JP 2008053278 A JP2008053278 A JP 2008053278A
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ceramic
ceramics
multilayer capacitor
layer portion
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Shinichi Yamaguchi
晋一 山口
Yoshimasa Yoshino
芳正 吉野
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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<P>PROBLEM TO BE SOLVED: To provide a laminated capacitor improving the dielectric constant of ceramics without lowering an insulation resistance capable of obtaining a large electrostatic capacity and having an excellent reliability. <P>SOLUTION: In the laminated capacitor 1, a plurality of internal electrodes 3a, 3b, 4a and 4b are formed so as to be superposed through ceramic layers in a ceramics sintered body 2 composed of (Ba, Ca)(Ti, Zr)O<SB>3</SB>ceramics as a main component and ceramics containing Ni and an rare earth element R as by-components at a mol ratio Ni/R at a value from 0.05 to 0.25. In the laminated capacitor 1, sections superposing a plurality of the internal electrodes 3a, 3b, 4a and 4b through the ceramic layers are used as an internal layer 2W and ceramics formed outside the laminating direction of the internal layer 2W and laminating no internal electrode through ceramics are used as external layers 2V. In the laminated capacitor 1, B/A is set in 0.5 or less when the thickness of the internal layer 2W is represented by A and the whole thickness of the external layers 2V and 2V by B. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、誘電体セラミックスを用いて、セラミックスと内部電極とを一体焼成する技術により得られるセラミック焼結体を用いた積層コンデンサに関する。   The present invention relates to a multilayer capacitor using a ceramic sintered body obtained by a technique of integrally firing ceramics and internal electrodes using dielectric ceramics.

積層コンデンサでは、小型化を進めるために、小型かつ大容量であることが求められている。また、用途によっては、誘電率が10000以上の誘電体セラミックスを用いた大容量の積層コンデンサも用いられている。このような積層コンデンサでは、例えば、静電容量温度特性はJIS規格のF特性を満たすものとなっており、静電容量温度特性は、さほど良好なものではない。すなわち、静電容量温度特性よりも大きな容量を優先している。   A multilayer capacitor is required to have a small size and a large capacity in order to reduce the size. Depending on the application, a large-capacity multilayer capacitor using a dielectric ceramic having a dielectric constant of 10,000 or more is also used. In such a multilayer capacitor, for example, the capacitance temperature characteristic satisfies the F characteristic of JIS standard, and the capacitance temperature characteristic is not so good. That is, priority is given to a capacity larger than the capacitance temperature characteristic.

誘電率が10000以上の誘電体セラミックスとしては、下記の特許文献1に記載のように、BaTiOのBa、Tiを、それぞれCa、Zrで置換してなる(Ba,Ca)(Ti,Zr)O系セラミックスが知られている。特許文献1では、(Ba1−xCa)(Ti1−yZr)Oで表される主成分(ただし、0.01≦x≦0.10、0.1<y<0.26)100重量部に対し、副成分としてYを0.2〜1.0重量部、MnOを0.06〜0.6重量部、Alを0.1〜1.0重量部、NiOを0.1〜1.0重量部を含む組成の誘電体セラミックスを用いた積層コンデンサが開示されている。 As dielectric ceramics having a dielectric constant of 10,000 or more, as described in Patent Document 1 below, BaTiO 3 of BaTiO 3 is substituted with Ca and Zr, respectively (Ba, Ca) (Ti, Zr). O 3 ceramics are known. In Patent Document 1, a main component represented by (Ba 1-x Ca x ) (Ti 1-y Zr y ) O 3 (however, 0.01 ≦ x ≦ 0.10, 0.1 <y <0. 26) 0.2 to 1.0 part by weight of Y 2 O 3 , 0.06 to 0.6 part by weight of MnO 2 , and 0.1 to 1 part of Al 2 O 3 as subcomponents with respect to 100 parts by weight. A multilayer capacitor using a dielectric ceramic having a composition containing 0 part by weight and 0.1 to 1.0 part by weight of NiO is disclosed.

しかしながら、近年、静電容量のより一層の増大が求められている。静電容量を増大するには、(1)積層構造を工夫する方法、あるいは(2)誘電体セラミック層の誘電率を高める方法が考えられる。   However, in recent years, a further increase in capacitance has been demanded. In order to increase the capacitance, (1) a method of devising a laminated structure or (2) a method of increasing the dielectric constant of the dielectric ceramic layer can be considered.

(2)誘電体セラミック層の誘電率を高めるには、セラミックスの組成を改良する方法が効果的である。しかしながら、誘電率を高めた場合、他の特性との両立、例えば、誘電率温度特性や高温負荷信頼性等との両立が困難となる。したがって、他の特性を犠牲にすることなく、誘電率のみを高めるには限界があった。   (2) In order to increase the dielectric constant of the dielectric ceramic layer, a method of improving the ceramic composition is effective. However, when the dielectric constant is increased, it is difficult to achieve compatibility with other characteristics, for example, compatibility with dielectric temperature characteristics and high temperature load reliability. Therefore, there is a limit to increasing only the dielectric constant without sacrificing other characteristics.

他方、下記の特許文献2には、チタン酸バリウムに、副成分として、MgOおよび希土類酸化物を2モル%以下添加してなる組成の誘電体セラミックスを用いた積層コンデンサにおいて、内部電極間に挟まれたセラミック層の厚みを2μm以下と薄くし、内部電極の厚みを1μm以上とし、内部電極積層数を100層以上とすることにより、セラミック層の誘電率を高めることが示されている。   On the other hand, in Patent Document 2 below, a multilayer capacitor using a dielectric ceramic having a composition in which MgO and rare earth oxides are added to barium titanate as subcomponents by 2 mol% or less is sandwiched between internal electrodes. It has been shown that the dielectric constant of the ceramic layer is increased by reducing the thickness of the ceramic layer to 2 μm or less, the thickness of the internal electrode to 1 μm or more, and the number of stacked internal electrodes to 100 or more.

ここでは、内部電極と誘電体セラミック層とを一体焼成する際に、内部電極の焼成時の収縮率と、誘電体セラミック層の焼成時の収縮率との差により、内部電極間に挟まれた誘電体セラミック層に応力が加わり、誘電率が高められるとされている。   Here, when the internal electrode and the dielectric ceramic layer were integrally fired, the internal electrode was sandwiched between the internal electrodes due to the difference between the shrinkage rate during firing of the internal electrode and the shrinkage rate during firing of the dielectric ceramic layer. It is said that the dielectric constant is increased by applying stress to the dielectric ceramic layer.

また、特許文献2では、従来の積層セラミックコンデンサでは、誘電体層の積層数を変えたとしても比誘電率はほとんど変化しなかったのに対し、特許文献2に記載の構成では、誘電体層がチタン酸バリウムをコアとし、MgO及び希土類酸化物の副成分がシェルを形成するコアシェル構造の粒子となっているため、誘電体セラミックス層を薄くし、積層数を高めることにより、上記応力により加わる歪みが大きくなり、誘電率が高められるとされている。
特開平10−139538号公報 特開2004−111461号公報
Further, in Patent Document 2, in the conventional multilayer ceramic capacitor, the relative dielectric constant hardly changed even when the number of dielectric layers was changed, whereas in the configuration described in Patent Document 2, the dielectric layer Has a core-shell structure particle in which barium titanate is the core and MgO and rare earth oxide subcomponents form a shell. Therefore, the dielectric ceramic layer is thinned and the number of layers is increased, so that the stress is applied. It is said that the distortion increases and the dielectric constant is increased.
JP-A-10-139538 JP 2004-111461 A

上記のように、特許文献2に記載の積層コンデンサでは、上記特定の組成のコアシェル型誘電体セラミックスを用いた積層コンデンサにおいて、内部電極間に挟まれたセラミック層の厚みを薄くし、かつ積層数を増大することにより、焼成時の収縮率の差によりセラミック層に応力が加わり、誘電率が高められるとされている。従って、誘電体セラミックスの組成を変更することなく、誘電率を高め、大容量の積層コンデンサを得ることができるとされている。   As described above, in the multilayer capacitor described in Patent Document 2, in the multilayer capacitor using the core-shell dielectric ceramic having the specific composition, the thickness of the ceramic layer sandwiched between the internal electrodes is reduced, and the number of stacked layers By increasing the stress, stress is applied to the ceramic layer due to the difference in shrinkage during firing, and the dielectric constant is increased. Accordingly, it is said that a dielectric capacitor can be increased and a large-capacity multilayer capacitor can be obtained without changing the composition of the dielectric ceramic.

しかしながら、積層コンデンサにおいて、外径寸法を保ちつつ積層数を増大するには、内部電極間で挟まれたセラミック層の厚みを薄くする必要がある。内部電極間に挟まれたセラミック層の厚みが薄くなりすぎると、セラミック層を介して重なり合っている内部電極間において短絡が生じるおそれがあり、積層コンデンサの絶縁抵抗が低下するおそれがあった。   However, in the multilayer capacitor, in order to increase the number of layers while maintaining the outer diameter, it is necessary to reduce the thickness of the ceramic layer sandwiched between the internal electrodes. If the thickness of the ceramic layer sandwiched between the internal electrodes is too thin, there is a risk that a short circuit will occur between the internal electrodes that overlap with each other via the ceramic layer, and the insulation resistance of the multilayer capacitor may be reduced.

本発明の目的は、上述した従来技術の現状に鑑み、誘電体セラミックスの組成を変更することなく誘電率が高められており、従って、大容量化に適しており、しかも内部電極間に挟まれたセラミック層の厚みをさほど薄くする必要はなく、したがって、絶縁抵抗の低下が生じ難い、信頼性に優れた積層コンデンサを提供することにある。   The object of the present invention is to increase the dielectric constant without changing the composition of the dielectric ceramics in view of the above-described state of the prior art, and is therefore suitable for increasing the capacity and being sandwiched between the internal electrodes. Therefore, it is not necessary to reduce the thickness of the ceramic layer so much, and it is therefore an object of the present invention to provide a multilayer capacitor excellent in reliability in which a decrease in insulation resistance hardly occurs.

本発明は、主成分が(Ba,Ca)(Ti,Zr)O系セラミック層であり、副成分としてNi及び希土類元素R(但し、Rは、Y,Sc,La,Ce,Pr,Nd,Sm,Eu,Tb,Gd,Dy,Ho,Er,Tm,Yb,Luからなる群から選択した少なくとも1種の元素)を含む、セラミックスから成るセラミック焼結体と前記セラミック焼結体内において、セラミック層を介して重なり合うように配置された複数の内部電極層を備える積層コンデンサであって、モル比Ni/Rが0.05以上、0.2未満であり、かつ前記セラミック焼結体内において、複数の内部電極がセラミック層を介して重なり合っている部分を内層部、内層部の積層方向外側に設けられており、内部電極がセラミック層を介して積層されていないセラミック部分を外層部とし、内層部の厚みをA、外層部の全厚みをBとしたときに、B/Aが0.5以下とされていることを特徴とする。 In the present invention, the main component is a (Ba, Ca) (Ti, Zr) O 3 based ceramic layer, and Ni and rare earth elements R (where R is Y, Sc, La, Ce, Pr, Nd) as subcomponents. , Sm, Eu, Tb, Gd, Dy, Ho, Er, Tm, Yb, Lu), a ceramic sintered body made of ceramics, and the ceramic sintered body, A multilayer capacitor comprising a plurality of internal electrode layers arranged so as to overlap with each other via a ceramic layer, wherein the molar ratio Ni / R is 0.05 or more and less than 0.2, and in the ceramic sintered body, A portion in which a plurality of internal electrodes overlap with each other through a ceramic layer is provided on the inner layer portion and on the outer side in the stacking direction of the inner layer portion. B / A is set to 0.5 or less, where the hook portion is the outer layer portion, the thickness of the inner layer portion is A, and the total thickness of the outer layer portion is B.

本発明に係る積層コンデンサでは、好ましくは、前記セラミックスの主成分を(Ba1−xCa)(Ti1−yZr)Oと表したときに、0.01≦x≦0.05かつ0.05≦y≦0.15とされており、この場合には、内部電極との焼成に際しての収縮率差をより一層高めて、より大きな静電容量を得ることができる。 In the multilayer capacitor according to the present invention, preferably, 0.01 ≦ x ≦ 0.05 when the main component of the ceramic is expressed as (Ba 1−x Ca x ) (Ti 1−y Zr y ) O 3. Moreover, 0.05 ≦ y ≦ 0.15, and in this case, the shrinkage rate difference upon firing with the internal electrode can be further increased, and a larger capacitance can be obtained.

また、本発明では、好ましくは、内部電極はその主成分がNiであり、その場合には、焼成時の内部電極の収縮率が十分大きく、誘電体セラミック層との収縮差により、上記内層部に大きな応力が加わり、それによって、内層部の誘電体セラミックの誘電率がより一層が効果的に高められる。   In the present invention, preferably, the internal electrode is mainly composed of Ni, and in this case, the shrinkage rate of the internal electrode during firing is sufficiently large, and the inner layer portion is caused by a shrinkage difference from the dielectric ceramic layer. As a result, a large stress is applied to the dielectric ceramic, thereby further effectively increasing the dielectric constant of the dielectric ceramic of the inner layer portion.

本発明に係る積層コンデンサにおいては、上記外層部が内層部の積層方向の両側に配置されるが、両側の外層部の厚みは等しいことが望ましいが、本発明の目的を損なわない限り、多少異なっていてもよい。   In the multilayer capacitor according to the present invention, the outer layer portion is disposed on both sides of the inner layer portion in the stacking direction, but the thicknesses of the outer layer portions on both sides are preferably equal, but are slightly different as long as the object of the present invention is not impaired. It may be.

本発明に係る積層コンデンサでは、主成分が(Ba,Ca)(Ti,Zr)O系セラミックスであり、副成分として希土類元素及びNiを含む組成の誘電体セラミックスを用いてセラミック焼結体が構成されているので、大容量化が容易であり、しかも、上記内層部の厚みをA、外層部の全厚みをBとしたときに、B/Aが0.5以下であり、かつモル比がNi/Rが0.05以上0.20未満であるため、焼成時の内部電極と誘電体セラミック層との収縮率差により、内層部に大きな応力が加わると、内層部の誘電体セラミック層の誘電率が効果的に高められる。 In the multilayer capacitor according to the present invention, a ceramic sintered body is formed using a dielectric ceramic having a composition that includes (Ba, Ca) (Ti, Zr) O 3 ceramics as a main component and includes rare earth elements and Ni as subcomponents. Since it is configured, it is easy to increase the capacity, and when the thickness of the inner layer portion is A and the total thickness of the outer layer portion is B, B / A is 0.5 or less and the molar ratio is When Ni / R is 0.05 or more and less than 0.20, if a large stress is applied to the inner layer due to the difference in shrinkage between the internal electrode and the dielectric ceramic layer during firing, the dielectric ceramic layer of the inner layer The dielectric constant is effectively increased.

この場合、内層部と外層部の収縮率差により生じた応力により、内層部の誘電体セラミック層の誘電率が高められるので、内層部における内部電極間に挟まれた1層のセラミック層の厚みをさほど薄くする必要はない。したがって、絶縁抵抗の低下を招くことなく、大容量の積層コンデンサを提供することが可能となる。   In this case, since the dielectric constant of the dielectric ceramic layer of the inner layer portion is increased by the stress generated by the difference in shrinkage rate between the inner layer portion and the outer layer portion, the thickness of one ceramic layer sandwiched between the inner electrodes in the inner layer portion. There is no need to make it too thin. Therefore, it is possible to provide a large-capacity multilayer capacitor without causing a decrease in insulation resistance.

以下、図面を参照し本発明の具体的な実施形態を説明することにより、本発明を明らかにする。   Hereinafter, the present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

図1は、本発明の一実施形態にかかる積層コンデンサを説明するための略図的正面断面図である。   FIG. 1 is a schematic front sectional view for explaining a multilayer capacitor according to an embodiment of the present invention.

積層コンデンサ1は、セラミック焼結体2を有する。セラミック焼結体2は、直方体状の形状を有し、第1の端面2a、第1の端面2aと対向している第2の端面2b、上面2c、及び下面2dを有する。   The multilayer capacitor 1 has a ceramic sintered body 2. The ceramic sintered body 2 has a rectangular parallelepiped shape, and includes a first end surface 2a, a second end surface 2b facing the first end surface 2a, an upper surface 2c, and a lower surface 2d.

セラミックス焼結体2内には、セラミック層を介して重なり合うように、複数の第1の内部電極3a,3bと、第2の内部電極4a,4bとが設けられている。なお、図示を容易とするために、図1では、内部電極の数は、実際よりもかなり少なく示されいることを指摘しておく。   In the ceramic sintered body 2, a plurality of first internal electrodes 3 a and 3 b and second internal electrodes 4 a and 4 b are provided so as to overlap with each other via a ceramic layer. For ease of illustration, it should be pointed out that in FIG. 1, the number of internal electrodes is considerably smaller than the actual number.

セラミック焼結体2は、周知のセラミックス−金属一体焼成技術により得られている。すなわち、誘電体セラミックスを主体とする複数枚のセラミックグリーンシートを内部電極を介して積層し、上下に無地のセラミックグリーンシートを積層し、得られた積層体を焼成することにより得られている。   The ceramic sintered body 2 is obtained by a known ceramic-metal integrated firing technique. That is, it is obtained by laminating a plurality of ceramic green sheets mainly composed of dielectric ceramics via internal electrodes, laminating plain ceramic green sheets on the top and bottom, and firing the obtained laminate.

複数の第1の内部電極3a,3bは、セラミック焼結体2の上面2c及び下面2dと平行な方向に延び、かつ第1の端面2aに引き出されている。第2の内部電極4a,4bは、上面2c、下面2dと平行な方向に延び、かつ第2の端面2bに引き出されている。   The plurality of first internal electrodes 3a and 3b extend in a direction parallel to the upper surface 2c and the lower surface 2d of the ceramic sintered body 2, and are drawn out to the first end surface 2a. The second inner electrodes 4a and 4b extend in a direction parallel to the upper surface 2c and the lower surface 2d, and are drawn out to the second end surface 2b.

セラミック焼結体2の第1の端面2aを覆うように、第1の外部電極5が形成されており、第2の端面2bを覆うように、第2の外部電極6が形成されている。   A first external electrode 5 is formed so as to cover the first end face 2a of the ceramic sintered body 2, and a second external electrode 6 is formed so as to cover the second end face 2b.

本実施形態の積層コンデンサ1では、セラミック焼結体2は、主成分が(Ba,Ca)(Ti,Zr)O系セラミックスであり、副成分として、Ni及び希土類元素Rを含み、モル比Ni/Rが0.05以上、0.2未満である誘電体セラミックスにより構成されている。なお、希土類元素Rとは、具体的には、Y、Sc、La、Ce、Pr、Nd、Sm、Eu、Tb、Gd、Dy、Ho、Er、Tm、Yb及びLuから選択された少なくとも一種である。すなわち、希土類元素Rとしては、2種以上の希土類元素が配合されていてもよい。 In the multilayer capacitor 1 of the present embodiment, the ceramic sintered body 2 is mainly composed of (Ba, Ca) (Ti, Zr) O 3 -based ceramics, contains Ni and a rare earth element R as subcomponents, and has a molar ratio. It is made of dielectric ceramics having Ni / R of 0.05 or more and less than 0.2. The rare earth element R is specifically at least one selected from Y, Sc, La, Ce, Pr, Nd, Sm, Eu, Tb, Gd, Dy, Ho, Er, Tm, Yb, and Lu. It is. That is, as the rare earth element R, two or more kinds of rare earth elements may be blended.

また、主成分としての(Ba,Ca)(Ti,Zr)O系セラミックスは、好ましくは、(Ba1−xCa)(Ti1−yZr)Oと表したときに、xが0.01以上、0.05以下であり、yが0.05以上、0.15以下の範囲とされる。 The (Ba, Ca) (Ti, Zr) O 3 ceramics as the main component is preferably x when expressed as (Ba 1-x Ca x ) (Ti 1-y Zr y ) O 3. Is 0.01 or more and 0.05 or less, and y is in the range of 0.05 or more and 0.15 or less.

また、上記、第1,2の内部電極3a,3b,4a,4bは、適宜の金属により構成され、このような金属としては、Ni、Ag、Cu、Pt、Ac−Pdなどの適宜の金属もしくは合金をあげることができる。好ましくは、上記誘電体セラミックスの焼成に際しての焼成収縮率に比べて、焼成収縮率が大きいNiが用いられる。   The first and second internal electrodes 3a, 3b, 4a, 4b are made of an appropriate metal. Examples of such metals include appropriate metals such as Ni, Ag, Cu, Pt, and Ac—Pd. Or an alloy can be mentioned. Preferably, Ni having a larger firing shrinkage rate than the firing shrinkage rate at the time of firing the dielectric ceramic is used.

外部電極5,6は、適宜の金属もしくは、合金により形成することができる。例えば、Cu、Agもしくはこれらの合金により、外部電極5,6を形成することができる。外部電極5,6は、導電性ペーストの塗布、焼付け法等の様々な方法により形成することができる。また、外部電極表面には、Snメッキ膜などのメッキ膜が形成されていてもよい。   The external electrodes 5 and 6 can be formed of an appropriate metal or alloy. For example, the external electrodes 5 and 6 can be formed of Cu, Ag, or an alloy thereof. The external electrodes 5 and 6 can be formed by various methods such as application of a conductive paste and baking. A plating film such as a Sn plating film may be formed on the surface of the external electrode.

積層コンデンサ1の特徴は、セラミックス焼結体2が上記特定の組成の誘電体セラミックスから成り、かつ第1,第2の内部電極3a,3b,4a,4bがセラミック層を介して重なり合っている部分、すなわち静電容量が取り出される部分を内層部2W、内層部2Wの積層方向両側に位置しているセラミックス部分を外層部2Vとし、内層部2Wの厚みをA、2つの外層部2V、2Vの厚みの合計をBしたとき、B/Aが0.5以下とされていることにある。それによって、絶縁抵抗の低下を招くことなく、内部電極3a,3b,4a,4b間で挟まれたセラミックス層の誘電率を高めて、大きな静電容量を得ることができる。これは、焼成に際し、内部電極3a,3b,4a,4bの収縮率が、誘電体セラミックスの収縮率よりも非常に大きく、収縮率差による応力が、内層部2Wに位置しているセラミック層に大きく加わり、それによって、内層部2Wにおけるセラミックスの誘電率が高められることによる。   The multilayer capacitor 1 is characterized in that the ceramic sintered body 2 is made of dielectric ceramics having the above-mentioned specific composition, and the first and second internal electrodes 3a, 3b, 4a, 4b are overlapped via the ceramic layer. That is, the portion where the capacitance is taken out is the inner layer portion 2W, the ceramic portions located on both sides of the inner layer portion 2W in the stacking direction are the outer layer portions 2V, the thickness of the inner layer portion 2W is A, the two outer layer portions 2V and 2V. When the total thickness is B, B / A is 0.5 or less. Thereby, the dielectric constant of the ceramic layer sandwiched between the internal electrodes 3a, 3b, 4a, 4b can be increased without causing a decrease in insulation resistance, and a large capacitance can be obtained. This is because, during firing, the shrinkage rate of the internal electrodes 3a, 3b, 4a, 4b is much larger than the shrinkage rate of the dielectric ceramics, and the stress due to the shrinkage rate difference is applied to the ceramic layer located in the inner layer portion 2W. This is because the dielectric constant of the ceramic in the inner layer portion 2W is increased.

すなわち、前述した特許文献2では、異なる電位に接続される内部電極間に挟まれたセラミック層に、焼成に際しての収縮率差による応力を与えることにより、セラミック層の誘電率が高められるとされていた。そのため、セラミック層に大きな応力を加えて誘電率を高めるために、内部電極間に挟まれたセラミックス層の厚みが薄くされていた。   That is, in Patent Document 2 described above, it is said that the dielectric constant of the ceramic layer can be increased by applying stress due to the difference in shrinkage ratio during firing to the ceramic layer sandwiched between internal electrodes connected to different potentials. It was. For this reason, in order to increase the dielectric constant by applying a large stress to the ceramic layer, the thickness of the ceramic layer sandwiched between the internal electrodes has been reduced.

これに対して、本願発明者は、焼成に際しての収縮率差によるセラミック層への応力により誘電率が高められる現象をさらに検討した結果、内部電極の焼成に際しての収縮率と、セラミック層の焼成に際しての収縮率との差による応力は誘電率を高めるように作用するものの、この作用は、内部電極間に挟まれたセラミックス層の厚みを薄くせずとも、特定の誘電体セラミックスを用いた場合には、上記内層部2W、及び外層部2V、2Vとの厚みを制御すれば、誘電率を効果的に高め得ることを初めて見出し、本発明を成すに至った。   In contrast, the inventor of the present application further examined the phenomenon in which the dielectric constant is increased by the stress on the ceramic layer due to the difference in shrinkage rate during firing, and as a result, the shrinkage rate during firing of the internal electrode and the firing of the ceramic layer. Although the stress due to the difference from the shrinkage rate of the material acts to increase the dielectric constant, this effect is achieved when a specific dielectric ceramic is used without reducing the thickness of the ceramic layer sandwiched between the internal electrodes. Has found for the first time that the dielectric constant can be effectively increased by controlling the thickness of the inner layer portion 2W and the outer layer portions 2V and 2V, and has achieved the present invention.

すなわち、上記特定の誘電体セラミックスを用いてセラミック焼結体を構成し、かつ内層部2Wの厚みに対する外層部2V、2Vの全厚みの比B/Aを0.5以下とすれば、内部電極間に挟まれたセラミック層の誘電率を効果的に高めることができ、すなわち、異なる電位に接続される内部電極間に挟まれたセラミック層の厚みをさほど薄くせずとも、誘電率を効果的に高めることができ、大きな静電容量を得ることができる。   That is, if a ceramic sintered body is constituted by using the specific dielectric ceramic, and the ratio B / A of the total thickness of the outer layer portions 2V and 2V to the thickness of the inner layer portion 2W is 0.5 or less, the internal electrode The dielectric constant of the ceramic layer sandwiched between them can be effectively increased, that is, the dielectric constant can be effectively increased without reducing the thickness of the ceramic layer sandwiched between internal electrodes connected to different potentials. And a large capacitance can be obtained.

特に、誘電体セラミックスとして、上記のように、上記構造式において、xが0.01〜0.05の範囲にかつyが0.05〜0.15の範囲にある場合には、収縮率差による応力がより効果的に加わるためか、誘電率をより一層効果的に高めることができ、より大きな静電容量を実現することができる。   In particular, as the dielectric ceramic, as described above, in the above structural formula, when x is in the range of 0.01 to 0.05 and y is in the range of 0.05 to 0.15, the shrinkage rate difference This is because the stress due to is more effectively applied, so that the dielectric constant can be increased more effectively, and a larger capacitance can be realized.

また、内部電極として、Niを主成分とする内部電極を形成した場合には、内部電極の焼成に際しての収縮率が十分に大きくなり、誘電率をより一層効果的に高めることができる。   Further, when an internal electrode containing Ni as a main component is formed as the internal electrode, the shrinkage rate upon firing of the internal electrode becomes sufficiently large, and the dielectric constant can be further effectively increased.

外層部の全厚みBは、図1に示した実施形態では、2つの外層部2V,2Vの厚みの合計である。   The total thickness B of the outer layer portion is the sum of the thicknesses of the two outer layer portions 2V and 2V in the embodiment shown in FIG.

次に、具体的な実験例に基づき、本発明では、絶縁抵抗の低下を招くことなく、静電容量を確実に高め得ることを明らかにする。   Next, based on a specific experimental example, it will be clarified that the present invention can surely increase the capacitance without causing a decrease in insulation resistance.

(実験例1)
BaTiO、BaZrO、CaZrO、MnCO、SiO及び希土類元素酸化物の各粉末を用意し、これらの粉末を、式(Ba1−XCa(Ti1−yZr)Oにおいて、x=0.04、y=0.10、m=1.003となるように配合し、仮焼し、主成分を構成するための仮焼原料を得た。
(Experimental example 1)
BaTiO 3 , BaZrO 3 , CaZrO 3 , MnCO 3 , SiO 2, and rare earth element oxide powders are prepared, and these powders are expressed by the formula (Ba 1-X Ca X ) m (Ti 1-y Zr y ) O. 3 were mixed so that x = 0.04, y = 0.10, m = 1.003, and calcined to obtain a calcined raw material for constituting the main component.

上記仮焼原料100モルに対して、Mnが0.05モル、Siが0.2モル部、Y及びNiが下記の表1に示す割合(モル比)となるように、MnCO、SiO、Y、NiOの各粉末を添加し、ボールミルにより湿式混合し、粉砕した。このようにして、スラリーを得た。 MnCO 3 , SiO 2 so that Mn is 0.05 mol, Si is 0.2 mol part, and Y and Ni are in the ratio (molar ratio) shown in Table 1 below with respect to 100 mol of the calcined raw material. , Y 2 O 3 and NiO powders were added, wet mixed by a ball mill, and pulverized. In this way, a slurry was obtained.

得られたスラリーを乾燥した後、粉砕し、セラミック原料を得た。上記セラミック原料に、ポリビニルブチラール系バインダ樹脂及び有機溶剤としてのエタノールを加えて、ボールミルにより湿式混合し、セラミックスラリーを得た。   The obtained slurry was dried and then pulverized to obtain a ceramic raw material. A polyvinyl butyral binder resin and ethanol as an organic solvent were added to the ceramic raw material, and wet mixed by a ball mill to obtain a ceramic slurry.

上記セラミックスラリーを用いて、ドクターブレード法により成形し、マザーのセラミックグリーンシートを得た。上記マザーのセラミックグリーンシート上に、Niを主成分とする導電ペーストを印刷した。導電ペーストが印刷されたマザーのセラミックグリーンシートを60枚積層し、積層体の内層部分を得た。この内層部分に対し、積層方向両側に、導電ペーストが印刷されていないことを除いては上記と同様にして用意した無地のマザーのセラミックグリーンシートを複層枚積層し、内層部の上下に、外層部を設け、マザーの積層体を得た。なお、外層部を構成するための無地のマザーのセラミックグリーンシートの積層枚数は、下記の表1のB/Aを実現する枚数とした。   The ceramic slurry was molded by a doctor blade method to obtain a mother ceramic green sheet. A conductive paste mainly composed of Ni was printed on the mother ceramic green sheet. Sixty mother ceramic green sheets printed with conductive paste were laminated to obtain an inner layer portion of the laminate. With respect to this inner layer portion, on both sides in the stacking direction, a plurality of plain mother ceramic green sheets prepared in the same manner as described above except that the conductive paste is not printed are stacked, and above and below the inner layer portion, An outer layer portion was provided to obtain a mother laminate. Note that the number of plain mother ceramic green sheets laminated to constitute the outer layer portion was the number that achieved B / A in Table 1 below.

上記のようにして得られたマザーの積層体を個々の積層コンデンサ単位の積層体チップにカットした後、大気中にて250℃の温度で脱バインダーを行い、しかる後、加湿N+H混合ガス雰囲気中にて、昇温速度5℃/分、及び最高温度1250℃の条件で焼成した。このようにして、長さ2.0×幅1.2×厚み0.3〜0.6mmの寸法を有し、内部電極間に挟まれたセラミック層の厚みが5.0μm、一層の内部電極の厚みが1.7μmであるセラミック焼結体を得た。これらのセラミック焼結体の両端面にCu粉末とガラスフリットを主体とする導電ペーストを塗布し、焼付け、しかる後、下記の表1に示す試料番号1〜21の積層コンデンサを得た。 After the mother laminate obtained as described above is cut into laminate chips of individual multilayer capacitors, the binder is removed at a temperature of 250 ° C. in the atmosphere, and then mixed with humidified N 2 + H 2. Firing was performed in a gas atmosphere under conditions of a temperature rising rate of 5 ° C./min and a maximum temperature of 1250 ° C. In this way, the length of 2.0 × width 1.2 × thickness 0.3 to 0.6 mm, the thickness of the ceramic layer sandwiched between the internal electrodes is 5.0 μm, and one internal electrode A ceramic sintered body having a thickness of 1.7 μm was obtained. A conductive paste mainly composed of Cu powder and glass frit was applied to both end faces of these ceramic sintered bodies and baked, and then multilayer capacitors of sample numbers 1 to 21 shown in Table 1 below were obtained.

上記各積層コンデンサにつき、25℃、1kHz、1Vrmsにおける静電容量を測定した。また、上記静電容量と、第1,2の内部電極がセラミック層を介して重なり合っている面積及び第1,2の内部電極間に挟まれたセラミックス層の厚みから、セラミックス層の比誘電率εrを求めた。また、150℃、60Vの直流電界下で加速試験を行い、絶縁抵抗IRが0.1MΩ以下になるまでの時間を求め、寿命時間とした。加速試験についての試験個数は30個とした。結果を下記の表1に示す。   About each said multilayer capacitor, the electrostatic capacitance in 25 degreeC, 1 kHz, and 1 Vrms was measured. Further, from the capacitance, the area where the first and second internal electrodes overlap through the ceramic layer, and the thickness of the ceramic layer sandwiched between the first and second internal electrodes, the relative dielectric constant of the ceramic layer εr was determined. In addition, an acceleration test was performed under a direct current electric field of 150 ° C. and 60 V, and the time until the insulation resistance IR became 0.1 MΩ or less was determined as the lifetime. The number of tests for the acceleration test was 30. The results are shown in Table 1 below.

Figure 2008053278
Figure 2008053278

表1から明らかなように、試料番号1,2,5〜8,9〜12ではNi/Rが0.2以上であるため、厚みの比B/Aを変化させても、比誘電率εrにほとんど変化はみられず、比誘電率改善効果はみられなかった。   As is apparent from Table 1, since Ni / R is 0.2 or more in sample numbers 1, 2, 5 to 8, and 9 to 12, even if the thickness ratio B / A is changed, the relative dielectric constant εr Almost no change was observed, and no effect of improving the dielectric constant was observed.

また、試料番号13,14,17〜18,19〜20では、モル比Ni/Rが0.2未満であり、B/Aを0.5以下とした場合に、誘電率を高める得ることがわかる。   Moreover, in sample numbers 13, 14, 17-18, and 19-20, when the molar ratio Ni / R is less than 0.2 and B / A is 0.5 or less, the dielectric constant can be increased. Recognize.

これに対して、試料番号21では、希土類元素が用いられておらず、Ni/Rが求められないが、希土類元素が少なすぎると、やはり比誘電率εrを改善することができず、かつ寿命時間が短く、絶縁抵抗が著しく低くなることがわかる。同様に、試料番号3,4においても、モル比Ni/Rが1.90と高く、希土類元素Rの配合割合が少なすぎるためか、寿命時間が非常に短かった。   On the other hand, in Sample No. 21, rare earth elements are not used and Ni / R is not required. However, if the rare earth elements are too small, the relative permittivity εr cannot be improved, and the lifetime is also reduced. It can be seen that the time is short and the insulation resistance is significantly reduced. Similarly, in Sample Nos. 3 and 4, the molar ratio Ni / R was as high as 1.90, and the life time was very short, probably because the blending ratio of the rare earth element R was too small.

さらに、試料番号15,16では、Ni/Rは0.16であるが、厚みの比B/Aが0.99及び0.74と大きいため、比誘電率εrは、13328及び13358に留まり大きな比誘電率改善効果を得ることができなかった。   Further, in Sample Nos. 15 and 16, Ni / R is 0.16, but since the thickness ratio B / A is as large as 0.99 and 0.74, the relative dielectric constant εr remains large at 13328 and 13358. The effect of improving the dielectric constant could not be obtained.

これに対し、試料番号13,14,17,18,19,20では、モル比Ni/Rが0.05以上、0.2未満の範囲にあり、かつ厚みの比B/Aが0.5以下とされているため、比誘電率εrを17791以上に高めることができ、かつ寿命時間も14.2時間以上と十分に長かった。   On the other hand, in sample numbers 13, 14, 17, 18, 19, and 20, the molar ratio Ni / R is in the range of 0.05 or more and less than 0.2, and the thickness ratio B / A is 0.5. Therefore, the relative dielectric constant εr could be increased to 17791 or more, and the lifetime was sufficiently long as 14.2 hours or more.

(実験例2)
上記実験例1とは異なるセラミックスを用いた。組成aとして、主成分としてのBaTiO100モルに対し、副成分として、Dyが2.5モル、Mgが1.0モル、Mnが0.5モル、Siが1.2モルとなるようにDy、MgCO、及びMnCO、SiOを添加したセラミック組成を用いたことを除いては、実験例1と同様にして、積層コンデンサを作成した。
(Experimental example 2)
Ceramics different from those in Experimental Example 1 were used. As composition a, Dy is 2.5 mol, Mg is 1.0 mol, Mn is 0.5 mol, and Si is 1.2 mol with respect to 100 mol of BaTiO 3 as the main component. A multilayer capacitor was fabricated in the same manner as in Experimental Example 1 except that a ceramic composition to which Dy 2 O 3 , MgCO 3 , MnCO 3 , and SiO 2 were added was used.

また、組成bとして、主成分として(Mg0.88Ca0.10Sr0.02)O−SiOを用いたことを除いては、実験例1と同様にして、積層コンデンサを作成した。 A multilayer capacitor was prepared in the same manner as in Experimental Example 1 except that (Mg 0.88 Ca 0.10 Sr 0.02 ) O—SiO 2 was used as the main component as the composition b.

これら2種の積層コンデンサにおいても、B/Aを変化させ、比誘電率εrを実験例1と同様に評価した。結果を下記の表2に示す。   In these two types of multilayer capacitors, B / A was changed and the relative dielectric constant εr was evaluated in the same manner as in Experimental Example 1. The results are shown in Table 2 below.

Figure 2008053278
Figure 2008053278

表2から明らかなように、組成a,及び組成bのいずれのセラミックスを用いた場合においても、厚みの比B/Aを変化させたとしても比誘電率εrは特に高められなかった。   As can be seen from Table 2, the relative dielectric constant εr was not particularly increased even when the ceramics of composition a and composition b were used, even if the thickness ratio B / A was changed.

したがって、実験例1及実験例2の結果から、厚みの比B/Aを変化させた場合に比誘電率εrを高め得る効果は、実験例1で用いた特定の組成系において、効果的であり、他の組成では、同様の効果は得られないことがわかる。   Therefore, from the results of Experimental Example 1 and Experimental Example 2, the effect of increasing the relative permittivity εr when the thickness ratio B / A is changed is effective in the specific composition system used in Experimental Example 1. It can be seen that similar effects cannot be obtained with other compositions.

(実験例3)
希土類元素の種類と添加量を異ならせたことを除いては、実験例1と同様にして、積層コンデンサを作成し、評価した。結果を下記の表3に示す。
(Experimental example 3)
A multilayer capacitor was prepared and evaluated in the same manner as in Experimental Example 1 except that the type and amount of rare earth elements were varied. The results are shown in Table 3 below.

なお、副成分としてのMn、Y及びNiの添加割合は実験例1の場合と同様とした。   Note that the addition ratios of Mn, Y, and Ni as subcomponents were the same as in Experimental Example 1.

Figure 2008053278
Figure 2008053278

表3から明らかように希土類元素として、Yではなく、様々な希土類元素を用いた場合にも、実験例1の試料番号13,14,17〜20の場合と同様に、比誘電率εrを高め、かつ寿命時間を十分長くすることがわかる。   As can be seen from Table 3, even when various rare earth elements are used as the rare earth elements instead of Y, the relative dielectric constant εr is increased as in the case of Sample Nos. 13, 14, and 17 to 20 in Experimental Example 1. It can also be seen that the lifetime is sufficiently long.

なお、試料番号51,52では、希土類元素としてDyを用いているが、B/Aが0.99及び0.74と本発明の範囲外であるため、比誘電率εrを十分に高くすることはできなかった。   In Sample Nos. 51 and 52, Dy is used as the rare earth element. Since B / A is 0.99 and 0.74, which is outside the scope of the present invention, the relative dielectric constant εr must be sufficiently high. I couldn't.

なお、実験例1〜3では、誘電体セラミックスを構成する主成分として、(Ba1−xCa(Ti1−yZr)Oにおいて、x=0.04、y=0.01、m=1.003とされていたが、本発明においては、上記に限らず、(Ba1−xCa(Ti1−yZr)Oにおいて、xが0.01以上、0.05以下、yが0.05以上、0.15以下であれば、上記実験番号13,14,17〜20と同様に、厚み比B/Aを0.5以下とすることにより、かつNi/Rを0.05以上0.2未満とすることにより、比誘電率εrを効果的に高め、かつ寿命時間を長くすることが確かめられている。 In Experimental Examples 1 to 3, (Ba 1−x Ca x ) m (Ti 1−y Zr y ) O 3 is used as the main component constituting the dielectric ceramic, and x = 0.04, y = 0. 01, m = 1.003, but the present invention is not limited to the above, and in (Ba 1-x Ca x ) m (Ti 1-y Zr y ) O 3 , x is 0.01 or more. 0.05 or less, and y is 0.05 or more and 0.15 or less, the thickness ratio B / A is set to 0.5 or less in the same manner as in the experiment numbers 13, 14, 17 to 20, In addition, it has been confirmed that by setting Ni / R to be 0.05 or more and less than 0.2, the relative dielectric constant εr is effectively increased and the lifetime is extended.

また、xが0.01以下の場合、0.05を超える場合、yが0.05以下の場合、または0.15を超える場合においても、同様に、比誘電率を高め、寿命時間を長く確かめられている。もっとも、好ましくは、0.01≦x≦0.05、0.05≦y≦0.15とすることにより、比誘電率をより一層効果的に高めることが可能となった。   Similarly, when x is 0.01 or less, when it exceeds 0.05, when y is 0.05 or less, or when it exceeds 0.15, the relative permittivity is similarly increased and the lifetime is increased. It has been confirmed. However, preferably, by setting 0.01 ≦ x ≦ 0.05 and 0.05 ≦ y ≦ 0.15, the relative permittivity can be increased more effectively.

なお、上記、特定の組成を満たす限り、セラミック焼結体の製造方法については特に限定されない。例えば、セラミック原料として用いた各種酸化物の製造方法についても上記実験例1で示した製造方法に限定されず、蓚酸塩法、ゾルゲル法、水熱合方法などを用いることができる。   In addition, as long as the said specific composition is satisfy | filled, it does not specifically limit about the manufacturing method of a ceramic sintered compact. For example, the production method of various oxides used as the ceramic raw material is not limited to the production method shown in Experimental Example 1, and an oxalate method, a sol-gel method, a hydrothermal combination method, and the like can be used.

また、セラミックグリーンシートを製造方法する方法及びセラミックグリーンシートを得るのに用いたバインダー樹脂や溶剤等についても、実験例1で示したものに限定されるものではない。   Further, the method for producing the ceramic green sheet and the binder resin and solvent used for obtaining the ceramic green sheet are not limited to those shown in Experimental Example 1.

本発明の一実施形態に係る積層コンデンサを説明するための略図的正面断面図。1 is a schematic front cross-sectional view for explaining a multilayer capacitor according to an embodiment of the present invention.

符号の説明Explanation of symbols

1…積層コンデンサ
2…セラミック焼結果体
2a…端子
2b…端子
2c…上面
2d…下面
2W…内層部
2V…外層部
3a、3b…第1の内部電極
4a、4b…第2の内部電極
5、6…外部電極
DESCRIPTION OF SYMBOLS 1 ... Multilayer capacitor 2 ... Ceramic sintered compact 2a ... Terminal 2b ... Terminal 2c ... Upper surface 2d ... Lower surface 2W ... Inner layer part 2V ... Outer layer part 3a, 3b ... 1st internal electrode 4a, 4b ... 2nd internal electrode 5, 6 ... External electrode

Claims (4)

主成分が(Ba,Ca)(Ti,Zr)O系セラミックスであり、副成分としてNi及び希土類元素R(但し、Rは、Y,Sc,La,Ce,Pr,Nd,Sm,Eu,Tb,Gd,Dy,Ho,Er,Tm,Yb,Luからなる群から選択した少なくとも1種の元素)を含むセラミックスから成るセラミック焼結体と、
前記セラミック焼結体内において、セラミック層を介して重なり合うように配置された複数の内部電極を備える積層コンデンサであって、
モル比Ni/Rが0.05以上、0.2未満であり、かつ前記セラミック焼結体内において、複数の内部電極がセラミック層を介して重なり合っている部分を内層部、内層部の積層方向外側に設けられており、内部電極がセラミック層を介して積層されていないセラミックス部分を外層部とし、内層部の厚みをA、外層部の全厚みをBとしたときに、比B/Aが0.5以下とされていることを特徴とする、積層コンデンサ。
The main component is (Ba, Ca) (Ti, Zr) O 3 -based ceramics, and Ni and rare earth elements R (where R is Y, Sc, La, Ce, Pr, Nd, Sm, Eu, A ceramic sintered body made of ceramics containing at least one element selected from the group consisting of Tb, Gd, Dy, Ho, Er, Tm, Yb, and Lu;
In the ceramic sintered body, a multilayer capacitor comprising a plurality of internal electrodes arranged to overlap with each other via a ceramic layer,
The portion in which the molar ratio Ni / R is 0.05 or more and less than 0.2 and the plurality of internal electrodes overlap with each other through the ceramic layer in the ceramic sintered body is the inner layer portion, and the inner layer portion is positioned outside the stacking direction. The ratio B / A is 0 when the ceramic portion in which the internal electrodes are not laminated via the ceramic layer is the outer layer portion, the thickness of the inner layer portion is A, and the total thickness of the outer layer portion is B. A multilayer capacitor characterized by having a thickness of 5 or less.
前記セラミックスの主成分を(Ba1−xCa)(Ti1−yZr)Oと表したときに、0.01≦x≦0.05かつ0.05≦y≦0.15である、請求項1に記載の積層コンデンサ。 When the main component of the ceramic is expressed as (Ba 1-x Ca x ) (Ti 1-y Zr y ) O 3 , 0.01 ≦ x ≦ 0.05 and 0.05 ≦ y ≦ 0.15 The multilayer capacitor according to claim 1, wherein: 前記内部電極がNiを主成分とする、請求項1または2に記載の積層コンデンサ。   The multilayer capacitor according to claim 1, wherein the internal electrode contains Ni as a main component. 前記外層部が、前記内層部の積層方向両側に位置している、請求項1〜3のいずれか1項に記載の積層コンデンサ。


The multilayer capacitor according to claim 1, wherein the outer layer portion is located on both sides of the inner layer portion in the stacking direction.


JP2006225293A 2006-08-22 2006-08-22 Laminated capacitor Pending JP2008053278A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199252A (en) * 2010-03-23 2011-10-06 Samsung Electro-Mechanics Co Ltd Laminated ceramic capacitor
WO2013061730A1 (en) * 2011-10-24 2013-05-02 ソニー株式会社 Electrostatic capacitance element and resonance circuit

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Publication number Priority date Publication date Assignee Title
JPH02123614A (en) * 1988-11-02 1990-05-11 Tdk Corp High permittivity type porcelain composition
JPH07335475A (en) * 1994-06-06 1995-12-22 Matsushita Electric Ind Co Ltd Manufacture of layered ceramic capacitor
JPH10139538A (en) * 1996-10-31 1998-05-26 Kyocera Corp Dielectric porcelain composition
JP2000353636A (en) * 1999-04-06 2000-12-19 Matsushita Electric Ind Co Ltd Laminated ceramic part
WO2006018928A1 (en) * 2004-08-19 2006-02-23 Murata Manufacturing Co., Ltd Dielectric ceramic, and laminated ceramic capacitor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02123614A (en) * 1988-11-02 1990-05-11 Tdk Corp High permittivity type porcelain composition
JPH07335475A (en) * 1994-06-06 1995-12-22 Matsushita Electric Ind Co Ltd Manufacture of layered ceramic capacitor
JPH10139538A (en) * 1996-10-31 1998-05-26 Kyocera Corp Dielectric porcelain composition
JP2000353636A (en) * 1999-04-06 2000-12-19 Matsushita Electric Ind Co Ltd Laminated ceramic part
WO2006018928A1 (en) * 2004-08-19 2006-02-23 Murata Manufacturing Co., Ltd Dielectric ceramic, and laminated ceramic capacitor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199252A (en) * 2010-03-23 2011-10-06 Samsung Electro-Mechanics Co Ltd Laminated ceramic capacitor
WO2013061730A1 (en) * 2011-10-24 2013-05-02 ソニー株式会社 Electrostatic capacitance element and resonance circuit

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