JP2008052092A - Driving method of display panel and drive circuit, and display device using same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving method and circuit which reduce complementary image persistence in a display device which performs line sequential driving by using an electron emission element of a capacitive load, such as an MIM element, and the display device. <P>SOLUTION: In the intersections of (m) row wiring lines and (n) column wiring lines, (mxn) MIM electron emission elements are arranged in a matrix and in order to subject a display panel arranged with a phosphor facing the electron emission element to scan driving, the voltage waveforms formed by alternately selecting at least the binary voltages are added to m-1 column wiring lines in a non-selection period among the (m) row wiring lines, and thus, the charges accumulated within the electron emission elements of the capacitive load are forcibly pulled out and, thereby the early opening of the charges is performed and the image persistence is reduced. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention uses a so-called capacitive load electron-emitting device represented by, for example, an MIM-type electron-emitting device as an electron source, performs pixel selection in a matrix system, and performs line-sequential driving The present invention also relates to a driving method and a driving circuit, and a display device employing the driving method and driving circuit.

  A flat display device having a plurality of electron sources arranged in a matrix and displaying an image by emitting light by exciting a phosphor arranged in a matrix with an electron beam extracted from the selected electron sources (Apparatus) is already known. In such a device, the electron source is composed of, for example, a carbon nanotube (CNT), a method using a spint device, a method using a surface conduction electron-emitting device (SCE), or a metal-insulating layer-metal type emission. A method using an element (MIM) is already known. These are image display devices having a simple matrix structure, and are called “FED” or “SED”. In these display devices, a so-called scanning method called “line sequential scanning” is generally performed. According to this line sequential scanning, a selection pulse is held in a horizontal period of an input signal in a selection line of a scanning wiring. Each pixel is controlled in pulse width or amplitude within a horizontal period to determine its emission luminance. An example of such line sequential scanning is shown in, for example, Patent Document 1 and Patent Document 2 below.

Japanese Patent Laid-Open No. 9-297556 (page 18, FIG. 1) Japanese Unexamined Patent Publication No. 2003-5663 (page 6, FIG. 1)

  In general, when an MIM-type electron-emitting device is used as an electron source, in the line-sequential scanning method, each pixel is selected once / frame on a corresponding selection scanning line. Therefore, for example, as shown in attached FIG. 6A, a high-intensity white character “ABC” is displayed on a gray background in the display screen (display 31), and then the entire gray background is displayed. When a signal for displaying white is input, the following phenomenon occurs. That is, even when a signal for displaying the entire gray background in white is input, the letters “ABC” are displayed in a slightly dark white color with the white background as shown in FIG. 6B. (Display 33), and thereafter, the luminance difference between the character and the background is gradually reduced, and a phenomenon that the entire surface becomes white after a few seconds occurs.

  Such a phenomenon is called a complementary color afterimage. The reason why this phenomenon is referred to as complementary color afterimage is that it displays black (white complementary color) after displaying high-intensity white characters, and magenta (green complementary color) after displaying high-intensity green characters. This is because, after the blue characters are displayed, they are displayed (perceived) as yellow (complementary blue). Further, such a complementary color afterimage becomes more prominent as the display luminance is higher (brighter) or the display time is longer.

  Therefore, the present invention has been made in view of the above-described problems in the prior art, and specifically, as described above, an electron with a capacitive load represented by an MIM-type electron-emitting device as an electron source. It is an object of the present invention to provide a driving circuit for reducing complementary color afterimages in a display device that uses emitting elements, performs pixel selection in a matrix manner, and performs line sequential driving, and a display device using the driving circuit.

  In the present invention, the main cause of the complementary color afterimage is that when a voltage is applied to a predetermined pixel by line sequential scanning of the MIM, the charge is slowly accumulated inside the MIM. This is based on the recognition by the inventors that charges are discharged through the electrodes with a long time constant with little accumulation, and in the non-selection period of the scan line (period other than the row selection period), the MIM A potential selection circuit that alternately selects two types of voltage sources within a range in which no current flows through the element is provided, and the charge is forcibly extracted to the voltage source side, whereby the charge is released early.

  Therefore, according to the present invention, in order to achieve the above-described object, first, (m × n) capacitive load electron-emitting devices are provided at intersections of m row wirings and n column wirings. A driving method for scanning and driving a display panel that is arranged in a matrix and has phosphors arranged opposite to the electron-emitting devices, wherein a driving signal based on a video signal is applied to the n column wirings. In the scan driving method of the line sequential scanning method in which row selection signals are sequentially applied to the m row wirings at the same time in units of columns, m−1 lines in the non-selection period among the m row wirings. A display panel driving method in which a voltage waveform formed by alternately selecting at least binary voltages is applied to the column wiring, thereby forcibly extracting charges accumulated in the electron-emitting devices of the capacitive load. Is provided.

  According to the present invention, in the display panel driving method described above, the capacitive load electron-emitting device is preferably an MIM (metal-insulating layer-metal) type electron-emitting device, or By applying a voltage waveform obtained by alternately selecting a binary voltage for forcibly extracting the accumulated charge, a positive bias and a negative bias are alternately repeated with respect to the element, whereby the capacitive load is It is preferable to forcibly draw out the charge accumulated in the electron-emitting device. Alternatively, in the display panel driving method described above, the binary voltage difference of the voltage waveform applied to the element may be set to a substantially minimum value of a driving signal applied to the n column wirings. More preferably, voltage waveforms having different phases are added to the odd-numbered row wiring and the even-numbered row wiring to the m−1 column wirings in the non-selection period.

  Furthermore, according to the present invention, in order to achieve the above-described object, a matrix of (m × n) capacitive load electron-emitting devices is arranged at the intersection of m row wirings and n column wirings. A driving circuit for scanning and driving a display panel in which phosphors are arranged facing the electron-emitting devices, and is connected to n column wirings of the display panel. A column driver is connected to a data driver circuit for sequentially applying a drive signal based on a video signal on a column basis to the column wiring, and to m row wirings of the display panel. A scan driving circuit for sequentially applying signals, and the scan driving circuit alternately selects and applies at least binary voltages to m-1 column wirings in a non-selection period of the row wirings. Provided is a display panel drive circuit having means for That.

  According to the present invention, in the display panel drive circuit described above, the electron emitter of the capacitive load is preferably an MIM (metal-insulating layer-metal) type electron emitter, or It is preferable that the means for alternately selecting and applying the value voltage is constituted by a plurality of power supplies and switching elements selectively connected to the power supplies.

  In addition, according to the present invention, in order to achieve the above object, (m × n) capacitive load electron-emitting devices are provided at the intersections of m row wirings and n column wirings. The display panel is arranged in a matrix, and is connected to a display panel in which phosphors are arranged facing the electron-emitting devices, and n column wirings of the display panel, and a drive signal is connected to the n column wirings. A data driver circuit sequentially applied in units, connected to m row wirings of the display panel, and a scan driving circuit for sequentially applying a row selection signal to the m row wirings; In the display device including the data driver circuit and a timing control device that outputs a timing signal to the scan drive circuit based on the input video signal, the scan drive circuit is in a non-selection period of the row wiring. A display device is provided in which at least binary voltages are alternately selected and applied to one column wiring, thereby forcibly extracting charges accumulated in the MIM electron-emitting devices. . In this case as well, the electron-emitting device having the capacitive load is preferably an MIM (metal-insulating layer-metal) type electron-emitting device.

  As is clear from the above, according to the display panel driving method and driving circuit according to the present invention, and further using the display device using the display panel, it is possible to release the electric charge at an early stage, so Even after the screen is changed to the display state, the afterimage of complementary color is reduced, and an excellent effect is achieved that a high-quality image can be displayed.

  Hereinafter, embodiments according to the present invention will be described in detail with reference to the accompanying drawings. In the following embodiments, the present invention is applied to an image display (display) apparatus in which pixels arranged in a matrix using MIM type electron-emitting devices as electron sources are line-sequentially driven.

  First, FIG. 1 to FIG. 6 show a display device that uses an MIM type electron-emitting device as an electron source, performs pixel selection by a matrix method, and performs line-sequential driving according to an embodiment of the present invention. FIG. In this figure, the panel 1 is, for example, a passive matrix video display (display) device. In order to form the display surface, the panel 1 includes a large number of data lines 480, 480, and a large number of scanning electrode lines 180, 180. Have.

  The scanning electrode lines 180, 180... Are provided with a plurality of scanning drivers 3, 4. On the other hand, the data lines 480, 480. , 7 and 8 are connected. More specifically, in FIG. 1, the panel 1 shows an example in which the number of horizontal pixels is 1280 RGB, the number of vertical pixels is 720, and the number of pixels is 1280 RGB × 720. The circuit 5 uses eight LSIs having 480 outputs (data drivers (1) to (8)), while the scan driving circuit 2 uses four LSIs having 180 outputs (scan driver ( 1) to (4)) The example used is shown.

  Further, as shown in FIG. 2, for example, a high voltage generation circuit 9 of 10 kV is connected to the anode terminal of the panel 1. The video signal is input to the timing controller 10, and signals and data with optimum timing are sent from the timing controller 10 to the scan driving circuit 2 and the data driving circuit 5, respectively. More specifically, the data driving circuit 5 holds the data of one line of the panel 1 for one horizontal period, and rewrites the data every horizontal period. On the other hand, the scanning drive circuit 2 sequentially selects the scanning electrode lines of the panel 1 in the vertical direction. For example, a method of applying a voltage of 12V at the time of selection and setting a voltage of 6V at the time of non-selection is used. According to this, when a certain scanning electrode line is selected, a high voltage of 10 kV from the high voltage circuit 9 is applied to the anode terminal of the panel 1, so that it corresponds to the output data from the data driving circuit 5. Then, electrons are emitted from each pixel on the scanning electrode line, and the phosphor emits light by electron excitation. That is, an image of one horizontal line is displayed. In addition, the horizontal line for one frame is sequentially selected by the scan driving circuit 2, and one frame of video is thereby displayed.

  Next, a scanning method in the panel 1 whose configuration has been described above will be described with reference to FIGS. First, FIG. 2 schematically shows the details of the panel 1. FIG. 3 schematically shows a cross section of one pixel of the panel shown in FIG. Further, FIG. 4 is a waveform diagram schematically showing a drive waveform (data driver waveform) from the scan drive circuit 2 and a drive waveform (scan driver waveform) from the data drive circuit 5 in a period of one frame. . FIG. 5 schematically shows an example of voltage-current characteristics in one pixel shown in FIG.

  In FIG. 2, reference numeral 60 in the drawing denotes a lower glass substrate, 61 to 64 are data lines (column selection lines), 65 to 68 are scanning electrode lines (row selection lines), Reference numerals 69 to 84 denote phosphors, and 87 denotes a current for each pixel flowing from the scanning electrode line to the data line. Reference numeral 85 indicates an upper glass substrate, and 86 indicates a high voltage electrode applied to the inner surface of the glass substrate. In addition, in the figure, “No. S1” to “No. 3840” attached to the ends of the data lines 61 to 64 (lower end in FIG. 2) indicate the row numbers and the scanning electrode lines 65 to 68. “No. S1” to “No. S720” attached to the end (right end in FIG. 2) respectively represent the numbers of the columns.

  Now, in the panel 1 shown in FIG. 2, it is assumed that the driving waveform shown in FIG. 4 attached thereto is applied to the scanning drive circuit 2 and the data drive circuit 5. For example, when a video signal is displayed in the second row (No. S2), a voltage of predetermined luminance information (Vsig in FIG. 4) is applied to the data lines 61 to 64, and is shown by the scan driver waveform 23 in FIG. During the selected period (the period of voltage Vth in the drawing), the scan electrode line 66 is in the selected state.

  A cross section of a pixel where one column of data lines (No. 1) and two rows of scan electrode lines (No. S2) in this selected state intersect is shown in FIG. FIG. 3 shows a pixel (MIM pixel) employing the above-described MIM electron source (electron-emitting device). When a voltage of several V to 10 V is applied between the scan electrode line 66 and the data line 61, a current indicated by an arrow 87 (hereinafter referred to as an MIM current) passes through the insulating layer 59 in the MIM pixel. Flowing. Thus, when the MIM current 87 flows, the insulating layer 59 enters a state where electrons are generated on the surface thereof, and at the same time, an electron beam 88 is obtained by the action of accelerating the electrons by the electric field generated by the high-voltage power supply 9. Become. Then, when the electron beam 88 excites the phosphor 73, light emission from the phosphor 73 is obtained through the electrode 86. The emission intensity from the phosphor 73 is substantially proportional to the current density of the electron beam 88, and the current density is proportional to the MIM current 87. Therefore, the MIM current 87 is large during high luminance emission, At the time of low-luminance light emission, the MIM current 87 is reduced, thereby enabling image display.

  The attached FIG. 5 shows the voltage current when the voltage applied between the scanning electrode line 66 and the data line 61, that is, the drive voltage (Vpp) is taken on the horizontal axis and the MIM current 87 is taken on the vertical axis in the MIM pixel. An example of the characteristic is shown. A characteristic line 11 in FIG. 5 shows an example of the characteristics of the elements constituting the MIM pixel. As is apparent from the characteristics of this figure, the element has a small current value of several tens pA and a substantially constant value while the drive voltage rises to about 6V. After that, while the drive voltage exceeds 6V and reaches approximately 9V, the current value changes greatly, so that gradation display of an image can be performed. In FIG. 5, since the current characteristic suddenly rises at 6V as a boundary, this voltage is referred to as “threshold voltage Vth”, and the device current flows above this threshold voltage Vth. The voltage is used as a data driver driving voltage (Vsig) in the data driving circuit 5. Specifically, a voltage amplitude equal to or lower than Vth is handled as a selection voltage of the scan driver, that is, as shown in FIG. 4, as the scan driver waveform, the waveforms 22, 23 having a voltage value of approximately Vth in the selection period, By sequentially scanning with 24, a video signal corresponding to a predetermined line can be displayed.

  However, when the video signal is displayed by the simple line-sequential scanning described above, a complementary color afterimage is generated as shown in FIGS. 6 (a) and 6 (b). According to various studies by the present inventors, the main cause of such a complementary color afterimage is that when a voltage is applied to a predetermined pixel by line sequential scanning, charges are slowly accumulated inside the MIM element. The On the other hand, in the case of black screen display or the like, almost no charge is accumulated. Thereafter, the accumulated charge is discharged through the electrode with a long time constant, which is considered to cause a complementary color afterimage.

  Therefore, the present invention proposes to forcibly extract the charge accumulated in the MIM element during the scanning line non-selection period (period other than the row selection period) based on the results of the above-described studies by the inventors. Is done. More specifically, a potential selection circuit for alternately selecting and applying two types (binary) voltage sources in a range in which no current flows in the MIM element is provided, and the voltage is stored in the MIM element. By forcibly extracting the charge to the voltage source side, the charge is released early. In the following description, scanning lines are selected and non-selected, and together with a specific example of a scanning driver waveform (voltage) for forcibly extracting charges accumulated in the MIM element in the non-selection period, and scanning driving for that purpose. The circuit will be described in detail.

  In particular, in the first embodiment, the afterimage phenomenon is reduced by setting the scan driver waveform to a waveform as shown in FIG. In FIG. 7, the waveforms applied to the scanning electrode lines S1 to S3 are indicated by reference numerals 35 to 37, and the period (width) thereof is indicated by reference numerals 38 to 40.

  Here, the period (width) 38 corresponds to the line selection period of the scan electrode line S1 (the peak value Vth portion of the scan driver waveform No. S1 in FIG. 4), and the period (width) 39 is the scan electrode line. This corresponds to the line selection period of S2 (the peak value Vth portion of the scan driver waveform No. S2), and the period (width) 40 is the line selection period of the scan electrode line S3 (the peak value Vth portion of the scan driver waveform No. S3). ). Further, the voltage value Vsel in this period is higher than the reference voltage Vref by the threshold voltage Vth (Vsel = Vref + Vth).

  On the other hand, alternate pulse generation periods in which two types of voltage sources are alternately selected and applied are indicated by reference numerals 41 to 44. In this period, as is clear from the figure, the reference voltage Vref and Two types of voltages, Vinv, lower than that, are selectively generated alternately. Note that the potential of the low voltage Vinv is approximately equal to the voltage (data driver driving voltage) Vsig used as the data driver driving voltage (Vref− (voltage value corresponding to the pp value of the voltage of Vsig)). It is preferable to set.

  By applying the two types of voltages described above, in the scan electrode line S1, the drive voltage to the MIM element corresponds to the black data drive waveform (voltage) (= Vref) in the periods 41 and 43. In this case, the bias is zero bias. On the other hand, when the data drive waveform (voltage) is equivalent to white (= Vinv), the bias is positive. In the periods 42 and 44, the drive voltage to the MIM element is a negative bias when the data drive voltage corresponds to black (= Vref), and the data drive voltage corresponds to white (= Vinv). In this case, zero bias is applied. Therefore, during the non-selection period of the video, the positive bias state and the negative bias state are alternately repeated, so that the charge in the MIM element can be forcibly extracted, and the complementary color afterimage can be reduced.

  Incidentally, at this time, in particular, in the selection period 38 to 40 in the video signal display, when the voltage value of the scanning electrode line changes (changes), the charge / discharge time constant to the MIM element changes and luminance flickers. May occur. Therefore, in order to avoid this, for example, as shown in the figure, the phases of Vref and Vinv, which are the two kinds of voltages, in the odd lines S1 and S3 of the scan electrode lines and the even lines S2 and S4 are also shown. By reversing the relationship (that is, the phase in which Vref and Vinv selectively appear), the charge / discharge time constant to the MIM element can be made substantially constant, so that luminance flicker hardly occurs. I can do it.

  Further, FIG. 8 attached herewith shows a specific circuit configuration of the scanning drive circuit for realizing the scanning waveform shown in FIG. In this example, the scanning drive circuit 2 includes a circuit block 45 (consisting of a shift register and a control logic unit) that generates a control pulse for performing line sequential scanning, and each scanning electrode line (scanning line). Corresponding switch (SW) elements 49 to 52, a voltage source 46 for determining a selection potential (Vsel), a voltage source 47 for determining a non-selection potential (Vref), and a voltage source 48 for determining Vinv. It is composed of The SW elements 49 to 52 are SW elements that can select the above three voltage values (Vsel, Vref, Vinv). The control logic unit of the circuit block 45 performs scanning electrode line (scan line) No. . S1-No. The operation of sequentially switching the voltage source 46, the voltage source 47, and the voltage source 48 is performed for each horizontal period using the control lines 53 to 56 so that the sequential scanning of S720 is possible. The relationship among the voltage values Vsel, Vref, Vinv, the voltage V1 of the voltage source 48, the voltage V2 of the voltage source 47, and the voltage of the voltage source 46 is Vsel = V1 + V2 + V3, Vref = V1 + V2, and Vinv = V1. This voltage relationship is the same in FIGS. 9, 11, and 13 in other embodiments described later.

  Next, FIG. 9 attached here shows a scan driving circuit 2 according to a second embodiment of the present invention. In FIG. 9 as well, functional elements similar to those in FIG. 8 are given the same reference numerals. Unlike the above-described FIG. 8, the scan driving circuit 2 according to the second embodiment has a configuration using a binary (Vref, Vinv) selection type SW without using a ternary selectable SW element. Yes. The scan driver 2 according to this embodiment includes a circuit block 45 that generates a control pulse for performing line sequential scanning, SW elements 93 to 100 corresponding to each scan electrode line (scan line), and a selection potential. The voltage source 46 is determined, the voltage source 47 determines the non-selection potential, and the voltage source 48. The scanning waveform obtained by the scanning drive circuit 2 according to the second embodiment is the same as that shown in FIG.

  As described above, according to the scan drive circuit 2 according to the second embodiment, the SW elements 93 to 96 are binary selectable SW elements. The control logic unit of the circuit block 45 allows the scan electrode lines to be scanned. (Scan line) No. S1-No. The operation of sequentially selecting the voltage source 46 by the control lines 101 to 104 is performed every horizontal period so that the sequential scanning of S720 is possible. In the non-selection period, the control elements 105 control the binary selectable SW elements 97 to 100 in parallel to scan electrode line No. The odd lines of S1 and S3 and the scanning electrode line (scan line) No. The alternating pulse waveform operation in the non-selection period is realized by reversing the voltage source selection logic with the even lines of S2 and S720. Therefore, also in this embodiment, the positive bias state and the negative bias state of the MIM element are alternately repeated in the non-selection period, so that the charge in the MIM element can be forcibly extracted and the complementary color afterimage can be reduced. Become.

  Next, FIGS. 10 and 11 attached hereto illustrate scanning waveforms according to a third embodiment of the present invention and a scanning driving circuit for generating them. In FIG. 10, the same reference numerals are assigned to the same waveform portions as in FIG. 7, but the differences from FIG. 7 will be described below. That is, in FIG. 10, the scanning waveform is the same as that in FIG. 7 in the selection periods 38 to 40 and the alternating pulse periods 41 to 44. However, the scanning waveform is different from that in FIG. Immediately after the selection period 38 of S1, that is, in FIG. During the period indicated as the selection period 39 of S2, the scan electrode line No. The non-selection period of S1 is Vinv, and in the subsequent periods 41 and 43, the voltage Vinv is also set.

  Other scanning electrode lines (scan lines) No. S2, No. Also in S3, in the same manner as described above, in the period immediately after the selection periods 39 and 40, the selection is made to be Vinv. On the other hand, Vref has the same voltage value as that shown in FIG. 7, but it is configured to be connected to a voltage source through an appropriate impedance, although not shown.

  A specific circuit configuration for realizing the scanning waveform according to the third embodiment is shown in FIG. Also in FIG. 11, the same functional elements as those shown in FIGS. 8 and 9 are given the same reference numerals. The circuit configuration including the scan driving circuit 2 shown in FIG. 11 does not use the binary selectable SW element shown in FIG. 9, but uses a so-called On / Off switch instead. . Further, the scan driving circuit 2 includes a circuit block 45 that generates a control pulse for performing line sequential scanning, SW elements 110 to 117 corresponding to the respective scan lines, resistors (R) 106 to 109, a logic inversion circuit 118, 119, a voltage source 46 that determines a selection potential, a voltage source 47 that determines a non-selection potential, and a voltage source 48.

  In the circuit configuration described above, these SW elements 110 to 113 are composed of On / OffSW elements, and the control logic unit of the circuit block 45 performs scanning electrode line (scan line) No. S1-No. The operation of sequentially selecting the voltage source 46 is performed by the control lines 120 to 123 every horizontal period so that the sequential scanning of S720 is possible. These scanning electrode lines (scan lines) No. S1-No. In the non-selection period, S720 is connected to the voltage source 47 via the resistors 106 to 109. Therefore, when the SW elements 110 to 113 are open, the potential of the voltage source 47 is fixed. .

  In the alternate pulse period, the SW elements 114 and 116 are controlled by the control line 124, and the SW elements 115 and 116 are controlled via the logic inversion circuits (INV) 118 and 119. With this control, the potential of the voltage source 48 can be selected, and the scan electrode line (scan line) No. S1 or No. Odd lines including S3 and scan line No. S2 and No. The even line including S720 corresponds to the phase shift in the voltage source selection theory. That is, since the voltage source 46 is selected during the scan line selection period, the charge capacity of the scan line is the same as that in FIGS. 8 and 9 above, but on the other hand, the resistors 106. Through 109, the time constant is extended. Therefore, in order to ensure the discharge capability, immediately after the scan selection, the SW elements 114 to 117 are controlled to be turned on, thereby realizing the same operation as in FIG. Therefore, also in this embodiment, since the positive bias state and the negative bias state are alternately repeated in the non-selection period, the charge in the MIM element can be forcibly extracted, and the complementary color afterimage can be reduced. Further, On / OffSW can have a low element configuration and can be expected to reduce costs.

  Further, FIG. 12 and FIG. 13 attached show scanning waveforms according to a fourth embodiment of the present invention and a scanning driving circuit for generating the scanning waveforms. In the scanning waveform of FIG. 12, the same parts as those in FIG. 7 are denoted by the same reference numerals. In the following description, differences from FIG. 7 in the scanning waveform according to the fourth embodiment will be mainly described. Reference numerals 125 to 130 in the figure indicate scanning waveforms in the selection period 143, and 131 to 136 indicate scanning waveforms in the alternate pulse period 144. As apparent from the figure, in this embodiment, in the alternate pulse period 144, the scan line No. S1-No. The scanning waveform of S360 is driven with the same phase, while the scanning line No. S361-No. The scanning waveform in S720 employs a method in which the pulse phase is inverted with respect to the above and driven. Further, as is apparent from the figure, only the line sequential scanning is performed in the video display period 143, while the alternating pulse period 144 is concentrated in the non-display period 144.

  A specific circuit configuration for realizing the scanning waveform according to the fourth embodiment shown in FIG. 12 is shown in FIG. Also in FIG. 13, the same functional elements as those in FIGS. 8 and 9 are denoted by the same reference numerals. In the circuit configuration shown in FIG. 13, as is apparent from the figure, the scan driving circuit 2 uses the binary selectable SW element in FIG. 9, but the alternate pulse period is as follows. This is implemented using the external SW elements 160 and 161 of the scan driving circuit 2. In the scan driver 2, a circuit block 45 that generates a control pulse for performing line sequential scanning, SW elements 145 to 149 corresponding to each scan line, a voltage source 46 that determines a selection potential, and a non-selection potential are set. The voltage source 47 and the voltage source 48 are determined. The SW elements 145 to 149 are binary selection SW elements. From S1 to No. The operation of selecting the voltage source 46 is sequentially performed by the control lines 152 to 157 every horizontal period so that the sequential scanning of S720 is possible. In the non-selection period, the scan line No. In S1 to S360, the voltage sources 47 and 48 are alternately selected via the SW element 160. In S361 to S720, the voltage sources 48 and 47 are alternately selected via the SW element 161. Since the control signal is transmitted through the control line 158 and the voltage selection logic is reversed, the driving impedance from the data drive side is kept substantially constant, and the operation waveform of FIG. 12 is realized. .

  In the embodiment described above, an example using an MIM type electron-emitting device has been described. However, a matrix arrangement is used to form a capacitive load electron source at a portion where the scanning line and the data line intersect. It will be apparent to those skilled in the art that the present invention can be applied to a display device having a structure as described above, and can also be used as an afterimage reduction means in an FED, an organic EL, an MIM liquid crystal display device, and the like.

It is a block diagram which shows the whole structure in the display apparatus which becomes one embodiment of this invention. It is a block diagram which shows the structure of the panel of the said display apparatus, and its drive circuit. FIG. 3 is a cross-sectional view showing one pixel constituting the panel in order to explain the operation principle of the panel of the display device. It is a signal waveform diagram for demonstrating the drive signal of the panel in the said display apparatus. It is a figure which shows the operating characteristic of the pixel of the panel in the said display apparatus. It is explanatory drawing for demonstrating the afterimage phenomenon in the said panel. 5 is an operation waveform for explaining a display panel driving method according to the first embodiment of the present invention; It is a block diagram which shows the detail of the drive circuit for implement | achieving the drive method of the display panel which becomes the said 1st Example. It is a block diagram which shows the detail of the drive circuit which becomes the 2nd Example of this invention for implement | achieving the drive method of the said display panel. It is an operation | movement waveform for demonstrating the drive method of the display panel which becomes the 3rd Example of this invention. It is a block diagram which shows the detail of the drive circuit for implement | achieving the drive method of the display panel which becomes the said 3rd Example. It is an operation | movement waveform for demonstrating the drive method of the display panel which becomes the 3rd Example of this invention. It is a block diagram which shows the detail of the drive circuit for implement | achieving the drive method of the display panel which becomes the 4th Example of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Panel, 2 ... Scan driver, 5 ... Data driver, 9 ... High voltage generation, 10 ... Timing controller.

Claims (10)

At the intersection of m row wirings and n column wirings, (m × n) capacitive load electron-emitting devices are arranged in a matrix, and phosphors are arranged facing the electron-emitting devices. A driving method for scanning and driving a display panel, wherein a driving signal based on a video signal is sequentially applied to the n column wirings in units of columns, and at the same time a row is applied to the m row wirings. In a scanning driving method of a line sequential scanning method for adding selection signals in order,
Among the m row wirings, a voltage waveform obtained by alternately selecting at least binary voltages is applied to m-1 column wirings in a non-selection period, and thereby, the electron emission of the capacitive load is performed. A display panel driving method characterized by forcibly extracting charges accumulated in an element.   2. The display panel driving method according to claim 1, wherein the capacitive load electron-emitting device is an MIM (metal-insulating layer-metal) type electron-emitting device. .   2. The display panel driving method according to claim 1, wherein a positive bias is applied to the element by applying a voltage waveform formed by alternately selecting a binary voltage for forcibly extracting the accumulated charge. A display panel driving method, wherein negative bias is alternately repeated, thereby forcibly extracting charges accumulated in the electron-emitting device of the capacitive load.   4. The display panel driving method according to claim 3, wherein a binary voltage difference of a voltage waveform applied to the element is set to a substantially minimum value of a driving signal applied to the n column wirings. A display panel driving method characterized by the above.   2. The display panel driving method according to claim 1, wherein voltage waveforms having different phases in the odd-numbered row wiring and the even-numbered row wiring in the m−1 column wirings in the non-selection period. A method for driving a display panel, characterized by comprising: At the intersection of m row wirings and n column wirings, (m × n) capacitive load electron-emitting devices are arranged in a matrix, and phosphors are arranged facing the electron-emitting devices. A driving circuit for scanning and driving the display panel,
A data driver circuit connected to n column wirings of the display panel and sequentially applying a drive signal based on a video signal to the n column wirings in units of columns;
A scanning drive circuit connected to m row wirings of the display panel and sequentially applying a row selection signal based on a scanning signal to the m row wirings;
The scan driving circuit includes means for alternately selecting and applying at least a binary voltage to m-1 column wirings in a non-selection period of the row wirings. circuit.   7. The display panel drive circuit according to claim 6, wherein the capacitive load electron-emitting device is an MIM (metal-insulating layer-metal) type electron-emitting device. .   7. The display panel drive circuit according to claim 6, wherein the means for alternately selecting and applying the binary voltage is constituted by a plurality of power supplies and switching elements selectively connected to the power supplies. A display panel driving circuit. At the intersection of m row wirings and n column wirings, (m × n) capacitive load electron-emitting devices are arranged in a matrix, and phosphors are arranged facing the electron-emitting devices. Display panel,
A data driver circuit connected to n column wirings of the display panel and sequentially applying drive signals to the n column wirings in units of columns;
A scan driving circuit connected to m row wirings of the display panel and sequentially applying a row selection signal to the m row wirings;
In a display device including a video signal and a timing controller that outputs a timing signal to the data driver circuit and the scan driving circuit based on the input video signal.
The scan driving circuit alternately selects and applies at least binary voltages to m−1 column wirings in the non-selection period of the row wirings, and accumulates them in the MIM type electron-emitting device. A display device characterized by forcibly extracting the generated charge. 7. The display device according to claim 6, wherein the capacitive load electron-emitting device is an MIM (metal-insulating layer-metal) type electron-emitting device.

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