JP2008042970A - Multiple serial storage cell - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable easy and accurate monitoring of the status of all cells with a low-cost configuration in a multiple serial storage cell, thereby accurately preventing overcharge or overdischarge. <P>SOLUTION: In the multiple serial storage cell, many storage cells (B1-B2n) are connected in series and used. The storage cell is provided with voltage balance correcting circuits 31, 32 for mutually equalizing the voltage of each of the storage cells; and a monitoring circuit for detecting a specific cell voltage appearing in some specific storage cells selected from among the storage cells in the multiple serial storage cell, and monitoring the status of the multiple serial storage cell on the basis of a result of the detection. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a multi-series energy storage cell that uses a large number of energy storage cells connected in series, and particularly relates to a cell having a monitoring function such as overcharge and overdischarge.

  When a storage cell such as a capacitor or a secondary battery is used, it is necessary to constantly monitor the state of the cell so that the storage cell does not fall into an overcharge or overdischarge state. In an electric vehicle or a personal computer, it is desirable to constantly monitor the remaining amount of electric capacity stored in each cell.

  In many cases, a large number of storage cells such as capacitors and secondary batteries are connected in series. In a multi-series energy storage cell in which a large number of energy storage cells are connected in series, as shown in FIG. 8 or FIG. 9, the cell voltage is detected for all of the cells B1 to B4 connected in series, and the excess voltage is detected based on this detection. A system has been proposed in which the presence or absence of charging or overdischarge is determined, and charging or discharging is stopped based on this determination (see Patent Document 1).

  FIG. 8 shows a configuration example of an overcharge prevention system according to the prior art. In the system shown in the figure, the serial ends of the storage cells (B1 to B4) connected in series are connected to the load device 100 via the energization control circuit 41. The load device 100 has a power generation function for charging, such as an electric motor of an electric vehicle.

  The energization control circuit 41 is configured using a MOS-FET which is a switching element, and is on / off controlled by an overcharge detection signal x1 emitted from the monitoring circuit 55. The monitoring circuit 55 used here is configured using a voltage detector 35 and a logic circuit (OR logic) 38.

  The voltage detector 35 is installed in each of all cells (B1 to B4) connected in series. When the voltage of any one cell becomes higher than a predetermined overcharge determination reference voltage Vm, a binary logic overcharge detection signal x1 is generated from the voltage detector 35 installed in the cell. This detection signal x1 is given to the energization control circuit 41 via the logic circuit 38. Upon receiving the detection signal x1, the energization control circuit 41 is switched from on to off to cut off the charging current. Thereby, overcharging of the cells (B1 to B4) is automatically prevented.

  FIG. 9 shows a configuration example of an overdischarge prevention system according to the prior art. In the system shown in the figure, the series ends of the storage cells (B1 to B4) connected in series are connected to the load device 100 via the energization control circuit 42.

  The energization control circuit 42 is configured by using a MOS-FET which is a switching element, and is on / off controlled by an overdischarge detection signal y <b> 1 emitted from the monitoring circuit 56. The monitoring circuit 56 used here is configured using a voltage detector 36 and a logic circuit (OR logic) 39.

The voltage detectors 36 are respectively installed in all the cells (B1 to B4) connected in series as in the overcharge prevention system. In this overdischarge prevention system, when the voltage of any one cell becomes lower than a predetermined overdischarge determination reference voltage Vs, a binary logic overdischarge detection signal y1 is generated from the voltage detector 36 installed in the cell. It is done. This detection signal y1 is given to the energization control circuit 42 and the load device 100 via the logic circuit 39. Upon receiving the detection signal y1, the energization control circuit 42 is switched from on to off to cut off the discharge current. Thereby, the overdischarge of the cells (B1 to B4) is automatically prevented.
JP 2004-88878 A

  In the above-described multi-series storage cell, cell state monitoring circuits 55 and 56 are configured using voltage detectors 35 and 36. The voltage detectors 35 and 36 are installed in all of the multi-series storage cells (B1 to B4), respectively. However, this configuration has the following problems.

  That is, the voltage detectors 35 and 36 are configured using a differential operational amplifier having an inverting input (-) and a non-inverting input (+), and the cell voltage is compared with predetermined determination reference voltages Vm and Vs. Detect the state of. In order to perform this detection in all the cells, it is necessary to install the voltage detectors 35 and 36 for each cell and to create the determination reference voltages Vm and Vs for each cell.

  In this case, it should be noted that the voltage appearing at the terminals of the cells connected in series is added not only to the voltage of the cells but also to a voltage that varies step by step depending on the series connection position of the cells. It is that. Therefore, in order to compare only the cell voltage with the reference voltages Vm and Vs, there is a trouble that circuit means (for example, a bias circuit) for canceling the offset voltage must be provided for each cell.

  If the number of storage cells connected in series is small, it is not so difficult to cancel the offset voltage for each cell. For example, in power storage systems for electric vehicles and load storage power storage systems, several tens to several hundreds In many cases, a large number of such storage cells are connected in series. In such a multi-series energy storage cell, it is extremely difficult to appropriately cancel the offset voltage for each cell because the circuit becomes extremely complicated.

  The present invention has been made in view of the above technical background, and an object of the present invention is to provide a multi-series energy storage cell that can accurately monitor the state of all cells with a simple and low-cost configuration. . It is another object of the present invention to provide a multi-series storage cell that can prevent overcharge or overdischarge accurately based on the monitoring.

  Other objects and configurations of the present invention will become apparent from the description of the present specification and the accompanying drawings.

  The solution provided by the present invention is as follows.

  (1) A multi-series storage cell that uses a large number of storage cells connected in series, and a voltage balance correction circuit that equalizes the voltages of the storage cells to each other, and one selected from the multi-series storage cells A multi-series storage cell comprising a monitoring circuit that detects a specific cell voltage appearing in a specific storage cell of the unit and monitors the state of the multi-series storage cell based on the detection.

  (2) The multi-series storage cell according to (1), further comprising an energization control circuit that controls charging current or discharging current for all cells based on the operation of the monitoring circuit.

  (3) In the above means (1 or 2), the monitoring circuit outputs an overcharge detection signal as a monitoring signal when any one of the specific cell voltages exceeds a predetermined determination reference value. Multi-series energy storage cell.

  (4) In any one of the above means (1) to (3), the monitoring circuit outputs an overdischarge detection signal which is a monitoring signal when any one specific cell voltage falls below a predetermined determination reference value. A multi-series storage cell comprising a logic circuit for performing the above operation.

  (5) The above means (4) includes a delay circuit for delaying the overdischarge detection signal for a predetermined time, and provides the detection signal delayed by this delay circuit as a control signal to the energization control circuit for controlling the discharge current. A multi-series storage cell, wherein a detection signal not delayed by the delay circuit is transmitted to a load device as a monitoring signal.

(6) In any one of the above means (1) to (5),
The voltage balance correction circuit installs an inductor for each pair of two odd-numbered and even-numbered storage cells adjacent in series connection order, and alternately connects the inductor to the two cells in the pair. The voltage equalization operation is performed between the two cells in the pair, and the voltage equalization operation between the pairs is performed by inductively coupling the inductors of each pair with a common magnetic core.
The monitoring circuit detects a specific cell voltage appearing in each of the specific power storage cells selected from the odd-numbered and the specific power storage cells selected from the even-numbered serial connection columns, and generates a monitoring signal based on the detection. A multi-series storage cell characterized by

  (7) In any one of the above means (1) to (6), when the multi-series storage cells are grouped into a plurality of modules, the monitoring circuit specifies the specific power cells that appear in the specific power storage cells selected for each module A multi-series storage cell that detects a cell voltage and generates a monitoring signal based on the detection.

  (8) In any one of the above means (1) to (6), the monitoring circuit generates a monitoring signal based on a specific cell voltage detected from the storage cell located at the end of the series connection column. A multi-series storage cell.

  (9) In any of the above means (1) to (8), the monitoring circuit outputs the detected analog level of the specific cell voltage as a cell capacity signal.

  (10) In any one of the means (1) to (9), the monitoring circuit generates a monitoring signal based on an average voltage of a plurality of specific cell voltages.

  It is possible to accurately monitor the state of all the cells of the multi-series energy storage cell with a simple and low-cost configuration, and it is possible to reliably prevent overcharge or overdischarge.

  The operations / effects other than the above will be clarified from the description of the present specification and the accompanying drawings.

  FIG. 1 shows a multi-series storage cell according to a first embodiment of the present invention. In the multi-series storage cell shown in the figure, an even number (2n) of storage cells (B1 to B2n) are connected in series, and a voltage balance correction circuit 31, an energization control circuit 41, and an overcharge monitoring circuit 51 are installed. ing.

  The voltage balance correction circuit 31 includes inductors (Lc1, Lc2,..., Lcn) and switching circuits Sa and Sb. In this voltage balance correction circuit 31, two odd-numbered and even-numbered storage cells (B1, B3,..., B2n-1 and B2, B4,..., B2n) adjacent in series connection are paired. Inductors (Lc1, Lc2,..., Lcn) are provided for each pair.

  The inductors (Lc1, Lc2,..., Lcn) are connected to the odd-numbered and even-numbered cells (B1, B3,..., B2n−1 and B2, B4,. .., B2n) are alternately connected.

  The switching circuits Sa and Sb are configured using MOS-FETs and are complementarily turned on / off by a two-phase pulse signal (not shown). A diode is connected in parallel to each of the switching circuits Sa and Sb. This diode is formed by a parasitic diode (body diode) formed equivalently between the source and drain of the MOS-FET. This diode is connected in the reverse direction with respect to the voltage of the storage cell, but in the forward direction with respect to the inductor current.

  When one switching circuit Sa is on, inductor current is charged from the odd-numbered cells (B1, B3,..., B2n-1) to the inductors (Lc1 to Lcn). At this time, the other switching circuit Sb is off.

  When one switching circuit Sa is switched from on to off and the other switching circuit Sb is switched from off to on, the inductor current charged in the inductors (Lc1 to Lcn) is even-numbered through the other switching circuit Sb. The cells (B2, B4,..., Bn) are discharged while being charged.

  Thereby, for each pair, voltage balance correction is performed to equalize the voltages of the two cells (B1, B3,..., B2n-1 and B2, B4,..., B2n).

  Furthermore, in this embodiment, the inductors (Lc1 to Lcn) installed for every two cells are inductively coupled to each other by the common magnetic core 22. Accordingly, the inductors (Lc1, Lc2,..., Lcn) are transformer-coupled with each other at a one-to-one transformation ratio.

  Here, the odd-numbered cells (B1, B3,..., B2n-1) are connected to the inductors (Lc1, Lc2,..., Lcn) via the switching circuit Sa, respectively. Since the switching circuit Sa is turned on / off in the same phase, the odd-numbered cells (B1, B3,..., B2n-1) are transformed by the transformer coupling between the inductors (Lc1, Lc2,..., Lcn). AC coupled to each other. By this AC coupling, a voltage balance correction operation is performed between odd-numbered cells (B1, B3,..., B2n-1).

  Even-numbered cells (B2, B4,..., B2n) are also connected to inductors (Lc1, Lc2,..., Lcn) via the switching circuit Sb, thereby being AC-coupled to each other. And by this alternating current coupling, voltage balance correction | amendment operation | movement is performed also between even-numbered cells (B2, B4, ..., B2n).

  As described above, in the voltage balance correction circuit 31 shown in FIG. 1, between the odd-numbered cells (B1, B3,..., B2n-1) and the even-numbered cells (B2, B4,..., B2n). Voltage balance correction is performed between each cell, and voltage balance correction is also performed between odd-numbered cells (B1, B3,..., B2n-1) and even-numbered cells (B2, B4,..., B2n). Is performed, voltage balance correction of all cells (B1 to B2n) is performed.

  The energization control circuit 41 is configured by using a power MOS-FET that is a switching element, and is interposed between the load device 100 having a power generation function and the series connection end of the multi-series storage cells (B1 to Bn). Energization is turned on / off. The energization control circuit 41 is turned on / off by a monitoring signal x 1 generated from the overcharge monitoring circuit 55. The overcharge monitoring circuit 55 is configured using a voltage detector 35 and a logic circuit (OR logic) 38. The voltage detector 35 is configured using a differential operational amplifier having an inverting input (−) and a non-inverting input (+).

  The voltage detector 35 includes 2n-1th cells B2n-1 and odd-numbered cells (B2, B4,..., B2n-1) among odd-numbered cells (B1, B3,..., B2n-1). B2n) is installed only in the 2n-th cell B2n. That is, only a total of two are installed in each of the odd-numbered columns and the even-numbered columns, and are not installed in other cells.

  The two voltage detectors 35 respectively determine the presence or absence of overcharge in the cell (Bn-1, Bn) by comparing the voltage of the cell (Bn-1, Bn) with a predetermined overcharge determination reference voltage Vm. To do. The determination result is output in binary logic. The logic circuit 38 outputs a logical sum of the determination outputs of the two voltage detectors 35 as a monitoring signal x1, and gives it to the energization control circuit 41 as an on / off control signal.

  As a result, when one of the two cells (Bn−1, Bn) is overcharged, the energization control circuit 41 is switched from on to off by the monitoring signal x1 from the overcharge monitoring circuit 55 and charged. Cut off current.

  The overcharge prevention operation described above is performed by detecting the voltages of the two cells (Bn−1, Bn). Here, since the voltage detector 35 is installed only in the two cells (Bn−1, Bn), the voltage of other cells is not detected. However, the voltage balance correction circuit 31 performs the balance correction so that the voltages of all the cells (B1 to B2n) are always the same voltage.

  Therefore, in the cells (B1, B3,..., B2n-1 and B2, B4,..., B2n) in which the voltage balance is corrected, the voltage detected from any cell is The voltage of the whole cell is reflected. That is, the state of the whole cell is reflected in the voltage of any cell. Thereby, only the voltage of a specific cell (Bn-1, Bn) is monitored, and overcharge prevention is performed based on this monitoring, so that overcharge can be reliably prevented for the entire cell.

  As described above, the state of all cells can be accurately detected with a simple and low-cost configuration. And overcharge can be reliably prevented based on the detection.

  In the above embodiment, the odd-numbered cell (B2n-1) and the even-numbered cell (Bn) are selected as the specific cells, for the following reason.

  That is, in the above embodiment, (1) voltage balance between the odd-numbered cells (B1, B3,..., B2n-1) and between the even-numbered cells (B2, B4,..., B2n). In addition to correction, (2) voltage balance correction is performed between odd-numbered cells (B1, B3,..., B2n-1) and even-numbered cells (B2, B4,..., B2n). Thus, the voltage balance correction of all the cells (B1 to B2n) is performed.

  In this case, the voltage equalization operation by the correction (1) appears more rapidly than the voltage equalization operation by the correction (2). Accordingly, in this case, the 2n-1 cell B2n-1 which is a representative of the odd cells (B1, B3,..., B2n-1) and the even cells (B2, B4,. , B2n) and the 2n-th cell B2n, which is a representative of the cells, perform overcharge monitoring by the voltage detector 35 to quickly and accurately monitor all cells (B1 to B2n). be able to. As a result, overcharge prevention for all cells (B1 to B2n) can be performed more reliably.

  Furthermore, in the said embodiment, it is made to produce | generate the monitoring signal x1 based on the specific cell voltage detected from electrical storage cell B2n-1, B2n located in the edge part of a serial connection row | line | column. In the cells (B2n-1, B2n) located at the end of the series connection row, the offset voltage added to the cell voltage is smaller than that of the cell located in the middle of the series connection row. Therefore, the cell (B2n-1, B2n) at that position is convenient for canceling the offset voltage and detecting only the cell voltage.

  FIG. 2 shows a multi-series storage cell according to the second embodiment of the present invention. The basic configuration of the second embodiment is the same as that of the first embodiment. Focusing on the difference from the first embodiment, in the second embodiment, the energization control circuit 42 controls on / off of energization of the discharge current, and the monitoring circuit 52 is an overdischarge monitoring circuit that determines the presence or absence of overdischarge. It is configured.

  Similarly to the charging current energization control circuit 41, the discharge current energization control circuit 42 is configured using a power MOS-FET as a switching element, and is on / off controlled by a monitoring signal y <b> 1 emitted from the overdischarge monitoring circuit 52. The

  The monitoring circuit 52 is configured using a voltage detector 36 and a logic circuit (OR logic) 39. The voltage detector 36 includes 2n-1 cells B2n-1 and odd cells (B2, B4,..., B2n-1) among odd cells (B1, B3,..., B2n-1). B2n) is installed only in the 2n-th cell B2n.

  Each of the two voltage detectors 36 compares the voltage of the cell (Bn−1, Bn) with a predetermined overdischarge determination reference voltage Vs to determine whether or not there is an overdischarge in the cell (Bn−1, Bn). To do. The determination result is output in binary logic. The logic circuit 39 outputs the logical sum of the determination outputs of the voltage detectors 36 as the monitoring signal y1.

  The monitoring signal y1 is sent to the load device 100 that is supplied with current from the multi-series storage cells (B1 to B2n), and is given as a control signal to the energization control circuit 42 via the delay circuit 45.

  As a result, when the multi-series storage cells (B1 to B2n) are overdischarged, this state is notified to the load device 100, and the energization control circuit 42 is switched from on to off after a predetermined delay time from the notification. Switch to state. Alternatively, after receiving the notification and obtaining permission for disconnection from the load device, the discharge current is cut off.

  This forced shut-off is performed with a predetermined grace time set by the delay circuit 45. During this grace period, the load device 100 side can execute processing such as sequence processing required before power-off or disconnection of heavy loads.

  FIG. 3 shows a multi-series storage cell according to the third embodiment of the present invention. The basic configuration of the third embodiment is substantially the same as that of the first or second embodiment. Focusing on the difference from the first embodiment, in this embodiment, an energization control circuit 43 that controls on / off of both charging and discharging currents, and an analog for detecting the electric capacity stored in the cell. A cell capacity monitoring circuit 53 is installed.

  The energization control circuit 43 is a bidirectional directional switch circuit that controls on / off of a charging current and a discharging current, and is configured using a MOS-FET. The cell capacity monitoring circuit 53 is configured using an analog voltage detector 37. The analog voltage detector 37 is installed in the cell B2n located at the column end of the multi-series storage cells (B1 to B2n), and outputs the difference between the voltage of the cell B2n and a predetermined reference voltage Vr in the form of an analog level. To do. This analog level signal is transmitted to the load device 100 as the cell capacity monitoring signal z1.

  The voltage of a storage cell such as a capacitor or a secondary battery increases or decreases according to the remaining amount of electric capacity stored in the cell. Therefore, the electric capacity in each cell can be quantitatively detected by analog detection of the cell voltage.

  In order to accurately monitor the remaining capacity in all the cells (B1 to B2n), it is necessary to detect the cell voltages for all the cells. However, depending on the combination with the voltage balance correction circuit 31, at least one of them is detected. By detecting the cell voltage of the cell B2n in analog, the capacity in all the cells (B1 to B2n) can be accurately monitored. This is because the voltages of all the cells (B1 to B2n) are equalized by the operation of the voltage balance correction circuit 31.

  As described above, the load device 100 can accurately determine the remaining capacity of the storage cell based on the cell capacity monitoring signal z1, and can execute processing such as a capacity out alarm transmission, if necessary. Further, it is possible to accurately prevent overcharge or overdischarge by determining the presence or absence of overcharge or overdischarge based on the cell capacity monitoring signal z1 and controlling the energization control circuit 43 based on this determination. it can.

  FIG. 4 shows a multi-series storage cell according to the fourth embodiment of the present invention. The basic configuration of the fourth embodiment is substantially the same as that of the first to third embodiments. Paying attention to the difference from these embodiments, in this fourth embodiment, a composite monitoring circuit 54 having all the functions of the monitoring circuits 51 to 53 in the first to third embodiments is installed.

  The composite monitoring circuit 54 is configured using a cell state detection circuit 541 that detects each of overcharge, overdischarge, and cell capacity. The detection circuit 541 includes the functions of the voltage detectors 35, 36, and 37 described above, and is overcharged based on voltages appearing in some specific cells selected from among the multi-series storage cells (B1 to Bn). Alternatively, the presence or absence of overdischarge and the size of the cell capacity are detected. The detection results are output as monitoring signals x1, y1, and z1, respectively, and transmitted to the load device 100.

  In this embodiment, two cells (B2n-1, B2n) adjacent to each other at the end of the series connection row are selected as the specific cells. The series voltage of these two cells (B2n-1, B2n) is divided by 1/2 by the resistors R1, R2 and input to the cell state detection circuit 541. The cell state detection circuit 541 generates three types of monitoring signals x1, y1, and z1 based on the divided voltage and sends them to the load device 100. The load device 100 can accurately determine the presence or absence of overcharge or overdischarge and the remaining capacity of the storage cell based on the monitoring signals x1, y1, and z1.

  In this case, the above determination is made based on the average value of the cell voltages appearing in the two cells (B2n-1, B2n). Thereby, the state of two cells (B2n-1, B2n) can be monitored by one detection circuit 541. This is effective in reducing the number of parts and cost. Also, even if there are variations or errors due to individual differences between the two cells (B2n-1, B2n), the state of both cells is averaged and detected, so that the effects of the variations and errors are eliminated. Can be reduced.

  The above embodiment is one typical example, and the detection circuit 541 can be replaced with a detection circuit corresponding to any one or two of overcharge, overdischarge, and remaining capacity.

  FIG. 5 shows a multi-series storage cell according to the fifth embodiment of the present invention. In the fifth embodiment, the multi-series storage cells (B1 to B4, B5 to B8) are grouped into a plurality (two) of modules M1 and M2. That is, two multi-series storage cells (B1 to B4) are connected in series. Each module M1, M2 is provided with a voltage balance correction circuit 31 including inductors Lc1, Lc2 and switching circuits Sa, Sb inductively coupled to each other by a magnetic core 22.

  The monitoring circuit 54 is configured using a cell state detection circuit 541 installed for each of the modules M1 and M2. The cell state detection circuit 541 detects a specific cell voltage appearing in only one specific power storage cell B4 in each of the modules M1 and M2, and based on this detection, states of overcharge, overdischarge, and cell capacity are detected. To detect. The overcharge and overdischarge detection results are output in binary logic for each of the modules M1 and M2.

  The binary detection signals from the modules M1 and M2 are input to the logic circuits 38 and 39, and a logical sum is taken for each monitoring item. This logical sum signal is transmitted to the load device as overcharge and overdischarge monitoring signals x1 and y1.

  The detection result of the cell capacity is output at an analog level for each of the modules M1 and M2, and is transmitted to the load device as cell capacity monitoring signals z1 and z2.

  FIG. 6 shows a multi-series storage cell according to the sixth embodiment of the present invention. In the sixth embodiment, the voltage balance correction circuit 31 that equalizes the cell voltages of the multi-series storage cells (B1 to B4) is configured by a transformer coupling method using a transformer T1.

  The voltage balance correction circuit 31 of this system is turned on and off in the same phase with a plurality of transformer coils (L1 to L4) wound around the same magnetic core 21 with the same number of turns and having a one-to-one transformation ratio. The switching circuit Sc is configured to be used. The switching circuit Sc is configured by using a MOS-FET, and is turned on / off in phase with each other in response to a pulse signal (clock signal) having a fixed period supplied from a control circuit (not shown).

  Each cell (B1 to B4) is connected to the transformer coil (L1 to L4) via the switching circuit Sc, thereby being AC-coupled with each other at a transformation ratio of 1: 1. Thereby, the balance correction is performed so that the voltages of the cells (B1 to B4) become the same voltage. In this case, the monitoring circuit 54 can be configured by using a cell state detection circuit 541 installed in one of the storage cells (B1 to B4) connected in series.

  FIG. 7 shows a multi-series storage cell according to the seventh embodiment of the present invention. In the seventh embodiment, the multi-series storage cells (B1 to B2n) are grouped into a plurality (two) of modules M1 and M2, and each cell voltage is equalized by the first and second voltage balance corrections. The circuits 31 and 32 are used.

  The first voltage balance correction circuit 31 saves detailed illustration, but performs voltage balance correction between the cells in the modules M1 and M2. The second voltage balance correction circuit 32 is a transformer coupling method and performs voltage balance correction between the modules M1 and M2. Thereby, the voltages of all the cells (B1 to B2n) are equalized. In this case, the cell state detection circuit 541 constituting the monitoring circuit 54 may be installed only for at least one cell B2n in any one module M2.

  As described above, the present invention has been described based on the typical embodiments. However, the present invention can have various modes other than those described above.

  It is possible to accurately monitor the state of all the cells of the multi-series energy storage cell with a simple and low-cost configuration, and it is possible to reliably prevent overcharge or overdischarge.

It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows 1st Embodiment of the multi series electrical storage cell by this invention. It is a principal part circuit diagram which shows the 1st structural example of the conventional multi-series electrical storage cell. It is a principal part circuit diagram which shows the 2nd structural example of the conventional multi-series electrical storage cell.

Explanation of symbols

100 Load device 21, 22 Magnetic core 31, 32 Voltage balance correction circuit 35 Voltage detector (for overcharge monitoring)
36 Voltage detector (for overdischarge monitoring)
37 Voltage detector (for cell capacity monitoring)
38, 39 Logic circuit 41, 42, 43 Energization control circuit 51, 55 Overcharge monitoring circuit 52, 56 Overdischarge monitoring circuit 53 Cell capacity monitoring circuit 54 Composite monitoring circuit 541 Cell state detection circuit B1-B2n Storage cell M1, M2 module Lc1 to Lcn Inductor L1 to L4 Transformer coil Sa, Sb, Sc Switching circuit T1 Transformer Vm Overcharge determination reference voltage Vs Overdischarge determination reference voltage

Claims (10)

  A multi-series energy storage cell that uses a large number of energy storage cells connected in series, and a voltage balance correction circuit that equalizes the voltages of the energy storage cells to each other and a specific part selected from among the multi-series energy storage cells A multi-series storage cell comprising a monitoring circuit that detects a specific cell voltage appearing in the storage cell and monitors the state of the multi-series storage cell based on the detection.   2. The multi-series storage cell according to claim 1, further comprising an energization control circuit that controls charging current or discharging current for all cells based on an operation of the monitoring circuit.   3. The multi-series storage cell according to claim 1, wherein the monitoring circuit outputs an overcharge detection signal as a monitoring signal when any one specific cell voltage exceeds a predetermined determination reference value. .   4. The monitoring circuit according to claim 1, further comprising a logic circuit that outputs an overdischarge detection signal that is a monitoring signal when any one of the specific cell voltages falls below a predetermined determination reference value. A multi-series storage cell characterized by   5. The delay circuit according to claim 4, further comprising a delay circuit that delays the overdischarge detection signal for a predetermined time. The detection signal delayed by the delay circuit is provided as a control signal to an energization control circuit that controls the discharge current. A multi-series storage cell, characterized in that a detection signal that is not delayed is transmitted to a load device as a monitoring signal. In any one of Claims 1-5,
The voltage balance correction circuit installs an inductor for each pair of two odd-numbered and even-numbered storage cells adjacent in series connection order, and alternately connects the inductor to the two cells in the pair. The voltage equalization operation is performed between the two cells in the pair, and the voltage equalization operation between the pairs is performed by inductively coupling the inductors of each pair with a common magnetic core.
The monitoring circuit detects a specific cell voltage appearing in each of the specific power storage cells selected from the odd-numbered and the specific power storage cells selected from the even-numbered serial connection columns, and generates a monitoring signal based on the detection. A multi-series storage cell characterized by   In any one of Claims 1-6, when the multi-series storage cell is grouped into a plurality of modules, the monitoring circuit detects a specific cell voltage appearing in the specific storage cell selected for each module, and this A multi-series energy storage cell that generates a monitoring signal based on detection.   7. The multi-series storage cell according to claim 1, wherein the monitoring circuit generates a monitoring signal based on a specific cell voltage detected from the storage cell located at an end of the series connection row.   9. The multi-series storage cell according to claim 1, wherein the monitoring circuit outputs an analog level of the detected specific cell voltage as a cell capacity signal. The multi-series storage cell according to claim 1, wherein the monitoring circuit generates a monitoring signal based on an average voltage of a plurality of specific cell voltages.

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