JP2008041803A - Manufacturing method of soldered circuit board - Google Patents
Manufacturing method of soldered circuit board Download PDFInfo
- Publication number
- JP2008041803A JP2008041803A JP2006211860A JP2006211860A JP2008041803A JP 2008041803 A JP2008041803 A JP 2008041803A JP 2006211860 A JP2006211860 A JP 2006211860A JP 2006211860 A JP2006211860 A JP 2006211860A JP 2008041803 A JP2008041803 A JP 2008041803A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- circuit
- wiring board
- printed wiring
- solder powder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Description
本発明は、ハンダ回路基板の製造方法に関し、更に詳しくは、プリント配線板上に、ボールグリッドアレイ （ＢＧＡ）構造等のＬＳＩチップを接続するための接続用バンプを形成する方法、ＬＳＩチップに設けられた接続用バンプを形成する方法に関する。 The present invention relates to a method of manufacturing a solder circuit board, and more specifically, a method of forming a connection bump for connecting an LSI chip such as a ball grid array (BGA) structure on a printed wiring board, and the LSI chip. The present invention relates to a method of forming a connecting bump.
近年、プラスチック基板、セラミック基板、あるいはプラスチック等をコートした金属基板等の絶縁性基板上に、回路パターンを形成したプリント配線板が開発され、その回路パターン上にＩＣ素子、半導体チップ、抵抗、コンデンサ等の電子部品をハンダ接合して電子回路を構成させる手段が広く採用されている。 In recent years, a printed wiring board in which a circuit pattern is formed on an insulating substrate such as a plastic substrate, a ceramic substrate, or a metal substrate coated with plastic has been developed, and an IC element, a semiconductor chip, a resistor, a capacitor is formed on the circuit pattern. A means for soldering electronic components such as these to form an electronic circuit is widely used.
この場合、電子部品のリード端子を、回路パターンの所定の部分に接合させるためには、基板上の導電性回路電極表面に予めハンダ薄層を形成させておき、ハンダペーストまたはフラックスを印刷し、所定の電子部品を位置決め載置した後、ハンダ薄層またはハンダ薄層及びハンダペーストをリフローさせ、ハンダ接続させるのが一般的である。 In this case, in order to join the lead terminal of the electronic component to a predetermined portion of the circuit pattern, a solder thin layer is formed in advance on the surface of the conductive circuit electrode on the substrate, and solder paste or flux is printed, In general, after positioning and mounting a predetermined electronic component, the solder thin layer or the solder thin layer and the solder paste are reflowed and soldered.
また最近では電子製品の小型化のためハンダ回路基板にはファインピッチ化が要求され、ファインピッチの部品、例えば０．３ｍｍピッチのＱＦＰ（Ｑｕａｄ Ｆｌａｔ Ｐａｃｋａｇｅ）タイプのＬＳＩ、ＣＳＰ（Ｃｈｉｐ Ｓｉｚｅ Ｐａｃｋａｇｅ）、０．１５ｍｍピッチのＦＣ（Ｆｌｉｐ Ｃｈｉｐ）、ＢＧＡ構造のＬＳＩチップなどが多く搭載されている。このようなチップをハンダ回路基板に搭載するためには、チップに形成されたハンダバンプと、回路基板に形成したハンダバンプとを重ね、このハンダバンプをリフローすることにより両バンプを溶解接合する。
このためハンダ回路基板には、接続用バンプとよばれるハンダ回路基板面に対して盛り上がった電極部を形成する必要が有り、この電極部に対してはチップのファインピッチに対応できる精細なパターンが要求されている。
In recent years, finer pitches are required for solder circuit boards in order to reduce the size of electronic products. For example, fine pitch components such as 0.3 mm pitch QFP (Quad Flat Package) type LSI, CSP (Chip Size Package), A large number of 0.15 mm pitch FC (Flip Chip), BGA structure LSI chips, and the like are mounted. In order to mount such a chip on a solder circuit board, the solder bumps formed on the chip and the solder bumps formed on the circuit board are overlapped, and the solder bumps are reflowed to melt and bond both the bumps.
For this reason, it is necessary to form a raised electrode part on the surface of the solder circuit board, called a connection bump, on the solder circuit board. A fine pattern corresponding to the fine pitch of the chip is formed on this electrode part. It is requested.
プリント配線板にハンダによる接続用バンプを形成するためには、電気メッキ法、無電解メッキ法、ＨＡＬ（ホットエアーレベラ）法、あるいはハンダ粉末のペーストを印刷しリフローする方法などが行われている。しかし、無電解メッキ法によるハンダバンプの製造方法は、ハンダ層を厚くするのが困難であり、電気メッキ法によるハンダバンプの製造方法は、複雑な回路に電流を流すのが困難であった。またＨＡＬ法、ハンダペーストの印刷による方法は、ファインピッチパターンへの対応が困難である。 In order to form solder connection bumps on a printed wiring board, electroplating, electroless plating, HAL (hot air leveler), or a method of printing solder powder paste and reflowing is performed. . However, in the solder bump manufacturing method by the electroless plating method, it is difficult to increase the thickness of the solder layer, and in the solder bump manufacturing method by the electroplating method, it is difficult to pass a current through a complicated circuit. Also, the HAL method and the method using solder paste printing are difficult to deal with fine pitch patterns.
ファインピッチのハンダ回路を形成する方法として、プリント配線板の導電性回路電極表面に、粘着性付与化合物を反応させることにより粘着性を付与し、該粘着部にハンダ粉末を付着させ、次いで該プリント配線板を加熱し、ハンダを溶解してハンダ回路を形成する方法が開示されている（例えば、特許文献１参照。）。
特許文献１で開示された方法により、簡単な操作で微細なハンダ回路パターンを形成させ、信頼性の高い回路基板を提供することが可能となったが、この方法でハンダバンプを形成する場合、ハンダ回路基板のバンプを形成する粘着部に複数のハンダ粉末が付着してハンダバンプの高さが不均一となったり、該当箇所にハンダ粉末が付着せずに、ハンダバンプが欠損するといった問題点があった。これを解決するのが本願発明の目的である。 According to the method disclosed in Patent Document 1, it is possible to form a fine solder circuit pattern with a simple operation and provide a highly reliable circuit board. When solder bumps are formed by this method, solder is used. Multiple solder powders adhere to the adhesive part that forms the bumps on the circuit board, causing the solder bumps to become uneven in height, or the solder powder does not adhere to the corresponding locations and the solder bumps are lost. . It is an object of the present invention to solve this problem.
本発明者は、上記課題を解決すべく鋭意努力検討した結果、本発明に到達した。即ち本発明は、
［１］ プリント配線板上の導電性回路電極表面に粘着性を付与し、該粘着部にハンダ粉末を付着させ、次いで該プリント配線板を加熱し、ハンダを溶融してハンダ回路を形成するハンダ回路基板の製造方法において、回路電極部分をレジストで覆い、導電性回路電極部分に開口部を設け、該開口部の面積を円形とした場合の直径をＤ１、ハンダ粉末の直径をＤ２とし、回路電極部分のレジストの厚さをＤ３とした場合、該各開口部に、Ｄ１、Ｄ２、Ｄ３の間に式（１）の関係のハンダ粉粒子を１個だけ付着させることを特徴とするハンダ回路基板の製造方法、
１＞(D1−2×((D2−D3)×D3)1/2)／D2≧０ ・・・・（１）
［２］ プリント配線板が、ＬＳＩチップを接続するための接続用バンプを有する配線板であることを特徴とする上記［１］に記載のハンダ回路基板の製造方法、及び
［３］ プリント配線板が、ＬＳＩチップに設けられた接続用バンプであることを特徴とする請求項１に記載のハンダ回路基板の製造方法、を開発することにより上記の課題を解決した。
The inventor of the present invention has reached the present invention as a result of diligent efforts to solve the above problems. That is, the present invention
[1] Solder that imparts adhesiveness to the surface of the conductive circuit electrode on the printed wiring board, adheres solder powder to the adhesive portion, then heats the printed wiring board to melt the solder to form a solder circuit In the method of manufacturing a circuit board, the circuit electrode portion is covered with a resist, an opening is provided in the conductive circuit electrode portion, the diameter of the opening is circular, and the diameter of the solder powder is D2, and the diameter of the solder powder is D2. When the thickness of the resist of the electrode portion is D3, only one solder powder particle of the relationship of the formula (1) is attached to each opening between D1, D2, and D3. Substrate manufacturing method,
1> (D1-2 × ((D2-D3) × D3) 1/2 ) / D2 ≧ 0 (1)
[2] The method for manufacturing a solder circuit board according to the above [1], wherein the printed wiring board is a wiring board having connection bumps for connecting an LSI chip, and [3] the printed wiring board. The above-mentioned problems have been solved by developing a method of manufacturing a solder circuit board according to claim 1, wherein the bumps are connection bumps provided on an LSI chip.
本発明の製造方法により、より微細な回路パターンに対応でき、かつハンダバンプの高さが均一で、またハンダバンプの欠損がないハンダ回路基板の製造方法を提供することが可能となり、集積度が高く、かつ、信頼性の高い電子機器を提供することが可能となった。 According to the manufacturing method of the present invention, it is possible to provide a method of manufacturing a solder circuit board that can cope with a finer circuit pattern, has a uniform solder bump height, and has no solder bump defect, and has a high degree of integration. In addition, it has become possible to provide highly reliable electronic devices.
本発明の対象となるプリント配線板は、プラスチック基板、プラスチックフィルム基板、ガラス布基板、紙基質エポキシ樹脂基板、セラミックス基板等に金属板を積層した基板、あるいは金属基材にプラスチックあるいはセラミックス等を被覆した絶縁基板上に、金属等の導電性物質を用いて回路パターンを形成した片面プリント配線板、両面プリント配線板、多層プリント配線板あるいはフレキシブルプリント配線板等である。その他、IC基板、コンデンサ、抵抗、コイル、バリスタ、ベアチップ、ウェーハ等への適用も可能である。 The printed wiring board that is the subject of the present invention is a plastic substrate, a plastic film substrate, a glass cloth substrate, a paper substrate epoxy resin substrate, a substrate in which a metal plate is laminated on a ceramic substrate, or a metal substrate coated with plastic or ceramics. A single-sided printed wiring board, a double-sided printed wiring board, a multilayer printed wiring board, a flexible printed wiring board, or the like in which a circuit pattern is formed on a conductive substrate such as metal on the insulating substrate. In addition, it can be applied to IC substrates, capacitors, resistors, coils, varistors, bare chips, wafers, and the like.
本願発明は特に、プリント配線板上にＢＧＡ構造等のＬＳＩチップを接続するための接続用バンプを有することを特徴とする。
本願発明において、接続用バンプを形成する際は、プリント配線板上の導電性回路電極表面に粘着性を付与し、該粘着部にハンダ粉末を付着させ、次いで該プリント配線板を加熱し、ハンダを溶融して接続用ハンダバンプを形成するが、バンプを形成するためにハンダ粉末を付着させる回路電極部分の周囲を予めレジストで被うことにより開口部を円状とし、円状の開口部の直径をＤ１、ハンダ粉末の直径をＤ２とし、回路電極部分のレジストの厚さをＤ３とした場合、Ｄ１、Ｄ２、Ｄ３の間に式（１）の関係があるようにすることを特徴とする。
In particular, the present invention is characterized by having a connection bump for connecting an LSI chip such as a BGA structure on a printed wiring board.
In the present invention, when the connection bump is formed, the surface of the conductive circuit electrode on the printed wiring board is provided with adhesiveness, solder powder is adhered to the adhesive portion, and then the printed wiring board is heated. A solder bump for connection is formed by melting the electrode, and the opening is made circular by covering the periphery of the circuit electrode portion to which the solder powder is adhered in order to form the bump with a resist, and the diameter of the circular opening is formed. Is D1, the diameter of the solder powder is D2, and the resist thickness of the circuit electrode portion is D3, the relation of Formula (1) is established between D1, D2, and D3.
このような方法でプリント配線板を製造することにより、バンプを形成する回路電極部分にハンダ粉末が安定して付着し、このハンダ粉末をリフローすることにより、ハンダバンプの欠損がなく、ハンダバンプの回路基板面に対する高さが一定であるプリント配線板を得ることができる。 By manufacturing a printed wiring board by such a method, solder powder adheres stably to the circuit electrode portion where the bump is formed, and by reflowing this solder powder, there is no defect of the solder bump, and the solder bump circuit board. A printed wiring board having a constant height relative to the surface can be obtained.
本願発明では、ハンダバンプを形成する回路電極部分の周囲をレジストで被うことにより開口部を円状とするが、円状とは、好ましくは真円であるが、楕円であっても、四角であっても代用が可能である。開口部が真円以外の場合のＤ１は、その形状の内接円における直径とすれば、真円の場合と同様なハンダ粉末の付着状態を実現できる。 In the present invention, the opening is made circular by covering the periphery of the circuit electrode part forming the solder bump with a resist. The circular shape is preferably a perfect circle, but even if it is an ellipse, it is a square. Substitution is possible even if there is. If D1 when the opening is other than a perfect circle is the diameter of the inscribed circle of the shape, the same solder powder adhesion state as that of the perfect circle can be realized.
本願発明に用いるレジストとは、電子回路基板の製造に一般的に用いられる絶縁性のレジストであり、後で説明するプリント配線板上の導電性回路電極表面に粘着性を付与する工程において、粘着性が発現しない性質を有するレジストである。
また、本願発明では、ハンダバンプの形成部以外においても、ハンダ被覆が不要の導電性回路部分をレジスト等で覆い、粘着性付与化合物溶液で処理するのが好ましい。
The resist used in the present invention is an insulating resist that is generally used in the manufacture of electronic circuit boards. In the step of imparting adhesiveness to the surface of a conductive circuit electrode on a printed wiring board, which will be described later, It is a resist having the property of not exhibiting properties.
Further, in the present invention, it is preferable to cover a conductive circuit portion that does not require solder coating with a resist or the like other than the solder bump forming portion, and treat with a tackifying compound solution.
本発明は、上記プリント配線板上のレジストを常法により開口させ、次いで該導電性回路電極表面を粘着性付与化合物と反応させることにより粘着性を付与し、該粘着部にハンダ粉末を付着させ、次いで該プリント配線板を加熱し、ハンダを溶融してハンダバンプおよびハンダ回路を形成するハンダ回路基板の製造方法を適用する。 In the present invention, the resist on the printed wiring board is opened by a conventional method, and then the conductive circuit electrode surface is reacted with a tackifier compound to impart tackiness, and solder powder is adhered to the tacky portion. Next, a method of manufacturing a solder circuit board is applied in which the printed wiring board is heated to melt the solder to form solder bumps and solder circuits.
回路を形成する導電性物質としては、ほとんどの場合銅が用いられているが、本発明ではこれに限定されず、後述する粘着性付与物質により表面に粘着性が得られる導電性の物質であればよい。これらの物質として、例えば、Ｎｉ、Ｓｎ、Ｎｉ−Ａｕ、ハンダ合金等を含む物質が例示できる。 In most cases, copper is used as a conductive material for forming a circuit. However, the present invention is not limited to this, and any conductive material can be used that provides adhesion to the surface by a tackifier that will be described later. That's fine. Examples of these substances include substances containing Ni, Sn, Ni—Au, solder alloys, and the like.
本発明で用いることが好ましい粘着性付与化合物としては、ナフトトリアゾール系誘導体、べンゾトリアゾール系誘導体、イミダゾール系誘導体、べンゾイミダゾール系誘導体、メルカプトべンゾチアゾール系誘導体及びべンゾチアゾールチオ脂肪酸等が挙げられる。これらの粘着性付与化合物は特に銅に対しての効果が強いが、他の導電性物質にも粘着性を付与することができる。 As tackifying compounds preferably used in the present invention, naphthotriazole derivatives, benzotriazole derivatives, imidazole derivatives, benzoimidazole derivatives, mercaptobenzozoazole derivatives, benzothiazole thio fatty acids and the like Is mentioned. These tackifying compounds have a particularly strong effect on copper, but can also provide tackiness to other conductive substances.
本発明においては、べンゾトリアゾール系誘導体は一般式（１）で表される。
（但し、Ｒ１〜Ｒ４は、独立に水素原子、炭素数が１〜１６、好ましくは、５〜１６のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
In the present invention, the benzotriazole derivative is represented by the general formula (1).
(However, R1 to R4 independently represent a hydrogen atom, an alkyl group having 1 to 16, preferably 5 to 16 carbon atoms, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. To express.)
ナフトトリアゾール系誘導体は一般式（２）で表される。
（但し、Ｒ５〜Ｒ１０は、独立に水素原子、炭素数が１〜１６、好ましくは、５〜１６のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
The naphthotriazole derivative is represented by the general formula (2).
(However, R5 to R10 independently represent a hydrogen atom, an alkyl group having 1 to 16, preferably 5 to 16 carbon atoms, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. To express.)
イミダゾール系誘導体は一般式（３）で表される。
（但し、Ｒ１１、Ｒ１２は、独立に水素原子、炭素数が１〜１６、好ましくは、５〜１６のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
The imidazole derivative is represented by the general formula (3).
(However, R11 and R12 independently represent a hydrogen atom, an alkyl group having 1 to 16, preferably 5 to 16 carbon atoms, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. To express.)
べンゾイミダゾール系誘導体は一般式（４）で表される。
（但し、Ｒ１３〜Ｒ１７は、独立に水素原子、炭素数が１〜１６、好ましくは、５〜１６のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
The benzimidazole derivative is represented by the general formula (4).
(However, R13 to R17 each independently represents a hydrogen atom, an alkyl group having 1 to 16, preferably 5 to 16 carbon atoms, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. To express.)
メルカプトべンゾチアゾール系誘導体は一般式（５）で表される。
（Ｒ１８〜Ｒ２１は、独立に水素原子、炭素数が１〜１６、好ましくは、５〜１６のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
Mercaptobenzothiazole derivatives are represented by general formula (5).
(R18 to R21 independently represent a hydrogen atom, an alkyl group having 1 to 16, preferably 5 to 16 carbon atoms, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. )
べンゾチアゾールチオ脂肪酸系誘導体は一般式（６）で表される。
（但し、Ｒ２２〜Ｒ２６は、独立に水素原子、炭素数が１〜１６、好ましくは、１または２のアルキル基、アルコキシ基、Ｆ、Ｂｒ、Ｃｌ、Ｉ、シアノ基、アミノ基またはＯＨ基を表す。）
The benzothiazole thio fatty acid derivative is represented by the general formula (6).
(However, R22 to R26 independently represent a hydrogen atom, an alkyl group having 1 to 16, preferably 1 or 2, an alkyl group, an alkoxy group, F, Br, Cl, I, a cyano group, an amino group, or an OH group. To express.)
これらの化合物のうち、一般式（１）で示されるべンゾトリアゾール系誘導体としてはＲ１〜Ｒ４は、一般には炭素数が多いほうが粘着性が強い。
一般式（３）及び一般式（４）で示されるイミダゾール系誘導体及びべンゾイミダゾール系誘導体のＲ１１〜Ｒ１７においても、一般に炭素数の多いほうが粘着性が強い。
一般式（６）で示されるべンゾチアゾールチオ脂肪酸系誘導体においては、Ｒ２２〜Ｒ２６は炭素数１または２が好ましい。
Among these compounds, as the benzotriazole derivatives represented by the general formula (1), R1 to R4 generally have higher adhesion as the number of carbon atoms increases.
Also in R11 to R17 of the imidazole derivatives and benzoimidazole derivatives represented by the general formula (3) and the general formula (4), in general, the higher the number of carbon atoms, the stronger the adhesiveness.
In the benzothiazole thio fatty acid derivative represented by the general formula (6), R22 to R26 preferably have 1 or 2 carbon atoms.
本発明では、該粘着性付与化合物の少なくとも一つを水または酸性水に溶解し、好ましくはｐＨ３〜４程度の微酸性に調整して用いる。ｐＨの調整に用いる物質としては、導電性物質が金属であるときは塩酸、硫酸、硝酸、リン酸等の無機酸をあげることができる。また有機酸としては、蟻酸、酢酸、プロピオン酸、リンゴ酸、シュウ酸、マロン酸、コハク酸、酒石酸等が使用できる。該粘着性付与化合物の濃度は厳しく限定はされないが溶解性、使用状況に応じて適宜調整して用いるが、好ましくは全体として０．０５質量％〜２０質量％の範囲内の濃度が使用しやすい。これより低濃度にすると粘着性膜の生成が不十分となり、性能上好ましくない。 In the present invention, at least one of the tackifying compounds is dissolved in water or acidic water, and adjusted to slightly acidic, preferably about pH 3-4. Examples of the substance used for adjusting the pH include inorganic acids such as hydrochloric acid, sulfuric acid, nitric acid, and phosphoric acid when the conductive substance is a metal. As the organic acid, formic acid, acetic acid, propionic acid, malic acid, oxalic acid, malonic acid, succinic acid, tartaric acid and the like can be used. The concentration of the tackifier compound is not strictly limited, but is appropriately adjusted according to solubility and use conditions, but preferably a concentration in the range of 0.05% by mass to 20% by mass is easy to use as a whole. . If the concentration is lower than this, the formation of an adhesive film becomes insufficient, which is not preferable in terms of performance.
処理温度は室温よりは若干加温したほうが粘着性膜の生成速度、生成量が良い。粘着性付与化合物濃度、金属の種類などにより変わり限定的でないが、一般的には３０℃〜６０℃位の範囲が好適である。浸漬時間は限定的でないが、作業効率から５秒〜５分間位の範囲になるように他の条件を調整することが好ましい。 The treatment temperature and the production amount of the adhesive film are better when the treatment temperature is slightly warmer than room temperature. Although it varies depending on the tackifying compound concentration, the type of metal, and the like, it is generally in the range of about 30 ° C to 60 ° C. Although immersion time is not limited, it is preferable to adjust other conditions so that it may become the range of 5 second-about 5 minutes from work efficiency.
なおこの場合、溶液中に銅をイオンとして１００〜１０００ｐｐｍを共存させると、粘着性膜の生成速度、生成量などの生成効率が高まるので好ましい。 In this case, it is preferable to coexist 100 to 1000 ppm with copper as ions in the solution because the production efficiency such as the production rate and production amount of the adhesive film is increased.
ここで使用する前述の粘着性付与化合物溶液にプリント配線板を浸漬するか、または溶液を塗布すると、導電性回路表面が粘着性を示す。 When the printed wiring board is immersed in the above-mentioned tackifier compound solution used here or the solution is applied, the surface of the conductive circuit exhibits tackiness.
本発明の処理方法は前述した接続用ハンダバンプを有するプリント回路基板のみならず、ＬＳＩそのものの接続用ハンダバンプ部分、すなわち、ＢＧＡを有するＬＳＩチップやＣＳＰ（チップ・サイズ・パッケージ）ＬＳＩ等のバンプ形成としても有効に使用できるものであり、これらは本発明のハンダ回路基板に当然含まれるものである。 The processing method of the present invention is not limited to the above-described printed circuit board having solder bumps for connection, but also as solder bump portions for connection of LSI itself, that is, bump formation of LSI chips having BGA or CSP (chip size package) LSIs. Can also be used effectively, and these are naturally included in the solder circuit board of the present invention.
本発明のハンダ回路基板の製造方法に使用するハンダ粉末の金属組成としては、例えばＳｎ−Ｐｂ系、Ｓｎ−Ｐｂ−Ａｇ系、Ｓｎ−Ｐｂ−Ｂｉ系、Ｓｎ−Ｐｂ−Ｂｉ−Ａｇ系、Ｓｎ−Ｐｂ−Ｃｄ系が挙げられる。また最近の産業廃棄物におけるＰｂ排除の観点から、Ｐｂを含まないＳｎ−Ｉｎ系、Ｓｎ−Ｂｉ系、Ｉｎ−Ａｇ系、Ｉｎ−Ｂｉ系、Ｓｎ−Ｚｎ系、Ｓｎ−Ａｇ系、Ｓｎ−Ｃｕ系、Ｓｎ−Ｓｂ系、Ｓｎ−Ａｕ系、Ｓｎ−Ｂｉ−Ａｇ−Ｃｕ系、Ｓｎ−Ｇｅ系、Ｓｎ−Ｂｉ−Ｃｕ系、Ｓｎ−Ｃｕ−Ｓｂ−Ａｇ系、Ｓｎ−Ａｇ−Ｚｎ系、Ｓｎ−Ｃｕ−Ａｇ系、Ｓｎ−Ｂｉ−Ｓｂ系、Ｓｎ−Ｂｉ−Ｓｂ−Ｚｎ系、Ｓｎ−Ｂｉ−Ｃｕ−Ｚｎ系、Ｓｎ−Ａｇ−Ｓｂ系、Ｓｎ−Ａｇ−Ｓｂ−Ｚｎ系、Ｓｎ−Ａｇ−Ｃｕ−Ｚｎ系、Ｓｎ−Ｚｎ−Ｂｉ系が好ましい。 Examples of the metal composition of the solder powder used in the method for manufacturing a solder circuit board of the present invention include Sn-Pb, Sn-Pb-Ag, Sn-Pb-Bi, Sn-Pb-Bi-Ag, and Sn. -Pb-Cd system is mentioned. Further, from the viewpoint of eliminating Pb in recent industrial waste, Sn-In, Sn-Bi, In-Ag, In-Bi, Sn-Zn, Sn-Ag, Sn-Cu, which does not contain Pb. -Based, Sn-Sb-based, Sn-Au-based, Sn-Bi-Ag-Cu-based, Sn-Ge-based, Sn-Bi-Cu-based, Sn-Cu-Sb-Ag-based, Sn-Ag-Zn-based, Sn -Cu-Ag system, Sn-Bi-Sb system, Sn-Bi-Sb-Zn system, Sn-Bi-Cu-Zn system, Sn-Ag-Sb system, Sn-Ag-Sb-Zn system, Sn-Ag -Cu-Zn type and Sn-Zn-Bi type are preferable.
上記の具体例としては、Ｓｎが６３質量％、Ｐｂが３７質量％の共晶ハンダ（以下６３Ｓｎ／３７Ｐｂと表す。）を中心として、６２Ｓｎ／３６Ｐｂ／２Ａｇ、６２．６Ｓｎ／３７Ｐｂ／０．４Ａｇ、６０Ｓｎ／４０Ｐｂ、５０Ｓｎ／５０Ｐｂ、３０Ｓｎ／７０Ｐｂ、２５Ｓｎ／７５Ｐｂ、１０Ｓｎ／８８Ｐｂ／２Ａｇ、４６Ｓｎ／８Ｂｉ／４６Ｐｂ、５７Ｓｎ／３Ｂｉ／４０Ｐｂ、４２Ｓｎ／４２Ｐｂ／１４Ｂｉ／２Ａｇ、４５Ｓｎ／４０Ｐｂ／１５Ｂｉ、５０Ｓｎ／３２Ｐｂ／１８Ｃｄ、４８Ｓｎ／５２Ｉｎ、４３Ｓｎ／５７Ｂｉ、９７Ｉｎ／３Ａｇ、５８Ｓｎ／４２Ｉｎ、９５Ｉｎ／５Ｂｉ、６０Ｓｎ／４０Ｂｉ、９１Ｓｎ／９Ｚｎ、９６．５Ｓｎ／３．５Ａｇ、９９．３Ｓｎ／０．７Ｃｕ、９５Ｓｎ／５Ｓｂ、２０Ｓｎ／８０Ａｕ、９０Ｓｎ／１０Ａｇ、９０Ｓｎ／７．５Ｂｉ／２Ａｇ／０．５Ｃｕ、９７Ｓｎ／３Ｃｕ、９９Ｓｎ／１Ｇｅ、９２Ｓｎ／７．５Ｂｉ／０．５Ｃｕ、９７Ｓｎ／２Ｃｕ／０．８Ｓｂ／０．２Ａｇ、９５．５Ｓｎ／３．５Ａｇ／１Ｚｎ、９５．５Ｓｎ／４Ｃｕ／０．５Ａｇ、５２Ｓｎ／４５Ｂｉ／３Ｓｂ、５１Ｓｎ／４５Ｂｉ／３Ｓｂ／１Ｚｎ、８５Ｓｎ／１０Ｂｉ／５Ｓｂ、８４Ｓｎ／１０Ｂｉ／５Ｓｂ／１Ｚｎ、８８．２Ｓｎ／１０Ｂｉ／０．８Ｃｕ／１Ｚｎ、８９Ｓｎ／４Ａｇ／７Ｓｂ、８８Ｓｎ／４Ａｇ／７Ｓｂ／１Ｚｎ、９８Ｓｎ／１Ａｇ／１Ｓｂ、９７Ｓｎ／１Ａｇ／１Ｓｂ／１Ｚｎ、９１．２Ｓｎ／２Ａｇ／０．８Ｃｕ／６Ｚｎ、８９Ｓｎ／８Ｚｎ／３Ｂｉ、８６Ｓｎ／８Ｚｎ／６Ｂｉ、８９．１Ｓｎ／２Ａｇ／０．９Ｃｕ／８Ｚｎなどが挙げられる。また本発明に用いるハンダ粉末として、異なる組成のハンダ粉末を２種類以上混合したものでもよい。 Specific examples of the above are 62Sn / 36Pb / 2Ag, 62.6Sn / 37Pb / 0.4Ag centering on eutectic solder (hereinafter referred to as 63Sn / 37Pb) with 63% by mass of Sn and 37% by mass of Pb. 60Sn / 40Pb, 50Sn / 50Pb, 30Sn / 70Pb, 25Sn / 75Pb, 10Sn / 88Pb / 2Ag, 46Sn / 8Bi / 46Pb, 57Sn / 3Bi / 40Pb, 42Sn / 42Pb / 14Bi / 2Ag, 45Sn / 40Pb / 15Si / 32Pb / 18Cd, 48Sn / 52In, 43Sn / 57Bi, 97In / 3Ag, 58Sn / 42In, 95In / 5Bi, 60Sn / 40Bi, 91Sn / 9Zn, 96.5Sn / 3.5Ag, 99.3Sn / 0.7Cu, 95Sn / 5Sb, 20Sn / 80Au, 0Sn / 10Ag, 90Sn / 7.5Bi / 2Ag / 0.5Cu, 97Sn / 3Cu, 99Sn / 1Ge, 92Sn / 7.5Bi / 0.5Cu, 97Sn / 2Cu / 0.8Sb / 0.2Ag, 95.5Sn / 3.5Ag / 1Zn, 95.5Sn / 4Cu / 0.5Ag, 52Sn / 45Bi / 3Sb, 51Sn / 45Bi / 3Sb / 1Zn, 85Sn / 10Bi / 5Sb, 84Sn / 10Bi / 5Sb / 1Zn, 88.2Sn / 10Bi / 0.8Cu / 1Zn, 89Sn / 4Ag / 7Sb, 88Sn / 4Ag / 7Sb / 1Zn, 98Sn / 1Ag / 1Sb, 97Sn / 1Ag / 1Sb / 1Zn, 91.2Sn / 2Ag / 0.8Cu / 6Zn, 89Sn / 8Zn / 3Bi, 86Sn / 8Zn / 6Bi, 89.1Sn / 2Ag / 0.9Cu / 8Z And the like. Further, the solder powder used in the present invention may be a mixture of two or more kinds of solder powders having different compositions.
はんだバンプ形成において、バンプを高く形成するには１電極に１粉末を付着することが望ましい。このときハンダ粉末を付着させる回路電極部分の周囲をレジストで被うことにより開口部を円状とし、円状の開口部の直径をＤ１、ハンダ粉末の直径をＤ２とし、回路電極部分のレジストの厚さをＤ３とした場合、
１＞（Ｄ１−２×（（Ｄ２−Ｄ３）×Ｄ３）1/2）／Ｄ２≧０
の範囲で粉末を選択することで１電極に１粉末を付着することができ、好ましくは
０．９≧（Ｄ１−２×（（Ｄ２−Ｄ３）×Ｄ３）1/2）／Ｄ２≧０．０５
の範囲である。
In forming solder bumps, it is desirable to attach one powder to one electrode in order to form a bump high. At this time, by covering the periphery of the circuit electrode portion to which the solder powder is adhered with a resist, the opening is circular, the diameter of the circular opening is D1, the diameter of the solder powder is D2, and the resist of the circuit electrode portion When the thickness is D3,
1> (D1-2 × ((D2-D3) × D3) 1/2 ) / D2 ≧ 0
1 powder can be attached to 1 electrode by selecting the powder within the range of
0.9 ≧ (D1-2 × ((D2-D3) × D3) 1/2 ) /D2≧0.05
Range.
以下、実施例により本発明を説明するが、本発明はこれらに限定されるものではない。 EXAMPLES Hereinafter, although an Example demonstrates this invention, this invention is not limited to these.
（実施例１）
粘着性付与化合物溶液として、一般式（３）のＲ１２のアルキル基がＣ１１Ｈ２３、Ｒ１１が水素原子であるイミダゾール系化合物の２質量％水溶液を、酢酸によりｐＨを約４に調整して用いた。該水溶液を４０℃に加温し、これに塩酸水溶液により前処理した前記プリント配線板を３分間浸漬し、銅回路表面に粘着性物質を生成させた。
(Example 1)
As a tackifier compound solution, a 2% by mass aqueous solution of an imidazole compound in which the alkyl group of R12 in the general formula (3) is C11H23 and R11 is a hydrogen atom was used after adjusting the pH to about 4 with acetic acid. The aqueous solution was heated to 40 ° C., and the printed wiring board pretreated with an aqueous hydrochloric acid solution was immersed in the solution for 3 minutes to generate an adhesive substance on the surface of the copper circuit.
次いで該プリント配線板を、図１に示すような、容器内部の寸法が２５０ｍｍ×１２０ｍｍ×１２０ｍｍ、該容器にプリント配線板を水平方向に投入する投入口を有するハンダ粉末付着装置に入れた。容器には、水及び組成が９６．５Ｓｎ／３．５Ａｇで粒径７０μｍのはんだ粉末を、約４００ｇ入れた。ハンダ粉末付着装置を傾けて、ハンダ粉末が配線板（電極径に触れないようにして入れた。配線板をハンダ粉末付着装置に入れた後、１０秒間、容器を左右に３０°傾動させてハンダ粉末をプリント配線板に付着させた。傾動の周期は５秒／回とした。 Next, the printed wiring board was placed in a solder powder adhering apparatus as shown in FIG. 1 having a container internal dimension of 250 mm × 120 mm × 120 mm and having a slot for feeding the printed wiring board into the container in the horizontal direction. About 400 g of water and a solder powder having a composition of 96.5Sn / 3.5Ag and a particle size of 70 μm were placed in the container. The solder powder adhesion device was tilted so that the solder powder was placed so as not to touch the electrode diameter. After the wiring board was placed in the solder powder adhesion device, the container was tilted 30 ° left and right for 10 seconds. The powder was adhered to the printed wiring board, and the tilting period was 5 seconds / time.
その後、装置からプリント配線板を取り出し、純水で軽く洗浄した後、プリント配線板を乾燥させた。
このプリント配線板を２４０℃のオーブンに入れ、ハンダ粉末を溶融し、銅回露出部上に厚さ約２０μｍの９６．５Ｓｎ／３．５Ａｇハンダ薄層を形成した。
結果を表に示した。
Thereafter, the printed wiring board was taken out from the apparatus, washed lightly with pure water, and then dried.
This printed wiring board was placed in an oven at 240 ° C. to melt the solder powder, and a thin 96.5 Sn / 3.5 Ag solder layer having a thickness of about 20 μm was formed on the exposed portion of copper.
The results are shown in the table.
プリント配線板上の導電性回路電極表面に粘着性を付与し、該粘着部にハンダ粉末を付着させて、該ハンダを溶融してハンダ回路を形成するハンダ回路基板の製造方法により、簡単な操作で微細なハンダ回路パターンを形成させ、信頼性の高い回路基板を提供することが可能となったが、この方法でハンダバンプを形成する場合、ハンダ回路基板のバンプを形成する粘着部に、ハンダ粉末の粒度の不均一さに基づき、複数のハンダ粉末が付着してハンダバンプの高さが不均一となったり、該当箇所にハンダ粉末が付着せずに、ハンダバンプが欠損するといった問題点があった。これに対し、特定した粒径のハンダ粉末を用いることにより、各開口部に１個のハンダ粉末を付着させることにより、より微細な回路パターンに対応でき、かつハンダバンプの高さが均一で、またハンダバンプの欠損がないハンダ回路基板の製造方法を提供することが可能となり、集積度が高く、かつ、信頼性の高い電子機器を提供出来た。 Easy operation by a method of manufacturing a solder circuit board that imparts adhesiveness to the surface of the conductive circuit electrode on the printed wiring board, adheres solder powder to the adhesive portion, and melts the solder to form a solder circuit. With this method, it is possible to provide a highly reliable circuit board by forming a fine solder circuit pattern. However, when solder bumps are formed by this method, solder powder is applied to the adhesive portion that forms the bumps of the solder circuit board. Based on the non-uniformity of the grain size, there are problems that a plurality of solder powders adhere to make the solder bumps non-uniform in height, or solder powders do not adhere to the corresponding portions and the solder bumps are lost. On the other hand, by using a solder powder of the specified particle size, it is possible to cope with a finer circuit pattern by attaching one solder powder to each opening, and the height of the solder bump is uniform. It became possible to provide a method for manufacturing a solder circuit board free from defects in solder bumps, and to provide a highly integrated electronic device with a high degree of integration.
Claims (3)
１＞(D1−2×((D2−D3)×D3)1/2)／D2≧０ ・・・・（１）
A solder circuit board that provides adhesiveness to the surface of a conductive circuit electrode on a printed wiring board, attaches solder powder to the adhesive portion, then heats the printed wiring board to melt the solder to form a solder circuit. In the manufacturing method, the circuit electrode portion is covered with a resist, an opening is provided in the conductive circuit electrode portion, the diameter when the area of the opening is circular is D1, the diameter of the solder powder is D2, and the circuit electrode portion When the resist thickness is D3, only one solder powder particle having the relationship of the formula (1) is attached to each opening between D1, D2, and D3. Method.
1> (D1-2 × ((D2-D3) × D3) 1/2 ) / D2 ≧ 0 (1)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006211860A JP4819611B2 (en) | 2006-08-03 | 2006-08-03 | Method for manufacturing solder circuit board |
| KR1020097002330A KR20090039740A (en) | 2006-08-03 | 2007-07-27 | Production method of solder circuit board |
| EP07791891A EP2047725A4 (en) | 2006-08-03 | 2007-07-27 | Production method of solder circuit board |
| US12/375,341 US20090261148A1 (en) | 2006-08-03 | 2007-07-27 | Production method of solder circuit board |
| CN2007800327219A CN101513141B (en) | 2006-08-03 | 2007-07-27 | Manufacturing method of soldered circuit board |
| PCT/JP2007/065217 WO2008016128A1 (en) | 2006-08-03 | 2007-07-27 | Production method of soldier circuit board |
| TW096128419A TWI352563B (en) | 2006-08-03 | 2007-08-02 | Production method of solder circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006211860A JP4819611B2 (en) | 2006-08-03 | 2006-08-03 | Method for manufacturing solder circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008041803A true JP2008041803A (en) | 2008-02-21 |
| JP4819611B2 JP4819611B2 (en) | 2011-11-24 |
Family
ID=39176511
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006211860A Expired - Fee Related JP4819611B2 (en) | 2006-08-03 | 2006-08-03 | Method for manufacturing solder circuit board |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP4819611B2 (en) |
| CN (1) | CN101513141B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010125809A1 (en) | 2009-04-28 | 2010-11-04 | 昭和電工株式会社 | Process for production of circuit board |
| US20120042511A1 (en) * | 2009-04-30 | 2012-02-23 | Showa Denko K.K. | Method of producing circuit board |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6810915B2 (en) * | 2017-03-17 | 2021-01-13 | 富士電機株式会社 | Solder material |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09199506A (en) * | 1995-11-15 | 1997-07-31 | Citizen Watch Co Ltd | Method for forming bump on semiconductor chip |
| JPH118272A (en) * | 1997-06-18 | 1999-01-12 | Nec Corp | Method for arraying micrometallic ball |
| JP2001311005A (en) * | 2000-04-27 | 2001-11-09 | Nitto Denko Corp | Thermosetting resin sheet, and method for molding bump and semiconductor device using the same |
| WO2003060987A1 (en) * | 2002-01-10 | 2003-07-24 | Nec Corporation | Method of arranging micro spheres with liquid, micro sphere arranging device, and semiconductor device |
| JP2005354043A (en) * | 2004-05-10 | 2005-12-22 | Showa Denko Kk | Method for production of electronic circuit board |
-
2006
- 2006-08-03 JP JP2006211860A patent/JP4819611B2/en not_active Expired - Fee Related
-
2007
- 2007-07-27 CN CN2007800327219A patent/CN101513141B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09199506A (en) * | 1995-11-15 | 1997-07-31 | Citizen Watch Co Ltd | Method for forming bump on semiconductor chip |
| JPH118272A (en) * | 1997-06-18 | 1999-01-12 | Nec Corp | Method for arraying micrometallic ball |
| JP2001311005A (en) * | 2000-04-27 | 2001-11-09 | Nitto Denko Corp | Thermosetting resin sheet, and method for molding bump and semiconductor device using the same |
| WO2003060987A1 (en) * | 2002-01-10 | 2003-07-24 | Nec Corporation | Method of arranging micro spheres with liquid, micro sphere arranging device, and semiconductor device |
| JP2005354043A (en) * | 2004-05-10 | 2005-12-22 | Showa Denko Kk | Method for production of electronic circuit board |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2010125809A1 (en) | 2009-04-28 | 2010-11-04 | 昭和電工株式会社 | Process for production of circuit board |
| US9078382B2 (en) | 2009-04-28 | 2015-07-07 | Show A Denko K.K. | Method of producing circuit board |
| US20120042511A1 (en) * | 2009-04-30 | 2012-02-23 | Showa Denko K.K. | Method of producing circuit board |
| US8661659B2 (en) | 2009-04-30 | 2014-03-04 | Showa Denko K.K. | Method of producing circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101513141A (en) | 2009-08-19 |
| CN101513141B (en) | 2011-06-22 |
| JP4819611B2 (en) | 2011-11-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP4576270B2 (en) | Method for manufacturing solder circuit board | |
| TWI418277B (en) | Method for producing a circuit board | |
| JP4576286B2 (en) | Electronic circuit board manufacturing method and electronic component mounting method | |
| CN105122957B (en) | The installation method of the manufacture method of solder circuit substrate, solder circuit substrate and electronic unit | |
| JP5001113B2 (en) | Method for forming solder layer on printed wiring board and slurry discharging apparatus | |
| JP2008141034A (en) | Method of manufacturing conductive circuit substrate | |
| KR101193264B1 (en) | Process for production of circuit board | |
| JP4920401B2 (en) | Method for manufacturing conductive circuit board | |
| KR20090039740A (en) | Production method of solder circuit board | |
| TWI505382B (en) | Manufacturing method of a solder ball | |
| JP4819611B2 (en) | Method for manufacturing solder circuit board | |
| TWI311453B (en) | ||
| JP2008041867A (en) | Manufacturing method of soldered circuit board | |
| JP4819422B2 (en) | Method for attaching solder powder to electronic circuit board and electronic wiring board with solder | |
| JP2017208485A (en) | Mounting method of electronic component |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090514 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110614 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110726 |
|
| RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20110726 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110830 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110901 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140909 Year of fee payment: 3 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 4819611 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| LAPS | Cancellation because of no payment of annual fees |