JP2008040510A - Liquid crystal display device and driving circuit of the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving circuit and a liquid crystal display device, the manufacturing process of which can be simplified by forming wirings in a single layer structure on a glass substrate. <P>SOLUTION: In the liquid crystal display device, a gate scanning voltage is outputted from a first side of a driving circuit opposing to a display region, via arrayed output terminals 39 for an LCD to the respective corresponding gate wirings 18. A gate OFF level voltage is transmitted through cascaded wirings between a terminal dummy wiring 15 laid in a gate driver IC 2, 2a and another gate driver IC 2, 2a connected to the dummy wiring. A gate OFF level voltage is applied to a gate dummy wiring 19 through connection wirings between the gate dummy wiring 19 and a dummy output terminal 40b, 40c for an LCD connected to the terminal dummy wiring 15 and laid at an end of the first side. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an active matrix liquid crystal display device, and more particularly to a thin film transistor driving circuit.

  In general, a liquid crystal display device includes a liquid crystal panel composed of two opposing substrates sandwiching a liquid crystal layer. One substrate is a TFT array substrate provided with thin film transistors (TFTs) as switching elements in a matrix and pixel electrodes are connected to the TFTs, and the other substrate is an RGB colored layer and a transparent conductive film such as ITO. A color filter substrate (CF substrate) having a counter electrode (transparent electrode) made of The liquid crystal layer is aligned by the potential difference between the pixel electrode and the counter electrode, and displays each color. Such liquid crystal display devices are disclosed in, for example, Patent Document 1 and Patent Document 2.

  A driving voltage supply method for a conventional liquid crystal display device will be described with reference to FIG. FIG. 5 shows a configuration of a liquid crystal display device (LCD) using a general TFT. 1 is a liquid crystal panel, 2 is a gate driver IC, 3 is a source driver IC, 5 is a timing controller (hereinafter referred to as TCON), 6 is a DC / DC unit, 18 is a gate wiring, 19 is a gate dummy wiring, and 20 is a source. Wiring, 21 is a source dummy wiring, 22 is a gate first line TFT, 23 is a gate second line TFT, 24 is a pixel electrode of the gate first line TFT, 25 is a pixel electrode of the gate second line TFT, and 26 is a liquid crystal layer , 27 is a common electrode, 28 is a gate electrode, 29 is a source electrode, 30 is a drain electrode, and 31 is a storage capacitor. Here, reference numerals a to n attached to the back of the numerals indicate a plurality of wirings, individual wirings such as electrodes, electrodes, and the like.

  The liquid crystal panel 1 includes a plurality of gate wirings 18a to 18n and a plurality of source wirings 20a to 20n arranged substantially vertically. The numbers of the gate wiring 18 and the source wiring 20 are indicated by the same a to n, but are not limited to the same number. TFTs 22 and 23 are formed at the intersections of the gate lines 18 and the source lines 20 that cross each other in a matrix. Of the TFTs 22 and 23, the TFT formed corresponding to the uppermost gate wiring 18a is referred to as a gate first line TFT 22, and the TFT formed corresponding to the second gate wiring is referred to as a gate second line TFT 23. Further, gate first line TFTs 22a to 22n and gate second line TFTs 23a to 23n corresponding to the source lines 20a to 20n, respectively. Further, pixel electrodes 24a to n of the gate first line TFT are formed corresponding to the gate first line TFTs 22a to n, and pixel electrodes 25a to n of the gate second line TFT are formed corresponding to the gate second line TFTs 23a to n. . Each pixel includes these pixel electrodes 24 and 25, a common electrode 27 (COM), and a liquid crystal layer 26 sandwiched therebetween.

  The gate electrode 28 of each TFT 22a-n, 23a-n is connected to the corresponding gate wiring 18, the source electrode 29 is connected to the source wiring 20, and the drain electrode 31 is connected to the pixel electrodes 24, 25, respectively.

  Further, the gate wiring 18 is provided with a gate driver IC2 for turning on the TFT gate according to vertical scanning, and the source wiring is provided with a source driver IC3 for converting display pixel data into a liquid crystal driving voltage. The gate driver IC2 and the source driver IC3 are controlled by TCON5 that controls timing.

  Next, the outline of the signal operation of the liquid crystal display device shown in FIG. 5 will be described with reference to FIG. FIG. 6 is a drive timing chart of the liquid crystal display device.

  First, the source driver IC3 samples and holds the display data supplied from the TCON5 for one gate wiring (for example, 18a). Since this display data is supplied to each TFT element for one gate wiring, 1 to n pieces of data are held as shown in FIG.

  After the display data of the gate line 18a is held in the source driver IC, a shift start signal is output by TCON5, and the VDDG voltage is supplied. As a result, a voltage is applied from the OFF level (hereinafter referred to as VEEG voltage) to the ON level (hereinafter referred to as VDDG voltage) to the gate electrodes of all the gate first line TFTs 22a to 22n connected to the gate wiring 18a. Is turned on.

  Thereafter, when the gate is turned on, the display data held in the source driver IC 3 is output, and the liquid crystal drive voltage corresponding to the display data sampled earlier is supplied to all the source wirings 20a to 20n. A voltage is supplied to the drain electrode 30 and the pixel electrode 24 of the gate first line TFT via the source electrode 29 of the gate first line TFT 22a-n in which the gate electrode 28 is turned on, and a voltage is applied to the liquid crystal layer 26.

  After the display data sampled by the source driver IC3 in the above operation is converted into the liquid crystal driving voltage, the source driver IC3 samples the display data for the next gate wiring (for example, 18b) by the sampling start signal from the TCON5. Start. By repeating the above operation for each gate wiring, display data from a signal source such as a computer can be favorably displayed.

  A method of supplying a voltage to the dummy wiring in the conventional TFT liquid crystal panel will be described with reference to FIG. FIG. 7 is a plan view showing the configuration of the liquid crystal panel on the TFT array substrate side. Since the same reference numerals as those in FIG. 5 indicate the same configuration, the description thereof is omitted. 33 is an FPC (Flexible Printed Circuit), 4 is a source bus board, 7 is TCP (Tape Carrier Package), 8 is VCOM, 9 is VEEG, 19 is a gate dummy wiring, 21 is a source dummy wiring, and 32 is a gate bus board. is there. Here, the configuration of the TFT is omitted because it is the same as that in FIG.

  Dummy pixels (not shown) are provided at the periphery of the display area of the liquid crystal panel 1 in order to prevent the display from becoming non-uniform due to the peculiarity of repeated patterns. In order to display the dummy pixels, a gate dummy wiring 19 and a source dummy wiring 21 are provided at the peripheral edge of the display area. The VCOM voltage generated by the DC / DC unit 6 is supplied to the source dummy wiring 21 from the VCOM 8 provided on the source bus substrate 4 and the TCP 7.

  Similarly, the VEEG voltage generated by the DC / DC unit 6 is supplied to the gate dummy wiring 19 from the source bus substrate 4, the FPC 33, the TCP 7, and the VEEG 9 provided on the gate bus substrate. As a result, a signal is supplied to the dummy pixel.

  Next, the configuration of a conventional liquid crystal panel will be described with reference to FIGS. FIG. 8 is a plan view showing the configuration of the liquid crystal panel on the CF substrate side. FIG. 9 is a cross-sectional view of the liquid crystal panel. Since the same reference numerals as those in FIG. 5 indicate the same configuration, the description thereof is omitted. Reference numeral 13 is a counter electrode, 14 is a transfer electrode, 34 is a color filter, 35 is a color filter substrate, 36 is a glass substrate, 37 is a conductor pattern, and 38 is a TFT array substrate.

  In order to supply a VCOM voltage to a color filter substrate 35 composed of a color filter 34 made of an RGB colored layer and a black matrix (BM) and a counter electrode 13 made of a transparent conductive film such as ITO, a VCOM voltage is supplied on the glass substrate 36. The transfer electrode 14 made of a conductive paste or the like is applied on the TFT array substrate 38 on which the conductor pattern 37 is disposed. Thereby, the counter electrode 13 and the conductor pattern 37 of the TFT array substrate 38 are electrically connected.

  The VCOM voltage generated by the DC / DC unit 6 is supplied to the counter electrode 13 via the TCP and transfer electrode 14 of the TFT array substrate 38. As a result, a potential difference occurs between the pixel electrode and the counter electrode 13 provided in the conductor pattern 37 of the TFT array substrate 38, and the liquid crystal layer is aligned.

  In order to reduce the number of components of the liquid crystal display device described above, wiring provided in the FPC can be arranged on a glass substrate. The configuration of this liquid crystal panel will be described with reference to FIG. Here, the same reference numerals as those in FIG. 5, FIG. 7, FIG. 8, and FIG. Further, the configuration of the TFT in the TFT array substrate is the same as that in FIG. 12 is a scanning signal wiring for supplying a scanning signal (also referred to as a gate signal), 10 is VDDG, 11 is VDDD, 17 is a driver IC internal circuit, 39 is an LCD output terminal, 41 is a driver IC input terminal, and 43 is a driver IC output terminal. Here, signal supply wirings, terminals, and the like are enlarged and illustrated for the purpose of explaining in detail.

  The scanning signal wiring 12 to be input to the gate driver IC2, the driver IC input terminal 41 and the driver IC output terminal 43 of the scanning voltage (VCOM voltage, VEEG voltage, VDDG voltage, VDDD voltage) are respectively centered on the gate driver IC. The mirror image is arranged symmetrically (mirror arrangement). The LCD output terminals 39 correspond to the respective gate wirings 18a to 18n, and are provided in a line. The VCOM 8 is connected to a transfer electrode 14 provided on the substrate. The VCOM voltage generated by the DC / DC unit 6 is supplied to the counter electrode 13 via the transfer electrode 14. Other scanning voltages and scanning signals are also supplied to the gate driver IC 2 via signal wirings (scanning signal wirings 12, VEEG9, VDDG10, VDDD11) provided on the TFT array substrate. Thereby, a liquid crystal panel can be manufactured without using FPC.

  Further, in order to reduce the number of parts, a COG type (Chip On Glass) liquid crystal display device in which the gate bus substrate 32 for signal supply is eliminated and the gate driver IC 2, signal wiring, and input / output terminals are provided on the TFT array substrate is used. It has become. Furthermore, it is necessary to lower the impedance of the counter electrode 13 in order to increase the screen size and resolution of the liquid crystal panel. However, there is no method for suppressing the impedance of the counter electrode 13 in the conventional liquid crystal display device.

  The configuration of this COG type liquid crystal display device will be described with reference to FIG. Here, the same reference numerals as those in FIG. 5, FIG. 7, FIG. 8, and FIG. The basic configuration is the same as that of the liquid crystal panel of FIG. 10, and the driver IC input terminal 41 and the driver IC output terminal 43 are arranged in a mirror shape. In order to explain the configuration of the wiring, terminals, etc. in detail, it is shown enlarged. The LCD output terminal 39 is provided corresponding to each gate wiring 18. However, the gate driver IC 2, the driver IC internal circuit 17, the various wirings 8 to 12, the driver IC input terminal 41, the LCD output terminal 39, and the like are all provided on the TFT array substrate.

  In the liquid crystal panel 1 having the configuration shown in FIG. 11, when a wiring (VCOM8) is to be connected to the transfer electrode 14c, it intersects with other wiring and the wiring on the glass substrate cannot be routed in a single layer. Also, when connecting the wiring to the transfer electrode 14a, the wiring intersected with other wiring, and the wiring could not be routed in a single layer. Therefore, it is necessary to form the signal wiring on the glass substrate in a laminated manner, and there is a problem that the manufacturing process increases. Furthermore, there is also a problem that the disconnection of the wiring is likely to occur at the laminated portion.

In a large-screen liquid crystal panel, the wiring length on the glass substrate becomes long. It is difficult to lower the resistance value of the wiring itself, and as the distance from the voltage supply side increases, distortion occurs in the voltage and signal due to the influence of impedance. As a result, problems such as deterioration in display characteristics and display failure have occurred. As a countermeasure, there is a method of widening the pattern width, but there is a problem that the frame portion around the display area becomes large.
JP 2001-188246 A JP-A-11-352516

  As described above, the liquid crystal panel 1 having a structure in which the conventional COG method and the bus substrate are eliminated and the scanning voltage and the signal are supplied on the glass substrate has a problem that the wiring on the glass substrate has a laminated structure. It was. In addition, there is a problem that display failure occurs when the wiring becomes long.

  The present invention has been made to solve such problems, and provides a driving circuit and a liquid crystal display device that can simplify the manufacturing process by forming wiring on a glass substrate into a single layer structure. Is the first purpose. It is a second object of the present invention to provide a driving circuit and a liquid crystal display device that can suppress deterioration of display characteristics due to an increase in wiring length.

  A liquid crystal display device according to the present invention includes a first substrate (for example, the color filter substrate 35 in the present embodiment) and a second substrate (for example, a TFT array in the present embodiment) which are opposed to each other with a liquid crystal layer interposed therebetween. A substrate 38), a plurality of gate wirings (for example, the gate wiring 18 in the present embodiment) and a source wiring (for example, the source wiring 20 in the present embodiment) provided orthogonal to the second substrate, A plurality of switching elements (for example, a gate first line TFT 22 and a gate two-line TFT 23 in the present embodiment) provided at an intersection of the gate wiring and the source wiring, and a plurality of pixel electrodes ( For example, the pixel electrode 24 of the gate first line TFT, the pixel electrode 25 of the gate second line TFT in the present embodiment, A counter dummy electrode (for example, the counter electrode 13 in the present embodiment) disposed to face the pixel electrode and a gate dummy wiring (for example, a peripheral electrode of the display region constituted by the plurality of pixel electrodes) And a voltage generation means (for example, the DC / DC unit 6 in the present embodiment) for generating a scanning voltage (for example, VEEG9, VDDG10, VDDD11 in the present embodiment). ) And the scanning voltage and scanning signal, and a plurality of driving circuits (for example, the present embodiment) for supplying a gate scanning voltage (for example, the output of the gate driver IC 2 in the present embodiment) to the plurality of gate wirings It further comprises gate driver ICs 2, 2a) in the form. The scanning voltage and the scanning signal are cascade-connected via an internal wiring disposed in the driving circuit, and are propagated between the plurality of driving circuits, the plurality of driving circuits Has a quadrangular outer shape, and the output of the gate scanning voltage is opposed to the display area via a first LCD output terminal (for example, the LCD output terminal 39 in the present embodiment) arranged in a row. A gate OFF level voltage connected to each of the plurality of corresponding gate wirings from one side and generated by the voltage generating means is a terminal dummy wiring (for example, the present embodiment) provided in the driving circuit. The second LCD output terminal (for example, the terminal dummy wiring 15) in FIG. 5 and a cascade connection wiring between the driving circuits connected to the wiring and further connected to the terminal dummy wiring (for example, LCD dummy output terminals 40b and 40c) in the present embodiment are arranged at the end of the first side, and the gate OFF level voltage is between the second LCD output terminal and the gate dummy wiring. The connection wiring, the first LCD output terminal, and the wiring between the gate wirings are arranged on the second substrate without crossing each other. It is characterized by that. Thus, the driving circuit wiring on the glass substrate can have a single layer structure without the gate dummy wiring intersecting with the other wiring.

  In the above-described liquid crystal display device, the internal wiring disposed in the driving circuit is wired via a bidirectional buffer, the scanning signal is cascaded via the bidirectional buffer, and the plurality of driving It may be propagated between circuits. As a result, it is possible to suppress deterioration of display characteristics due to an increase in wiring length.

  The liquid crystal display device described above can be used for a COG (Chip On Glass) liquid crystal display device in which the driving circuit is provided over a second substrate.

  The liquid crystal display device described above can also be used for a COF (Chip On Film) type liquid crystal display device in which the driving circuit is provided on a film.

  In the driving circuit according to the present invention, a gate scanning voltage (for example, the gate driver IC2 in the present embodiment) is applied to each of a plurality of gate wirings (for example, the gate wiring 18 in the present embodiment) arranged in parallel to the liquid crystal panel. Drive circuit (for example, the gate driver ICs 2 and 2a in the present embodiment) for supplying a plurality of scanning signal input terminals (for example, a book) for inputting a scanning signal for generating the gate scanning voltage. The driver IC input terminal 41) in the embodiment and scanning voltage generation means for generating the gate scanning voltage based on the signal input to the scanning signal input terminal (for example, the driver IC internal circuit 17 in the present embodiment) ) And a scanning voltage output terminal (for example, a gate scanning voltage generated by the scanning voltage generating means) to the gate wiring (for example, The LCD output terminal 39) in the present embodiment, the drive circuit output terminal (for example, the driver IC output terminal 43 in the present embodiment) that outputs the scan signal to different drive circuits, and the scan signal A dummy through wiring input terminal for inputting different signals (for example, the dummy input terminal for driver IC 42 in the present embodiment) and a dummy through wiring for transmitting a signal input from the dummy through wiring input terminal (for example, And a dummy wiring output terminal (for example, LCD dummy output terminal 40 in the present embodiment) for outputting a signal transmitted through the dummy through wiring. The wiring output terminal is arranged at the end of the same side as the side where the scanning voltage output terminals are arranged in a row, and the dummy through wiring is arranged. The use input terminal is characterized in that arranged at the opposite end from the said one side. Thereby, the wiring on the glass substrate can have a single layer structure.

In the above drive circuit, the dummy wiring output terminal is preferably connected to a transfer electrode for supplying a potential to the counter electrode. Thereby, the wiring on the glass substrate can have a single layer structure.
In another aspect of the drive circuit described above, the dummy wiring output terminal is preferably connected to a gate dummy wiring. Thereby, the wiring on the glass substrate can have a single layer structure.

  A driving circuit according to another aspect of the present invention is a driving circuit that supplies a driving signal (source signal) to each of a plurality of source wirings (for example, the source wiring 20 in the present embodiment) arranged in parallel to the liquid crystal panel. For example, the source driver IC 3) according to the present embodiment is driven based on a plurality of drive signal input terminals for inputting a signal for generating the drive signal, and a signal input to the drive signal input terminal. A drive signal generating means for generating a signal; a drive signal output terminal for outputting the drive signal generated by the drive signal generating means; a drive circuit output terminal for outputting the drive signal to a different drive circuit; and the drive An independent dummy through wiring input terminal for inputting a signal different from the signal (for example, VEEG9, VDDG10, VDDD11 in the present embodiment) A dummy through wiring that transmits a signal input from the dummy through wiring input terminal; and a dummy wiring output terminal that outputs the signal transmitted through the dummy through wiring. The dummy wiring output terminal is connected to the drive circuit output terminal. Are arranged at the end of the same side as the side arranged in a row, and the dummy through wiring input terminal is arranged at the end opposite to the one side. Thereby, the wiring on the glass substrate can have a single layer structure.

  Further, in the above-described driving circuit, the driving signal input terminal is connected to a bidirectional buffer, and the driving signal is output to the driving circuit output terminal and the source wiring through the bidirectional buffer. It is desirable to be supplied. As a result, it is possible to suppress deterioration of display characteristics due to an increase in wiring length.

  ADVANTAGE OF THE INVENTION According to this invention, the wiring on a glass substrate can be provided with the single layer structure, and the drive circuit and liquid crystal display device with which the manufacturing process was simplified can be provided. Furthermore, it is possible to provide a driving circuit and a liquid crystal display device in which deterioration of display characteristics due to an increase in wiring length is suppressed.

Embodiment 1 of the present invention.
The structure of the liquid crystal panel according to the present invention will be described with reference to FIGS. FIG. 1 is an external view schematically showing a liquid crystal display device. FIG. 2 is a plan view showing the configuration of the liquid crystal panel. In particular, the periphery of the wiring and terminals of the gate driver IC is enlarged and shown in detail. Here, 1 is a liquid crystal panel, 2 is a gate driver IC, 3 is a source driver IC, 4 is a source bus board, 5 is a timing controller (hereinafter referred to as TCON), 6 is a DC / DC unit, and 7 is a TCP (Tape Carrier). (Package), 8 is VCOM, 9 is VEEG, 10 is VDDG, 11 is VDDD, 12 is a scanning signal wiring, 13 is a counter electrode, 14 is a transfer electrode, 15 is a terminal dummy wiring, 16 is a bidirectional buffer, and 17 is a driver. IC internal circuit, 18 is a gate wiring, 19 is a gate dummy wiring, 39 is an LCD output terminal, 40 is an LCD dummy output terminal, 41 is a driver IC input terminal, 42a and 42b are driver IC dummy input terminals, 43 Are driver IC output terminals, and 42c and 42d are driver IC dummy output terminals. The numbers a to n after the numbers indicate individual components of a plurality of components (wiring, terminals, etc.).

  FIG. 1 shows a COG type liquid crystal display device in which a gate driver IC 2 is provided on a liquid crystal panel 1. Here, the configuration of the TFT array substrate is the same as that shown in FIG. The timing for supplying the scanning signal and the like is also the same as that in FIG.

  As shown in FIG. 2, the TCON 5 and the DC / DC unit 6 provided on the source bus substrate 4 and the driver IC input terminal 41 provided in the gate driver IC 2 a are connected by wirings 10, 11, and 12. The scanning signal wiring 12 is connected to the driver IC input terminal 41 on the gate driver IC 2a through the source bus substrate 4, the TCP 7, and the TFT array substrate. The driver IC input terminal 41 is connected to the bidirectional buffer 16. One of the wires from the bidirectional buffer 16 is electrically connected to the driver IC output terminal 43. The other wiring is connected to the driver IC internal circuit 17. Then, a gate voltage or the like is supplied to the gate wiring 18 through the LCD output terminal 39 provided on the display area side. The driver IC input terminal 41 and the driver IC output terminal 43 are provided in a line on the opposite side of the display area on the gate driver IC 2a.

  Further, the driver IC input terminal 41 and the driver IC output terminal 43 are provided symmetrically, and the driver IC input terminal 41 and the driver IC output terminal 43 are arranged in a mirror shape on the gate driver IC 2a. . That is, the driver IC input terminal 41a and the driver IC output terminal 43a are provided on the outside, and the alphabets of the driver IC input terminal 41 and the driver IC output terminal 43 are b, c, and d in order from the outside. (Not shown). The driver IC output terminal 43 is connected to the driver IC input terminal 41 of the adjacent gate driver IC2. Similarly, the driver IC dummy input terminals 42c and 42d are connected to the driver IC dummy input terminals 42e and 42f of the adjacent gate driver IC2. Furthermore, the same alphabetic input / output terminals of the driver IC input terminal 41 and the driver IC output terminal 43 are connected via the bidirectional buffer 16. Such an arrangement is repeated, and an LCD output terminal 39 is provided so as to correspond to all the gate wirings 18. Thereby, a scanning signal can be supplied to each gate wiring 18 without overlapping each wiring.

  The arrangement of the wiring and the like of the liquid crystal display device according to the first embodiment will be described with reference to FIG. 2 with respect to differences from the conventional COG liquid crystal display device shown in FIG. Two driver IC dummy input terminals 42a and 42b and two driver IC dummy output terminals 42c and 42d are provided outside the driver IC input terminal 41 and the driver IC output terminal 43 on the side opposite to the display area of the gate driver IC2. Is provided. Two LCD dummy output terminals 40 are provided at both ends of the LCD output terminal 39 on the display area side of the driver IC 2. VCOM8 and VEEG9 are connected to driver IC dummy input terminals 42a and 42b on the gate driver IC2. The same alphabetic driver IC dummy input terminals 42a and 42b and the LCD dummy output terminals 40a and 40b are electrically connected by the same alphabetic terminal dummy wirings 15a and 15b, respectively. The terminal dummy wiring 15a is divided into two in the middle, and is connected to the terminal dummy wiring 15d provided on the gate driver IC 2 via the bidirectional buffer 16. The terminal dummy wiring 15d electrically connects the driver IC dummy output terminal 42d and the LCD dummy output terminal 40d. Similarly, the terminal dummy wiring 15 b is connected to the terminal dummy wiring 15 c through the bidirectional buffer 16. The terminal dummy wiring 15c connects the driver IC dummy output terminal 42c and the LCD dummy output terminal 40c.

  Also, the wirings from the LCD dummy output terminals 40a and 40d corresponding to the terminal dummy wirings 15a and 15d are connected to the transfer electrodes 14a and 14c, respectively. As a result, the VCOM voltage passes through the driver IC dummy input terminal 42a and the LCD dummy output terminal 40a and is supplied to the transfer electrode 14a. The LCD dummy output terminal 40 b corresponding to the terminal dummy wiring 15 b is connected to the gate dummy wiring 19. As a result, the VEEG voltage passes through the driver IC dummy input terminal 42 b and the LCD dummy output terminal 40 b and is supplied to the gate dummy wiring 19. By providing two LCD dummy output terminals 40 and two driver IC dummy input terminals 42a and 42b on the outside of the LCD output terminal 39 and the driver IC input terminal 41, the wirings intersect on the glass substrate. In addition, the drive wiring for LCD can be manufactured with a single layer structure. As a result, the manufacturing process can be simplified and the manufacturing cost can be reduced.

  Further, the bidirectional buffer 16 is provided between the driver IC input terminal 41 and the LCD output terminal 39 on the gate driver IC 2. Therefore, the on-glass wiring can be designed in consideration of the influence of only the impedance of the on-glass wiring between the gate driver ICs. As a result, it is possible to reduce the influence of the impedance of the wiring that has become longer due to the enlargement of the screen, and to suppress the deterioration of display characteristics and the occurrence of display defects.

Embodiment 2 of the present invention.
The configuration of the liquid crystal display device according to Embodiment 2 of the present invention will be described with reference to FIG. FIG. 3 is a plan view showing the configuration of the liquid crystal display panel. In particular, the wiring and terminals of the gate driver IC 2 are enlarged and shown in detail. The same reference numerals as those used in FIG. 1 and FIG.

  In the second embodiment, the arrangement of wirings, terminals and the like is the same as that of the first embodiment shown in FIG. However, the second embodiment is different from the first embodiment shown in FIG. 2 in that the gate driver IC 2 is provided not on the glass substrate but on the FPC. Accordingly, a COF (Chip On Film) system is provided in which wiring, a driver IC input terminal 41, and an LCD output terminal 39 are provided on the FPC.

  Similar to the first embodiment, two driver IC dummy input terminals 42a and 42b and two LCD dummy output terminals 40 are provided outside the driver IC input terminal 41 and the LCD output terminal 39, respectively. As a result, the wiring for driving the LCD can be manufactured with a single layer structure without crossing the wiring even on the COF glass substrate.

  The driver IC dummy input terminals 42a and 42b and the LCD dummy output terminals 40c and 40d are electrically connected via a bidirectional buffer. As a result, it is possible to reduce the influence of the impedance of the wiring that has become longer due to the enlargement of the screen, and to suppress the deterioration of display characteristics and the occurrence of display defects.

  This configuration is not limited to the COF method, and can be used for a liquid crystal panel that eliminates the gate bus substrate 32 and provides wiring on a glass substrate to supply a scanning voltage and a scanning signal.

Other embodiments.
An example of the configuration of a liquid crystal display device according to another embodiment of the present invention will be described with reference to FIG. FIG. 4 is a plan view showing the configuration of the liquid crystal display panel. In particular, the wiring and terminals of the gate driver IC are enlarged and shown in detail. The same reference numerals as those used in FIG. 1 and FIG.

  In the present embodiment, the arrangement of wirings, terminals, etc. on the gate driver IC is the same as that of the first embodiment shown in FIG. However, the present embodiment is different from the first embodiment shown in FIG. 1 in that the source driver IC is provided on the glass substrate.

  In such a COG type liquid crystal display device that does not use TCP, the wiring on the gate driver IC, the input / output terminals, the driver IC internal circuit, the bidirectional buffer, and the like are arranged in the same manner as shown in FIG. By doing so, it is possible to manufacture the LCD drive wiring with a single layer structure without crossing the wiring even on the glass substrate. Furthermore, it is possible to reduce the influence of the impedance of the wiring that has become longer due to the enlargement of the screen, and to suppress the deterioration of display characteristics and the occurrence of display defects.

  Similarly, in the COF liquid crystal display device described in Embodiment Mode 2, a source driver IC may be provided over a glass substrate. Even in such a configuration, the same effect can be obtained.

The present invention provides a dummy input / output terminal for a transfer electrode and a terminal dummy wiring on a gate driver IC, and is not limited to the configuration shown in the above embodiment. Further, by providing a bidirectional buffer between the input / output terminals on the gate driver IC, it is possible to suppress display characteristic deterioration and display failure.
For example, it can also be used for a COP (Chip On Plastic) type or COB (Chip On Board) type liquid crystal display device.

  Further, the same effect can be obtained when the arrangement of the driving circuit according to the present invention is applied not only to the gate driver IC but also to the source driver IC.

It is the top view which showed the external appearance of the liquid crystal panel of the liquid crystal display device concerning this invention. It is a top view which shows the structure of the liquid crystal panel concerning Embodiment 1 of this invention. It is a top view which shows the structure of the liquid crystal panel concerning Embodiment 2 of this invention. It is a top view which shows the structure of the liquid crystal panel concerning other embodiment of this invention. It is a top view which shows the structure of the liquid crystal panel of a liquid crystal panel. 6 is a timing chart for explaining the operation of the liquid crystal display device. It is a top view which shows the structure by the side of the TFT array substrate of the conventional liquid crystal panel. It is a top view which shows the structure by the side of the color filter board | substrate of the conventional liquid crystal panel. It is sectional drawing which shows the structure of the conventional liquid crystal panel. It is a top view which shows the structure of the conventional liquid crystal panel. It is a top view which shows the structure of the conventional liquid crystal panel.

Explanation of symbols

1 LCD panel 2 Gate driver IC
3 Source driver IC
4 Source bus board 5 Timing controller (TCON)
6 DC / DC section 7 TCP
8 VCOM
9 VEEG
10 VDDG
11 VDDD
12 scanning signal wiring 13 counter electrode 14 transfer electrode 15 terminal dummy wiring 16 bidirectional buffer 17 driver IC internal circuit 18 gate wiring 19 gate dummy wiring 20 source wiring 21 source dummy wiring 22 gate first line TFT
23 Gate second line TFT
24 pixel electrode 25 of gate first line TFT pixel electrode 26 of gate second line TFT liquid crystal layer 27 common electrode 28 gate electrode 29 source electrode 30 drain electrode 31 storage capacitor 32 gate bus substrate 33 FPC
34 Color filter 35 Color filter substrate (CF substrate)
36 Glass substrate 37 Conductor pattern 38 TFT array substrate 39 LCD output terminals 40, 40a, 40b, 40c, 40d LCD dummy output terminals 41 Driver IC input terminals 42a, 42b Driver IC dummy input terminals 42c, 42d For driver ICs Dummy output terminal 43 Output terminal for driver IC

Claims (9)

A first substrate and a second substrate facing each other with a liquid crystal layer interposed therebetween;
A plurality of gate wirings and source wirings provided orthogonal to the second substrate;
A plurality of switching elements provided at intersections of the gate wiring and the source wiring;
A plurality of pixel electrodes connected to the switching element;
A counter electrode disposed to face the pixel electrode;
A gate dummy wiring disposed at a peripheral edge of a display region composed of the plurality of pixel electrodes,
Voltage generating means for generating a scanning voltage;
Further comprising a plurality of drive circuits for inputting the scan voltage and a scan signal and supplying a gate scan voltage to the plurality of gate lines,
A liquid crystal display device in which the scanning voltage and the scanning signal are cascade-connected via an internal wiring disposed in the driving circuit and propagated between the plurality of driving circuits;
The plurality of driving circuits have a rectangular outer shape, and the gate scanning voltage output corresponds to each of the plurality of driving circuits from a first side facing the display area via a first LCD output terminal arranged in a row. Connected to the gate wiring of
The gate OFF level voltage generated by the voltage generation means is propagated through a terminal dummy wiring disposed in the driving circuit and a cascade connection wiring between the driving circuit connected to the wiring,
Further, a second LCD output terminal connected to the terminal dummy wiring is disposed at the end of the first side,
The gate OFF level voltage is applied to the gate dummy wiring via a connection wiring between the second LCD output terminal and the gate dummy wiring,
The liquid crystal display device, wherein the connection wiring, the first LCD output terminal, and the wiring between the gate wirings are arranged on the second substrate without crossing each other.   The internal wiring disposed in the drive circuit is wired via a bidirectional buffer, and the scanning signal is cascaded via the bidirectional buffer and propagated between the plurality of drive circuits. The liquid crystal display device according to claim 1.   3. The liquid crystal display device according to claim 1, wherein the driving circuit is provided on a second substrate.   3. The liquid crystal display device according to claim 1, wherein the driving circuit is provided on a film. The COF (Chip On Film) type liquid crystal display device. A drive circuit for supplying a gate scanning voltage to each of a plurality of gate wirings arranged in parallel to the liquid crystal panel,
A plurality of scanning signal input terminals for inputting a scanning signal for generating the gate scanning voltage;
A scanning voltage generating means for generating the gate scanning voltage based on a signal input to the scanning signal input terminal;
A scanning voltage output terminal for outputting the gate scanning voltage generated by the scanning voltage generating means to the gate wiring;
A drive circuit output terminal for outputting the scanning signal to a different drive circuit;
A dummy through wiring input terminal for inputting a signal different from the scanning signal;
A dummy through wiring for transmitting a signal input from the dummy through wiring input terminal;
A dummy wiring output terminal for outputting a signal transmitted by the dummy through wiring;
The dummy wiring output terminal is disposed at the end of the same side as the side where the scanning voltage output terminals are arranged in a row, and the dummy through wiring input terminal is disposed at the end opposite to the one side. A drive circuit characterized by that.   6. The drive circuit according to claim 5, wherein the dummy wiring output terminal is connected to a transfer electrode for supplying a potential to the counter electrode.   7. The drive circuit according to claim 5, wherein the dummy wiring output terminal is connected to a gate dummy wiring. A drive circuit for supplying a drive signal to each of a plurality of source lines arranged in parallel to the liquid crystal panel,
A plurality of drive signal input terminals for inputting a signal for generating the drive signal;
Drive signal generating means for generating a drive signal based on the signal input to the drive signal input terminal;
A drive signal output terminal for outputting the drive signal generated by the drive signal generating means to a source wiring;
A drive circuit output terminal for outputting the drive signal to a different drive circuit;
A dummy through wiring input terminal for inputting a signal different from the drive signal;
A dummy through wiring for transmitting a signal input from the dummy through wiring input terminal;
A dummy wiring output terminal for outputting a signal transmitted by the dummy through wiring;
The dummy wiring output terminal is arranged at the end of the same side as the side where the drive circuit output terminals are arranged in a row, and the dummy through wiring input terminal is arranged at the end opposite to the one side. A drive circuit characterized by that.   9. The drive signal input terminal is connected to a bidirectional buffer, and the drive signal is supplied to a circuit that outputs the drive signal to the drive circuit output terminal and the source wiring via the bidirectional buffer. The drive circuit described.

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