JP2008017659A - Stepping motor drive device and stepping motor drive method and program thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a focusing time from being prolonged in autofocus control using a focus lens driven by a stepping motor of a microstep driving system. <P>SOLUTION: First and second frequency generators 202, 204 count fundamental clocks to generate first and second pulse signals having first and second driving frequencies f1, f2. Upon receiving the pulse signals, a driving frequency averaging section 206 repeatedly outputs first pulse signals equivalent to the number of first pulses, and subsequently outputs the second pulse signals equivalent to the number of second pulses to output the pulse signals as driving pulses. Then a driving section 102 drives the stepping motor by using the driving pulses. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a stepping motor driving device, a stepping motor driving method, and a program, and in particular, generates a pulse signal having a predetermined frequency by counting a predetermined number of basic clocks, and uses the pulse signal to configure a stepping motor. The present invention relates to a driving stepping motor driving device, a stepping motor driving method applied to the stepping motor driving device, and a program for causing a computer to execute the stepping motor driving method.

  Conventionally, it is generally known that the driving frequency of a pulse signal for driving a stepping motor is determined based on a predetermined cycle by obtaining a predetermined cycle by counting a predetermined number of basic clocks. Yes.

  By the way, as shown in FIG. 12, for example, the drive frequency f1 is generated by counting the basic clock by the count number Cnt1, and the drive frequency f2 is generated by counting the basic clock by the count number (Cnt1 + 1). To do. In this case, a driving frequency between the driving frequency f1 and the driving frequency f2 cannot be generated. That is, it is not possible to generate a drive frequency having a finer period than the basic clock period. Therefore, the resolution of the driving frequency obtained by counting the basic clock depends on the frequency of the basic clock, and it often occurs that a pulse signal having a desired driving frequency cannot be obtained.

  In particular, there was a problem when trying to finely control the operation of the stepping motor using a pulse signal having a high driving frequency. Of course, if a basic clock having a high frequency according to the required resolution is adopted, the problem is solved, but in this case, the cost of the driving circuit for the stepping motor is increased.

  As a technique for solving such a problem, a technique for controlling the driving frequency of an ultrasonic motor by using a rate multiplier has been proposed (for example, see Patent Document 1). In such an ultrasonic motor, it is required to control a driving frequency higher than that in a stepping motor with high resolution.

In addition, although the above-described ultrasonic motor driving frequency control technique can reduce the resolution, can a high resolution be achieved within an allowable variation range at an arbitrary driving frequency? Whether or not depends on the frequency of the basic clock. In this respect, it is the same as the case where the drive frequency is generated by simply counting the basic clock, and an arbitrary drive frequency cannot be set within the allowable variation range.
JP 2000-184762 A

  Nowadays, in order to drive the stepping motor smoothly, the microstep driving method is often employed, and the number of divisions (number of steps) tends to increase. Along with this, the resolution of the driving frequency for driving the stepping motor has become finer.

  Here, for example, a stepping motor driving device that has a basic clock frequency of 10 MHz and is driven by a 512-step microstep driving method will be described as an example.

  A period obtained by counting, for example, 100 clocks of a basic clock having a frequency of 10 MHz is 10 μsec. In the 512-step microstep driving method, every time 10 μsec elapses, the electrical angle of the stepping motor is advanced by 1/512 round. That is, the frequency for switching excitation for one microstep in 512 divisions is 100 kHz.

At this time, a driving frequency f ₁₀₀ of 100 clock counts in terms of 1-2 phase driving in which excitation is switched in increments of 1/8 electrical angle is calculated by the following equation (101).

f ₁₀₀ = 10 MHz / { ₁₀₀ CLK × (512/8)} (101)
This drive frequency f ₁₀₀ is 1562.5 pps.

Next, the case of trying to obtain a slightly higher (faster) driving frequency than the driving frequency f ₁₀₀ obtained by counting a reference clock of 10MHz by 100 clock.

Since the count number of the basic clock can only be set as an integer value, in this case, the drive frequency f ₉₉ obtained by counting the count number of the 10 MHz basic clock by 99 clocks will be considered.

  A period obtained by counting 99 clocks of a basic clock having a frequency of 10 MHz is 9.9 μsec. In the case of the 512-step microstep drive system, the electrical angle of the stepping motor is advanced by 1/512 rounds every time this period of 9.9 μsec elapses. That is, the frequency for switching excitation for one microstep in 512 divisions is 101.01 kHz.

At this time, a driving frequency f ₉₉ of 99 clock counts in terms of 1-2 phase driving for switching excitation in units of 1/8 electrical angle is calculated by the following equation (102).

f ₉₉ = 10 MHz / {99CLK × (512/8)} (102)
The drive frequency f ₉₉ is 1578.28 pps.

  As can be seen from the above, in the example given here, it is not possible to generate a drive frequency having a value between 1578.28 and 1562.5 pps. In other words, in the example given here, only a resolution of about 16 pps (≈1578.28 pps-1562.5 pps) can be obtained at a drive frequency in the vicinity of 1500 pps.

  By the way, the problems described above cause the following problems in an autofocus (automatic focus adjustment) type camera device in which a focus lens is driven by a stepping motor.

  In the autofocus control, the focus lens is driven in a predetermined scan range, and during that period, AF (automatic focus adjustment) evaluation values are acquired for a predetermined number of scans.

  In general, since one scan for obtaining an AF evaluation value is performed for each vertical transfer period of the image sensor CCD, a drive frequency command value at the time of the scan operation is obtained by the following formula (103). As determined.

Drive frequency = scan range / (number of scans−1) / CCD vertical transfer cycle (103)
Here, it is assumed that the stepping motor that drives the focus lens is driven by the 512-step microstep driving method with the basic clock frequency of 10 MHz as described above. Then, it is assumed that the drive frequency command value obtained by the above equation (103) is 1570 pps, for example. In this case, the basic clock count is 99 clocks and is slightly higher (faster) 1578.28 pps than the drive frequency command value, or the count is 100 clocks and is slightly lower (slower) 1562.5 pps than the drive frequency command value. And Which one to select will be described with reference to FIG.

  FIG. 13 is a diagram showing the scan range for each scan when the number of scans is 6 in a predetermined scan range and the scan operation is performed for the number of scans while acquiring the AF evaluation value.

  FIG. 13A shows the focus lens position and a predetermined scan range. FIG. 13C shows the scan range L0 for each scan when the focus lens is driven at the same drive frequency as the drive frequency command value. FIG. 13B shows the scan range L1 for each scan when the focus lens is driven at a drive frequency lower (slower) than the drive frequency command value. FIG. 13D shows a scan range L2 for each scan when the focus lens is driven at a drive frequency higher (faster) than the drive frequency command value.

  When the focus lens is driven at a drive frequency higher (faster) than the drive frequency command value (FIG. 13D), the range L2 in which the focus lens is driven in the CCD vertical transfer cycle is the same drive frequency as the drive frequency command value. It becomes longer than the range L0 in the case of driving with. As a result, the focus lens drive in a predetermined scan range is finished before performing six scans, leading to a decrease in autofocus control accuracy.

  Therefore, generally, as shown in FIG. 13B, the focus lens is driven at a drive frequency lower (slower) than the drive frequency command value. However, in this case, when the predetermined number of scans (six times) have been completed, the predetermined scan range cannot be covered, and therefore it is necessary to perform a scan operation more times than the predetermined number of scans. Therefore, there is a problem that the focusing time in autofocus increases by (increased number of scans × CCD vertical transfer cycle time).

  The present invention has been made in view of such problems, and prevents an increase in focusing time in autofocus control using a focus lens driven by a microstepping stepping motor. It is an object of the present invention to provide a stepping motor driving device, a stepping motor driving method, and a program.

  To achieve the above object, according to the first aspect of the present invention, first frequency generating means for generating a first pulse signal having a first frequency by counting the basic clock, and the basic clock. Are generated by second frequency generating means for generating a second pulse signal having a second frequency different from the first frequency, and by the first and second frequency generating means, respectively. Receiving the first and second pulse signals, outputting the first pulse signal for the first number of pulses, and subsequently outputting the second pulse signal for the second number of pulses, Drive pulse output means for outputting as a drive pulse; and drive means for driving the stepping motor by the drive pulse output by the drive pulse output means. Stepping motor driving device according to symptoms is provided.

  According to the invention of claim 11, a first frequency generation step of generating a first pulse signal having a first frequency by counting the basic clock, and counting the basic clock, A second frequency generating step for generating a second pulse signal having a second frequency different from the first frequency, and the first and second generated in the first and second frequency generating steps, respectively. Drive that outputs the first pulse signal for the first number of pulses, and then repeatedly outputs the second pulse signal for the second number of pulses to output as a drive pulse. A pulse output step, and a drive step of driving the stepping motor by the drive pulse output in the drive pulse output step Stepping motor driving method comprising the door is provided.

  Furthermore, a program for causing a computer to execute the stepping motor driving method is provided.

  According to the present invention, in the stepping motor driving apparatus, the first and second pulse signals having the first and second frequencies are generated by counting the basic clock, respectively. Next, the first pulse signal is output for the first number of pulses, and then the second pulse signal is output for the second number of pulses repeatedly to be output as drive pulses. Then, the stepping motor is driven using this drive pulse.

  It is assumed that the stepping motor driving device having such a configuration controls the driving of the focus lens included in the camera device. In this camera apparatus, when an AF scan operation for obtaining an AF (automatic focus adjustment) evaluation value by driving a focus lens is performed, the following effects can be obtained by the above configuration. In other words, the difference between the drive frequency command value determined to be optimal by the AF algorithm and the drive frequency that can be actually realized can be suppressed to a deviation within an allowable range. Thereby, it is possible to prevent an increase in focusing time accompanying an increase in operating time in the AF scanning operation, and it is possible to increase the AF speed.

  The total number of the first and second pulses is set to a value smaller than a predetermined value. As a result, the drive sound can be prevented from entering the audible band, and the drive sound can be reduced.

  Further, when the AF scan operation is performed, the stepping motor is driven using the drive pulse, and when the AF scan operation is not performed, the stepping motor is not driven using the drive pulse. Thereby, the processing load can be reduced.

  Further, when the difference between the drive frequency command value and the first frequency is smaller than a predetermined value, the drive pulse is not output. Thereby, the processing load of the system can be reduced.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a camera device equipped with a stepping motor driving device according to an embodiment of the present invention.

  In FIG. 1, reference numeral 100 denotes a camera device.

  Reference numeral 10 denotes a zoom lens, 11 denotes a focus lens, and 12 denotes a shutter having a diaphragm function. Reference numeral 14 denotes an image sensor that converts an optical image into an electric signal, and reference numeral 16 denotes an A / D converter that converts an analog signal output from the image sensor 14 into a digital signal. A timing generation circuit 18 supplies a clock signal and a control signal to the image sensor 14, the A / D converter 16, and the D / A converter 26. The timing generation circuit 18 is controlled by the memory control circuit 22 and the system control circuit 50.

  An image processing circuit 20 performs predetermined pixel interpolation processing and color conversion processing on image data sent from the A / D converter 16 or the memory control circuit 22. Further, the image processing circuit 20 performs predetermined arithmetic processing on the image data, and also performs TTL (Through The Lens) type AWB (auto white balance) processing based on the obtained arithmetic result.

  A memory control circuit 22 controls the A / D converter 16, the timing generation circuit 18, the image processing circuit 20, the image display memory 24, the D / A converter 26, the memory 30, and the compression / decompression circuit 32.

  The image data output from the A / D converter 16 is written into the image display memory 24 or the memory 30 via the image processing circuit 20 and the memory control circuit 22 or via the memory control circuit 22.

  Reference numeral 24 denotes an image display memory, 26 denotes a D / A converter, and 28 denotes an image display unit composed of a TFT LCD or the like. The display image data written in the image display memory 24 passes through the D / A converter 26. Sent to the image display unit 28 and displayed. If the captured image data is sequentially displayed using the image display unit 28, an electronic viewfinder function can be realized.

  Further, in the image display unit 28, the display can be turned on / off by an instruction from the system control circuit 50. When the display is turned off, the power consumption of the camera device 100 can be significantly reduced. it can.

  Reference numeral 30 denotes a memory for storing still images and moving images obtained by photographing, and has a storage capacity sufficient to store a predetermined number of still images and moving images for a predetermined time. Thereby, even in the case of continuous shooting or panoramic shooting in which a plurality of still images are continuously shot, it is possible to write a large amount of images to the memory 30 at high speed. Further, the memory 30 can be used as a work area for the system control circuit 50.

  A compression / decompression circuit 32 compresses and decompresses image data by adaptive discrete cosine transform (ADCT) or the like, reads image data stored in the memory 30, performs compression processing or decompression processing, and finishes the processing. Is written into the memory 30.

  Reference numeral 40 denotes an exposure control unit that controls the shutter 12 having a diaphragm function, and performs AE (automatic exposure) processing on the image data based on a result of a predetermined calculation performed by the image processing circuit 20. The exposure control unit 40 also has a flash light control function in cooperation with the flash unit 48.

  Reference numeral 42 denotes an AF (automatic focus adjustment) control unit that controls focusing of the focus lens 11, and AF (automatic focus adjustment) based on a result of a predetermined calculation performed on the image data by the image processing circuit 20. Process. The AF control unit 42 performs an AF scan operation for driving the focus lens 11 and acquiring an AF evaluation value. In this AF scan operation, the AF control unit 42 determines a drive range for driving the focus lens 11 to obtain an AF evaluation value, and a scan count that is the number of times the AF evaluation value is obtained within the drive range. Then, a drive frequency command value fcmd is calculated based on the drive range and the number of scans, and this is output to the drive frequency control unit 46 as a pulse rate converted to 1-2 phase drive.

  In addition, the AF control unit 42 does not perform an AF scan operation that drives the focus lens 11 to obtain an AF evaluation value, but simply drives the focus lens 11 to set a drive frequency according to the operation status of the camera device 100. Output as a drive frequency command value fcmd.

  A drive frequency control unit 46 generates a pulse signal having a drive frequency corresponding to the drive frequency command value fcmd input from the AF control unit 42 and outputs the pulse signal to the drive unit 102.

  The drive unit 102 drives a stepping motor that works in conjunction with the focus lens 11 based on the pulse signal output from the drive frequency control unit 46. This stepping motor drives the focus lens 11 by operating in microsteps in which the electrical angle is divided into 512.

  The drive frequency control unit 46 will be described later in detail with reference to FIG.

  A zoom control unit 44 controls zooming of the zoom lens 10. A flash unit 48 has an AF auxiliary light projecting function and a flash light control function.

  The exposure control unit 40 and the AF control unit 42 are controlled using the TTL method. The system control circuit 50 controls the exposure control unit 40 and the AF control unit 42 based on the calculation result obtained by calculating the image data with the image processing circuit 20.

  Reference numeral 50 denotes a system control circuit that controls the entire camera apparatus 100. A memory 52 stores constants, variables, programs, and the like necessary for the operation of the system control circuit 50.

  Reference numeral 54 denotes a display unit such as a liquid crystal display device or a speaker, which displays an operation state, a message, and the like of the system control circuit 50 using characters, images, sounds, and the like according to execution of a program in the system control circuit 50. . The display unit 54 is installed in a single or a plurality of positions near the operation unit of the camera device 100 so as to be easily visible, and is configured by a combination of an LCD, an LED, a sounding element, and the like.

  The display unit 54 is partly installed in the optical viewfinder 104.

  Among the display contents of the display unit 54, what is displayed on the LCD or the like includes single shot / continuous shooting display, self-timer display, compression rate display, recording pixel number display, recording number display, remaining image number display, shutter There are speed display, aperture value display, and exposure compensation display. In addition, flash display, red-eye reduction display, macro shooting display, buzzer setting display, clock battery level display, battery level display, error display, information display with multiple digits, display / removal status display of recording medium 120, communication I / F operation display, date / time display, etc.

  Among the display contents of the display unit 54, what is displayed in the optical viewfinder 104 includes in-focus display, camera shake warning display, flash charge display, shutter speed display, aperture value display, exposure correction display, and the like.

  Reference numeral 56 denotes an electrically erasable / recordable non-volatile memory, such as an EEPROM.

  Reference numerals 60, 62, 64, 66, 68 and 70 are operation means for inputting various operation instructions to the system control circuit 50, such as a switch, a dial, a touch panel, a pointing device based on line-of-sight detection, and a voice recognition device. Or it consists of a plurality of combinations.

  Here, a specific description of these operating means will be given.

  Reference numeral 60 denotes a mode dial switch for switching and setting each function mode such as a power-off mode, an automatic shooting mode, a shooting mode, a panoramic shooting mode, a playback mode, a multi-screen playback / erase mode, and a PC connection mode. .

  Reference numeral 62 denotes a shutter switch SW1, which is turned on when a shutter button (not shown) is half-pressed, and performs AF (auto focus) processing, AE (auto exposure) processing, AWB (auto white balance) processing, EF (flash pre-flash) processing, and the like. Is started.

  A shutter switch SW2 64 is turned on when the shutter button is fully pressed, and instructs to start a series of processing operations such as exposure processing, development processing, and recording processing. The exposure process is a process for writing the image data output from the image sensor 14 to the memory 30 via the A / D converter 16 and the memory control circuit 22. The development process is a process using a calculation performed by the image processing circuit 20 and the memory control circuit 22. The recording process is a process of reading image data from the memory 30, compressing the image data by the compression / decompression circuit 32, and writing the image data to the recording medium 120.

  Reference numeral 66 denotes an image display ON / OFF switch for setting ON / OFF of the image display unit 28. When the image display unit 28 is set to OFF, the current supply to the image display unit 28 is interrupted, and power saving can be achieved. Note that even if the image display unit 28 is turned off, it is possible to perform shooting using the optical viewfinder 104.

  Reference numeral 68 denotes an AF correction ON / OFF switch.

  An operation unit 70 includes various buttons, a touch panel, and the like, and includes a menu button, a set button, a macro button, a multi-screen playback page break button, a flash setting button, a single shooting / continuous shooting / self-timer switching button, and the like. Furthermore, menu movement + (plus) button, menu movement-(minus) button, playback image movement + (plus) button, playback image-(minus) button, shooting image quality selection button, exposure compensation button, date / time setting button, etc. There is.

  A power control unit 80 includes a battery detection circuit, a DC-DC converter, a switch circuit that switches a block to be energized, and the like. The power supply control unit 80 detects the presence / absence of a battery, the type of battery, the remaining battery level, controls the DC-DC converter based on the detection result and an instruction from the system control circuit 50, and requires the necessary voltage. It is supplied to each part including the recording medium 120 for a long period.

  82 and 84 are connectors, and 86 is a power supply unit. The power supply unit 86 includes a primary battery such as an alkaline battery or a lithium battery, a secondary battery such as a NiCd battery, a NiMH battery, or a Li battery, an AC adapter, or the like.

  Reference numeral 90 denotes an interface (I / F) with the recording medium 120, and 92 denotes a connector for connecting to the recording medium 120. A recording medium attachment / detachment detection unit 98 detects whether or not the recording medium 120 is attached to the connector 92.

  Reference numeral 104 denotes an optical viewfinder, which enables photographing using only the optical viewfinder 104 without using the electronic viewfinder function of the image display unit 28. In the optical viewfinder 104, some functions of the display unit 54, for example, a focus display, a camera shake warning display, a flash charge display, a shutter speed display, an aperture value display, an exposure correction display, and the like are installed.

  A communication unit 110 has various communication functions such as RS232C, USB, IEEE1394, P1284, SCSI, modem, LAN, and wireless communication.

  Reference numeral 112 denotes a connector for connecting the camera apparatus 100 to another device by the communication unit 110, or an antenna in the case of wireless communication.

  Reference numeral 120 denotes a recording medium such as a memory card or a hard disk. The recording medium 120 includes a recording unit 122 composed of a semiconductor memory, a magnetic disk, and the like, an interface 124 with the camera device 100, and a connector 126 that connects to the camera device 100.

  FIG. 2 is a block diagram showing a detailed configuration of the drive frequency control unit 46 shown in FIG.

  The drive frequency control unit 46 includes a drive frequency averaging parameter determination unit 200, a first frequency generation unit 202, a second frequency generation unit 204, a drive frequency averaging unit 206, a first drive frequency selection unit 208, a second Drive frequency selection unit 210.

  The drive frequency averaging parameter determination unit 200 is based on the drive frequency command value input from the AF control unit 42, and is a first count that is a set value for generating a pulse signal having the first drive frequency f1. The number CNT 1 is calculated and output to the first frequency generator 202. Further, it is determined whether or not it is necessary to perform the driving frequency averaging process. If it is necessary to perform the driving frequency averaging process, a pulse signal having the second driving frequency f2 is generated. A second count number CNT 2 that is a set value is calculated and output to the second frequency generator 204. Further, an average loop count number m and a first pulse number n necessary for performing the drive frequency averaging process are calculated and output to the drive frequency averaging unit 206.

  In the first frequency generator 202, the counter (A) 202a starts counting the basic clock, and at the same time, sets the output signal to the drive frequency averaging unit 206 to the H level. Next, the comparator 202b compares the count value of the counter (A) 202a with the first count number CNT1 input from the drive frequency averaging parameter determination unit 200. When the count value matches the half value of the first count number CNT1, the output signal to the drive frequency averaging unit 206 is set to L level. Further, when the count value matches the first count number CNT1, the output signal to the drive frequency averaging unit 206 is set to the H level, and at the same time, the count value is cleared to zero, and the counter (A) 202a counts the basic clock. To resume. By repeating this, the first frequency generation unit 202 outputs a pulse signal having the first drive frequency f1 corresponding to the first count number CNT1 to the drive frequency averaging unit 206.

  Similarly, in the second frequency generation unit 204, the counter (B) 204a starts counting the basic clock, and at the same time, sets the output signal to the drive frequency averaging unit 206 to the H level. Next, the comparator 204b compares the count value of the counter (B) 204a with the second count number CNT2 input from the drive frequency averaging parameter determination unit 200. When the count value matches the half value of the second count number CNT2, the output signal to the drive frequency averaging unit 206 is set to L level. Further, when the count value matches the second count number CNT2, the output signal to the drive frequency averaging unit 206 is set to the H level, and at the same time, the count value is cleared to zero, and the counter (B) 204a counts the basic clock. To resume. By repeating this, the second frequency generation unit 204 outputs a pulse signal having the second drive frequency f2 corresponding to the second count number CNT2 to the drive frequency averaging unit 206.

  The drive frequency averaging unit 206 uses each pulse of the pulse signal having the first drive frequency f1 input from the first frequency generation unit 202 as the first number of pulses from the drive frequency averaging parameter determination unit 200. Count n and output. Subsequently, each pulse of the pulse signal having the second drive frequency f2 input from the second frequency generation unit 204 is calculated from the average loop count number m from the drive frequency averaging parameter determination unit 200 to the first. The number (mn) obtained by subtracting the number of pulses n is counted and output.

  By repeating this, the drive frequency averaging unit 206 generates an average frequency pulse signal in which a pulse signal having the first drive frequency f1 and a pulse signal having the second drive frequency f2 are alternately switched. To the first drive frequency selection unit 208.

  The drive frequency averaging unit 206 is configured with a rate multiplier.

  FIG. 3 shows an averaged frequency pulse signal generated by the drive frequency averaging unit 206 and output to the first drive frequency selection unit 208, and a pulse signal having the first drive frequency f1 and the second frequency signal. It is a timing chart which shows the average frequency pulse signal with which the pulse signal with drive frequency f2 switches alternately.

  Returning to FIG. 2, if “1” is set in the averaging flag input from the driving frequency averaging parameter determining unit 200, the first driving frequency selecting unit 208 starts from the driving frequency averaging unit 206. The input average frequency pulse signal is output to the second drive frequency selection unit 210. On the other hand, if “0” is set in the averaging flag input from the drive frequency averaging parameter determination unit 200, the pulse signal output from the first frequency generation unit 202 is used as the second drive frequency selection unit. Output to 210.

  If the scan flag input from the AF control unit 42 is set to “1”, the second drive frequency selection unit 210 outputs the pulse signal output from the first drive frequency selection unit 208 to the drive unit 102. Output to. On the other hand, if “0” is set in the scan flag input from the AF control unit 42, the pulse signal output from the first frequency generation unit 202 is output to the drive unit 102.

  4 and 5 are flowcharts showing the operation procedure of the camera apparatus 100 shown in FIG.

  Upon power-on such as battery replacement, the system control circuit 50 initializes flags, control variables, and the like (S101), and initializes the image display on the image display unit 28 to an OFF state (S102).

  The system control circuit 50 detects the set position of the mode dial switch 60 (S103), and if the mode dial switch 60 is set to power OFF, the process proceeds to step S105. If the mode dial switch 60 is set to the photographing mode, the process proceeds to step S106. If the mode dial switch 60 is set to another mode, the process proceeds to step S104.

  In step S105, the display of each display unit is changed to the end state, the barrier (not shown) of the lens protection unit is closed to protect the imaging unit, and predetermined parameters, setting values, and settings including flags and control variables are set. The mode is recorded in the nonvolatile memory 56. In addition, the power supply control unit 80 performs a predetermined end process such as cutting off unnecessary power of each part of the camera device 100 including the image display unit 28. Thereafter, the process returns to step S103.

  In step S104, the system control circuit 50 executes a process according to the selected mode. When the process is completed, the process returns to step S103.

  In step S <b> 106, the system control circuit 50 checks the remaining capacity and operation status of the power source 86 configured by a battery or the like via the power source control unit 80, and determines whether there is any problem in the operation of the camera device 100. . If there is no problem, the process proceeds to step S107, and if there is a problem, the process proceeds to step S108.

  In step S <b> 108, the system control circuit 50 displays a predetermined warning to the user by an image or sound via the display unit 54. Thereafter, the process returns to step S103.

  In step S <b> 107, the system control circuit 50 determines whether there is any problem with the operation of the recording medium 120 for the recording / reproducing operation of the image data by the camera device 100. If there is no problem, the process proceeds to step S109, and if there is a problem, the process proceeds to step S108.

  In step S <b> 109, the system control circuit 50 displays various setting states of the camera device 100 using images and sounds via the display unit 54. If the image display of the image display unit 28 is ON, the image display unit 28 is also used to display various setting states of the camera device 100 using images and sounds.

  Subsequently, a through display state in which captured images are sequentially displayed is set (S116), and the process proceeds to step S119.

  In the through display state, the image data sequentially written in the image display memory 24 via the image sensor 14, the A / D converter 16, the image processing circuit 20, and the memory control circuit 22 are immediately stored in the memory control circuit 22, It is sent to the image display unit 28 via the D / A converter 26. As a result, the images being shot are sequentially displayed on the image display unit 28, and an electronic viewfinder function is realized.

  In step S119, it is determined whether or not the shutter switch (SW1) 62 is ON. If it is ON, the process proceeds to step S122, and if it is OFF, the process returns to step S103.

  In step S122, the system control circuit 50 performs a distance measurement process to focus the zoom lens 10 on the subject, and performs a photometry process to determine an aperture value and a shutter opening time. In the photometric process, flash emission is set if necessary.

  The distance measurement / photometry process in step S122 will be described later in detail with reference to FIG.

  In the next step S127, it is determined whether or not the shutter switch (SW2) 64 is ON. If it is ON, the process proceeds to step S129, and if it is OFF, the process proceeds to step S128.

  In step S128, it is determined whether or not the shutter switch (SW1) 62 is ON. If it is ON, the process returns to step S127, and if it is OFF, the process returns to step S103.

  In step S129, the system control circuit 50 executes photographing processing including exposure processing and development processing. In the exposure process, image data is written in the memory 30 via the image sensor 14, the A / D converter 16, the image processing circuit 20, the memory control circuit 22, or not only through the image processing circuit 20. In the development process, the image data written in the memory 30 is read out and various processes are performed by using the memory control circuit 22 and, if necessary, the image processing circuit 20.

  The photographing process in step S129 will be described in detail later with reference to FIG.

  In the next step S134, the system control circuit 50 executes a recording process. That is, the image data written in the memory 30 is read, and various image processing is performed using the memory control circuit 22 and, if necessary, the image processing circuit 20. Further, the compression / decompression circuit 32 is used to perform image compression processing in accordance with the set mode, and then image data is written to the recording medium 120.

  The recording process in step S134 will be described in detail later with reference to FIG.

  In the next step S135, it is determined whether or not the shutter switch (SW2) 64 is ON. If it is ON, the process proceeds to step S136, and if it is OFF, the process proceeds to step S137.

  In step S136, since the ON state of the shutter switch (SW2) 64 continues, the system control circuit 50 determines the state of the continuous shooting flag stored in the internal memory of the system control circuit 50 or the memory 52. If the continuous shooting flag has been set, the flow returns to step S129 to perform continuous shooting. On the other hand, if the continuous shooting flag is not set, the process returns to step S135, and the processes of steps S135 and S136 are repeated until the shutter switch (SW2) 64 is turned off.

  In step S137, the photographed image is continuously displayed on the image display unit 28 until a predetermined minimum review time has elapsed (NO in S137). When the predetermined minimum review time has elapsed (YES in S137), the process proceeds to step S138.

  In step S138, the system control circuit 50 determines whether or not the image display flag is ON. If the image display flag is ON, the process proceeds to step S139. If the image display flag is OFF, the process proceeds to step S140.

  In step S139, the system control circuit 50 sets the display state of the image display unit 28 to the through display state, and proceeds to step S141.

  In step S140, the system control circuit 50 turns off the image display unit 28 and proceeds to step S141.

  In step S141, the system control circuit 50 determines whether or not the shutter switch (SW1) 62 is ON. If it is ON, the process returns to step S127, and if it is OFF, the process returns to step S103.

  FIG. 6 is a flowchart showing a detailed procedure of the distance measurement / photometry process in step S122 of FIG.

  When the shutter switch (SW1) 62 is turned on, the system control circuit 50 reads the charge signal from the image sensor 14 and sequentially reads the captured image data into the image processing circuit 20 via the A / D converter 16 (S201). Using the sequentially read image data, the image processing circuit 20 performs predetermined calculations prior to TTL AE (automatic exposure) processing, EF (flash pre-emission) processing, and AF (automatic focus adjustment) processing.

  In the calculation here, specific parts of all the pixels of the photographed image data are cut out and extracted as necessary, and this is used for the calculation. This makes it possible to use an optimum calculation result for each mode, such as the center weight mode, the average mode, and the evaluation mode, in the TTL method AE, EF, AWB, and AF processes.

  Next, the image processing circuit 20 determines whether or not the exposure is appropriate (S202). If the exposure is appropriate, the measurement data and / or the setting parameters are stored in the internal memory or the memory 52 of the system control circuit 50. The process proceeds to step S206. On the other hand, if the exposure is not appropriate, the process proceeds to step S203.

  In step S <b> 203, the system control circuit 50 performs AE control using the exposure control unit 40 based on the calculation result in the image processing circuit 20.

  Next, the system control circuit 50 determines whether or not flash light emission is necessary using the measurement data obtained by AE control (S204). If flash light emission is necessary, the system control circuit 50 proceeds to step S205. Return to S201.

  In step S205, the flash flag is set and the flash unit 48 is charged. Then, it returns to step S201.

  In step S206, the system control circuit 50 determines whether or not the white balance is appropriate. If the white balance is appropriate, the measurement data and / or the setting parameters are stored in the internal memory or the memory 52 of the system control circuit 50. Proceed to step S208. On the other hand, if the white balance is not appropriate, the process proceeds to step S207.

  In step S207, the system control circuit 50 uses the image processing circuit 20 to adjust color processing parameters and perform AWB control based on the calculation result in the image processing circuit 20 and the measurement data obtained by the AE control. Do. Then, it returns to step S201.

  In step S208, the system control circuit 50 determines whether or not distance measurement (AF) is appropriate, that is, in-focus. If it is in-focus, the measurement data and / or setting parameters are stored in the internal memory of the system control circuit 50 or the memory 52, and the process returns to step S127 (FIG. 5). On the other hand, if not in focus, the process proceeds to step S209.

  In step S209, the system control circuit 50 performs AF control processing using the AF control unit 42 based on measurement data obtained by AE control and AWB control. Then, it returns to step S201.

  The AF control process in step S209 will be described later in detail with reference to FIGS.

  9 and 10 are flowcharts showing the detailed procedure of the AF control process in S209 of FIG.

  First, the AF control unit 42 sets a scan flag indicating whether or not to perform the AF scan operation to “0” indicating that the AF scan operation is not performed (S601). This AF scan operation is an operation for driving the focus lens 11 and acquiring an AF evaluation value obtained by image processing.

  Next, a scan range that is a drive range of the focus lens 11 in the AF scan operation is determined (S602). Subsequently, the number of scans, which is the number of times the AF evaluation value is acquired within this scan range, is determined (S603), and the second drive frequency command value that is the drive frequency for moving the focus lens 11 to the scan start position. Is determined (S604). Here, the scan flag is set to 0, and in this case, the AF control unit 42 outputs the second drive frequency command value to the drive frequency averaging parameter determination unit 200. The AF control unit 42 outputs a drive start signal to the drive frequency control unit 46 and the drive unit 102, and the focus lens 11 is moved to the scan start position (S605).

  On the other hand, if the scan range is determined in step S602 and the number of scans is determined in step S603, the AF control unit 42 determines the first drive frequency command value based on the following equation (301) (S606).

First drive frequency command value = scan range / (number of scans−1) / CCD vertical transfer cycle (301)
Here, the CCD vertical transfer cycle is a vertical transfer cycle of the image sensor 14.

  Next, it waits for the focus lens 11 to reach the scan start position (NO in S607). When the focus lens 11 reaches the scan start position (YES in S607), the scan flag is set to “1” indicating that the AF scan operation is performed (S608), and the process proceeds to step S609 to perform the averaging parameter calculation process. Execute. The averaging parameter calculation process will be described later in detail with reference to FIG.

  When the averaging parameter calculation process in step S609 is completed, the input of the vertical transfer signal to the image sensor 14 is awaited (NO in S611). When the vertical transfer signal is input (YES in S611), the passage of a predetermined time set as the delay time is waited (S612), and the AF control unit 42 acquires the AF evaluation value generated by the image processing (S613). ).

  Next, it is determined whether or not AF evaluation values have been acquired for the number of scans (S614). If acquired, the process proceeds to step S615, and if not acquired, the process returns to step S611.

  In step S615, the scan flag is set to 0.

  Thereafter, the largest AF evaluation value is selected from the plurality of AF evaluation values acquired in steps S611 to S614, and the drive frequency for moving the focus lens 11 to the position where the AF evaluation value is acquired is set to the second. Is determined as a drive frequency command value (S616). Then, the AF control unit 42 outputs a drive start signal to the drive frequency control unit 46 and the drive unit 102 (S617). As a result, the focus lens 11 is moved to the in-focus position.

  FIG. 11 is a flowchart showing a detailed procedure of the averaging parameter calculation process in step S609 of FIG.

  The drive frequency averaging parameter determination unit 200 is set with the first drive frequency command value fcmd from the AF control unit 42 (S501). Along with this, the drive frequency averaging parameter determination unit 200 calculates a numerical value represented by the following formula (201). Note that fclk is the frequency of the basic clock (number of pulses per second).

fclk / (fcmd × 512/8) (201)
This numerical value is used to convert the first drive frequency command value fcmd obtained as a pulse rate converted to 1-2 phase drive into a 512-divided microstep drive frequency and to ensure a period corresponding to the obtained drive frequency. This represents the number of pulses of the basic clock to be counted. An integer value obtained by rounding down the value after the decimal point of the numerical value calculated by the above formula (201) is obtained, and this is determined as the first count number CNT1 (S502). The first count number CNT1 is output to the first frequency generator 202.

  Further, the first drive frequency f1, which is the frequency of the pulse signal to be output by the first frequency generator 202 that has received the first count number CNT1, is calculated based on the following equation (202) (S503).

f1 = fclk / (CNT1 × 512/8) (202)
Next, a difference Δfn between the first drive frequency command value fcmd and the first drive frequency f1 is calculated based on the following equation (203).

Δfn = f1−fcmd (203)
And it is discriminate | determined whether this difference (DELTA) fn is more than predetermined value (for example, 0.5pps) (S504). If it is equal to or greater than the predetermined value, the process proceeds to step S505, and if it is smaller than the predetermined value, the process returns to step S506.

  In step S506, 0 is set to the averaging flag, and the process proceeds to step S611 (FIG. 10). As described above, when the difference Δfn is smaller than the predetermined value, the averaging flag is set to 0 so that the first drive frequency selection unit 208 does not select the output pulse signal from the drive frequency averaging unit 206. Thereby, the processing load of the system can be reduced.

  In step S505, 1 is set to the averaging flag. Further, an integer value obtained by rounding off the decimal value of the difference Δfn is output to the drive frequency averaging unit 206 as the first pulse number n (S507). Then, it returns to step S611 (FIG. 10).

  After the execution of step S502, in parallel with the execution of step S503, the second count number CNT2 is calculated based on the following formula (204) and output to the second frequency generation unit 204 (S508).

CNT2 = CNT1 + 1 (204)
Further, the second drive frequency f2, which is the frequency of the pulse signal to be output by the second frequency generator 204 that has received the second count number CNT2, is calculated based on the following equation (205) (S509).

f2 = fclk / (CNT2 × 512/8) (205)
Next, a difference Δfm between the second drive frequency f2 and the first drive frequency f1 is calculated based on the following equation (206).

Δfm = f1-f2 (206)
Then, a numerical value represented by the following formula (207) is calculated using a preset allowable drive frequency resolution Res.

Δfm / Res (207)
An integer value obtained by rounding off the decimal point of the numerical value is output to the drive frequency averaging unit 206 as an average loop count number m (S510). Then, it returns to step S611 (FIG. 10).

  The drive frequency averaging parameter determination unit 200 holds the averaging loop count number m at a value smaller than a predetermined value. This prevents the drive sound from entering the audible band and becoming noise.

  FIG. 7 is a flowchart showing a detailed procedure of the photographing process in step S129 of FIG.

  In accordance with the photometric data stored in the internal memory of the system control circuit 50 or the memory 52, the system control circuit 50 opens the shutter 12 having the aperture function according to the aperture value by the exposure control unit 40 (S301). 14 is exposed (S302).

  Based on the flash flag, it is determined whether flash emission is necessary (S303). If necessary (YES in S303), the flash unit 48 is caused to emit light (S304).

  The system control circuit 50 waits for the end of exposure of the image sensor 14 according to the photometric data (NO in S305), and closes the shutter 12 when the exposure ends (YES in S305) (S306). Then, a charge signal is read from the image sensor 14 and the photographed image data is written to the memory 30 via the A / D converter 16, the image processing circuit 20, the memory control circuit 22, or not only through the image processing circuit 20 ( S307).

  Based on the set shooting mode, it is determined whether or not it is necessary to perform frame processing (S308). If necessary, the process proceeds to step S309, and if not necessary, the process proceeds to step S311.

  In step S309, the system control circuit 50 reads the image data written in the memory 30 using the memory control circuit 22 and, if necessary, the image processing circuit 20, and performs vertical addition processing (S309) or color processing ( S310) is sequentially performed. Thereafter, the processed image data is written into the memory 30.

  In step S 311, the system control circuit 50 reads the image data from the memory 30 and transfers the display image data to the image display memory 24 via the memory control circuit 22.

  When this series of processing is completed, the process returns to step 134 in FIG.

  FIG. 8 is a flowchart showing a detailed procedure of the recording process in step S134 of FIG.

  The system control circuit 50 reads the captured image data written in the memory 30 using the memory control circuit 22 and, if necessary, the image processing circuit 20, and interpolates the vertical / horizontal pixel ratio of the image sensor 14 to 1: 1. Pixel square processing is performed (S401). Thereafter, the processed image data is written into the memory 30.

  Then, the image data written in the memory 30 is read out, and image compression processing according to the set mode is performed by the compression / decompression circuit 32 (S402). Thereafter, the compressed image data is written to the recording medium 120 via the interface 90 and the connector 92 (S403).

  When the writing to the recording medium 120 is completed, the process returns to step S135 in FIG.

  As described above, in the present embodiment, the first frequency generation unit 202 outputs the pulse signal having the first frequency to the drive frequency averaging unit 206 by counting the basic clock. The second frequency generation unit 204 outputs a pulse signal having a second drive frequency f2 different from the first frequency to the drive frequency averaging unit 206 by counting the same basic clock. The drive frequency averaging unit 206 that has received them outputs a pulse signal having the first frequency for the first number of pulses n and then a pulse having the second drive frequency f2, as shown in FIG. The signal is output by the second pulse number (mn) (m is the averaged loop count number). Then, this output operation is repeated.

  That is, the drive frequency averaging unit 206 outputs a pulse signal having the first drive frequency f1 by n pulses, and subsequently outputs a pulse signal having the second drive frequency f2 by (mn) pulses. Repeat that. Thus, when viewed in a long span, the drive frequency averaging unit 206 outputs a pulse signal having a frequency calculated by the following equation (208).

(F1 × n + f2 × (mn)) / m (208)
In particular, in the case of control that has a mechanical response sufficiently longer and slower than the cycle of switching between the first drive frequency f1 and the second drive frequency f2 as in the case of a stepping motor, it is almost calculated by the above equation (208). It can be considered that it is equivalent to what was driven with the drive frequency.

  Therefore, during the AF scan operation, the difference between the drive frequency command value determined to be optimal by the AF algorithm and the drive frequency that can be actually realized can be suppressed to a deviation within an allowable range. Thereby, it is possible to prevent an increase in focusing time accompanying an increase in operating time in the AF scanning operation, and it is possible to increase the AF speed.

  In the above embodiment, the drive frequency averaging parameter determination unit 200 outputs the averaged loop count number m to the drive frequency averaging unit 206. Instead, the drive frequency averaging parameter determination unit 200 calculates the second pulse number (mn) corresponding to the number obtained by subtracting the first pulse number n from the average loop count number m. You may make it output to the averaging part 206. FIG.

  In the above embodiment, the stepping motor that drives the focus lens mounted on the camera device 100 has been described as an example. However, the present invention does not limit the target that the stepping motor drives.

[Other Embodiments]
Another object of the present invention is to supply a storage medium storing software program codes for realizing the functions of the above-described embodiments to a system or apparatus, and a computer (or CPU, MPU, etc.) of the system or apparatus. It is also achieved by reading and executing the program code stored in the storage medium.

  In this case, the program code itself read from the storage medium realizes the functions of the above-described embodiments, and the program code and the storage medium storing the program code constitute the present invention.

  Examples of the storage medium for supplying the program code include a floppy (registered trademark) disk, a hard disk, a magneto-optical disk, a CD-ROM, a CD-R, a CD-RW, a DVD-ROM, a DVD-RAM, and a DVD. An optical disc such as RW or DVD + RW, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used. Alternatively, the program code may be downloaded via a network.

  Further, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also an OS (operating system) or the like running on the computer based on the instruction of the program code. Includes a case where part or all of the actual processing is performed and the functions of the above-described embodiments are realized by the processing.

  Furthermore, after the program code read from the storage medium is written to a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the expanded function is based on the instruction of the program code. This includes a case where a CPU or the like provided on the expansion board or the expansion unit performs part or all of the actual processing and the functions of the above-described embodiments are realized by the processing.

It is a block diagram which shows the structure of the camera apparatus by which the stepping motor drive device which concerns on one embodiment of this invention is mounted. It is a block diagram which shows the detailed structure of the drive frequency control part shown in FIG. An average frequency pulse signal generated by the drive frequency averaging unit and output to the first drive frequency selection unit, having a pulse signal having the first drive frequency f1 and a second drive frequency f2. It is a timing chart which shows the average frequency pulse signal with which a pulse signal switches alternately. It is a flowchart (1/2) which shows the procedure of operation | movement of the camera apparatus shown in FIG. 3 is a flowchart (2/2) illustrating a procedure of operations of the camera apparatus illustrated in FIG. 1. It is a flowchart which shows the detailed procedure of the ranging / photometry process in step S122 of FIG. It is a flowchart which shows the detailed procedure of the imaging | photography process in FIG.5 S129. It is a flowchart which shows the detailed procedure of the recording process in step S134 of FIG. It is a flowchart (1/2) which shows the detailed procedure of AF control processing in S209 of FIG. It is a flowchart (2/2) which shows the detailed procedure of AF control processing in S209 of FIG. 10 is a flowchart showing a detailed procedure of an averaging parameter calculation process in step S609 of FIG. It is a figure which shows the basic clock and drive frequency f1, f2 produced | generated based on this basic clock. It is a figure which shows the scanning range of each scanning time when the scanning frequency | count is set to 6 times in a predetermined scanning range, and a scanning operation is performed only this scanning frequency | count, acquiring AF evaluation value.

Explanation of symbols

42 AF control unit 46 Drive frequency control unit 102 Drive unit (drive means)
200 driving frequency averaging parameter determining unit 202 first frequency generating unit (first frequency generating means)
204 Second frequency generator (second frequency generator)
206 Drive frequency averaging unit (drive pulse output means)
208 First driving frequency selection unit 210 Second driving frequency selection unit

Claims (20)

First frequency generating means for generating a first pulse signal having a first frequency by counting a basic clock;
Second frequency generating means for generating a second pulse signal having a second frequency different from the first frequency by counting the basic clock;
Receiving the first and second pulse signals respectively generated by the first and second frequency generating means, outputting the first pulse signal by the first number of pulses, and subsequently the second pulse signal; Driving pulse output means for repeatedly outputting the same number of pulses as a driving pulse,
A stepping motor drive device comprising: drive means for driving the stepping motor by the drive pulse output by the drive pulse output means. The first and second frequency generation means count the basic clock by the first and second count numbers, respectively, so that the first and second pulses having the first and second frequencies respectively. Each generates a signal,
2. The apparatus according to claim 1, further comprising a determining unit that determines the first and second count numbers and the first and second pulse numbers based on a drive frequency command value representing a drive target of the stepping motor. The stepping motor driving device according to 1. The first and second frequency generation means count the basic clock by the first and second count numbers, respectively, so that the first and second pulses having the first and second frequencies respectively. Each generates a signal,
Based on a drive frequency command value representing a drive target of the stepping motor, the first and second count numbers, the first pulse number, and the total number of the first and second pulse numbers are determined. 2. The stepping motor driving apparatus according to claim 1, further comprising a determining unit.   4. The stepping motor driving apparatus according to claim 3, wherein the determining means determines the total number of the first and second pulses to a value smaller than a predetermined value.   4. The stepping motor driving apparatus according to claim 2, wherein the determining unit determines the second count number as a number obtained by adding a predetermined number to the first count number.   6. The stepping motor driving device according to claim 1, wherein the stepping motor driving device controls driving of a focus lens included in the camera device.   When the automatic focus adjustment scan operation for driving the focus lens to obtain the automatic focus adjustment evaluation value is performed, the drive unit is operated, and when the automatic focus adjustment scan operation is not performed, the drive unit is operated. 7. The stepping motor driving apparatus according to claim 6, further comprising first control means for preventing the stepping motor from being operated. When performing the automatic focus adjustment scan operation, the drive means is operated in each of a plurality of divided sections within a predetermined drive range of the focus lens, and among the plurality of automatic focus adjustment evaluation values acquired by the operation. Detecting means for detecting the maximum automatic focusing evaluation value in
The stepping motor driving apparatus according to claim 7, further comprising a moving unit that moves the focus lens to the divided section where the maximum automatic focus adjustment evaluation value detected by the detecting unit is acquired.   3. The apparatus according to claim 2, further comprising second control means for preventing the drive pulse output means from operating when a difference between the drive frequency command value and the first frequency is smaller than a predetermined value. The stepping motor driving device according to claim 3.   2. The stepping motor driving apparatus according to claim 1, wherein the driving pulse output means is constituted by a rate multiplier. A first frequency generating step of generating a first pulse signal having a first frequency by counting a basic clock;
A second frequency generating step of generating a second pulse signal having a second frequency different from the first frequency by counting the basic clock;
Receiving the first and second pulse signals generated in the first and second frequency generation steps, respectively, outputting the first pulse signal by the first number of pulses, and subsequently the second pulse signal; Repeatedly outputting the second number of pulses, and a drive pulse output step for outputting as a drive pulse;
A step of driving the stepping motor by the drive pulse output in the drive pulse output step. In the first and second frequency generation steps, the first and second pulses respectively having the first and second frequencies are obtained by counting the basic clock by the first and second count numbers, respectively. Each generates a signal,
The method further comprises a determining step of determining the first and second count numbers and the first and second pulse numbers based on a drive frequency command value representing a drive target of the stepping motor. 11. A stepping motor driving method according to 11. In the first and second frequency generation steps, the first and second pulses respectively having the first and second frequencies are obtained by counting the basic clock by the first and second count numbers, respectively. Each generates a signal,
Based on a drive frequency command value representing a drive target of the stepping motor, the first and second count numbers, the first pulse number, and the total number of the first and second pulse numbers are determined. 12. The stepping motor driving method according to claim 11, further comprising a determination step.   14. The stepping motor driving method according to claim 13, wherein in the determining step, the total number of the first and second pulses is determined to be smaller than a predetermined value.   14. The stepping motor driving method according to claim 12, wherein, in the determining step, the second count number is determined as a number obtained by adding a predetermined number to the first count number.   16. The stepping motor driving method according to claim 11, wherein driving of a focus lens included in the camera device is controlled by the stepping motor driving method.   The drive step is executed when the auto focus adjustment scan operation for driving the focus lens to acquire the auto focus adjustment evaluation value is performed, and the drive step is executed when the auto focus adjustment scan operation is not performed. 17. The stepping motor driving method according to claim 16, further comprising a first control step for preventing the stepping motor from being operated. When performing the automatic focus adjustment scan operation, the drive step is executed in each of a plurality of divided sections within a predetermined drive range of the focus lens, and among the plurality of automatic focus adjustment evaluation values obtained by the execution A detection step for detecting the maximum autofocus evaluation value at
The stepping motor driving method according to claim 17, further comprising a moving step of moving the focus lens to the divided section from which the maximum automatic focus adjustment evaluation value detected in the detection step is acquired.   13. The method according to claim 12, further comprising a second control step that prevents the drive pulse output step from being executed when a difference between the drive frequency command value and the first frequency is smaller than a predetermined value. The stepping motor driving method according to claim 13. In a program for causing a computer to execute a stepping motor driving method, the stepping motor driving method includes:
A first frequency generating step of generating a first pulse signal having a first frequency by counting a basic clock;
A second frequency generating step of generating a second pulse signal having a second frequency different from the first frequency by counting the basic clock;
Receiving the first and second pulse signals generated in the first and second frequency generation steps, respectively, outputting the first pulse signal by the first number of pulses, and subsequently the second pulse signal; Repeatedly outputting the second number of pulses, and a drive pulse output step for outputting as a drive pulse;
And a drive step of driving the stepping motor by the drive pulse output in the drive pulse output step.

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