JP2008010583A - Circuit module and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit module which can reduce stubs harmful upon formation of a high speed circuit. <P>SOLUTION: A wiring circuit board 5 comprises a first circuit 51 provided on a surface 50a of a substrate 50 and including a first electrode pad 511a, a second circuit 52 provided on the surface 50a of the substrate 50 and including a second electrode pad 521a electrically isolated from the first electrode pad 511a, a third circuit 53 provided on a rear surface 50b of the substrate 50 and including a third electrode pad 531a, a lead electrode pad 511b provided at a position associated with the first electrode pad 511a in the rear surface 50b of the substrate 50 and electrically isolated from the third electrode pad, a through-hole 54 for use to electrically connect the first electrode pad with a connecting electrode pad, and a jumper chip 55 mounted on the front surface 50a of the substrate 50 or on the rear surface 50b thereof for connecting the first circuit and the second circuit or the first circuit and the third circuit. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a circuit module and an electronic apparatus in which a plurality of circuit units having different functions are mounted on a single substrate.

  For example, in electronic devices such as notebook computers and mobile phones, there is an attempt to mass-produce wiring boards by using a common wiring board. The common use of the wiring board is highly expected in terms of manufacturing cost because a desired circuit module can be easily obtained by mounting / not mounting a jumper chip.

  This will be specifically described below. The common wiring board includes a plurality of circuit units. These circuit parts have functions different from each other, and each has an electrode pad for mounting a jumper chip.

  For example, in a common wiring board, the second and third circuit units may exist adjacent to the first circuit unit. In such an arrangement state, when the first circuit portion and the second circuit portion are connected by a jumper chip, a circuit module including the first and second circuit portions is configured. Further, when the first circuit portion and the third circuit portion are connected by a jumper chip, another circuit module including the first and third circuit portions is configured.

  Therefore, the wiring pattern of the first circuit portion is branched into, for example, two at predetermined locations, and electrode pads for mounting jumper chips are formed at the respective tip portions. Note that electrode pads for mounting jumper chips are also formed in the wiring patterns of the second and third circuit portions.

By the way, as such a jumper chip, a “double-sided chip jumper” that electrically connects a wiring pattern formed on the surface of the wiring board and a wiring pattern formed on the back surface of the wiring board is disclosed. This double-sided chip jumper has a plurality of terminals to be inserted into insertion holes formed in the wiring board, and a wiring pattern formed on the surface of the wiring board by these terminals and a back surface of the wiring board. The wiring pattern is connected. (For example, see Patent Document 1).
JP-A-9-204945

  By the way, in the conventional wiring board which exists conventionally, a wiring pattern is branched in the same plane of a board | substrate. Therefore, the pattern ahead of the branch portion is extended longer so that the jumper chip mounted on one electrode pad does not interfere with the other electrode pad. As a result, when the electrical signal handled by the wiring board becomes high speed, the pattern beyond the branch portion becomes a stub, which may seriously affect the circuit operation.

  In the double-sided chip jumper described in Patent Document 1, each terminal extends through the wiring board to the back side of the wiring board. For this reason, when the electrical signal handled by the wiring board becomes high speed, each terminal becomes a stub, which may seriously affect the circuit operation. In addition, the double-sided chip jumper has a very complicated configuration and has a problem in terms of manufacturing cost.

  The present invention provides a circuit module and an electronic device with reduced stubs that are harmful to the formation of high-speed circuits.

  A circuit module according to the present invention includes a substrate having a first surface and a second surface located on the opposite side of the first surface, and the first electrode pad provided on the first surface. A first circuit unit including the second circuit unit including the second electrode pad provided on the first surface and spaced apart from the first electrode pad; and provided on the second surface. A third circuit portion including a third electrode pad, and a connection provided on the second surface at a position corresponding to the first electrode pad and spaced apart from the third electrode pad An electrode pad, a conductive portion for conducting the first electrode pad and the connection electrode pad, and a chip mounted on the first surface or the second surface, the chip being the first The first electrode pad and the second electrode pad when mounted on one surface A chip including two electrode portions that are electrically connected to each other and electrically connected to the third electrode pad and the connection electrode pad, respectively, when the chip is mounted on the second surface; It has.

  According to the present invention, stubs that are harmful to the formation of high-speed circuits can be reduced.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

(Configuration of notebook computer 1)
FIG. 1 is a perspective view of a notebook computer 1 according to an embodiment of the present invention. In the following description, the “front side” is the side closer to the user of the notebook computer 1, the “rear side” is the side farther from the user of the notebook computer 1, and the “left side” is the notebook computer 1. The right side as viewed from the user of the notebook computer 1 is the left side as viewed from the user. Also, “upper” and “lower” are defined according to gravity.

  As shown in FIG. 1, a notebook personal computer (electronic device) 1 according to this embodiment includes a personal computer main body 2. The personal computer main body 2 is formed in a box shape by a housing main body (housing) 3 and a top cover 4.

  The housing body 3 is formed in a flat dish shape, and includes a wiring board 5, an acoustic device, a cooling device, a mass storage device, a communication module, and the like. The wiring board 5 includes a plurality of regions, and a unique circuit portion is formed in each region. As the types of circuit units, there exist, for example, functions used in the notebook personal computer 1 such as those used for controlling an acoustic device and those related to control of a cooling device. The keyboard 6 and the liquid crystal display 7 are electrically connected to such a wiring board 5. Thus, desired information is displayed on the liquid crystal display 7 based on the input from the keyboard 6.

  The top cover 4 is fixed to the housing body 3 with screws, and a keyboard 6 is disposed at a predetermined portion thereof. A liquid crystal display 7 is disposed at the rear of the top cover 4. The liquid crystal display 7 is rotatably supported by two hinge portions 8 arranged at the left end and the right end of the housing body 3.

(Configuration of wiring board 5)
2 is a top view of the wiring board 5 according to the embodiment, FIG. 3 is a cross-sectional view of the wiring board 5 according to the embodiment, and FIG. 4 is a bottom view of the wiring board 5 according to the embodiment.
As shown in FIGS. 2 to 4, the wiring board (circuit module) 5 includes a substrate 50 formed of an insulating material, and first and second substrates disposed on a surface (first surface) 50 a of the substrate 50. The circuit portions 51 and 52, the third circuit portion 53 disposed on the back surface (second surface) 50b of the substrate 50, the through holes 54 formed in the substrate 50, and the front surface 50a of the substrate 50 are mounted. Jumper chip 55 is provided.

  The first circuit unit 51 includes a first surface pattern 511. The first surface pattern 511 is formed on the surface 50a of the substrate 50, and an electronic element such as a CPU is mounted on the predetermined position.

  The second circuit unit 52 includes a second surface pattern 521. The second surface pattern 521 is formed on the surface 50a of the substrate 50, and an electronic element such as a chip set is mounted on the predetermined position.

  The first and second surface patterns 511 and 521 include first and second electrode pads 511a and 521a, respectively, at portions facing each other. The first and second electrode pads 511a and 521a are electrically isolated.

  The third circuit unit 53 includes a back surface pattern 531. The back surface pattern 531 is formed on the back surface 50b of the substrate 50, and an electronic element such as a chip set is mounted on the predetermined position.

  The back surface pattern 531 includes a third electrode pad 531a at a position corresponding to the first electrode pad 511a. Further, on the back surface 50b of the substrate 50, lead electrode pads (connection electrodes) 511b are formed at positions corresponding to the first electrode pads 511a. The third electrode pad 531a and the extraction electrode pad 511b are electrically isolated. It should be noted that the extraction electrode pad 511b is not included in the third circuit unit 53.

  The through hole 54 is disposed at a position corresponding to the first electrode pad 511 a and the extraction electrode pad 511 b, and a hole portion 541 formed in the substrate 50 and a conductive film 542 formed on the inner surface of the hole portion 541. It is comprised by.

  The hole 541 extends at a right angle to the substrate 50 and penetrates the first electrode pad 511a and the extraction electrode pad 511b. The inner diameter of the hole 541 is about 0.25 mm. The conductive film 542 is electrically connected to the first electrode pad 511a and the extraction electrode pad 511b. Thus, the first electrode pad 511a and the extraction electrode pad 511b are electrically connected through the conductive film 542 of the through hole 54.

  The jumper chip 55 includes a chip body 550 formed in a rectangular parallelepiped shape, a first electrode part (electrode part) 551 provided at one end part in the longitudinal direction of the chip body 550, and the other end part in the longitudinal direction of the chip body 550. A second electrode portion (electrode portion) 552 provided on the chip body, and a conductive member 553 provided inside the chip body 550.

  The first electrode portion 551 is electrically connected by solder S to the first electrode pad 511a. The second electrode portion 552 is electrically connected by solder S to the second electrode pad 521a. As a material of the first and second electrode portions 551 and 552, a metal such as aluminum or copper is used. The conducting member 553 has a rod shape, and electrically connects the first electrode portion 551 and the second electrode portion 552. As a material for the conductive member 553, aluminum, copper, or the like is used. That is, the jumper chip 55 is a resistance element having the first and second electrode portions 551 and 552 as terminals and having a resistance value in the same order as a conductor such as aluminum or copper.

  Therefore, when the jumper chip 55 is mounted on the surface 50a of the substrate 50, the first electrode pad 511a and the second electrode pad 521a are electrically connected, and as a result, the first circuit unit 51 and the second electrode pad 521a are electrically connected. Two circuit parts 52 are connected. However, it should be noted that at this time, the first circuit unit 51 is not connected to the third circuit unit 53.

  Here, a case where the jumper chip 55 is mounted on the back surface 50b of the substrate 50 will be described. 3 and 4 represents the jumper chip 55 mounted on the back surface 50b of the substrate 50. When the jumper chip 55 is mounted on the back surface 50b of the substrate 50, the jumper chip 55 is not mounted on the front surface 50a of the substrate 50. That is, the jumper chip 55 is mounted only on the front surface 50 a or the back surface 50 b of the substrate 50.

  As shown by the dotted line portions in FIGS. 3 and 4, the first electrode portion 551 is electrically connected to the extraction electrode pad 511 b by the solder S. The second electrode portion 552 is electrically connected to the third electrode pad 531a by solder S.

  Therefore, when the jumper chip 55 is mounted on the back surface 50b of the substrate 50, the first electrode pad 511a and the third electrode pad 531a are electrically connected through the through hole 54 and the extraction electrode pad 511b. As a result, the first circuit unit 51 and the third circuit unit 53 are connected. However, it should be noted that the first circuit unit 51 is not connected to the second circuit unit 52 at this time.

  As described above, when the jumper chip 55 is mounted on the front surface 50 a of the substrate 50, the first circuit unit 51 and the second circuit unit 52 are connected, and the jumper chip 55 is mounted on the back surface 50 b of the substrate 50. Then, the first circuit unit 51 and the third circuit unit 53 are connected. That is, the jumper chip 55 is used to select a circuit connected to the first circuit unit 51 from a plurality of circuits.

(Operation by this embodiment)
In the present embodiment, the second circuit portion 52 and the third circuit portion 53 that are selectively connected to the first circuit portion 51 are formed on the front surface 50a and the back surface 50b of the substrate 50, respectively. The first electrode pad 511a and the extraction electrode pad 511b for mounting the jumper chip 55 are electrically connected by a short through hole 54.

  Therefore, even when the jumper chip 55 is mounted on the front surface 50a of the substrate 50, that is, when the jumper chip 55 is not mounted on the back surface 50b of the substrate 50, there is a stub that is harmful in forming a high-speed circuit. Minimized.

  In addition, as the substrate 50 becomes thinner, the through hole 54 is shortened accordingly, so that the adverse effect caused by the through hole 54 becoming a stub can be suppressed to a level that can be almost ignored.

  Furthermore, when the jumper chip 55 is mounted on the back surface 50b of the substrate 50, that is, when the jumper chip 55 is not mounted on the front surface 50a of the substrate 50, there is almost no stub that is harmful in forming a high-speed circuit. It will be.

  As described above, the wiring board 5 according to this embodiment is suitable for a high-speed circuit regardless of whether the jumper chip 55 is mounted on the front surface 50a of the substrate 50 or the jumper chip 55 is mounted on the back surface 50b of the substrate 50. It becomes.

  In the present embodiment, the wiring board 5 mounted on the notebook personal computer 1 has been described. However, the present invention is not limited to this, and any circuit can be used as long as it is branched and connected by a jumper chip. It can be provided for a wiring board mounted on an electronic device.

  In this embodiment, a resistance element is used as the jumper chip 55. However, the present invention is not limited to this, and may be, for example, a capacitor element or a coil element. good.

  The present invention is not limited to the above-described embodiments as they are, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Moreover, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment.

1 is a perspective view of a notebook computer according to an embodiment of the present invention. The top view of the wiring board concerning the embodiment. Sectional drawing of the wiring board concerning the embodiment. The bottom view of the wiring board concerning the embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Notebook-type personal computer (electronic device), 3 ... Housing | casing main body (casing), 5 ... Wiring board (circuit module), 50 ... Board | substrate, 50a ... Front surface (1st surface), 50b ... Back surface (2nd Surface), 51 ... first circuit portion, 52 ... second circuit portion, 53 ... third circuit portion, 54 ... through hole (conduction portion), 55 ... jumper chip, 511a ... first electrode pad, 511b ... Extraction electrode pad (connection electrode pad), 521a ... second electrode pad, 531a ... third electrode pad, 551 ... first electrode part (electrode part), 552 ... second electrode part (electrode part) .

Claims (10)

A substrate comprising a first surface and a second surface located opposite the first surface;
A first circuit portion provided on the first surface and including a first electrode pad;
A second circuit unit including a second electrode pad provided on the first surface and spaced apart from the first electrode pad;
A third circuit portion provided on the second surface and including a third electrode pad;
A connection electrode pad provided on the second surface at a position corresponding to the first electrode pad and spaced apart from the third electrode pad;
A conducting portion for conducting the first electrode pad and the connection electrode pad;
A chip mounted on the first surface or the second surface, wherein the first electrode pad and the second electrode pad are electrically connected to the first electrode pad and the second electrode pad, respectively, when the chip is mounted on the first surface. And a chip having two electrode portions each electrically connected to the third electrode pad and the connection electrode pad when the chip is mounted on the second surface. A circuit module characterized by that.   The circuit module according to claim 1, wherein the conductive portion is a through hole formed in the substrate.   The circuit module according to claim 1, wherein the chip is a resistance element.   The circuit module according to claim 3, wherein the resistance element has a resistance value in the same order as a conductor.   The circuit module according to claim 1, wherein the third electrode pad is provided at a position corresponding to the second electrode pad. A housing in which a housing space is formed;
A substrate that is disposed in the accommodation space and includes a first surface and a second surface located on the opposite side of the first surface;
A first circuit portion provided on the first surface and including a first electrode pad;
A second circuit unit including a second electrode pad provided on the first surface and spaced apart from the first electrode pad;
A third circuit portion provided on the second surface and including a third electrode pad;
A connection electrode pad provided on the second surface at a position corresponding to the first electrode pad and spaced apart from the third electrode pad;
A conducting portion for conducting the first electrode pad and the connection electrode pad;
A chip mounted on the first surface or the second surface, wherein the first electrode pad and the second electrode pad are electrically connected to the first electrode pad and the second electrode pad, respectively, when the chip is mounted on the first surface. And a chip having two electrode portions each electrically connected to the third electrode pad and the connection electrode pad when the chip is mounted on the second surface. Electronic equipment characterized by that.   The electronic apparatus according to claim 6, wherein the conductive portion is a through hole formed in the substrate.   The electronic device according to claim 6, wherein the chip is a resistance element.   The electronic device according to claim 6, wherein the resistance element has a resistance value in the same order as a conductor.   The electronic apparatus according to claim 6, wherein the third electrode pad is provided at a position corresponding to the second electrode pad.

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