JP2008004705A - Light-emitting diode driving circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress variation in emission luminance of a light-emitting diode by suppressing variation in a reference voltage. <P>SOLUTION: The light-emitting diode driving circuit consists of a reference current section 32 for generating a reference current; and current output sections 44<SB>1</SB>-44m of a plurality of channels for ON/OFF controlling a plurality of systems of switches to generate a plurality of systems of driving currents proportional to the reference current, and supplying the generated currents to the light-emitting diode. In the driving circuit, a power source Vdd1 of the reference current section is separated from a power source Vdd2 of the current output section of each of the channels. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a light emitting diode driving circuit, and more particularly to a light emitting diode driving circuit that drives each of a plurality of light emitting diodes arranged.

  As a means for exposing a photosensitive member in a printer or the like, there is one using an LED array in which light emitting diodes (hereinafter referred to as “LED”) are linearly arranged. As a drive circuit for driving each LED of such an LED array, for example, there are those described in Patent Documents 1 and 2 and the like.

  FIG. 4 shows a circuit configuration diagram of an example of a conventional light emitting diode driving circuit. This drive circuit is a semiconductor integrated circuit.

  In the figure, a reference voltage Vref is applied from the reference voltage source 11 to the inverting input terminal of the operational amplifier 10. The output terminal of the operational amplifier 10 is connected to the gate of a p-channel MOS field effect transistor (hereinafter simply referred to as “MOS transistor”) M1, and also connected to the gate of the p-channel MOS transistor M2 via a switch 12 such as an analog switch. Has been.

  The source of the MOS transistor M1 is connected to the power supply Vdd, and the drain of the MOS transistor M1 is connected to the non-inverting input terminal of the operational amplifier 10 and to one end of the resistor R1. The other end of the resistor R1 is grounded.

  The switch 12 switches on / off according to a switch control signal supplied from the terminal 13. The source of the MOS transistor M2 is connected to the power supply Vdd, the drain of the MOS transistor M2 is connected to the anode of an LED (light emitting diode) 14, and the cathode of the LED 14 is grounded.

  The operational amplifier 10 causes the reference current Iref expressed by the equation (1) to flow to the drain of the MOS transistor M1 by the reference voltage Vref and the resistor R1.

Iref = Vref / R1 (1)
When the switch 12 is on, the MOS transistors M1 and M2 form a current mirror. If the gate area ratio of the MOS transistors M1 and M2 is 1: 1, the reference current Iref flows from the MOS transistor M2 to the LED 14, and the LED 14 Emits light.
Japanese Patent No. 3296882 Japanese Patent No. 2516236

  In the conventional light emitting diode driving circuit, the source of the MOS transistor M1 that generates the reference current Iref and the source of the MOS transistor M2 that drives the LED 14 are connected to the same power supply Vdd.

  In order to express gradation by changing the light emission luminance of the LED 14, the switch 12 and the MOS transistor M2 are connected in parallel in n systems. When driving a multi-channel LED array, a circuit in which the switch 12 and the MOS transistor M2 are connected in parallel in n systems is provided in parallel for m channels.

  In this case, since the source of the MOS transistor M1 that generates the reference current Iref and the source of the MOS transistor M2 that drives the LED 14 are connected to the same power supply Vdd, the n × m MOS transistors M2 are simultaneously turned on or off. When the number of transistors to be increased increases and switching is performed at a high speed, the power supply Vdd varies, so that the reference current Iref varies and the light emission luminance of the LED 14 varies.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a light emitting diode driving circuit capable of suppressing fluctuations in light emission luminance of a light emitting diode by suppressing fluctuations in a reference current.

The light emitting diode driving circuit according to the present invention includes a reference current unit that generates a reference current, and a plurality of switches that generate on / off control of a plurality of switches to generate a plurality of driving currents that are proportional to the reference current and that supply the plurality of driving currents to the light emitting diodes. A light-emitting diode driving circuit comprising a current output unit for a channel,
By separating the power source of the reference current unit and the power source of the current output unit of each channel, it is possible to suppress the variation of the light emission luminance of the light emitting diode by suppressing the variation of the reference current.

In the light emitting diode drive circuit,
The current output part of each channel is
A first current mirror circuit configured with a part of the reference current unit and generating a first current based on the reference current;
A second current mirror circuit may be provided that is supplied with the first current and generates a current proportional to the first current corresponding to a switch that is turned on among the switches of the plurality of systems.

In the light emitting diode drive circuit,
Each of the first and second current mirror circuits may be a cascaded two-stage current mirror circuit.

  According to the present invention, it is possible to suppress the fluctuation of the light emission luminance of the light emitting diode by suppressing the fluctuation of the reference current.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<Configuration of LED array driving circuit>
FIG. 1 shows a block diagram of an embodiment of an LED array device using a light emitting diode driving circuit of the present invention. This LED array device has, for example, a 48 channel configuration.

  In the figure, for example, 6-bit light emission time data for one channel is supplied to the shift register 20 in a time series for 48 channels, and is sequentially shifted and latched by the shift register 20 and then supplied to the pulse width modulation circuit 22. The The pulse width modulation circuit 22 generates a light emission pulse having a pulse width indicated by the light emission time data for each channel, and supplies the light emission pulses for 48 channels to the LED array drive circuit 26.

  For example, 6-bit light emission luminance data for 48 channels is supplied to the shift register 24 in a time-series manner, and is sequentially shifted and latched by the shift register 24 and then supplied to the LED array driving circuit 26. The LED array driving circuit 26 decodes the light emission luminance data for each channel to generate n system switch control signals, and determines the MOS transistor to be turned on by the light emission pulse for each channel based on the n system switch control signals. The LED array driving circuit 26 drives the 48 channels of the LEDs constituting the LED array 28 in units of channels.

<Configuration of LED driving circuit>
FIG. 2 shows a circuit configuration diagram of an embodiment of a light emitting diode driving circuit of the present invention. This drive circuit is a semiconductor integrated circuit.

  In the figure, the reference voltage Vref is applied from the reference voltage source circuit 31 to the inverting input terminal of the operational amplifier 30. The output terminal of the operational amplifier 30 is connected to the gates of the p-channel MOS transistors M11 and M12. The sources of the MOS transistors M11 and M12 are connected to the power supply Vdd1 through the resistors R11 and R12, respectively, to form a current mirror circuit. The drains of the MOS transistors M11 and M12 are connected to the sources of the p-channel MOS transistors M13 and M14, respectively.

  The gates of the MOS transistors M13 and M14 are commonly connected to the drain of the MOS transistor M13 to form a current mirror circuit. The drain of the MOS transistor M13 is connected to the non-inverting input terminal of the operational amplifier 30, and the resistance R13 Connected to one end.

  The other end of the resistor R13 is grounded. The MOS transistors M11 to M14 are configured by cascading current mirror circuits, so that the drain potentials of the MOS transistors M11 and M12 are substantially the same, and the drain currents of the MOS transistors M13 and M14 are substantially the same when the gate areas are the same. It becomes.

  The drain of the MOS transistor M14 is connected to the drain of the n-channel MOS transistor M15. The gate of the MOS transistor M15 is connected to the gate of the n-channel MOS transistor M16 to form a current mirror circuit.

  The sources of the MOS transistors M15 and M16 are connected to the drains of the n-channel MOS transistors M17 and M18. The gates of the MOS transistors M17 and M18 are commonly connected to the drain of the MOS transistor M15 to form a current mirror circuit, and the sources of the MOS transistors M17 and M18 are grounded.

  Since the MOS transistors M15 to M18 have a configuration in which current mirror circuits are cascade-connected, the source potentials of the MOS transistors M15 and M16 are substantially the same, and the drain currents of the MOS transistors M15 and M16 are substantially the same when the gate areas are the same. It becomes. Note that a constant voltage Va is applied from the voltage source 33 to the gates of the MOS transistors M15 and M16, so that the drain potential of the MOS transistors M17 and M18 is Va-Vgs1 (Vgs1 is a gate-drain voltage of an n-channel MOS transistor). It becomes.

  The operational amplifier 30, the reference voltage source circuit 31, and the MOS transistors M11 to M15 and M17 form a reference current unit 32, and a reference current Iref flows through the drain of the MOS transistor M13. Further, a current proportional to the reference current Iref flows through the drain of the MOS transistor M16 by the current mirror circuit.

  The drain of the MOS transistor M16 is connected to the drain of the p-channel MOS transistor M22. The source of the MOS transistor M22 is connected to the drain of the p-channel MOS transistor M21. The source of the MOS transistor M21 is connected to the power supply Vdd2 via the resistor R15.

  The gate of the MOS transistor M21 is connected to the drain of the MOS transistor M22, and is connected to the gates of the p-channel MOS transistors M23, M25, and M27 via switches 36, 38, and 40 such as analog switches. When the switches 36, 38, 40 are turned on, the gate potentials of the MOS transistors M23, M25, M27 are made the same as the gate voltage of the MOS transistor M21, the MOS transistors M23, M25, M27 are turned on, and the switches 36, 38, 40 are turned off. The MOS transistors M23, M25, M27 are turned off with the gate potential of the MOS transistors M23, M25, M27 as the power supply voltage Vdd2.

  The sources of the MOS transistors M23, M25, M27 are connected to the power supply Vdd2 via the resistors R16, R17, R18, respectively. The MOS transistors M23, M25, M27 are MOS transistors when the switches 36, 38, 40 are on. M21 and the current mirror circuit are configured.

  The gate of the MOS transistor M22 is connected to the gates of the p-channel MOS transistors M24, M26 and M28. The drains of the MOS transistors M23, M25 and M27 are connected to the sources of the MOS transistors M24, M26 and M28, and the MOS transistors M22, M24, M26 and M28 constitute a current mirror circuit.

  Since the MOS transistors M21 to M28 are configured by cascading current mirror circuits, the MOS transistors M21, M23, M25, and M27 have substantially the same drain potential and the same gate area, and the MOS transistors M22, M24, and M26. , M28 have substantially the same drain current. Here, in order to perform gradation expression, for example, the gate areas of the MOS transistors M23 and M24 are six times the gate area of the MOS transistors M21 and M22, the gate areas of the MOS transistors M25 and M26 are three times, and the MOS transistor The gate areas of M27 and M28 are different such that the gate areas are doubled.

  A constant voltage Vb is applied from the voltage source 35 to the gates of the MOS transistors M22, M24, M26 and M28, and the source potential of the MOS transistors M22, M24, M26 and M28 is Vb + Vgs2 (Vgs2 is the gate of the p-channel MOS transistor).・ Drain-to-drain voltage).

Each of the switches 36, 38, and 40 switches on / off according to n (here, n = 3) system switch control signals supplied from the terminals 37, 39, and 41, respectively. Note that n is not limited to 3. The drain of the MOS transistor M24, M26, M28 is connected to the anode of LED 45 _1, LED 45 ₁ a cathode is grounded.

Here, MOS when the switch 36, 38, 40 is off transistors M23, M25, M27 is off and LED 45 ₁ a current does not flow. When the switch 36 is turned on the drain current of the MOS transistor M23 flows to the LED 45 _1, the sum of the drain currents of the MOS transistors M23, M25 when the switch 36 is turned on flows through the LED 45 _1, the switch 36, 38, 40 are turned on MOS transistor M23, M25, the sum of the drain current of M27 flows to LED 45 _1, LED 45 ₁ is higher emission luminance current flowing increases is large.

Additional switches 36, 38, 40, MOS transistors M16, M18~M28 constitute the current output section 44 ₁ of one channel. LED 45 ₁ is part of the LED array 28.

Each of the current output units 44 _{1 to} 44 m for m (= 48) channels has the same configuration, and drives the LEDs 45 _{1 to} 45 m for m channels.

In the present embodiment, since the power supply Vdd1 of the reference current unit 32 and the power supply Vdd2 of each of the current output units 44 _{1 to} 44m are separated, the MOS transistors M23 to M28 of the current output units 44 _{1 to} 44m are simultaneously turned on or Even when the power supply is turned off, the power supply Vdd1 of the reference current unit 32 hardly changes, and the reference current Iref of the reference current unit 32 hardly changes. For this reason, there is almost no fluctuation in current proportional to the reference current Iref flowing through the drain of the MOS transistor M16, and fluctuation in the light emission luminance of the light emitting diode can be suppressed.

<Modification of Light Emitting Diode Drive Circuit>
FIG. 3 shows a circuit configuration diagram of a modification of the embodiment of the light emitting diode driving circuit of the present invention. In the same figure, a different part from FIG. 2 is demonstrated.

  In FIG. 3, the drain of the MOS transistor M14 is connected to the drain of the n-channel MOS transistor M17. The drain of the MOS transistor M17 is connected to the gate of the MOS transistor M17 and the gate of the n-channel MOS transistor M18. The sources of the MOS transistors M17 and M18 are grounded via resistors Ra and Rb to form a current mirror circuit. Yes. The drain of the MOS transistor M18 is connected to the drain of the p-channel MOS transistor M22 and the gate of the p-channel MOS transistor M21.

  Since the MOS transistors M17 and M18 constitute a current mirror circuit, the drain currents of the MOS transistors M17 and M18 are substantially the same when the gate areas are the same. In this modification, it is possible to suppress the influence of aluminum wiring that constitutes the ground line of the semiconductor integrated circuit.

  In the configuration of FIG. 2, considering the case where the current output unit 44m is arranged farthest from the reference current unit 32 and the ground terminal of the semiconductor integrated circuit is provided in the vicinity of the current output unit 44m, the aluminum of the ground line A resistance value of several Ω is generated by the wiring. Therefore, the source of the MOS transistor M18 of the current output unit 44m is directly grounded, whereas the source of the MOS transistor M17 of the reference current unit 32 is grounded through a resistance value of several Ω, and the MOS transistor M17 , M18 have the same gate area, the drain current of the MOS transistor M18 of the current output unit 44m is different from the drain current of the MOS transistor M17 of the reference current unit 32.

  On the other hand, in the configuration of FIG. 3, if both the resistance values of the resistors Ra and Rb are several hundred Ω, the resistance value of several Ω is provided by the aluminum wiring of the ground line between the current output unit 44m and the reference current unit 32. Even if the resistance Ra occurs, the resistance Ra of several hundred Ω only increases by several Ω, and this change in resistance value can be ignored, and the drain current of the MOS transistor M18 of the current output unit 44m is the reference current unit 32. This can be regarded as the same as the drain current of the MOS transistor M17. That is, the influence of the aluminum wiring of the ground line can be sufficiently suppressed.

  The MOS transistors M15 to M18 correspond to the first current mirror circuit described in the claims, and the switches 36, 38 and 40 and the MOS transistors M21 to M28 correspond to the second current mirror circuit.

It is a block block diagram of one Embodiment of the LED array apparatus using the light emitting diode drive circuit of this invention. It is a circuit block diagram of one Embodiment of the light emitting diode drive circuit of this invention. It is a circuit block diagram of the modification of one Embodiment of the light emitting diode drive circuit of this invention. It is a circuit block diagram of an example of the conventional light emitting diode drive circuit.

Explanation of symbols

30 operational amplifier 31 reference voltage source circuit 32 reference current unit 35 voltage source 36, 38, 40 switch 44 _{1 to} 44 m current output unit 45 _{1 to} 45 m LED
M11 to M28 MOS transistors R11 to R18, Ra, Rb Resistance Vdd1, Vdd2 Power supply

Claims (3)

Light emission comprising a reference current section for generating a reference current and a current output section for a plurality of channels for generating on / off control of a plurality of system switches to generate a plurality of system drive currents proportional to the reference current and supplying them to a light emitting diode A diode drive circuit,
A light emitting diode driving circuit, wherein a power source of the reference current unit and a power source of the current output unit of each channel are separated. The light emitting diode drive circuit according to claim 1,
The current output part of each channel is
A first current mirror circuit configured with a part of the reference current unit and generating a first current based on the reference current;
A second current mirror circuit is provided, which is supplied with the first current and generates a current proportional to the first current corresponding to a switch that is turned on among the switches of the plurality of systems. Light emitting diode drive circuit. The light emitting diode drive circuit according to claim 2,
Each of the first and second current mirror circuits is a cascaded two-stage current mirror circuit.

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