JP2008003267A - Engine sound synthesizer and synthesis method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an engine sound synthesizer capable of synthesizing engine sound which is closer to real sound by regenerating fluctuation. <P>SOLUTION: The engine sound synthesizer includes: a sound data memory for storing two kinds of engine sound data D1 and D2; an address controller for reading the engine sound data D1 and D2 from the sound data memory; and an adder for synthesizing the read engine sound data D1 and D2. A phase between the engine sound data D1 and the engine sound data D2 which are synthesized, is varied for each explosion of an engine. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an engine sound synthesizer and a method thereof, and more particularly to an engine sound synthesizer and a method thereof for synthesizing an engine sound imitating a real sound.

  The engine noise of vehicles such as automobiles and motorcycles is often just noise for roadside residents. Thus, with recent noise regulations as a trigger, improvements for reducing engine noise have been repeated, and nowadays, an engine that has been made extremely quiet has been put into practical use.

  However, for the driver of the vehicle, the engine sound mounted on the vehicle has an attractive feature that is hard to throw away and is one of the pleasures of driving. Therefore, a vehicle equipped with a silenced engine cannot bring sufficient satisfaction to the driver, and may cause a decrease in the willingness to purchase the vehicle.

  Therefore, as described in Patent Document 1 below, by generating a synthetic engine sound in a vehicle interior of a four-wheeled vehicle or a helmet worn by a driver of a two-wheeled vehicle, it is quiet with respect to the surroundings. A configuration has been proposed in which the driver can feel a sufficient volume of engine sound while maintaining the above. Patent Document 1 discloses an engine sound synthesizer that reads engine sound data from storage means and synthesizes engine sound. In this apparatus, engine sound data for one combustion cycle is stored in the storage means for each of a plurality of different engine operating states, and engine sound data corresponding to the actual engine operating state is synthesized. Yes. The synthesized engine sound data for one combustion cycle is repeatedly reproduced according to the engine speed.

  Patent Documents 2 and 3 listed below describe engine simulation sound forming apparatuses that store a plurality of engine sound data corresponding to each operating state, and synthesize them by weighting them. However, in this device, since any engine sound to be synthesized has a similar frequency component, a large engine sound drowns out a small engine sound, and a similar sound is repeated, thereby causing a buzzer-like sound. It becomes a monotonous sound.

By the way, in an actual engine, the combustion pressure and the explosion interval change with each explosion, and accordingly, the engine sound fluctuates in sound pressure and the sound generation interval fluctuates. Therefore, in order to synthesize engine sound that is closer to real sound, it is necessary to reproduce the fluctuation by changing the engine sound for each explosion. Patent Documents 4 and 5 below describe an engine sound synthesizer that reproduces such fluctuations.
JP 2000-001142 A JP 2005-128262 A JP 2005-134485 A Japanese Patent Application No. 2005-130169 (unpublished prior application) Japanese Patent Application No. 2005-147004 (unpublished prior application)

  An object of the present invention is to provide an engine sound synthesizer and method for reproducing fluctuations and synthesizing engine sounds closer to real sounds.

Means for Solving the Problems and Effects of the Invention

  An engine sound synthesizer according to the present invention comprises a storage means for storing a first engine sound and a second engine sound, a reading means for reading out the first engine sound and the second engine sound from the storage means, and a reading The first engine sound and the second engine sound read by the means, and the phase between the first engine sound and the second engine sound synthesized by the synthesizing means. And phase variation means for varying each explosion. The engine sound synthesis method according to the present invention corresponds to the use of the engine sound synthesizer. Since the synthesis target in the present invention is at least two engine sounds, three or more engine sounds may be synthesized.

  According to the present invention, the first engine sound and the second engine sound are synthesized while varying the phase between each engine explosion, so the synthesized engine sound tone varies with each explosion, It can reproduce fluctuations and synthesize engine sounds that are closer to real sounds.

  In one embodiment, the storage means stores a plurality of first engine sound data obtained by time-dividing the first engine sound in the order of addresses, and a plurality of second engine sounds obtained by time-dividing the second engine sound. Data is stored in order of address. The phase changing unit includes a random number generating unit that generates a random number, and a start address generating unit that generates a first start address and a second start address having a difference corresponding to the random number generated by the random number generating unit. The read means generates a first read address that changes (increases or decreases) in order from the first start address generated by the start address generating means and supplies the first read address to the storage means; and the start address Second read address generation means for generating a second read address that changes (increases or decreases) in order from the second start address generated by the generation means and supplies the second read address to the storage means.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals and description thereof will not be repeated.

  Referring to FIG. 1, a motorcycle 1 travels by using an engine 2 composed of, for example, an electronically controlled four-cycle four-cylinder engine as a power source and transmitting driving force from the engine 2 to wheels 3. The engine sound synthesizer 10 according to the embodiment of the present invention is disposed, for example, below a seat 5 on which a driver 4 is seated. On the other hand, the helmet 6 worn by the driver 4 includes an amplifier 7, a speaker 8, and an infrared receiver 9. The amplifier 7 and the infrared receiver 9 are disposed, for example, on the chin guard portion of the helmet 6 (the portion facing the chin of the driver 4), and the speaker 8 faces the ear portion of the helmet 6 (the ear of the driver 4). Part). The infrared receiver 9 is attached so that the reception direction is directed in front of the driver while the driver 4 is wearing the helmet 6.

  An infrared transmitter 14 is disposed in front of the vehicle 4 relative to the driver 4, for example, at the top of the fuel tank 12. The infrared signal generated by the infrared transmitter 14 is received by the infrared receiver 9 provided in the helmet 6. The infrared transmitter 14 is supplied with a voice signal corresponding to the synthesized engine sound data from the engine sound synthesizer 10.

  With such a configuration, an audio signal corresponding to the synthesized engine sound data generated by the engine sound synthesizer 10 is sent from the infrared transmitter 14 to the infrared receiver 9, amplified by the amplifier 7, and then amplified by the speaker 8. Sounded and output.

  The engine 2 is equipped with a throttle opening sensor 11 that detects the throttle opening and a rotation pulse generator 13 that generates a rotation pulse signal of the engine 2, and these output signals are output from the engine sound synthesizer 10. Has been entered. The rotation pulse generator 13 outputs, for example, one pulse for each rotation of the crankshaft. In the case of a four-cycle single-cylinder engine, an explosion occurs at one timing for every two rotations of the crankshaft (rotation at 720 degrees), so two cycles of the rotation pulse signal generated by the rotation pulse generator 13 are the explosion interval. Is equal to

  The throttle opening of the engine 2 corresponds to the amount of operation of an accelerator grip (usually the right grip) provided on the steering wheel. Therefore, an accelerator operation amount sensor that detects the amount of operation of the accelerator grip instead of the throttle opening sensor 11. Can also be input to the engine sound synthesizer 10.

  With such a configuration, the engine sound synthesizer 10 generates a synthesized engine sound signal corresponding to the throttle opening degree of the engine 2 and the like, and a synthesized engine sound corresponding to this is output from the speaker 8. Thereby, even if the engine 2 is extremely quiet, the driver 4 can enjoy driving the motorcycle 1 while feeling the engine sound.

  Referring to FIG. 2, an engine sound synthesizer 10 includes a throttle opening detector 21 that generates throttle opening data Thr based on an output signal of a throttle opening sensor 11 or an accelerator operation amount sensor, and a rotation pulse generator. 13 detects a time interval of the rotation pulse signal Rot generated by the pulse generator 13 and generates a pulse interval data Int, a synthesized engine sound data generating unit 24, and a synthesized engine sound data generating unit 24. And an output processing unit 25 having a digital / analog conversion function for converting engine sound data into an analog sound signal. The synthetic engine sound data generation unit 24 receives the throttle opening data Thr, the rotation pulse signal Rot, and the pulse interval data Int, and the synthetic engine sound data generation unit 24 generates synthetic engine sound data based on these data. To do. The throttle opening degree detection unit 21 and the pulse interval detection unit 22 constitute an operation state detection unit 20 that detects the operation state of the engine. Since the pulse interval data Int is data corresponding to the engine rotation speed on a one-to-one basis, it can be said that the pulse interval data Int is data representing the engine rotation speed after all.

  The pulse interval detection unit 22 can be configured by a counter that counts the reference clock signal CLK (for example, frequency 44.1 kHz) and outputs a count value every time the rotation pulse signal Rot is given and is reset. That is, the reference clock number between the input intervals of the rotation pulse signal Rot becomes the pulse interval data Int.

  Referring to FIG. 3, the synthesized engine sound data generation unit 24 includes a timing controller 26, a start / end address table 28, a random number generation unit 30, a start / end address generation unit 32, and a rotation speed ratio calculation unit 34. And an acceleration / deceleration sound ratio calculation unit 36, buffer sound generation units 41 to 44, and an adder 46.

  The timing controller 26 repeatedly generates the start pulse signals ST1 to ST4 and the start cylinder number data SN in order in response to the rotation pulse signal Rot, the pulse interval data Int, and the reference clock signal CLK. The start pulse signals ST1 to ST4 are given to the buffer sound generation units 41 to 44, respectively. The start cylinder number data SN is given to the start / end address generation unit 32.

The timing controller 26 controls the output timing of sound data from buffer sound generators 41 to 44 described later in accordance with the engine rotation speed. As specifically shown in FIG. 4, the timing controller 26 includes a counter 261, a frequency divider 262, a comparator 263, and a start pulse generator 264. 4 and 5, the counter 261 is reset to zero in response to the rotation pulse signal Rot, and incremented in response to the reference clock signal CLK. The frequency divider 262 multiplies the pulse interval data Int by half. The comparator 263 compares the output value of the counter 261 with the output value of the frequency divider 262, and generates a delayed rotation pulse signal Rotd when the output values are the same. The delayed rotation pulse signal Rotd is delayed by Int / 2 from the rotation pulse signal Rot. The start pulse generator 264 raises the start pulse signal ST1 in response to the first rotation pulse signal Rot, and sets the start cylinder number data SN to “1”. The start pulse generator 264 also raises the rotation pulse signal ST2 in response to the next delayed rotation pulse signal Rotd, and sets the start cylinder number data SN to “2”. The start pulse generator 264 also raises the rotation pulse signal ST3 in response to the next rotation pulse signal Rot, and sets the start cylinder number data SN to “3”. The start pulse generator 264 also raises the rotation pulse signal ST4 in response to the next delayed rotation pulse signal Rotd, and sets the start cylinder number data SN to “4”.
Since the timing controller 26 exemplified here is for four cylinders, the pulse interval data Int is halved. However, in the case of a single cylinder, it is doubled. In the case of two cylinders, it is doubled. In the case of eight cylinders. Can be set to 1/4. The start cylinder number data SN is repeatedly set to “1” for a single cylinder, “1” and “2” for a 2-cylinder, and “1” to “8” for an 8-cylinder. "May be repeatedly set in order.

  As specifically shown in FIG. 6, the start / end address table 28 is divided into an acceleration sound address table 281 and a deceleration sound address table 282. One address table 281 and 282 is provided for each cylinder. Since this example has four cylinders, four address tables 281 and 282 are provided. Incidentally, the address tables 281 and 282 are provided one by one for the single cylinder, two for the two cylinders, and eight for the eight cylinders.

In the acceleration sound address table 281 are registered _a start address S _a and an end address E _{a of a} sound data memory (410 in FIG. 8) in which acceleration sounds are stored. Specifically, start addresses S _{a11 to} S _aN1 in which N pieces of acceleration engine sound data D _a1 (sound identification information = # 1) are stored in association with N pieces of pulse interval data Int _{a1 to} Int _aN. and an end address _E a11 _{~E aN1,} N pieces of acceleration engine sound data _{D a2} (sound identity = # 2) start address is stored _S a12 _{to S aN2} and end address _E a12 _{to E aN2} and register Has been.

The deceleration sound address table 282, the start address S _d and the end address E _d of the sound data memory deceleration sound is stored (410 in FIG. 8) is registered. Specifically, start addresses S _{d11 to} S _dN1 in which N pieces of deceleration engine sound data D _d1 (sound identification information = # 1) are stored in association with N pieces of pulse interval data Int _{d1 to} Int _dN. And end addresses E _{d11 to} E _dN1 , start addresses S _{d12 to} S _dN2 and end addresses E _{d12 to} E _dN2 storing N pieces of deceleration engine sound data D _d2 (sound identification information = # 2) are registered. Has been.

  Referring to FIG. 7, start / end address generator 32 selects a corresponding pair of acceleration sound address table 281 and deceleration sound address table 282 according to start cylinder number data SN output from timing controller 26. (321).

When the pulse interval data Int (Int _{a (X−1)} <Int <Int _aX ) is given, the start / end address generation unit 32 selects the pulse interval data Int _{a (} from the selected acceleration sound address table 281. _X-1) corresponding to the start address S _{a (X-1) 1} and end address E _{a (X-1) 1 of} the acceleration engine sound data D _a1 corresponding to the pulse interval data Int _{a (X-1)} . the start address _{S a (X-1) 2} and the end address _{E a (X-1) 2} of the acceleration engine sound data _{D a2,} the start address _{S aX1} and accelerating the engine sound data _{D a1} corresponding to the pulse interval data _{Int aX} The end address E _aX1 and the start address S _aX2 and the end address E _{aX2 of} the acceleration engine sound data D _a2 corresponding to the pulse interval data Int _aX Reading is performed in response to the rotation pulse signal Rot (322).

When the pulse interval data Int (Int _{d (Y−1)} <Int <Int _dY ) is given, the start / end address generation unit 32 also outputs the pulse interval data Int _d from the selected deceleration sound address table 282. start address of the engine sound data _{D d1} corresponding to _{(Y-1) S d (} Y-1) 1 and the end address _{E d (Y-1) 1} and corresponds to the pulse interval data _{Int d (Y-1)} The start address S _{d (Y−1) 2} and the end address E _{d (Y−1) 2 of the} deceleration engine sound data D _d2 and the start address S _dY1 and end of the engine sound data D _d1 corresponding to the pulse interval data Int _dY The address E _dY1 and the start address S _dY2 and the end address E _{dY2 of} the deceleration engine sound data D _d2 corresponding to the pulse interval data Int _dX are rotated. Reading is performed in response to the pulse signal Rot (322).

The start / end address generation unit 32 further includes start addresses S _{a (X−1) 1} , S _aX1 , S _{d (Y−1) 1} , S _dY1 and end addresses E _{a ( ) of} the engine sound data D _a1 , D _{d1. X-1) 1, E aX1} , E d (Y-1) 1, the _{E dY1} outputs it, the start address of the engine sound data _{D a2, D d2 S a (} X-1) 2, S aX2, S _The random number α generated by the random number generation unit 30 is added to _{d (Y−1) 2} and S _dY2 and output (323).

  Since this example has four cylinders, start and end addresses are generated on the basis of the four start / end address tables 28 and are given to the four buffer sound generation units 41 to 44, respectively. Incidentally, in the case of a single cylinder, start and end addresses are generated based on one start / end address table 28, and are given to all the buffer sound generation units 41 to 44 shown in FIG. In the case of two cylinders, the start and end addresses are generated based on one of the two start / end address tables 28 and given to the odd-numbered buffer sound generators 41 and 43, and the other start / end address table 28 is stored. Based on this, start and end addresses are generated and provided to the even-numbered buffer sound generation units 42 and 44. In the case of eight cylinders, start and end addresses are generated based on the eight start / end address tables 28 and are sequentially supplied to the four buffer sound generation units 41 to 44. That is, the buffer sound generation unit 41 uses the first and fifth start / end address tables 28 alternately, the buffer sound generation unit 42 uses the second and sixth start / end address tables 28 alternately, The buffer sound generator 43 uses the third and seventh start / end address tables 28 alternately, and the buffer sound generator 44 uses the fourth and eighth start / end address tables 28 alternately.

  Each of the buffer sound generation units 41 to 44 includes an address controller 401 to 408, a sound data memory 410, adders 411 to 414, and an interpolation circuit 48 as specifically shown in FIG. 8.

Address controllers 401 to 408 commonly receive corresponding start pulse signals STi (i: 1 to 4) and reference clock signal CLK. The address controller 401 receives the start address S _{a (X−1) 1} and the end address E _{a (X−1) 1} generated by the start / end address generation unit 32. The address controller 402 receives the start address S _{a (X−1) 2} + α and the end address E _{a (X−1) 2} + α generated by the start / end address generation unit 32. The address controller 403 receives the start address S _aX1 and the end address E _aX1 generated by the start / end address generation unit 32. The address controller 404 receives the start address S _aX2 + α and the end address E _aX2 + α generated by the start / end address generation unit 32. The address controller 405 receives the start address S _{d (Y−1) 1} and the end address E _{d (Y−1) 1} generated by the start / end address generation unit 32. The address controller 406 receives the start address S _{d (Y−1) 2} + α and the end address E _{d (Y−1) 2} + α generated by the start / end address generation unit 32. The address controller 407 receives the start address S _dY1 and the end address E _dY1 generated by the start / end address generation unit 32. The address controller 408 receives the start address S _dY2 + α and the end address E _dY2 + α generated by the start / end address generation unit 32.

  Each of the address controllers 401 to 408 is composed of a counter and, as shown in FIG. 9, sets the read address RA to the given start address S in response to the corresponding start pulse signal STi (i: 1 to 4). Thereafter, in response to the reference clock signal CLK, the read address RA is incremented from the start address S to the given end address E, and the read address RD is output.

  In general, the engine sound changes according to the operating state of the engine, that is, the engine speed and the throttle opening. FIG. 10 shows the operating state of the engine. In FIG. 10, the vertical axis indicates the throttle opening, and the horizontal axis indicates the engine speed. The throttle opening continuously changes from fully closed (0%) to fully open (100%). The engine speed continuously changes from the lowest speed during idling to the highest speed. If the throttle opening is suddenly opened from fully closed to fully opened during idling, the engine speed increases from the minimum speed to the maximum speed, and acceleration sound is generated from the engine during that time. Subsequently, when the throttle opening is suddenly closed from fully open to fully closed, the engine speed decreases from the maximum speed to the minimum speed, and a deceleration sound is generated from the engine. Although the engine sound is different for each of the innumerable driving states in the driving region DR shown in FIG. 10, it is impossible to record the engine sounds in all the driving states.

  Therefore, in the present embodiment, the actual acceleration sound at the time of full opening and the actual deceleration sound at the time of full closure are recorded, and the acceleration sound and deceleration sound at the middle throttle opening are not recorded. In addition, N actual acceleration sounds and N actual deceleration sounds are discretely recorded for N engine speeds. Engine sounds at an arbitrary engine speed and an arbitrary throttle opening are synthesized by interpolating the four nearest engine sounds. Details are described in the aforementioned Patent Documents 4 and 5.

However, unlike Patent Documents 4 and 5, in the present embodiment, two types of engine sound data are assigned corresponding to one set of engine speed and throttle opening. Specifically, engine sound data _{Da (X-1) 1} and _{Da (X-1) 2} are assigned corresponding to the engine speed (corresponding to the pulse interval Int _{a (X-1)} ) and the throttle fully opened. It is done. Further, engine sound data D _aX1 and D _aX2 are assigned corresponding to the engine speed (corresponding to the pulse interval Int _aX ) and the throttle fully opened. Further, engine sound data _{Dd (Y-1) 1} and _{Dd (Y-1) 2} are assigned corresponding to the engine speed (corresponding to the pulse interval Int _{d (Y-1)} ) and the throttle fully closed. Further, engine sound data D _dY1 and D _dY2 are assigned corresponding to the engine speed (corresponding to the pulse interval Int _dY ) and the throttle fully closed. Since this example has four cylinders, these (N × 2 × 2) engine sound data are stored in the sound data memory 410 in advance. In this embodiment, Int _{a (X-1)} = Int _{d (Y-1)} and Int _aX = Int _dY , and the acceleration sound when fully opened and the deceleration sound when fully closed at the same engine speed. Is recorded.

Referring to FIG. 8 again, the address controllers 401 to 408 provide the read address RD to the sound data memory 410, so that the engine sound data Da _{(X-1) 1} , Da _{(X-1) 2} , D _{aX1, D aX2, D d (} Y-1) 1, D d (Y-1) read out _{2, D dY1,} D _dY2 respectively.

The adder 411 combines the engine sound data _{Da (X-1) 1} and the engine sound data _{Da (X-1) 2,} and outputs the engine sound data _{Da (X-1)} . The adder 412 synthesizes the engine sound data D _aX1 and the engine sound data D _aX2 and outputs the engine sound data D _aX . Adder 413 synthesizes engine sound data _{Dd (Y-1) 1} and engine sound data _{Dd (Y-1) 2,} and outputs engine sound data _{Dd (Y-1)} . The adder 414 _{combines the} engine sound data D _dY1 and the engine sound data D _dY2 and outputs the engine sound data D _dY .

The interpolation circuit 48 includes multipliers 461 to 464, adders 471 and 472, multipliers 481 and 482, and an adder 490, and engine sound data Da _(X−) synthesized by the adders 411 to 414. ₁₎ , D _aX , D _{d (Y−1)} , D _dY are interpolated to output synthesized engine sound data D.

Referring to FIGS. 3 and 10 again, the rotation speed ratio calculation unit 34, each time a rotation pulse signal Rot is given, before and after the pulse interval data Int given from the pulse interval detector 22 pulse interval data Int a _{( X-1)} and Int _aX are read from the start / end address table 28, and the rotation speed ratios _{Aa (X-1)} and _AaX necessary for the interpolation processing by the interpolation circuit 48 are _expressed by the following equations (1) and (2). Calculate according to

The rotation speed ratio calculation unit 34 also uses the rotation speed ratios A _{d (X−1)} and A _dX instead of the rotation speed ratios A _{a (X−1)} and A _aX as the following expressions (3) and (4). You may make it calculate according to. This is because in the present embodiment, as described above, Int _{a (X−1)} = Int _{d (Y−1)} and Int _aX = Int _dY .

Multipliers 461-464 and adders shown in FIG. 8 471, 472, the ratio rotational speed calculated by the rotational speed ratio calculation unit 34 _{A a (X-1)} and _A engine sound in accordance with _aX data _{D a (X- 1)} and D _aX and D _{a (Y−1)} and D _dY are linearly interpolated in the engine speed direction to generate acceleration engine sound data D _a and deceleration engine sound data D _d .

Referring to FIGS. 3 and 10 again, the acceleration / deceleration sound ratio calculation unit 36 sets the throttle opening Thr (= 0 to 1) given from the throttle opening detection unit 21 every time the rotation pulse signal Rot is given. Based on this, acceleration / deceleration sound ratios R _a (= Thr) and R _d (= 1−Thr) necessary for the interpolation processing by the interpolation circuit 48 are calculated.

The multipliers 481 and 482 and the adder 490 shown in FIG. 8 are accelerating engine sound data D _a and deceleration engine sound data D _d according to the acceleration / deceleration sound ratios R _a and R _d calculated by the acceleration / deceleration sound ratio calculation unit 36. Is subjected to linear interpolation in the throttle opening direction to generate synthetic engine sound data D. Here, the multipliers 481 and 482 and the adder 490 perform linear interpolation. However, if the acceleration / deceleration sound ratios R _a and R _d are calculated using nonlinear coefficients as shown in FIG. 11, nonlinear interpolation is performed. Is also possible.

  Next, two types of engine sound data stored in the sound data memory 410 corresponding to the above-described one set of engine speed and throttle opening will be described in detail.

  An example of two types of engine sound data is shown in FIG. Both engine sound data D1 and D2 are obtained by cutting out several combustion cycles from engine sound data actually recorded. However, as shown in FIG. 12A, silence data for αmax / 2 is added to the head of the engine sound data D1. Here, αmax is the maximum value of the random number α generated by the random number generation unit 30. On the other hand, as shown in FIG. 12B, the engine sound data D2 is added with silence data for αmax at the head. Therefore, the engine sound data D1 is silent from 0 to αmax / 2 and is sound after αmax / 2, whereas the engine sound data D2 is silent from 0 to αmax and is sound after αmax.

  In creating such two types of engine sound data, the same number of combustion cycles may be cut out from the actually recorded engine sound data, but if they are synthesized while shifting the phase as described later, There is a risk of unnatural engine sound like reverberation. Therefore, it is preferable to cut out several different combustion cycles.

  Referring to FIG. 13, engine sound data D1 and D2 are time-divided at a predetermined sampling frequency (for example, 44.1 kHz), and stored in sound data memory 410 from start address S to end address E in the order of addresses.

  As shown in FIG. 13A, the engine sound data D1 stores n engine sound data D1_1 to D1_n which are time-divided in the sound data memory 410 in the order of addresses. Here, D1_1 to D1_αmax / 2 are silent data, and D1_αmax / 2 + 1 to D1_n are sound data. On the other hand, as shown in FIG. 13B, the engine sound data D2 stores m engine sound data D2_1 to D2_m, which are time-divided, in the sound data memory 410 in the order of addresses. Here, D2_1 to D2_αmax are silence data, and D2_αmax + 1 to D2_m are sound data.

  The address controllers 401, 403, 405, and 407 sequentially give the read address RA to the sound data memory 410 from the start address S to the end address E, thereby reading the engine sound data D1. The read start address of the engine sound data D1 is always a constant S. On the other hand, the address controllers 402, 404, 406, and 408 sequentially give the read address RA to the sound data memory 410 from the start address S + α to the end address E, thereby reading the engine sound data D2. Since α is a random number generated by the random number generator 30 within a range from 0 to αmax, the read start address of the engine sound D2 varies within a range from S to S + αmax.

  As described above, according to the embodiment of the present invention, two types of engine sound data D1 and D2 are recorded in advance, and the engine sound data D1 is always read from the constant start address S, and the engine sound data D2 Is read from the start address S + α, which varies with each combustion cycle, and the engine sound data D1 and D2 are synthesized, so that the tone of the engine sound to be synthesized fluctuates with each explosion and realizes fluctuations approximating real sounds. be able to.

  Further, since a silent part is added to the head of the engine sound data D1 and D2 and reproduction is started from the silent part, the engine sound is not suddenly generated, and a smooth and natural synthesized engine sound can be reproduced. Further, since a silent portion corresponding to αmax is added to the head of the engine sound data D2 so that playback is always started from the silent portion even if the reading start address fluctuates, similarly, a smooth and natural synthesized engine sound Can be reproduced. Further, since the silent part added to the head of the engine sound data D1 is set to αmax / 2, the engine sound data D1 and D2 are synthesized with a phase shift of αmax / 2 on average. Therefore, it is possible to reproduce natural synthesis engine sound without bias.

  In the above-described embodiment, two types of engine sounds are shifted and synthesized, but three or more types of engine sounds may be shifted and synthesized. In the above embodiment, two types of engine sounds are synthesized in the buffer sound generation unit. However, one engine sound that is one buffer sound synthesis unit is generated, and another buffer sound generation unit is generated. Thus, another engine sound may be generated and synthesized by the adder 46. In the above embodiment, four buffer sound generation units are provided. However, the number is not particularly limited, and may be one or two or more.

  In the above embodiment, the interpolation processing is performed with four types of engine sound data. However, the interpolation processing may be performed with at least two types of engine sound data. In the above embodiment, the engine sound data is created by recording the actual engine sound. However, the engine sound data can be artificially created. In the above embodiment, the engine sound synthesizer is mounted on a motorcycle. However, the engine sound synthesizer may be mounted on an automobile, a water planing boat, or other transportation equipment. Further, the engine sound synthesizer may be mounted on a game device.

  While the embodiments of the present invention have been described above, the above-described embodiments are merely examples for carrying out the present invention. Therefore, the present invention is not limited to the above-described embodiment, and can be implemented by appropriately modifying the above-described embodiment without departing from the spirit thereof.

1 is a side view showing a schematic configuration of a motorcycle or the like equipped with an engine sound synthesizer according to an embodiment of the present invention. It is a functional block diagram which shows the structure of the engine sound synthesizer in FIG. It is a functional block diagram which shows the structure of the synthetic | combination engine sound data generation part in FIG. FIG. 4 is a functional block diagram illustrating a configuration of a timing controller in FIG. 3. FIG. 5 is a timing chart showing an operation of the timing controller shown in FIG. 4. FIG. 4 is a functional block diagram showing details of a start / end address table in FIG. 3. FIG. 4 is a functional block diagram illustrating details of a start / end address generation unit in FIG. 3. It is a functional block diagram which shows the structure of each buffer sound production | generation part in FIG. FIG. 9 is a timing chart showing an operation of the address controller in FIG. 8. It is a state diagram which shows the driving | running state of the engine sound currently recorded on the sound data memory in FIG. It is explanatory drawing of the acceleration / deceleration sound ratio required for the non-linear interpolation calculated by the acceleration / deceleration sound ratio calculation part in FIG. It is a wave form diagram of two types of engine sound data stored in the sound data memory in FIG. FIG. 10 is an address map of two types of engine sound data shown in FIG. 9. FIG.

Explanation of symbols

2 Engine 14 Infrared transmitter 20 Operating state detector 21 Throttle opening detector 22 Pulse interval detector 24 Synthetic engine sound data generator 28 Start / end address table 30 Random number generator 32 Start / end address generator 34 Rotational speed ratio Calculation unit 36 Acceleration / deceleration sound ratio calculation unit 41-44 Buffer sound generation unit 46, 411-414, 471, 472, 490 Adder 48 Interpolation circuit 264 Start pulse generator 281 Acceleration sound address table 282 Deceleration sound address table 401-408 Address controller 410 Sound data memory 461-464, 481, 482 Multiplier

Claims (8)

Storage means for storing the first engine sound and the second engine sound;
Reading means for reading out the first engine sound and the second engine sound from the storage means;
Synthesizing means for synthesizing the first engine sound and the second engine sound read by the reading means;
An engine sound synthesizer comprising: phase changing means for changing the phase between the first engine sound and the second engine sound synthesized by the synthesizing means for each engine explosion. The engine sound synthesizer according to claim 1,
The storage means stores a plurality of first engine sound data obtained by time-division of the first engine sound in order of addresses, and a plurality of second engine sound data obtained by time-division of the second engine sound in order of addresses. Remember,
The phase varying means is
Random number generating means for generating a random number;
Start address generation means for generating a first start address and a second start address having a difference between random numbers generated by the random number generation means,
The reading means includes
First read address generation means for generating a first read address that changes in order from the first start address generated by the start address generation means and giving the first read address to the storage means;
Engine sound synthesis, comprising: second read address generating means for generating a second read address that changes in order from the second start address generated by the start address generating means and giving the second read address to the storage means apparatus. The engine sound synthesizer according to claim 2,
The storage means stores first silence data at an address before the address of the first engine sound data, and stores second silence data at an address before the address of the second sound data. An engine sound synthesizer characterized by: The engine sound synthesizer according to claim 3,
The random number generated by the random number generation means takes a value from 0 to a predetermined maximum value,
The first silence data has a length corresponding to one half of the maximum value of the random number, and the second silence data has a length corresponding to the maximum value of the random number. Engine sound synthesizer. The engine sound synthesizer according to claim 1, further comprising:
An operating state generating means for generating an operating state indicating the throttle opening and / or the engine speed,
The storage means stores a plurality of first and second engine sounds obtained by recording actual engine sounds for each throttle opening and / or engine speed,
The reading means is a first and second engine sound to be read from the storage means, from among the plurality of first and second engine sounds according to the operating state generated by the operating state generating means. Select at least two first and second engine sounds,
The engine sound synthesizer further includes
An engine sound synthesizer comprising interpolation means for interpolating at least two first and second engine sounds read by the reading means. A reading step of reading out the first engine sound and the second engine sound from the storage means;
A synthesis step of synthesizing the read first engine sound and the second engine sound;
A method for synthesizing engine sound, comprising: a phase changing step for changing the phase between the first engine sound and the second engine sound to be synthesized for each engine explosion. The engine sound synthesis method according to claim 6,
The storage means stores a plurality of first engine sound data obtained by time-division of the first engine sound in order of addresses, and a plurality of second engine sound data obtained by time-division of the second engine sound in order of addresses. Remember,
The phase variation step includes
Generating a random number;
Generating a first start address and a second start address having a difference between the generated random numbers,
The reading step includes
Generating a first read address that changes in order from the first start address generated by the start address generating means and supplying the first read address to the storage means;
Generating a second read address that changes in order from the second start address generated by the start address generating means and providing the second read address to the storage means. Engine,
An operating state generating means for generating an operating state indicating the throttle opening and / or engine speed of the engine;
Storage means for storing the first engine sound and the second engine sound;
Reading means for reading out the first engine sound and the second engine sound from the storage means;
Synthesizing means for synthesizing the first engine sound and the second engine sound read by the reading means;
Phase changing means for changing the phase between the first engine sound and the second engine sound synthesized by the synthesizing means for each engine explosion according to the operating state generated by the operating state generating means; Transportation equipment characterized by comprising.

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