JP2007510221A - デバイスのオペレーティング・モードを選択的にイネーブルするためのシステム - Google Patents

デバイスのオペレーティング・モードを選択的にイネーブルするためのシステム Download PDF

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Publication number
JP2007510221A
JP2007510221A JP2006538108A JP2006538108A JP2007510221A JP 2007510221 A JP2007510221 A JP 2007510221A JP 2006538108 A JP2006538108 A JP 2006538108A JP 2006538108 A JP2006538108 A JP 2006538108A JP 2007510221 A JP2007510221 A JP 2007510221A
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JP
Japan
Prior art keywords
privileged mode
privileged
mode
enabling
operating mode
Prior art date
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Pending
Application number
JP2006538108A
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English (en)
Japanese (ja)
Inventor
ケレイ、ブライアン・ハロルド
チャンドラセクハー、ラメシュ
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Qualcomm Inc
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Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of JP2007510221A publication Critical patent/JP2007510221A/ja
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/468Specific access rights for resources, e.g. using capability register
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1491Protection against unauthorised use of memory or access to memory by checking the subject access rights in a hierarchical protection system, e.g. privilege levels, memory rings

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stored Programmes (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Storage Device Security (AREA)
JP2006538108A 2003-10-29 2004-10-22 デバイスのオペレーティング・モードを選択的にイネーブルするためのシステム Pending JP2007510221A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/697,354 US7496958B2 (en) 2003-10-29 2003-10-29 System for selectively enabling operating modes of a device
PCT/US2004/034882 WO2005045611A2 (fr) 2003-10-29 2004-10-22 Systeme d'activation selective de modes de fonctionnement d'un dispositif

Publications (1)

Publication Number Publication Date
JP2007510221A true JP2007510221A (ja) 2007-04-19

Family

ID=34550335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006538108A Pending JP2007510221A (ja) 2003-10-29 2004-10-22 デバイスのオペレーティング・モードを選択的にイネーブルするためのシステム

Country Status (13)

Country Link
US (1) US7496958B2 (fr)
EP (1) EP1685676A4 (fr)
JP (1) JP2007510221A (fr)
KR (1) KR100901225B1 (fr)
CN (1) CN1894883B (fr)
AR (1) AR046350A1 (fr)
BR (1) BRPI0416055A (fr)
CA (1) CA2543588A1 (fr)
IL (1) IL175175A0 (fr)
PE (1) PE20050853A1 (fr)
RU (1) RU2328078C2 (fr)
TW (1) TW200531492A (fr)
WO (1) WO2005045611A2 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8380987B2 (en) * 2007-01-25 2013-02-19 Microsoft Corporation Protection agents and privilege modes
US8479208B2 (en) * 2007-03-30 2013-07-02 Intel Corporation System partitioning to present software as platform level functionality including mode logic to maintain and enforce partitioning in first and configure partitioning in second mode
JP4897851B2 (ja) * 2009-05-14 2012-03-14 インターナショナル・ビジネス・マシーンズ・コーポレーション コンピュータ・システム及びコンピュータ・システムの制御方法
KR20140105343A (ko) * 2013-02-22 2014-09-01 삼성전자주식회사 디바이스 및 디바이스에서 복수의 모드를 이용한 데이터의 보안 방법
US10810141B2 (en) * 2017-09-29 2020-10-20 Intel Corporation Memory control management of a processor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05334195A (ja) * 1992-06-03 1993-12-17 Toshiba Corp 情報処理装置
JPH07239811A (ja) * 1994-03-01 1995-09-12 Seiko Epson Corp 情報処理装置及びエミュレーション方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993010498A1 (fr) * 1991-11-12 1993-05-27 Microchip Technology Inc. Systeme de securite pour memoire de microcontrôleur sur puce
US5402492A (en) * 1993-06-18 1995-03-28 Ast Research, Inc. Security system for a stand-alone computer
US5442704A (en) * 1994-01-14 1995-08-15 Bull Nh Information Systems Inc. Secure memory card with programmed controlled security access control
US5778070A (en) * 1996-06-28 1998-07-07 Intel Corporation Method and apparatus for protecting flash memory
US5969632A (en) * 1996-11-22 1999-10-19 Diamant; Erez Information security method and apparatus
US6651171B1 (en) * 1999-04-06 2003-11-18 Microsoft Corporation Secure execution of program code
US6795905B1 (en) * 2000-03-31 2004-09-21 Intel Corporation Controlling accesses to isolated memory using a memory controller for isolated execution
US6507904B1 (en) * 2000-03-31 2003-01-14 Intel Corporation Executing isolated mode instructions in a secure system running in privilege rings
US6957332B1 (en) * 2000-03-31 2005-10-18 Intel Corporation Managing a secure platform using a hierarchical executive architecture in isolated execution mode
US6938164B1 (en) * 2000-11-22 2005-08-30 Microsoft Corporation Method and system for allowing code to be securely initialized in a computer
US20020095572A1 (en) * 2001-01-12 2002-07-18 Frank Mitchell R. System and method for providing security profile information to a user of a computer system
US6925570B2 (en) * 2001-05-15 2005-08-02 International Business Machines Corporation Method and system for setting a secure computer environment
US20030014667A1 (en) * 2001-07-16 2003-01-16 Andrei Kolichtchak Buffer overflow attack detection and suppression
US7107460B2 (en) * 2002-02-15 2006-09-12 International Business Machines Corporation Method and system for securing enablement access to a data security device
US7127579B2 (en) * 2002-03-26 2006-10-24 Intel Corporation Hardened extended firmware interface framework
US7130951B1 (en) * 2002-04-18 2006-10-31 Advanced Micro Devices, Inc. Method for selectively disabling interrupts on a secure execution mode-capable processor
US7603551B2 (en) * 2003-04-18 2009-10-13 Advanced Micro Devices, Inc. Initialization of a computer system including a secure execution mode-capable processor
US7082507B1 (en) * 2002-04-18 2006-07-25 Advanced Micro Devices, Inc. Method of controlling access to an address translation data structure of a computer system
US20030226014A1 (en) * 2002-05-31 2003-12-04 Schmidt Rodney W. Trusted client utilizing security kernel under secure execution mode
US20030229794A1 (en) * 2002-06-07 2003-12-11 Sutton James A. System and method for protection against untrusted system management code by redirecting a system management interrupt and creating a virtual machine container
US7590870B2 (en) * 2003-04-10 2009-09-15 Lenovo (Singapore) Pte. Ltd. Physical presence determination in a trusted platform

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05334195A (ja) * 1992-06-03 1993-12-17 Toshiba Corp 情報処理装置
JPH07239811A (ja) * 1994-03-01 1995-09-12 Seiko Epson Corp 情報処理装置及びエミュレーション方法

Also Published As

Publication number Publication date
CN1894883B (zh) 2010-10-06
AR046350A1 (es) 2005-12-07
US20050097345A1 (en) 2005-05-05
CA2543588A1 (fr) 2005-05-19
EP1685676A2 (fr) 2006-08-02
TW200531492A (en) 2005-09-16
KR20060083434A (ko) 2006-07-20
WO2005045611A3 (fr) 2006-06-15
IL175175A0 (en) 2006-09-05
RU2006118360A (ru) 2007-12-10
EP1685676A4 (fr) 2007-05-09
BRPI0416055A (pt) 2007-01-02
WO2005045611A2 (fr) 2005-05-19
KR100901225B1 (ko) 2009-06-08
CN1894883A (zh) 2007-01-10
US7496958B2 (en) 2009-02-24
PE20050853A1 (es) 2005-11-10
RU2328078C2 (ru) 2008-06-27

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